- mvebu: a38x: Define supported UART baudrates (Pali) - kwbimage: Misc improvements (Pali) - espressobin/turris_mox/turris_omnia: Enable some more devices like SATA via PCIe, SATA & NVMe (Pali) - a37xx: Remove unused CONFIG_DEBUG_UART_SHIFT options (Pali) - turris_omnia: Disable MCU watchdog in SPL when booting over UART (Marek) - kwbimage: Fix some Coverity issue (Heinrich)
This commit is contained in:
commit
48cf96fbdf
12 changed files with 138 additions and 101 deletions
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@ -14,6 +14,7 @@
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#include <asm/pl310.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include <asm/spl.h>
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#include <sdhci.h>
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#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3))
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@ -80,6 +81,65 @@ int mvebu_soc_family(void)
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return MVEBU_SOC_UNKNOWN;
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}
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u32 get_boot_device(void)
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{
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u32 val;
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u32 boot_device;
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/*
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* First check, if UART boot-mode is active. This can only
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* be done, via the bootrom error register. Here the
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* MSB marks if the UART mode is active.
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*/
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val = readl(CONFIG_BOOTROM_ERR_REG);
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boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS;
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debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device);
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if (boot_device == BOOTROM_ERR_MODE_UART)
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return BOOT_DEVICE_UART;
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#ifdef CONFIG_ARMADA_38X
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/*
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* If the bootrom error code contains any other than zeros it's an
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* error condition and the bootROM has fallen back to UART boot
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*/
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boot_device = (val & BOOTROM_ERR_CODE_MASK) >> BOOTROM_ERR_CODE_OFFS;
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if (boot_device)
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return BOOT_DEVICE_UART;
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#endif
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/*
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* Now check the SAR register for the strapped boot-device
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*/
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val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */
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boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
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debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
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switch (boot_device) {
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#ifdef BOOT_FROM_NAND
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case BOOT_FROM_NAND:
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return BOOT_DEVICE_NAND;
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#endif
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#ifdef BOOT_FROM_MMC
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case BOOT_FROM_MMC:
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case BOOT_FROM_MMC_ALT:
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return BOOT_DEVICE_MMC1;
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#endif
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case BOOT_FROM_UART:
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#ifdef BOOT_FROM_UART_ALT
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case BOOT_FROM_UART_ALT:
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#endif
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return BOOT_DEVICE_UART;
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#ifdef BOOT_FROM_SATA
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case BOOT_FROM_SATA:
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case BOOT_FROM_SATA_ALT:
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return BOOT_DEVICE_SATA;
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#endif
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case BOOT_FROM_SPI:
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return BOOT_DEVICE_SPI;
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default:
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return BOOT_DEVICE_BOOTROM;
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};
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}
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#if defined(CONFIG_DISPLAY_CPUINFO)
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#if defined(CONFIG_ARMADA_375)
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@ -148,6 +148,8 @@ void __noreturn return_to_bootrom(void);
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int mv_sdh_init(unsigned long regbase, u32 max_clk, u32 min_clk, u32 quirks);
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#endif
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u32 get_boot_device(void);
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void get_sar_freq(struct sar_freq_modes *sar_freq);
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/*
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@ -189,7 +189,7 @@
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#define BOOT_FROM_SPI 0x3
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#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
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#else
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#elif defined(CONFIG_ARMADA_XP)
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/* SAR values for Armada XP */
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#define CONFIG_SAR_REG (MVEBU_REGISTER(0x18230))
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#define CONFIG_SAR2_REG (MVEBU_REGISTER(0x18234))
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@ -171,74 +171,6 @@ int spl_parse_board_header(struct spl_image_info *spl_image,
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return 0;
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}
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static u32 get_boot_device(void)
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{
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u32 val;
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u32 boot_device;
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/*
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* First check, if UART boot-mode is active. This can only
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* be done, via the bootrom error register. Here the
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* MSB marks if the UART mode is active.
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*/
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val = readl(CONFIG_BOOTROM_ERR_REG);
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boot_device = (val & BOOTROM_ERR_MODE_MASK) >> BOOTROM_ERR_MODE_OFFS;
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debug("BOOTROM_REG=0x%08x boot_device=0x%x\n", val, boot_device);
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if (boot_device == BOOTROM_ERR_MODE_UART)
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return BOOT_DEVICE_UART;
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#ifdef CONFIG_ARMADA_38X
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/*
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* If the bootrom error code contains any other than zeros it's an
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* error condition and the bootROM has fallen back to UART boot
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*/
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boot_device = (val & BOOTROM_ERR_CODE_MASK) >> BOOTROM_ERR_CODE_OFFS;
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if (boot_device)
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return BOOT_DEVICE_UART;
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#endif
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/*
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* Now check the SAR register for the strapped boot-device
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*/
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val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */
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boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS;
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debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device);
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switch (boot_device) {
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#ifdef BOOT_FROM_NAND
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case BOOT_FROM_NAND:
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return BOOT_DEVICE_NAND;
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#endif
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#ifdef BOOT_FROM_MMC
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case BOOT_FROM_MMC:
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case BOOT_FROM_MMC_ALT:
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return BOOT_DEVICE_MMC1;
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#endif
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case BOOT_FROM_UART:
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#ifdef BOOT_FROM_UART_ALT
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case BOOT_FROM_UART_ALT:
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#endif
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return BOOT_DEVICE_UART;
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#ifdef BOOT_FROM_SATA
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case BOOT_FROM_SATA:
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case BOOT_FROM_SATA_ALT:
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return BOOT_DEVICE_SATA;
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#endif
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case BOOT_FROM_SPI:
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return BOOT_DEVICE_SPI;
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default:
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return BOOT_DEVICE_BOOTROM;
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};
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}
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#else
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static u32 get_boot_device(void)
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{
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return BOOT_DEVICE_BOOTROM;
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}
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#endif
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u32 spl_boot_device(void)
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{
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u32 boot_device = get_boot_device();
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@ -285,6 +217,15 @@ u32 spl_boot_device(void)
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}
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}
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#else
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_BOOTROM;
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}
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#endif
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int board_return_to_bootrom(struct spl_image_info *spl_image,
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struct spl_boot_device *bootdev)
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{
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@ -129,7 +129,6 @@ static int omnia_mcu_read(u8 cmd, void *buf, int len)
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return dm_i2c_read(chip, cmd, buf, len);
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}
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#ifndef CONFIG_SPL_BUILD
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static int omnia_mcu_write(u8 cmd, const void *buf, int len)
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{
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struct udevice *chip;
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@ -158,7 +157,6 @@ static bool disable_mcu_watchdog(void)
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return true;
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}
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#endif
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static bool omnia_detect_sata(void)
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{
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@ -325,7 +323,6 @@ struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)
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return &board_topology_map_1g;
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}
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#ifndef CONFIG_SPL_BUILD
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static int set_regdomain(void)
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{
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struct omnia_eeprom oep;
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@ -394,7 +391,6 @@ static void handle_reset_button(void)
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}
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}
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}
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#endif
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int board_early_init_f(void)
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{
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@ -423,24 +419,35 @@ int board_early_init_f(void)
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return 0;
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}
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void spl_board_init(void)
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{
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/*
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* If booting from UART, disable MCU watchdog in SPL, since uploading
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* U-Boot proper can take too much time and trigger it.
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*/
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if (get_boot_device() == BOOT_DEVICE_UART)
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disable_mcu_watchdog();
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
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#ifndef CONFIG_SPL_BUILD
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disable_mcu_watchdog();
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#endif
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return 0;
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}
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int board_late_init(void)
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{
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#ifndef CONFIG_SPL_BUILD
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/*
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* If not booting from UART, MCU watchdog was not disabled in SPL,
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* disable it now.
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*/
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if (get_boot_device() != BOOT_DEVICE_UART)
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disable_mcu_watchdog();
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set_regdomain();
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handle_reset_button();
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#endif
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pci_init();
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return 0;
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@ -63,7 +63,6 @@ CONFIG_PHY=y
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CONFIG_MVEBU_COMPHY_SUPPORT=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_ARMADA_37XX=y
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_DEBUG_UART_ANNOUNCE=y
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CONFIG_MVEBU_A3700_UART=y
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CONFIG_MVEBU_A3700_SPI=y
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@ -30,6 +30,7 @@ CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_MTD=y
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CONFIG_CMD_PCI=y
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CONFIG_CMD_SATA=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_WDT=y
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@ -46,6 +47,7 @@ CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_AHCI_PCI=y
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CONFIG_AHCI_MVEBU=y
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CONFIG_CLK=y
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CONFIG_CLK_MVEBU=y
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@ -77,7 +79,6 @@ CONFIG_MVEBU_COMPHY_SUPPORT=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_ARMADA_37XX=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_DEBUG_UART_ANNOUNCE=y
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CONFIG_MVEBU_A3700_UART=y
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CONFIG_MVEBU_A3700_SPI=y
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@ -12,6 +12,7 @@ CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="armada-3720-turris-mox"
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CONFIG_DEBUG_UART_BASE=0xd0012000
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CONFIG_DEBUG_UART=y
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CONFIG_AHCI=y
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CONFIG_OF_BOARD_FIXUP=y
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CONFIG_DISTRO_DEFAULTS=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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@ -32,6 +33,7 @@ CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_MTD=y
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CONFIG_CMD_PCI=y
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CONFIG_CMD_SATA=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_WDT=y
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|
@ -47,6 +49,8 @@ CONFIG_MAC_PARTITION=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SCSI_AHCI=y
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CONFIG_AHCI_PCI=y
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CONFIG_BUTTON=y
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CONFIG_BUTTON_GPIO=y
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CONFIG_CLK=y
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|
@ -81,7 +85,8 @@ CONFIG_PINCTRL_ARMADA_37XX=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_RTC=y
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CONFIG_RTC_DS1307=y
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SCSI=y
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CONFIG_DM_SCSI=y
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CONFIG_DEBUG_UART_ANNOUNCE=y
|
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CONFIG_MVEBU_A3700_UART=y
|
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CONFIG_MVEBU_A3700_SPI=y
|
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|
|
|
@ -33,6 +33,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_DISPLAY_BOARDINFO is not set
|
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CONFIG_DISPLAY_BOARDINFO_LATE=y
|
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CONFIG_MISC_INIT_R=y
|
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CONFIG_SPL_BOARD_INIT=y
|
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CONFIG_SPL_I2C=y
|
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CONFIG_CMD_MEMTEST=y
|
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CONFIG_SYS_ALT_MEMTEST=y
|
||||
|
@ -77,6 +78,7 @@ CONFIG_PHY_MARVELL=y
|
|||
CONFIG_PHY_GIGE=y
|
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CONFIG_MVNETA=y
|
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CONFIG_MII=y
|
||||
CONFIG_NVME=y
|
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CONFIG_PCI=y
|
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CONFIG_PCI_MVEBU=y
|
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CONFIG_DM_RTC=y
|
||||
|
|
|
@ -79,7 +79,6 @@ CONFIG_PINCTRL=y
|
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CONFIG_PINCTRL_ARMADA_37XX=y
|
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CONFIG_DM_REGULATOR_FIXED=y
|
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CONFIG_DM_REGULATOR_GPIO=y
|
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CONFIG_DEBUG_UART_SHIFT=2
|
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CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
CONFIG_MVEBU_A3700_UART=y
|
||||
CONFIG_MVEBU_A3700_SPI=y
|
||||
|
|
|
@ -39,6 +39,15 @@
|
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#define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARMADA_38X) && !defined(CONFIG_SYS_BAUDRATE_TABLE)
|
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#define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \
|
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9600, 19200, 38400, 57600, 115200, \
|
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230400, 460800, 500000, 576000, \
|
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921600, 1000000, 1152000, 1500000, \
|
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2000000, 2500000, 3125000, 4000000, \
|
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5150000 }
|
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#endif
|
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|
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/* auto boot */
|
||||
|
||||
/*
|
||||
|
|
|
@ -5,8 +5,6 @@
|
|||
*
|
||||
* (C) Copyright 2013 Thomas Petazzoni
|
||||
* <thomas.petazzoni@free-electrons.com>
|
||||
*
|
||||
* Not implemented: support for the register headers in v1 images
|
||||
*/
|
||||
|
||||
#include "imagetool.h"
|
||||
|
@ -59,13 +57,13 @@ struct hash_v1 {
|
|||
};
|
||||
|
||||
struct boot_mode boot_modes[] = {
|
||||
{ 0x4D, "i2c" },
|
||||
{ 0x5A, "spi" },
|
||||
{ 0x8B, "nand" },
|
||||
{ 0x78, "sata" },
|
||||
{ 0x9C, "pex" },
|
||||
{ 0x69, "uart" },
|
||||
{ 0xAE, "sdio" },
|
||||
{ IBR_HDR_I2C_ID, "i2c" },
|
||||
{ IBR_HDR_SPI_ID, "spi" },
|
||||
{ IBR_HDR_NAND_ID, "nand" },
|
||||
{ IBR_HDR_SATA_ID, "sata" },
|
||||
{ IBR_HDR_PEX_ID, "pex" },
|
||||
{ IBR_HDR_UART_ID, "uart" },
|
||||
{ IBR_HDR_SDIO_ID, "sdio" },
|
||||
{},
|
||||
};
|
||||
|
||||
|
@ -75,10 +73,10 @@ struct nand_ecc_mode {
|
|||
};
|
||||
|
||||
struct nand_ecc_mode nand_ecc_modes[] = {
|
||||
{ 0x00, "default" },
|
||||
{ 0x01, "hamming" },
|
||||
{ 0x02, "rs" },
|
||||
{ 0x03, "disabled" },
|
||||
{ IBR_HDR_ECC_DEFAULT, "default" },
|
||||
{ IBR_HDR_ECC_FORCED_HAMMING, "hamming" },
|
||||
{ IBR_HDR_ECC_FORCED_RS, "rs" },
|
||||
{ IBR_HDR_ECC_DISABLED, "disabled" },
|
||||
{},
|
||||
};
|
||||
|
||||
|
@ -832,6 +830,12 @@ static int kwb_dump_fuse_cmds(struct secure_hdr_v1 *sec_hdr)
|
|||
if (!strcmp(e->name, "a38x")) {
|
||||
FILE *out = fopen("kwb_fuses_a38x.txt", "w+");
|
||||
|
||||
if (!out) {
|
||||
fprintf(stderr, "Couldn't open eFuse settings: '%s': %s\n",
|
||||
"kwb_fuses_a38x.txt", strerror(errno));
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
kwb_dump_fuse_cmds_38x(out, sec_hdr);
|
||||
fclose(out);
|
||||
goto done;
|
||||
|
@ -1060,6 +1064,11 @@ int export_pub_kak_hash(RSA *kak, struct secure_hdr_v1 *secure_hdr)
|
|||
int res;
|
||||
|
||||
hashf = fopen("pub_kak_hash.txt", "w");
|
||||
if (!hashf) {
|
||||
fprintf(stderr, "Couldn't open hash file: '%s': %s\n",
|
||||
"pub_kak_hash.txt", strerror(errno));
|
||||
return 1;
|
||||
}
|
||||
|
||||
res = kwb_export_pubkey(kak, &secure_hdr->kak, hashf, "KAK");
|
||||
|
||||
|
@ -1076,7 +1085,7 @@ int kwb_sign_csk_with_kak(struct image_tool_params *params,
|
|||
int csk_idx = image_get_csk_index();
|
||||
struct sig_v1 tmp_sig;
|
||||
|
||||
if (csk_idx >= 16) {
|
||||
if (csk_idx < 0 || csk_idx > 15) {
|
||||
fprintf(stderr, "Invalid CSK index %d\n", csk_idx);
|
||||
return 1;
|
||||
}
|
||||
|
@ -1670,6 +1679,9 @@ static int kwbimage_verify_header(unsigned char *ptr, int image_size,
|
|||
if (mhdr->ext & 0x1) {
|
||||
struct ext_hdr_v0 *ext_hdr;
|
||||
|
||||
if (header_size + sizeof(*ext_hdr) > image_size)
|
||||
return -FDT_ERR_BADSTRUCTURE;
|
||||
|
||||
ext_hdr = (struct ext_hdr_v0 *)
|
||||
(ptr + sizeof(struct main_hdr_v0));
|
||||
checksum = image_checksum8(ext_hdr,
|
||||
|
@ -1678,9 +1690,7 @@ static int kwbimage_verify_header(unsigned char *ptr, int image_size,
|
|||
if (checksum != ext_hdr->checksum)
|
||||
return -FDT_ERR_BADSTRUCTURE;
|
||||
}
|
||||
}
|
||||
|
||||
if (image_version((void *)ptr) == 1) {
|
||||
} else if (image_version((void *)ptr) == 1) {
|
||||
struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr;
|
||||
uint32_t offset;
|
||||
uint32_t size;
|
||||
|
@ -1744,12 +1754,14 @@ static int kwbimage_verify_header(unsigned char *ptr, int image_size,
|
|||
return -FDT_ERR_BADSTRUCTURE;
|
||||
|
||||
size = le32_to_cpu(mhdr->blocksize);
|
||||
if (offset + size > image_size || size % 4 != 0)
|
||||
if (size < 4 || offset + size > image_size || size % 4 != 0)
|
||||
return -FDT_ERR_BADSTRUCTURE;
|
||||
|
||||
if (image_checksum32(ptr + offset, size - 4) !=
|
||||
*(uint32_t *)(ptr + offset + size - 4))
|
||||
return -FDT_ERR_BADSTRUCTURE;
|
||||
} else {
|
||||
return -FDT_ERR_BADSTRUCTURE;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
Loading…
Reference in a new issue