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ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bit

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commit 20c89a28548cdab11f88d2ec8936344af0686a1e upstream.

WL phase correcion stage is failing while using bus_width of 16bit, not
to be fix this stage is un-necessary when working with bus_width of 16
bit.

Signed-off-by: Moti Buskila <motib@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
This commit is contained in:
Moti Buskila 2021-02-19 17:11:20 +01:00 committed by Stefan Roese
parent 32e7a6baef
commit 44aeb28c9b
1 changed files with 3 additions and 0 deletions
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3
drivers/ddr/marvell/a38x/ddr3_training_db.c
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@ -833,6 +833,9 @@ u32 pattern_table_get_word(u32 dev_num, enum hws_pattern type, u8 index)
pattern = pattern_table_get_isi_word16(index);
break;
default:
if (((int)type == 29) || ((int)type == 30))
break;
printf("error: %s: unsupported pattern type [%d] found\n",
__func__, (int)type);
pattern = 0;