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ARM: renesas: falcon: Enable RWDT reset for V3U Falcon

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Enable RWDT reset on Reset Controller so that it can be used as
reset trigger source for V3U Falcon.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Use one current_el() in board_init
This commit is contained in:
Hai Pham 2023-02-28 00:02:19 +01:00 committed by Marek Vasut
parent 72eb1f5e19
commit 33c3ec22d4
1 changed files with 11 additions and 5 deletions
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16
board/renesas/falcon/falcon.c
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@ -83,21 +83,27 @@ int board_early_init_f(void)
return 0; return 0;
} }
#define RST_BASE 0xE6160000 /* Domain0 */
#define RST_SRESCR0 (RST_BASE + 0x18)
#define RST_SPRES 0x5AA58000
#define RST_WDTRSTCR (RST_BASE + 0x10)
#define RST_RWDT 0xA55A8002
int board_init(void) int board_init(void)
{ {
/* address of boot parameters */ /* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000; gd->bd->bi_boot_params = CONFIG_TEXT_BASE + 0x50000;
if (current_el() == 3) if (current_el() == 3) {
init_gic_v3(); init_gic_v3();
/* Enable RWDT reset */
writel(RST_RWDT, RST_WDTRSTCR);
}
return 0; return 0;
} }
#define RST_BASE 0xE6160000 /* Domain0 */
#define RST_SRESCR0 (RST_BASE + 0x18)
#define RST_SPRES 0x5AA58000
void reset_cpu(void) void reset_cpu(void)
{ {
writel(RST_SPRES, RST_SRESCR0); writel(RST_SPRES, RST_SRESCR0);