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armv8: fsl-layerscape: Add support of disabling core prefetch

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Instruction prefetch feature is by default enabled during core
release. This patch add support of disabling instruction prefetch
by setting core mask in PPA. Here each core mask bit represents a
core and prefetch is disabled at the time of core release.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Prabhakar Kushwaha 2017-11-10 11:32:52 +05:30 committed by York Sun
parent 6b6b7e8a6c
commit 2db53cfe96
2 changed files with 58 additions and 0 deletions
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38
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
View file

@ -29,6 +29,7 @@
#include <fsl_ddr.h>
#endif
#include <asm/arch/clock.h>
#include <hwconfig.h>
DECLARE_GLOBAL_DATA_PTR;
@ -494,6 +495,41 @@ static inline int check_psci(void)
return 0;
}
static void config_core_prefetch(void)
{
char *buf = NULL;
char buffer[HWCONFIG_BUFFER_SIZE];
const char *prefetch_arg = NULL;
size_t arglen;
unsigned int mask;
struct pt_regs regs;
if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0)
buf = buffer;
prefetch_arg = hwconfig_subarg_f("core_prefetch", "disable",
&arglen, buf);
if (prefetch_arg) {
mask = simple_strtoul(prefetch_arg, NULL, 0) & 0xff;
if (mask & 0x1) {
printf("Core0 prefetch can't be disabled\n");
return;
}
#define SIP_PREFETCH_DISABLE_64 0xC200FF13
regs.regs[0] = SIP_PREFETCH_DISABLE_64;
regs.regs[1] = mask;
smc_call(&regs);
if (regs.regs[0])
printf("Prefetch disable config failed for mask ");
else
printf("Prefetch disable config passed for mask ");
printf("0x%x\n", mask);
}
}
int arch_early_init_r(void)
{
#ifdef CONFIG_SYS_FSL_ERRATUM_A009635
@ -521,6 +557,8 @@ int arch_early_init_r(void)
fsl_rgmii_init();
#endif
config_core_prefetch();
#ifdef CONFIG_SYS_HAS_SERDES
fsl_serdes_init();
#endif

20
arch/arm/cpu/armv8/fsl-layerscape/doc/README.core_prefetch Normal file
View file

@ -0,0 +1,20 @@
Core instruction prefetch disable
---------------------------------
To disable instruction prefetch of core; hwconfig needs to be updated.
for e.g.
setenv hwconfig 'fsl_ddr:bank_intlv=auto;core_prefetch:disable=0x02'
Here 0x02 can be replaced with any valid value except Mask[0] bit. It
represents 64 bit mask. The 64-bit Mask has one bit for each core.
Mask[0] = core0
Mask[1] = core1
Mask[2] = core2
etc
If the bit is set ('b1) in the mask, then prefetch is disabled for
that core when it is released from reset.
core0 prefetch should not be disabled i.e. Mask[0] should never be set.
Setting Mask[0] may lead to undefined behavior.
Once disabled, prefetch remains disabled until the next reset.
There is no function to re-enable prefetch.