dm: memory: Introduce new uclass
Introduce UCLASS_MEMORY for future Memory Controller device drivers. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
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8 changed files with 77 additions and 0 deletions
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@ -932,6 +932,10 @@
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};
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};
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};
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};
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memory-controller {
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compatible = "sandbox,memory";
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};
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misc-test {
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misc-test {
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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@ -4,6 +4,23 @@
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menu "Memory Controller drivers"
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menu "Memory Controller drivers"
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config MEMORY
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bool "Enable Driver Model for Memory Controller drivers"
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depends on DM
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help
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Enable driver model for Memory Controller devices.
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These devices provide Memory bus interface to various devices like
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SRAM, Ethernet adapters, FPGAs, etc.
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For now this uclass has no methods yet.
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config SANDBOX_MEMORY
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bool "Enable Sandbox Memory Controller driver"
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depends on SANDBOX && MEMORY
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help
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This is a driver model based Memory Controller driver for sandbox.
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Currently it is a stub only, as there are no usable uclass methods
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yet.
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config STM32_FMC2_EBI
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config STM32_FMC2_EBI
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bool "Support for FMC2 External Bus Interface on STM32MP SoCs"
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bool "Support for FMC2 External Bus Interface on STM32MP SoCs"
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depends on ARCH_STM32MP
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depends on ARCH_STM32MP
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@ -1,3 +1,5 @@
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obj-$(CONFIG_MEMORY) += memory-uclass.o
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obj-$(CONFIG_SANDBOX_MEMORY) += memory-sandbox.o
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obj-$(CONFIG_STM32_FMC2_EBI) += stm32-fmc2-ebi.o
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obj-$(CONFIG_STM32_FMC2_EBI) += stm32-fmc2-ebi.o
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obj-$(CONFIG_TI_AEMIF) += ti-aemif.o
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obj-$(CONFIG_TI_AEMIF) += ti-aemif.o
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18
drivers/memory/memory-sandbox.c
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18
drivers/memory/memory-sandbox.c
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@ -0,0 +1,18 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2022
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* Texas Instruments Incorporated, <www.ti.com>
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*/
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#include <dm.h>
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static const struct udevice_id sandbox_memory_match[] = {
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{ .compatible = "sandbox,memory" },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(sandbox_memory) = {
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.name = "sandbox_memory",
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.id = UCLASS_MEMORY,
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.of_match = sandbox_memory_match,
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};
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13
drivers/memory/memory-uclass.c
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13
drivers/memory/memory-uclass.c
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@ -0,0 +1,13 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2022
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* Texas Instruments Incorporated, <www.ti.com>
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*/
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#include <dm.h>
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UCLASS_DRIVER(memory) = {
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.name = "memory",
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.id = UCLASS_MEMORY,
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.post_bind = dm_scan_fdt_dev,
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};
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@ -77,6 +77,7 @@ enum uclass_id {
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UCLASS_MASS_STORAGE, /* Mass storage device */
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UCLASS_MASS_STORAGE, /* Mass storage device */
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UCLASS_MDIO, /* MDIO bus */
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UCLASS_MDIO, /* MDIO bus */
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UCLASS_MDIO_MUX, /* MDIO MUX/switch */
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UCLASS_MDIO_MUX, /* MDIO MUX/switch */
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UCLASS_MEMORY, /* Memory Controller device */
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UCLASS_MISC, /* Miscellaneous device */
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UCLASS_MISC, /* Miscellaneous device */
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UCLASS_MMC, /* SD / MMC card or chip */
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UCLASS_MMC, /* SD / MMC card or chip */
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UCLASS_MOD_EXP, /* RSA Mod Exp device */
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UCLASS_MOD_EXP, /* RSA Mod Exp device */
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@ -57,6 +57,7 @@ obj-$(CONFIG_LED) += led.o
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obj-$(CONFIG_DM_MAILBOX) += mailbox.o
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obj-$(CONFIG_DM_MAILBOX) += mailbox.o
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obj-$(CONFIG_DM_MDIO) += mdio.o
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obj-$(CONFIG_DM_MDIO) += mdio.o
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obj-$(CONFIG_DM_MDIO_MUX) += mdio_mux.o
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obj-$(CONFIG_DM_MDIO_MUX) += mdio_mux.o
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obj-$(CONFIG_MEMORY) += memory.o
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obj-$(CONFIG_MISC) += misc.o
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obj-$(CONFIG_MISC) += misc.o
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obj-$(CONFIG_DM_MMC) += mmc.o
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obj-$(CONFIG_DM_MMC) += mmc.o
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obj-$(CONFIG_CMD_MUX) += mux-cmd.o
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obj-$(CONFIG_CMD_MUX) += mux-cmd.o
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21
test/dm/memory.c
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21
test/dm/memory.c
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@ -0,0 +1,21 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2022
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* Texas Instruments Incorporated, <www.ti.com>
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*/
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#include <dm.h>
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#include <dm/test.h>
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#include <test/test.h>
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#include <test/ut.h>
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static int dm_test_memory(struct unit_test_state *uts)
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{
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struct udevice *dev;
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ut_assertok(uclass_first_device_err(UCLASS_MEMORY, &dev));
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return 0;
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}
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DM_TEST(dm_test_memory, UT_TESTF_SCAN_FDT);
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