arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz
CLKMGR_INTOSC_HZ should be 400MHz, instead of 460MHz. Removed also unused macros CLKMGR_EOSC1_HZ and CLKMGR_FPGA_CLK_HZ. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
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1 changed files with 1 additions and 3 deletions
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@ -13,9 +13,7 @@ const unsigned int cm_get_f2s_sdr_ref_clk_hz(void);
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const unsigned int cm_get_intosc_clk_hz(void);
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const unsigned int cm_get_fpga_clk_hz(void);
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#define CLKMGR_EOSC1_HZ 25000000
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#define CLKMGR_INTOSC_HZ 460000000
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#define CLKMGR_FPGA_CLK_HZ 50000000
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#define CLKMGR_INTOSC_HZ 400000000
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/* Clock configuration accessors */
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const struct cm_config * const cm_get_default_config(void);
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