ARM: rmobile: Enable RPC on Salvator-X, ULCB, Ebisu
Enable the RPC Hyperflash driver on R8A7795,R8A7796,R8A77965 Salvator-X,ULCB and R8A77990 Ebisu. Note that to make the HF accessible, mainline ATF is mandatory and must be built with RCAR_RPC_HYPERFLASH_LOCKED=0 . Note that this is intended for development and testing convenience only and must be disabled in deployment for platform security reasons. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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14 changed files with 91 additions and 0 deletions
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@ -8,6 +8,11 @@
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#include "r8a77950-salvator-x.dts"
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#include "r8a77950-u-boot.dtsi"
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&rpc {
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reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
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status = "okay";
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};
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&sdhi0 {
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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@ -19,6 +19,11 @@
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};
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};
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&rpc {
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reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
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status = "okay";
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};
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&sdhi0 {
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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@ -8,6 +8,11 @@
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#include "r8a77960-salvator-x.dts"
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#include "r8a77960-u-boot.dtsi"
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&rpc {
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reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
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status = "okay";
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};
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&sdhi0 {
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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@ -19,6 +19,11 @@
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};
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};
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&rpc {
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reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
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status = "okay";
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};
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&sdhi0 {
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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@ -8,6 +8,11 @@
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#include "r8a77965-salvator-x.dts"
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#include "r8a77965-u-boot.dtsi"
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&rpc {
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reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
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status = "okay";
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};
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&sdhi0 {
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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@ -19,6 +19,11 @@
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};
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};
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&rpc {
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reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
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status = "okay";
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};
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&sdhi0 {
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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@ -18,6 +18,11 @@
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};
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};
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&rpc {
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reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
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status = "okay";
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};
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&sdhi0 {
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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@ -7,3 +7,8 @@
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#include "r8a77995-draak.dts"
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#include "r8a77995-u-boot.dtsi"
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&rpc {
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reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
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status = "okay";
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};
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@ -49,6 +49,11 @@ CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_RENESAS_SDHI=y
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CONFIG_MTD=y
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CONFIG_DM_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_CFI_FLASH=y
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CONFIG_RENESAS_RPC_HF=y
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CONFIG_BITBANGMII=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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@ -52,6 +52,11 @@ CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_RENESAS_SDHI=y
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CONFIG_MTD=y
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CONFIG_DM_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_CFI_FLASH=y
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CONFIG_RENESAS_RPC_HF=y
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CONFIG_BITBANGMII=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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@ -52,6 +52,11 @@ CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_MMC_UHS_SUPPORT=y
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CONFIG_MMC_HS400_SUPPORT=y
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CONFIG_RENESAS_SDHI=y
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CONFIG_MTD=y
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CONFIG_DM_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_CFI_FLASH=y
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CONFIG_RENESAS_RPC_HF=y
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CONFIG_BITBANGMII=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ90X1=y
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@ -22,4 +22,16 @@
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/* Environment in eMMC, at the end of 2nd "boot sector" */
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#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_FLASH_CFI_MTD
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#define CONFIG_FLASH_SHOW_PROGRESS 45
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#define CONFIG_SYS_FLASH_QUIET_TEST
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#define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 }
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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#define CONFIG_SYS_WRITE_SWAPPED_DATA
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#endif /* __EBISU_H */
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/* Environment in eMMC, at the end of 2nd "boot sector" */
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#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_FLASH_CFI_MTD
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#define CONFIG_FLASH_SHOW_PROGRESS 45
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#define CONFIG_SYS_FLASH_QUIET_TEST
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#define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 }
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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#define CONFIG_SYS_WRITE_SWAPPED_DATA
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#endif /* __SALVATOR_X_H */
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/* Environment in eMMC, at the end of 2nd "boot sector" */
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#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_FLASH_CFI_MTD
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#define CONFIG_FLASH_SHOW_PROGRESS 45
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#define CONFIG_SYS_FLASH_QUIET_TEST
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#define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 }
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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#define CONFIG_SYS_WRITE_SWAPPED_DATA
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#endif /* __ULCB_H */
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