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clk: renesas: Fix swapped arguments in debug message

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The mul and div arguments were reported in reverse order in the debug
message, swap them to fix this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Marek Vasut 2018-05-31 18:56:35 +02:00
parent 1713dac439
commit 15e0918285
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/renesas/clk-rcar-gen3.c
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@ -230,7 +230,7 @@ static ulong gen3_clk_get_rate(struct clk *clk)
case CLK_TYPE_FF:
case CLK_TYPE_GEN3_PE: /* FIXME */
rate = (gen3_clk_get_rate(&parent) * core->mult) / core->div;
debug("%s[%i] FIXED clk: parent=%i div=%i mul=%i => rate=%u\n",
debug("%s[%i] FIXED clk: parent=%i mul=%i div=%i => rate=%u\n",
__func__, __LINE__,
core->parent, core->mult, core->div, rate);
return rate;