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arm: dts: k3-j721e: Add I2C nodes

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J721e SoC has 2 I2C instances in MCU domain and 7 I2C instances in main
domain. Add DT nodes for the same

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This commit is contained in:
Vignesh Raghavendra 2020-01-27 23:22:13 +05:30 committed by Lokesh Vutla
parent dd6638a018
commit 01ec6a5ae1
3 changed files with 109 additions and 0 deletions
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77
arch/arm/dts/k3-j721e-main.dtsi
View file

@ -433,4 +433,81 @@
dma-coherent;
};
};
main_i2c0: i2c@2000000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2000000 0x0 0x100>;
interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 187 0>;
power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c1: i2c@2010000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2010000 0x0 0x100>;
interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 188 0>;
power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c2: i2c@2020000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2020000 0x0 0x100>;
interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 189 0>;
power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c3: i2c@2030000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2030000 0x0 0x100>;
interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 190 0>;
power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c4: i2c@2040000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2040000 0x0 0x100>;
interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 191 0>;
power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c5: i2c@2050000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2050000 0x0 0x100>;
interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 192 0>;
power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
};
main_i2c6: i2c@2060000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x2060000 0x0 0x100>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 193 0>;
power-domains = <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>;
};
};

22
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
View file

@ -144,4 +144,26 @@
assigned-clock-rates = <250000000>;
};
};
mcu_i2c0: i2c@40b00000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x40b00000 0x0 0x100>;
interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 194 0>;
power-domains = <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>;
};
mcu_i2c1: i2c@40b10000 {
compatible = "ti,j721e-i2c", "ti,omap4-i2c";
reg = <0x0 0x40b10000 0x0 0x100>;
interrupts = <GIC_SPI 853 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "fck";
clocks = <&k3_clks 195 0>;
power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;
};
};

10
arch/arm/dts/k3-j721e.dtsi
View file

@ -30,6 +30,16 @@
serial9 = &main_uart7;
serial10 = &main_uart8;
serial11 = &main_uart9;
i2c0 = &wkup_i2c0;
i2c1 = &mcu_i2c0;
i2c2 = &mcu_i2c1;
i2c3 = &main_i2c0;
i2c4 = &main_i2c1;
i2c5 = &main_i2c2;
i2c6 = &main_i2c3;
i2c7 = &main_i2c4;
i2c8 = &main_i2c5;
i2c9 = &main_i2c6;
};
chosen { };