Merge branch 'master' of git://git.denx.de/u-boot-i2c
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commit
0052a051f6
4 changed files with 77 additions and 4 deletions
7
README
7
README
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@ -1366,6 +1366,13 @@ The following options need to be configured:
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therefore be cleared to 0 (See, eg, MPC823e User's Manual
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p.16-473). So, set CONFIG_SYS_I2C_SLAVE to 0.
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CONFIG_SYS_I2C_INIT_MPC5XXX
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When a board is reset during an i2c bus transfer
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chips might think that the current transfer is still
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in progress. Reset the slave devices by sending start
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commands until the slave device responds.
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That's all that's required for CONFIG_HARD_I2C.
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If you use the software i2c interface (CONFIG_SOFT_I2C)
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@ -207,6 +207,52 @@ static int receive_bytes(uchar chip, char *buf, int len)
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return 0;
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}
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#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
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#define FDR510(x) (u8) (((x & 0x20) >> 3) | (x & 0x3))
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#define FDR432(x) (u8) ((x & 0x1C) >> 2)
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/*
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* Reset any i2c devices that may have been interrupted during a system reset.
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* Normally this would be accomplished by clocking the line until SCL and SDA
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* are released and then sending a start condtiion (From an Atmel datasheet).
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* There is no direct access to the i2c pins so instead create start commands
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* through the i2c interface. Send a start command then delay for the SDA Hold
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* time, repeat this by disabling/enabling the bus a total of 9 times.
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*/
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static void send_reset(void)
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{
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struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
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int i;
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u32 delay;
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u8 fdr;
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int SDA_Tap[] = { 3, 3, 4, 4, 1, 1, 2, 2};
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struct mpc5xxx_i2c_tap scltap[] = {
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{4, 1},
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{4, 2},
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{6, 4},
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{6, 8},
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{14, 16},
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{30, 32},
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{62, 64},
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{126, 128}
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};
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fdr = (u8)mpc_reg_in(®s->mfdr);
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delay = scltap[FDR432(fdr)].scl2tap + ((SDA_Tap[FDR510(fdr)] - 1) * \
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scltap[FDR432(fdr)].tap2tap) + 3;
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for (i = 0; i < 9; i++) {
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mpc_reg_out(®s->mcr, I2C_EN|I2C_STA|I2C_TX, I2C_INIT_MASK);
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udelay(delay);
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mpc_reg_out(®s->mcr, 0, I2C_INIT_MASK);
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udelay(delay);
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}
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mpc_reg_out(®s->mcr, I2C_EN, I2C_INIT_MASK);
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}
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#endif /* CONFIG_SYS_I2c_INIT_MPC5XXX */
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/**************** I2C API ****************/
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void i2c_init(int speed, int saddr)
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@ -225,6 +271,9 @@ void i2c_init(int speed, int saddr)
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mpc_reg_out(®s->mcr, I2C_EN, I2C_INIT_MASK);
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mpc_reg_out(®s->msr, 0, I2C_IF);
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#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
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send_reset();
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#endif
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return;
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright 2006 Freescale Semiconductor, Inc.
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* Copyright 2006,2009 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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@ -26,7 +26,21 @@
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#include <asm/io.h>
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#include <asm/fsl_i2c.h> /* HW definitions */
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#define I2C_TIMEOUT (CONFIG_SYS_HZ / 4)
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/* The maximum number of microseconds we will wait until another master has
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* released the bus. If not defined in the board header file, then use a
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* generic value.
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*/
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#ifndef CONFIG_I2C_MBB_TIMEOUT
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#define CONFIG_I2C_MBB_TIMEOUT 100000
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#endif
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/* The maximum number of microseconds we will wait for a read or write
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* operation to complete. If not defined in the board header file, then use a
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* generic value.
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*/
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#ifndef CONFIG_I2C_TIMEOUT
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#define CONFIG_I2C_TIMEOUT 10000
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#endif
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#define I2C_READ_BIT 1
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#define I2C_WRITE_BIT 0
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@ -213,9 +227,10 @@ static __inline__ int
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i2c_wait4bus(void)
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{
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unsigned long long timeval = get_ticks();
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const unsigned long long timeout = usec2ticks(CONFIG_I2C_MBB_TIMEOUT);
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while (readb(&i2c_dev[i2c_bus_num]->sr) & I2C_SR_MBB) {
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if ((get_ticks() - timeval) > usec2ticks(I2C_TIMEOUT))
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if ((get_ticks() - timeval) > timeout)
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return -1;
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}
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@ -227,6 +242,7 @@ i2c_wait(int write)
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{
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u32 csr;
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unsigned long long timeval = get_ticks();
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const unsigned long long timeout = usec2ticks(CONFIG_I2C_TIMEOUT);
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do {
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csr = readb(&i2c_dev[i2c_bus_num]->sr);
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@ -251,7 +267,7 @@ i2c_wait(int write)
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}
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return 0;
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} while ((get_ticks() - timeval) < usec2ticks(I2C_TIMEOUT));
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} while ((get_ticks() - timeval) < timeout);
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debug("i2c_wait: timed out\n");
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return -1;
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@ -110,6 +110,7 @@
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#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
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#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
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#define CONFIG_SYS_I2C_SLAVE 0x7F
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#define CONFIG_SYS_I2C_INIT_MPC5XXX /* Reset devices on i2c bus */
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/*
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* EEPROM CAT24WC32 configuration
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