04c81d3bcc
It turns out that this is also broken on mips64el. Further testing reveals that -mips32r2 -mtune=mips32r2 -mabi=32 compiles the PAUSE instruction just fine whereas -mips64r2 -mtune=mips64r2 -mabi=64 does not. The PAUSE instruction was introduced in version 2.6 of the MIPS ISA and GCC for some reason does not allow usage of it with MIPS64. Modify the macro to fix the situation instead of just matching on octeon, which is not quite correct. Signed-off-by: Rosen Penev <rosenp@gmail.com>
11 lines
522 B
Diff
11 lines
522 B
Diff
--- a/boost/fiber/detail/cpu_relax.hpp
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+++ b/boost/fiber/detail/cpu_relax.hpp
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@@ -47,7 +47,7 @@ namespace detail {
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# else
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# define cpu_relax() asm volatile ("nop" ::: "memory");
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# endif
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-#elif BOOST_ARCH_MIPS && (__mips_isa_rev > 1)
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+#elif BOOST_ARCH_MIPS && (((__mips_isa_rev > 1) && defined(__mips32)) || ((__mips_isa_rev > 2) && defined(__mips64)))
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# define cpu_relax() asm volatile ("pause" ::: "memory");
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#elif BOOST_ARCH_PPC
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// http://code.metager.de/source/xref/gnu/glibc/sysdeps/powerpc/sys/platform/ppc.h
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