add missing files
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Simon Morlat
parent
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2 changed files with 589 additions and 0 deletions
38
submodules/externals/build/opus/armopts-gnu.S
vendored
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38
submodules/externals/build/opus/armopts-gnu.S
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@ -0,0 +1,38 @@
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.syntax unified
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/* Copyright (C) 2013 Mozilla Corporation */
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/*
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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||||
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||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
|
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- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
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OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES@ LOSS OF USE, @ DATA, OR
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PROFITS@ OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN .if ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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@ Set the following to 1 if we have EDSP instructions
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@ (LDRD/STRD, etc., ARMv5E and later).
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.set OPUS_ARM_MAY_HAVE_EDSP, 0
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@ Set the following to 1 if we have ARMv6 media instructions.
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.set OPUS_ARM_MAY_HAVE_MEDIA, 0
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@ Set the following to 1 if we have NEON (some ARMv7)
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.set OPUS_ARM_MAY_HAVE_NEON, 1
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@ END:
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551
submodules/externals/build/opus/celt_pitch_xcorr_arm.S
vendored
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551
submodules/externals/build/opus/celt_pitch_xcorr_arm.S
vendored
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@ -0,0 +1,551 @@
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.syntax unified
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@ Copyright (c) 2007-2008 CSIRO
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@ Copyright (c) 2007-2009 Xiph.Org Foundation
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@ Copyright (c) 2013 Parrot
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@ Written by Aurélien Zanelli
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@
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@ Redistribution and use in source and binary forms, with or without
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@ modification, are permitted provided that the following conditions
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@ are met:
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@
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@ - Redistributions of source code must retain the above copyright
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@ notice, this list of conditions and the following disclaimer.
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@
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@ - Redistributions in binary form must reproduce the above copyright
|
||||
@ notice, this list of conditions and the following disclaimer in the
|
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@ documentation and/or other materials provided with the distribution.
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@
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@ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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@ ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
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@ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
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@ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
|
||||
@ OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
@ EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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@ PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
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@ PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
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@ LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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@ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.text; .p2align 2; .arch armv7-a
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.fpu neon
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.object_arch armv4t
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.include "../build/opus/armopts-gnu.S"
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.if OPUS_ARM_MAY_HAVE_EDSP
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.global celt_pitch_xcorr_edsp
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.endif
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.if OPUS_ARM_MAY_HAVE_NEON
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.global celt_pitch_xcorr_neon
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.endif
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.if OPUS_ARM_MAY_HAVE_NEON
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@ Compute sum[k]=sum(x[j]*y[j+k],j=0...len-1), k=0...3
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; xcorr_kernel_neon: @ PROC
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xcorr_kernel_neon_start:
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@ input:
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@ r3 = int len
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@ r4 = opus_val16 *x
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@ r5 = opus_val16 *y
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@ q0 = opus_val32 sum[4]
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@ output:
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@ q0 = opus_val32 sum[4]
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@ preserved: r0-r3, r6-r11, d2, q4-q7, q9-q15
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@ internal usage:
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@ r12 = int j
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@ d3 = y_3|y_2|y_1|y_0
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@ q2 = y_B|y_A|y_9|y_8|y_7|y_6|y_5|y_4
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@ q3 = x_7|x_6|x_5|x_4|x_3|x_2|x_1|x_0
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@ q8 = scratch
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@
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@ Load y[0...3]
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@ This requires len>0 to always be valid (which we assert in the C code).
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VLD1.16 {d5}, [r5]!
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SUBS r12, r3, #8
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BLE xcorr_kernel_neon_process4
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@ Process 8 samples at a time.
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@ This loop loads one y value more than we actually need. Therefore we have to
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@ stop as soon as there are 8 or fewer samples left (instead of 7), to avoid
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@ reading past the end of the array.
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xcorr_kernel_neon_process8:
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@ This loop has 19 total instructions (10 cycles to issue, minimum), with
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@ - 2 cycles of ARM insrtuctions,
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@ - 10 cycles of load/store/byte permute instructions, and
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@ - 9 cycles of data processing instructions.
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@ On a Cortex A8, we dual-issue the maximum amount (9 cycles) between the
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@ latter two categories, meaning the whole loop should run in 10 cycles per
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@ iteration, barring cache misses.
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@
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@ Load x[0...7]
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VLD1.16 {d6, d7}, [r4]!
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@ Unlike VMOV, VAND is a data processsing instruction (and doesn't get
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@ assembled to VMOV, like VORR would), so it dual-issues with the prior VLD1.
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VAND d3, d5, d5
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SUBS r12, r12, #8
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@ Load y[4...11]
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VLD1.16 {d4, d5}, [r5]!
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VMLAL.S16 q0, d3, d6[0]
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VEXT.16 d16, d3, d4, #1
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VMLAL.S16 q0, d4, d7[0]
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VEXT.16 d17, d4, d5, #1
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VMLAL.S16 q0, d16, d6[1]
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VEXT.16 d16, d3, d4, #2
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VMLAL.S16 q0, d17, d7[1]
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VEXT.16 d17, d4, d5, #2
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VMLAL.S16 q0, d16, d6[2]
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VEXT.16 d16, d3, d4, #3
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VMLAL.S16 q0, d17, d7[2]
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VEXT.16 d17, d4, d5, #3
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VMLAL.S16 q0, d16, d6[3]
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VMLAL.S16 q0, d17, d7[3]
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BGT xcorr_kernel_neon_process8
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@ Process 4 samples here if we have > 4 left (still reading one extra y value).
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xcorr_kernel_neon_process4:
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ADDS r12, r12, #4
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BLE xcorr_kernel_neon_process2
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@ Load x[0...3]
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VLD1.16 d6, [r4]!
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@ Use VAND since it's a data processing instruction again.
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VAND d4, d5, d5
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SUB r12, r12, #4
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@ Load y[4...7]
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VLD1.16 d5, [r5]!
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VMLAL.S16 q0, d4, d6[0]
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VEXT.16 d16, d4, d5, #1
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VMLAL.S16 q0, d16, d6[1]
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VEXT.16 d16, d4, d5, #2
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VMLAL.S16 q0, d16, d6[2]
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VEXT.16 d16, d4, d5, #3
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VMLAL.S16 q0, d16, d6[3]
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@ Process 2 samples here if we have > 2 left (still reading one extra y value).
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xcorr_kernel_neon_process2:
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ADDS r12, r12, #2
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BLE xcorr_kernel_neon_process1
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@ Load x[0...1]
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VLD2.16 {d6[],d7[]}, [r4]!
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@ Use VAND since it's a data processing instruction again.
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VAND d4, d5, d5
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SUB r12, r12, #2
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@ Load y[4...5]
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VLD1.32 {d5[]}, [r5]!
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VMLAL.S16 q0, d4, d6
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VEXT.16 d16, d4, d5, #1
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@ Replace bottom copy of {y5,y4} in d5 with {y3,y2} from d4, using VSRI
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@ instead of VEXT, since it's a data-processing instruction.
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VSRI.64 d5, d4, #32
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VMLAL.S16 q0, d16, d7
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@ Process 1 sample using the extra y value we loaded above.
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xcorr_kernel_neon_process1:
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@ Load next *x
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VLD1.16 {d6[]}, [r4]!
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ADDS r12, r12, #1
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@ y[0...3] are left in d5 from prior iteration(s) (if any)
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VMLAL.S16 q0, d5, d6
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MOVLE pc, lr
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@ Now process 1 last sample, not reading ahead.
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@ Load last *y
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VLD1.16 {d4[]}, [r5]!
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VSRI.64 d4, d5, #16
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@ Load last *x
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VLD1.16 {d6[]}, [r4]!
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VMLAL.S16 q0, d4, d6
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MOV pc, lr
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.size xcorr_kernel_neon, .-xcorr_kernel_neon @ ENDP
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@ opus_val32 celt_pitch_xcorr_neon(opus_val16 *_x, opus_val16 *_y,
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@ opus_val32 *xcorr, int len, int max_pitch)
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; celt_pitch_xcorr_neon: @ PROC
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@ input:
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@ r0 = opus_val16 *_x
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@ r1 = opus_val16 *_y
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@ r2 = opus_val32 *xcorr
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@ r3 = int len
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@ output:
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@ r0 = int maxcorr
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@ internal usage:
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@ r4 = opus_val16 *x (for xcorr_kernel_neon())
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@ r5 = opus_val16 *y (for xcorr_kernel_neon())
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@ r6 = int max_pitch
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@ r12 = int j
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@ q15 = int maxcorr[4] (q15 is not used by xcorr_kernel_neon())
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STMFD sp!, {r4-r6, lr}
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LDR r6, [sp, #16]
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VMOV.S32 q15, #1
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@ if (max_pitch < 4) goto celt_pitch_xcorr_neon_process4_done
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SUBS r6, r6, #4
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BLT celt_pitch_xcorr_neon_process4_done
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celt_pitch_xcorr_neon_process4:
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@ xcorr_kernel_neon parameters:
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@ r3 = len, r4 = _x, r5 = _y, q0 = {0, 0, 0, 0}
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MOV r4, r0
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MOV r5, r1
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VEOR q0, q0, q0
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@ xcorr_kernel_neon only modifies r4, r5, r12, and q0...q3.
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@ So we don't save/restore any other registers.
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BL xcorr_kernel_neon_start
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SUBS r6, r6, #4
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VST1.32 {q0}, [r2]!
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@ _y += 4
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ADD r1, r1, #8
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VMAX.S32 q15, q15, q0
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@ if (max_pitch < 4) goto celt_pitch_xcorr_neon_process4_done
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BGE celt_pitch_xcorr_neon_process4
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@ We have less than 4 sums left to compute.
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celt_pitch_xcorr_neon_process4_done:
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ADDS r6, r6, #4
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@ Reduce maxcorr to a single value
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VMAX.S32 d30, d30, d31
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VPMAX.S32 d30, d30, d30
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@ if (max_pitch <= 0) goto celt_pitch_xcorr_neon_done
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BLE celt_pitch_xcorr_neon_done
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@ Now compute each remaining sum one at a time.
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celt_pitch_xcorr_neon_process_remaining:
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MOV r4, r0
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MOV r5, r1
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VMOV.I32 q0, #0
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SUBS r12, r3, #8
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BLT celt_pitch_xcorr_neon_process_remaining4
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@ Sum terms 8 at a time.
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celt_pitch_xcorr_neon_process_remaining_loop8:
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@ Load x[0...7]
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VLD1.16 {q1}, [r4]!
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@ Load y[0...7]
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VLD1.16 {q2}, [r5]!
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SUBS r12, r12, #8
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VMLAL.S16 q0, d4, d2
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VMLAL.S16 q0, d5, d3
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BGE celt_pitch_xcorr_neon_process_remaining_loop8
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@ Sum terms 4 at a time.
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celt_pitch_xcorr_neon_process_remaining4:
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ADDS r12, r12, #4
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BLT celt_pitch_xcorr_neon_process_remaining4_done
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@ Load x[0...3]
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VLD1.16 {d2}, [r4]!
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@ Load y[0...3]
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VLD1.16 {d3}, [r5]!
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SUB r12, r12, #4
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VMLAL.S16 q0, d3, d2
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celt_pitch_xcorr_neon_process_remaining4_done:
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@ Reduce the sum to a single value.
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VADD.S32 d0, d0, d1
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VPADDL.S32 d0, d0
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ADDS r12, r12, #4
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BLE celt_pitch_xcorr_neon_process_remaining_loop_done
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@ Sum terms 1 at a time.
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celt_pitch_xcorr_neon_process_remaining_loop1:
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VLD1.16 {d2[]}, [r4]!
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VLD1.16 {d3[]}, [r5]!
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SUBS r12, r12, #1
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VMLAL.S16 q0, d2, d3
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BGT celt_pitch_xcorr_neon_process_remaining_loop1
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celt_pitch_xcorr_neon_process_remaining_loop_done:
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VST1.32 {d0[0]}, [r2]!
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VMAX.S32 d30, d30, d0
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SUBS r6, r6, #1
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@ _y++
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ADD r1, r1, #2
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@ if (--max_pitch > 0) goto celt_pitch_xcorr_neon_process_remaining
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BGT celt_pitch_xcorr_neon_process_remaining
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celt_pitch_xcorr_neon_done:
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VMOV.32 r0, d30[0]
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LDMFD sp!, {r4-r6, pc}
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.size celt_pitch_xcorr_neon, .-celt_pitch_xcorr_neon @ ENDP
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.endif
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.if OPUS_ARM_MAY_HAVE_EDSP
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@ This will get used on ARMv7 devices without NEON, so it has been optimized
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@ to take advantage of dual-issuing where possible.
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; xcorr_kernel_edsp: @ PROC
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xcorr_kernel_edsp_start:
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@ input:
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@ r3 = int len
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@ r4 = opus_val16 *_x (must be 32-bit aligned)
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@ r5 = opus_val16 *_y (must be 32-bit aligned)
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@ r6...r9 = opus_val32 sum[4]
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@ output:
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@ r6...r9 = opus_val32 sum[4]
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@ preserved: r0-r5
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@ internal usage
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@ r2 = int j
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@ r12,r14 = opus_val16 x[4]
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@ r10,r11 = opus_val16 y[4]
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STMFD sp!, {r2,r4,r5,lr}
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LDR r10, [r5], #4 @ Load y[0...1]
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SUBS r2, r3, #4 @ j = len-4
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LDR r11, [r5], #4 @ Load y[2...3]
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BLE xcorr_kernel_edsp_process4_done
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LDR r12, [r4], #4 @ Load x[0...1]
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@ Stall
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xcorr_kernel_edsp_process4:
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@ The multiplies must issue from pipeline 0, and can't dual-issue with each
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@ other. Every other instruction here dual-issues with a multiply, and is
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@ thus "free". There should be no stalls in the body of the loop.
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SMLABB r6, r12, r10, r6 @ sum[0] = MAC16_16(sum[0],x_0,y_0)
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LDR r14, [r4], #4 @ Load x[2...3]
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SMLABT r7, r12, r10, r7 @ sum[1] = MAC16_16(sum[1],x_0,y_1)
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SUBS r2, r2, #4 @ j-=4
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SMLABB r8, r12, r11, r8 @ sum[2] = MAC16_16(sum[2],x_0,y_2)
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SMLABT r9, r12, r11, r9 @ sum[3] = MAC16_16(sum[3],x_0,y_3)
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SMLATT r6, r12, r10, r6 @ sum[0] = MAC16_16(sum[0],x_1,y_1)
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LDR r10, [r5], #4 @ Load y[4...5]
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SMLATB r7, r12, r11, r7 @ sum[1] = MAC16_16(sum[1],x_1,y_2)
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SMLATT r8, r12, r11, r8 @ sum[2] = MAC16_16(sum[2],x_1,y_3)
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SMLATB r9, r12, r10, r9 @ sum[3] = MAC16_16(sum[3],x_1,y_4)
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LDRGT r12, [r4], #4 @ Load x[0...1]
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SMLABB r6, r14, r11, r6 @ sum[0] = MAC16_16(sum[0],x_2,y_2)
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SMLABT r7, r14, r11, r7 @ sum[1] = MAC16_16(sum[1],x_2,y_3)
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SMLABB r8, r14, r10, r8 @ sum[2] = MAC16_16(sum[2],x_2,y_4)
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SMLABT r9, r14, r10, r9 @ sum[3] = MAC16_16(sum[3],x_2,y_5)
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SMLATT r6, r14, r11, r6 @ sum[0] = MAC16_16(sum[0],x_3,y_3)
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LDR r11, [r5], #4 @ Load y[6...7]
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SMLATB r7, r14, r10, r7 @ sum[1] = MAC16_16(sum[1],x_3,y_4)
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SMLATT r8, r14, r10, r8 @ sum[2] = MAC16_16(sum[2],x_3,y_5)
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SMLATB r9, r14, r11, r9 @ sum[3] = MAC16_16(sum[3],x_3,y_6)
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BGT xcorr_kernel_edsp_process4
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xcorr_kernel_edsp_process4_done:
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ADDS r2, r2, #4
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BLE xcorr_kernel_edsp_done
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LDRH r12, [r4], #2 @ r12 = *x++
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SUBS r2, r2, #1 @ j--
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@ Stall
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SMLABB r6, r12, r10, r6 @ sum[0] = MAC16_16(sum[0],x,y_0)
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LDRHGT r14, [r4], #2 @ r14 = *x++
|
||||
SMLABT r7, r12, r10, r7 @ sum[1] = MAC16_16(sum[1],x,y_1)
|
||||
SMLABB r8, r12, r11, r8 @ sum[2] = MAC16_16(sum[2],x,y_2)
|
||||
SMLABT r9, r12, r11, r9 @ sum[3] = MAC16_16(sum[3],x,y_3)
|
||||
BLE xcorr_kernel_edsp_done
|
||||
SMLABT r6, r14, r10, r6 @ sum[0] = MAC16_16(sum[0],x,y_1)
|
||||
SUBS r2, r2, #1 @ j--
|
||||
SMLABB r7, r14, r11, r7 @ sum[1] = MAC16_16(sum[1],x,y_2)
|
||||
LDRH r10, [r5], #2 @ r10 = y_4 = *y++
|
||||
SMLABT r8, r14, r11, r8 @ sum[2] = MAC16_16(sum[2],x,y_3)
|
||||
LDRHGT r12, [r4], #2 @ r12 = *x++
|
||||
SMLABB r9, r14, r10, r9 @ sum[3] = MAC16_16(sum[3],x,y_4)
|
||||
BLE xcorr_kernel_edsp_done
|
||||
SMLABB r6, r12, r11, r6 @ sum[0] = MAC16_16(sum[0],tmp,y_2)
|
||||
CMP r2, #1 @ j--
|
||||
SMLABT r7, r12, r11, r7 @ sum[1] = MAC16_16(sum[1],tmp,y_3)
|
||||
LDRH r2, [r5], #2 @ r2 = y_5 = *y++
|
||||
SMLABB r8, r12, r10, r8 @ sum[2] = MAC16_16(sum[2],tmp,y_4)
|
||||
LDRHGT r14, [r4] @ r14 = *x
|
||||
SMLABB r9, r12, r2, r9 @ sum[3] = MAC16_16(sum[3],tmp,y_5)
|
||||
BLE xcorr_kernel_edsp_done
|
||||
SMLABT r6, r14, r11, r6 @ sum[0] = MAC16_16(sum[0],tmp,y_3)
|
||||
LDRH r11, [r5] @ r11 = y_6 = *y
|
||||
SMLABB r7, r14, r10, r7 @ sum[1] = MAC16_16(sum[1],tmp,y_4)
|
||||
SMLABB r8, r14, r2, r8 @ sum[2] = MAC16_16(sum[2],tmp,y_5)
|
||||
SMLABB r9, r14, r11, r9 @ sum[3] = MAC16_16(sum[3],tmp,y_6)
|
||||
xcorr_kernel_edsp_done:
|
||||
LDMFD sp!, {r2,r4,r5,pc}
|
||||
.size xcorr_kernel_edsp, .-xcorr_kernel_edsp @ ENDP
|
||||
|
||||
; celt_pitch_xcorr_edsp: @ PROC
|
||||
@ input:
|
||||
@ r0 = opus_val16 *_x (must be 32-bit aligned)
|
||||
@ r1 = opus_val16 *_y (only needs to be 16-bit aligned)
|
||||
@ r2 = opus_val32 *xcorr
|
||||
@ r3 = int len
|
||||
@ output:
|
||||
@ r0 = maxcorr
|
||||
@ internal usage
|
||||
@ r4 = opus_val16 *x
|
||||
@ r5 = opus_val16 *y
|
||||
@ r6 = opus_val32 sum0
|
||||
@ r7 = opus_val32 sum1
|
||||
@ r8 = opus_val32 sum2
|
||||
@ r9 = opus_val32 sum3
|
||||
@ r1 = int max_pitch
|
||||
@ r12 = int j
|
||||
STMFD sp!, {r4-r11, lr}
|
||||
MOV r5, r1
|
||||
LDR r1, [sp, #36]
|
||||
MOV r4, r0
|
||||
TST r5, #3
|
||||
@ maxcorr = 1
|
||||
MOV r0, #1
|
||||
BEQ celt_pitch_xcorr_edsp_process1u_done
|
||||
@ Compute one sum at the start to make y 32-bit aligned.
|
||||
SUBS r12, r3, #4
|
||||
@ r14 = sum = 0
|
||||
MOV r14, #0
|
||||
LDRH r8, [r5], #2
|
||||
BLE celt_pitch_xcorr_edsp_process1u_loop4_done
|
||||
LDR r6, [r4], #4
|
||||
MOV r8, r8, LSL #16
|
||||
celt_pitch_xcorr_edsp_process1u_loop4:
|
||||
LDR r9, [r5], #4
|
||||
SMLABT r14, r6, r8, r14 @ sum = MAC16_16(sum, x_0, y_0)
|
||||
LDR r7, [r4], #4
|
||||
SMLATB r14, r6, r9, r14 @ sum = MAC16_16(sum, x_1, y_1)
|
||||
LDR r8, [r5], #4
|
||||
SMLABT r14, r7, r9, r14 @ sum = MAC16_16(sum, x_2, y_2)
|
||||
SUBS r12, r12, #4 @ j-=4
|
||||
SMLATB r14, r7, r8, r14 @ sum = MAC16_16(sum, x_3, y_3)
|
||||
LDRGT r6, [r4], #4
|
||||
BGT celt_pitch_xcorr_edsp_process1u_loop4
|
||||
MOV r8, r8, LSR #16
|
||||
celt_pitch_xcorr_edsp_process1u_loop4_done:
|
||||
ADDS r12, r12, #4
|
||||
celt_pitch_xcorr_edsp_process1u_loop1:
|
||||
LDRHGE r6, [r4], #2
|
||||
@ Stall
|
||||
SMLABBGE r14, r6, r8, r14 @ sum = MAC16_16(sum, *x, *y)
|
||||
SUBSGE r12, r12, #1
|
||||
LDRHGT r8, [r5], #2
|
||||
BGT celt_pitch_xcorr_edsp_process1u_loop1
|
||||
@ Restore _x
|
||||
SUB r4, r4, r3, LSL #1
|
||||
@ Restore and advance _y
|
||||
SUB r5, r5, r3, LSL #1
|
||||
@ maxcorr = max(maxcorr, sum)
|
||||
CMP r0, r14
|
||||
ADD r5, r5, #2
|
||||
MOVLT r0, r14
|
||||
SUBS r1, r1, #1
|
||||
@ xcorr[i] = sum
|
||||
STR r14, [r2], #4
|
||||
BLE celt_pitch_xcorr_edsp_done
|
||||
celt_pitch_xcorr_edsp_process1u_done:
|
||||
@ if (max_pitch < 4) goto celt_pitch_xcorr_edsp_process2
|
||||
SUBS r1, r1, #4
|
||||
BLT celt_pitch_xcorr_edsp_process2
|
||||
celt_pitch_xcorr_edsp_process4:
|
||||
@ xcorr_kernel_edsp parameters:
|
||||
@ r3 = len, r4 = _x, r5 = _y, r6...r9 = sum[4] = {0, 0, 0, 0}
|
||||
MOV r6, #0
|
||||
MOV r7, #0
|
||||
MOV r8, #0
|
||||
MOV r9, #0
|
||||
BL xcorr_kernel_edsp_start @ xcorr_kernel_edsp(_x, _y+i, xcorr+i, len)
|
||||
@ maxcorr = max(maxcorr, sum0, sum1, sum2, sum3)
|
||||
CMP r0, r6
|
||||
@ _y+=4
|
||||
ADD r5, r5, #8
|
||||
MOVLT r0, r6
|
||||
CMP r0, r7
|
||||
MOVLT r0, r7
|
||||
CMP r0, r8
|
||||
MOVLT r0, r8
|
||||
CMP r0, r9
|
||||
MOVLT r0, r9
|
||||
STMIA r2!, {r6-r9}
|
||||
SUBS r1, r1, #4
|
||||
BGE celt_pitch_xcorr_edsp_process4
|
||||
celt_pitch_xcorr_edsp_process2:
|
||||
ADDS r1, r1, #2
|
||||
BLT celt_pitch_xcorr_edsp_process1a
|
||||
SUBS r12, r3, #4
|
||||
@ {r10, r11} = {sum0, sum1} = {0, 0}
|
||||
MOV r10, #0
|
||||
MOV r11, #0
|
||||
LDR r8, [r5], #4
|
||||
BLE celt_pitch_xcorr_edsp_process2_loop_done
|
||||
LDR r6, [r4], #4
|
||||
LDR r9, [r5], #4
|
||||
celt_pitch_xcorr_edsp_process2_loop4:
|
||||
SMLABB r10, r6, r8, r10 @ sum0 = MAC16_16(sum0, x_0, y_0)
|
||||
LDR r7, [r4], #4
|
||||
SMLABT r11, r6, r8, r11 @ sum1 = MAC16_16(sum1, x_0, y_1)
|
||||
SUBS r12, r12, #4 @ j-=4
|
||||
SMLATT r10, r6, r8, r10 @ sum0 = MAC16_16(sum0, x_1, y_1)
|
||||
LDR r8, [r5], #4
|
||||
SMLATB r11, r6, r9, r11 @ sum1 = MAC16_16(sum1, x_1, y_2)
|
||||
LDRGT r6, [r4], #4
|
||||
SMLABB r10, r7, r9, r10 @ sum0 = MAC16_16(sum0, x_2, y_2)
|
||||
SMLABT r11, r7, r9, r11 @ sum1 = MAC16_16(sum1, x_2, y_3)
|
||||
SMLATT r10, r7, r9, r10 @ sum0 = MAC16_16(sum0, x_3, y_3)
|
||||
LDRGT r9, [r5], #4
|
||||
SMLATB r11, r7, r8, r11 @ sum1 = MAC16_16(sum1, x_3, y_4)
|
||||
BGT celt_pitch_xcorr_edsp_process2_loop4
|
||||
celt_pitch_xcorr_edsp_process2_loop_done:
|
||||
ADDS r12, r12, #2
|
||||
BLE celt_pitch_xcorr_edsp_process2_1
|
||||
LDR r6, [r4], #4
|
||||
@ Stall
|
||||
SMLABB r10, r6, r8, r10 @ sum0 = MAC16_16(sum0, x_0, y_0)
|
||||
LDR r9, [r5], #4
|
||||
SMLABT r11, r6, r8, r11 @ sum1 = MAC16_16(sum1, x_0, y_1)
|
||||
SUB r12, r12, #2
|
||||
SMLATT r10, r6, r8, r10 @ sum0 = MAC16_16(sum0, x_1, y_1)
|
||||
MOV r8, r9
|
||||
SMLATB r11, r6, r9, r11 @ sum1 = MAC16_16(sum1, x_1, y_2)
|
||||
celt_pitch_xcorr_edsp_process2_1:
|
||||
LDRH r6, [r4], #2
|
||||
ADDS r12, r12, #1
|
||||
@ Stall
|
||||
SMLABB r10, r6, r8, r10 @ sum0 = MAC16_16(sum0, x_0, y_0)
|
||||
LDRHGT r7, [r4], #2
|
||||
SMLABT r11, r6, r8, r11 @ sum1 = MAC16_16(sum1, x_0, y_1)
|
||||
BLE celt_pitch_xcorr_edsp_process2_done
|
||||
LDRH r9, [r5], #2
|
||||
SMLABT r10, r7, r8, r10 @ sum0 = MAC16_16(sum0, x_0, y_1)
|
||||
SMLABB r11, r7, r9, r11 @ sum1 = MAC16_16(sum1, x_0, y_2)
|
||||
celt_pitch_xcorr_edsp_process2_done:
|
||||
@ Restore _x
|
||||
SUB r4, r4, r3, LSL #1
|
||||
@ Restore and advance _y
|
||||
SUB r5, r5, r3, LSL #1
|
||||
@ maxcorr = max(maxcorr, sum0)
|
||||
CMP r0, r10
|
||||
ADD r5, r5, #2
|
||||
MOVLT r0, r10
|
||||
SUB r1, r1, #2
|
||||
@ maxcorr = max(maxcorr, sum1)
|
||||
CMP r0, r11
|
||||
@ xcorr[i] = sum
|
||||
STR r10, [r2], #4
|
||||
MOVLT r0, r11
|
||||
STR r11, [r2], #4
|
||||
celt_pitch_xcorr_edsp_process1a:
|
||||
ADDS r1, r1, #1
|
||||
BLT celt_pitch_xcorr_edsp_done
|
||||
SUBS r12, r3, #4
|
||||
@ r14 = sum = 0
|
||||
MOV r14, #0
|
||||
BLT celt_pitch_xcorr_edsp_process1a_loop_done
|
||||
LDR r6, [r4], #4
|
||||
LDR r8, [r5], #4
|
||||
LDR r7, [r4], #4
|
||||
LDR r9, [r5], #4
|
||||
celt_pitch_xcorr_edsp_process1a_loop4:
|
||||
SMLABB r14, r6, r8, r14 @ sum = MAC16_16(sum, x_0, y_0)
|
||||
SUBS r12, r12, #4 @ j-=4
|
||||
SMLATT r14, r6, r8, r14 @ sum = MAC16_16(sum, x_1, y_1)
|
||||
LDRGE r6, [r4], #4
|
||||
SMLABB r14, r7, r9, r14 @ sum = MAC16_16(sum, x_2, y_2)
|
||||
LDRGE r8, [r5], #4
|
||||
SMLATT r14, r7, r9, r14 @ sum = MAC16_16(sum, x_3, y_3)
|
||||
LDRGE r7, [r4], #4
|
||||
LDRGE r9, [r5], #4
|
||||
BGE celt_pitch_xcorr_edsp_process1a_loop4
|
||||
celt_pitch_xcorr_edsp_process1a_loop_done:
|
||||
ADDS r12, r12, #2
|
||||
LDRGE r6, [r4], #4
|
||||
LDRGE r8, [r5], #4
|
||||
@ Stall
|
||||
SMLABBGE r14, r6, r8, r14 @ sum = MAC16_16(sum, x_0, y_0)
|
||||
SUBGE r12, r12, #2
|
||||
SMLATTGE r14, r6, r8, r14 @ sum = MAC16_16(sum, x_1, y_1)
|
||||
ADDS r12, r12, #1
|
||||
LDRHGE r6, [r4], #2
|
||||
LDRHGE r8, [r5], #2
|
||||
@ Stall
|
||||
SMLABBGE r14, r6, r8, r14 @ sum = MAC16_16(sum, *x, *y)
|
||||
@ maxcorr = max(maxcorr, sum)
|
||||
CMP r0, r14
|
||||
@ xcorr[i] = sum
|
||||
STR r14, [r2], #4
|
||||
MOVLT r0, r14
|
||||
celt_pitch_xcorr_edsp_done:
|
||||
LDMFD sp!, {r4-r11, pc}
|
||||
.size celt_pitch_xcorr_edsp, .-celt_pitch_xcorr_edsp @ ENDP
|
||||
|
||||
.endif
|
||||
|
||||
@ END:
|
||||
.section .note.GNU-stack,"",%progbits
|
||||
Loading…
Reference in a new issue