difos/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-unifi-ac-hd.dts
Mark Mentovai 565814a5ee ipq806x: ubnt,unifi-ac-hd: reorder eth0 and eth1
The Ubiquiti UniFi AC HD (UAP-AC-HD, UAP301) has two Ethernet ports,
labeled MAIN and SECONDARY, connected to gmac2 and gmac1, respectively.
The standard probe order results in gmac1/SECONDARY being eth0 and
gmac2/MAIN being eth1. This does not match the stock firmware, is
contrary to user expectation, causes the wrong (high) MAC address to be
used in a bridged configuration (the default for this device), and makes
the gmac2/MAIN port unusable in the preinit environment (such as for
failsafe). Until a recent patch, gmac1/SECONDARY (eth0) was not even
usable.

This reorders the ports so that gmac2/MAIN is eth0, and the now-working
gmac1/SECONDARY is eth1. eth0 has the low MAC address and eth1 has the
high; when bridged, the bridge takes on the correct low MAC address.
This matches the stock firmware. The MAIN port is usable for failsafe
during preinit.

This device does not have a switch on board, so there's no possibility
to remap ports via switch configuration. "ip link set $interface name"
is used instead, during preinit before networking is configured.

Signed-off-by: Mark Mentovai <mark@moxienet.com>
Build-tested: ipq806x/ubnt,unifi-ac-hd
Run-tested: ipq806x/ubnt,unifi-ac-hd
2021-05-07 07:05:16 +02:00

300 lines
4.5 KiB
Text

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq8064-v2.0.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Ubiquiti UniFi AC HD";
compatible = "ubnt,unifi-ac-hd", "qcom,ipq8064";
aliases {
label-mac-device = &gmac2;
led-boot = &led_dome_white;
led-failsafe = &led_dome_white;
led-running = &led_dome_blue;
led-upgrade = &led_dome_blue;
mdio-gpio0 = &mdio0;
ethernet0 = &gmac2;
ethernet1 = &gmac1;
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
led_dome_blue: dome_blue {
label = "blue:dome";
gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
};
led_dome_white: dome_white {
label = "white:dome";
gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
reset {
label = "reset";
gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
};
};
};
&qcom_pinmux {
button_pins: button_pins {
mux {
pins = "gpio68";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
led_pins: led_pins {
mux {
pins = "gpio9", "gpio53";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
output-low;
};
};
spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19", "gpio21";
function = "gsbi5";
drive-strength = <10>;
bias-none;
};
cs {
pins = "gpio20";
drive-strength = <12>;
};
};
};
&CPU_SPC {
status = "disabled";
};
&gsbi5 {
status = "okay";
qcom,mode = <GSBI_PROT_SPI>;
spi@1a280000 {
status = "okay";
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
cs-gpios = <&qcom_pinmux 20 0>;
flash@0 {
compatible = "mx25u25635f", "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
reg = <0>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "SBL1";
reg = <0x0 0x20000>;
read-only;
};
partition@20000 {
label = "MIBIB";
reg = <0x20000 0x10000>;
read-only;
};
partition@30000 {
label = "SBL2";
reg = <0x30000 0x20000>;
read-only;
};
partition@50000 {
label = "SBL3";
reg = <0x50000 0x30000>;
read-only;
};
partition@80000 {
label = "DDRCONFIG";
reg = <0x80000 0x10000>;
read-only;
};
partition@90000 {
label = "SSD";
reg = <0x90000 0x10000>;
read-only;
};
partition@a0000 {
label = "TZ";
reg = <0xa0000 0x30000>;
read-only;
};
partition@d0000 {
label = "RPM";
reg = <0xd0000 0x20000>;
read-only;
};
partition@f0000 {
label = "APPSBL";
reg = <0xf0000 0xc0000>;
read-only;
};
partition@1b0000 {
label = "APPSBLENV";
reg = <0x1b0000 0x10000>;
read-only;
};
eeprom: partition@1c0000 {
label = "EEPROM";
reg = <0x1c0000 0x10000>;
read-only;
};
partition@1d0000 {
label = "bootselect";
reg = <0x1d0000 0x10000>;
};
partition@1e0000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x1e0000 0xe70000>;
};
partition@1050000 {
label = "kernel1";
reg = <0x1050000 0xe70000>;
read-only;
};
partition@1ec0000 {
label = "debug";
reg = <0x1ec0000 0x100000>;
read-only;
};
partition@1fc0000 {
label = "cfg";
reg = <0x1fc0000 0x40000>;
read-only;
};
};
};
};
};
&adm_dma {
status = "okay";
};
&nand_controller {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
nand-ecc-strength = <4>;
nand-bus-width = <8>;
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy4: ethernet-phy@4 {
reg = <4>;
};
phy5: ethernet-phy@5 {
reg = <5>;
};
};
&gmac1 {
status = "okay";
mdiobus = <&mdio0>;
phy-handle = <&phy5>;
phy-mode = "sgmii";
qcom,id = <1>;
mtd-mac-address = <&eeprom 0x6>;
};
&gmac2 {
status = "okay";
mdiobus = <&mdio0>;
phy-handle = <&phy4>;
phy-mode = "sgmii";
qcom,id = <2>;
mtd-mac-address = <&eeprom 0x0>;
};
&pcie0 {
status = "okay";
};
&pcie1 {
status = "okay";
};
&tcsr {
status = "okay";
};
&hs_phy_0 {
status = "okay";
};
&ss_phy_0 {
status = "okay";
};
&usb3_0 {
status = "okay";
};
&hs_phy_1 {
status = "okay";
};
&ss_phy_1 {
status = "okay";
};
&usb3_1 {
status = "okay";
};