54805fc911
This adds support for offloading TC flower by using the Packet Inspection Engine of the RTL-SoCs. Basic infrastructure support is provide with callbacks to the tc subsystem and support for HW packet counters. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
130 lines
3.7 KiB
C
130 lines
3.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _NET_DSA_RTL83XX_H
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#define _NET_DSA_RTL83XX_H
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#include <net/dsa.h>
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#include "rtl838x.h"
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#define RTL8380_VERSION_A 'A'
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#define RTL8390_VERSION_A 'A'
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#define RTL8380_VERSION_B 'B'
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struct fdb_update_work {
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struct work_struct work;
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struct net_device *ndev;
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u64 macs[];
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};
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#define MIB_DESC(_size, _offset, _name) {.size = _size, .offset = _offset, .name = _name}
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struct rtl83xx_mib_desc {
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unsigned int size;
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unsigned int offset;
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const char *name;
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};
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/* API for switch table access */
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struct table_reg {
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u16 addr;
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u16 data;
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u8 max_data;
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u8 c_bit;
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u8 t_bit;
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u8 rmode;
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u8 tbl;
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struct mutex lock;
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};
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#define TBL_DESC(_addr, _data, _max_data, _c_bit, _t_bit, _rmode) \
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{ .addr = _addr, .data = _data, .max_data = _max_data, .c_bit = _c_bit, \
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.t_bit = _t_bit, .rmode = _rmode \
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}
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typedef enum {
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RTL8380_TBL_L2 = 0,
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RTL8380_TBL_0,
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RTL8380_TBL_1,
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RTL8390_TBL_L2,
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RTL8390_TBL_0,
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RTL8390_TBL_1,
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RTL8390_TBL_2,
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RTL9300_TBL_L2,
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RTL9300_TBL_0,
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RTL9300_TBL_1,
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RTL9300_TBL_2,
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RTL9300_TBL_HSB,
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RTL9300_TBL_HSA,
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RTL9310_TBL_0,
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RTL9310_TBL_1,
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RTL9310_TBL_2,
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RTL9310_TBL_3,
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RTL9310_TBL_4,
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RTL9310_TBL_5,
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RTL_TBL_END
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} rtl838x_tbl_reg_t;
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void rtl_table_init(void);
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struct table_reg *rtl_table_get(rtl838x_tbl_reg_t r, int t);
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void rtl_table_release(struct table_reg *r);
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void rtl_table_read(struct table_reg *r, int idx);
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void rtl_table_write(struct table_reg *r, int idx);
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inline u16 rtl_table_data(struct table_reg *r, int i);
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inline u32 rtl_table_data_r(struct table_reg *r, int i);
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inline void rtl_table_data_w(struct table_reg *r, u32 v, int i);
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void __init rtl83xx_setup_qos(struct rtl838x_switch_priv *priv);
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int rtl83xx_packet_cntr_alloc(struct rtl838x_switch_priv *priv);
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int rtl83xx_port_is_under(const struct net_device * dev, struct rtl838x_switch_priv *priv);
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int read_phy(u32 port, u32 page, u32 reg, u32 *val);
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int write_phy(u32 port, u32 page, u32 reg, u32 val);
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/* Port register accessor functions for the RTL839x and RTL931X SoCs */
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void rtl839x_mask_port_reg_be(u64 clear, u64 set, int reg);
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u64 rtl839x_get_port_reg_be(int reg);
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void rtl839x_set_port_reg_be(u64 set, int reg);
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void rtl839x_mask_port_reg_le(u64 clear, u64 set, int reg);
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void rtl839x_set_port_reg_le(u64 set, int reg);
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u64 rtl839x_get_port_reg_le(int reg);
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/* Port register accessor functions for the RTL838x and RTL930X SoCs */
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void rtl838x_mask_port_reg(u64 clear, u64 set, int reg);
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void rtl838x_set_port_reg(u64 set, int reg);
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u64 rtl838x_get_port_reg(int reg);
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/* RTL838x-specific */
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u32 rtl838x_hash(struct rtl838x_switch_priv *priv, u64 seed);
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irqreturn_t rtl838x_switch_irq(int irq, void *dev_id);
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void rtl8380_get_version(struct rtl838x_switch_priv *priv);
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void rtl838x_vlan_profile_dump(int index);
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int rtl83xx_dsa_phy_read(struct dsa_switch *ds, int phy_addr, int phy_reg);
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void rtl8380_sds_rst(int mac);
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int rtl8380_sds_power(int mac, int val);
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void rtl838x_print_matrix(void);
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/* RTL839x-specific */
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u32 rtl839x_hash(struct rtl838x_switch_priv *priv, u64 seed);
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irqreturn_t rtl839x_switch_irq(int irq, void *dev_id);
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void rtl8390_get_version(struct rtl838x_switch_priv *priv);
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void rtl839x_vlan_profile_dump(int index);
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int rtl83xx_dsa_phy_write(struct dsa_switch *ds, int phy_addr, int phy_reg, u16 val);
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void rtl839x_exec_tbl2_cmd(u32 cmd);
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void rtl839x_print_matrix(void);
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/* RTL930x-specific */
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u32 rtl930x_hash(struct rtl838x_switch_priv *priv, u64 seed);
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irqreturn_t rtl930x_switch_irq(int irq, void *dev_id);
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irqreturn_t rtl839x_switch_irq(int irq, void *dev_id);
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void rtl930x_vlan_profile_dump(int index);
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int rtl9300_sds_power(int mac, int val);
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void rtl9300_sds_rst(int sds_num, u32 mode);
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void rtl930x_print_matrix(void);
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/* RTL931x-specific */
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irqreturn_t rtl931x_switch_irq(int irq, void *dev_id);
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#endif /* _NET_DSA_RTL83XX_H */
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