6f6c00cfc9
This commit adds support for the 32MB storage/512MB RAM version of the U4019 IPQ4019-based board from Unielec. The board has the following specifications: * Qualcomm IPQ4019 (running at 717MHz) * 512MB DDR3 RAM (optional 256MB/1GB) * 32MB SPI NOR (optional 8/16MB or NAND) * Five gigabit ports (Qualcomm QCA8075) * 1x 2.4 GHz wifi (QCA4019 hw1.0) * 1x 5 Ghz wifi (QCA4019 hw1.0) * 1x mini-PCIe slot (only USB-pins connected) * 1x SIM slot (mini-SIM) * 1x USB2.0 port * 1x button * 1x controllable LED * 1x micro SD-card reader Working: * Ethernet * Wifi * USB-port * mini-PCIe slot + SIM slot * Button * Sysupgrade Not working: * SD card slot (no upstream support) Installation instructions: In order to install OpenWRT on the U4019, you need to go via the initramfs-image. The installation steps are as follows: * Connect to board via serial (header exposed and clearly marked). * Interrupt bootloader by pressing a button. * Copy the initramfs-image to your tftp folder, call the file C0A80079.img. * Give the network interface connected to the U4019 the address 192.168.0.156/24. * Start your tftp-server and run tftpboot on the board. * Run bootm when the file has been transferred, to boot OpenWRT. * Once OpenWRT has booted, copy the sysupgrade-image to the device and run sysupgrade to install OpenWRT on the U4019. Notes: - Since IPQ4019 has been moved to 4.19, I have not added support for kernel 4.14. - There is a bug with hardware encryption on IPQ4019, causing poor performance with TCP and ipsec (see for example FS#2355). In order to improve performance, I have disabled hardware encryption in the DTS. We can enable hw. enc. once/if bug is fixed. - In order for Ethernet to work, the phy has to be reset by setting gpio 47 low/high. Adding support for phy reset via gpio required patching the mdio-driver, and the code added comes from the vendor driver. I do not know if patching the driver is an acceptable approach or not. v1->v2: * Do not use wildcard as identifier in the board.d-scripts (thanks Adrian Schmutzler). Signed-off-by: Kristian Evensen <kristian.evensen@gmail.com>
79 lines
1.5 KiB
Text
79 lines
1.5 KiB
Text
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "qcom-ipq4019-unielec-u4019.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Unielec U4019 (32M)";
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compatible = "unielec,u4019-32m","unielec,u4019","qcom,ipq4019";
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};
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&blsp1_spi1 {
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pinctrl-0 = <&spi_0_pins>;
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pinctrl-names = "default";
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status = "okay";
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cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
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flash@0 {
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reg = <0>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <24000000>;
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broken-flash-reset;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "0:SBL1";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "0:MIBIB";
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reg = <0x40000 0x20000>;
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read-only;
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};
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partition@60000 {
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label = "0:QSEE";
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reg = <0x60000 0x60000>;
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read-only;
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};
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partition@c0000 {
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label = "0:CDT";
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reg = <0xc0000 0x10000>;
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read-only;
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};
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partition@d0000 {
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label = "0:DDRPARAMS";
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reg = <0xd0000 0x10000>;
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read-only;
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};
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partition@e0000 {
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label = "0:APPSBLENV";
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reg = <0xe0000 0x10000>;
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read-only;
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};
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partition@f0000 {
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label = "0:APPSBL";
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reg = <0xf0000 0x80000>;
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read-only;
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};
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partition@170000 {
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label = "0:ART";
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reg = <0x170000 0x10000>;
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read-only;
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};
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partition@180000 {
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compatible = "denx,fit";
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label = "firmware";
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reg = <0x180000 0x1e80000>;
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};
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};
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};
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};
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