Manual rebase by Marty Jones: bcm27xx/patches-5.15/950-0078-BCM2708-Add-core-Device-Tree-support.patch All other patches automatically rebased. Signed-off-by: John Audia <therealgraysky@proton.me> Signed-off-by: Marty Jones <mj8263788@gmail.com> [Apply same changes to new dts entry in modified file] Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
30178 lines
767 KiB
Diff
30178 lines
767 KiB
Diff
From 47aa556cd8897b84417a2745650affa8e1dd2b62 Mon Sep 17 00:00:00 2001
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From: notro <notro@tronnes.org>
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Date: Wed, 9 Jul 2014 14:46:08 +0200
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Subject: [PATCH] BCM2708: Add core Device Tree support
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Add the bare minimum needed to boot BCM2708 from a Device Tree.
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Signed-off-by: Noralf Tronnes <notro@tronnes.org>
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BCM2708: DT: change 'axi' nodename to 'soc'
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Change DT node named 'axi' to 'soc' so it matches ARCH_BCM2835.
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The VC4 bootloader fills in certain properties in the 'axi' subtree,
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but since this is part of an upstreaming effort, the name is changed.
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Signed-off-by: Noralf Tronnes notro@tronnes.org
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BCM2708_DT: Correct length of the peripheral space
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Use dts-dirs feature for overlays.
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The kernel makefiles have a dts-dirs target that is for vendor subdirectories.
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Using this fixes the install_dtbs target, which previously did not install the overlays.
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BCM270X_DT: configure I2S DMA channels
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Signed-off-by: Matthias Reichl <hias@horus.com>
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BCM270X_DT: switch to bcm2835-i2s
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I2S soundcard drivers with proper devicetree support (i.e. not linking
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to the cpu_dai/platform via name but to cpu/platform via of_node)
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will work out of the box without any modifications.
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When the kernel is compiled without devicetree support the platform
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code will instantiate the bcm2708-i2s driver and I2S soundcard drivers
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will link to it via name, as before.
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Signed-off-by: Matthias Reichl <hias@horus.com>
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SDIO-overlay: add poll_once-boolean parameter
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Add paramter to toggle sdio-device-polling
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done every second or once at boot-time.
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Signed-off-by: Patrick Boettcher <patrick.boettcher@posteo.de>
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BCM270X_DT: Make mmc overlay compatible with current firmware
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The original DT overlay logic followed a merge-then-patch procedure,
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i.e. parameters are applied to the loaded overlay before the overlay
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is merged into the base DTB. This sequence has been changed to
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patch-then-merge, in order to support parameterised node names, and
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to protect against bad overlays. As a result, overrides (parameters)
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must only target labels in the overlay, but the overlay can obviously target nodes in the base DTB.
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mmc-overlay.dts (that switches back to the original mmc sdcard
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driver) is the only overlay violating that rule, and this patch
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fixes it.
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bcm270x_dt: Use the sdhost MMC controller by default
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The "mmc" overlay reverts to using the other controller.
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squash: Add cprman to dt
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BCM270X_DT: Use clk_core for I2C interfaces
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BCM270X_DT: Use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi
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The mainline Device Tree files are quite close to downstream now.
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Let's use bcm283x.dtsi, bcm2835.dtsi and bcm2836.dtsi as base files
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for our dts files.
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Mainline dts files are based on these files:
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bcm2835-rpi.dtsi
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bcm2835.dtsi bcm2836.dtsi
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bcm283x.dtsi
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Current downstream are based on these:
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bcm2708.dtsi bcm2709.dtsi bcm2710.dtsi
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bcm2708_common.dtsi
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This patch introduces this dependency:
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bcm2708.dtsi bcm2709.dtsi
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bcm2708-rpi.dtsi
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bcm270x.dtsi
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bcm2835.dtsi bcm2836.dtsi
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bcm283x.dtsi
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And:
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bcm2710.dtsi
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bcm2708-rpi.dtsi
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bcm270x.dtsi
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bcm283x.dtsi
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bcm270x.dtsi contains the downstream bcm283x.dtsi diff.
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bcm2708-rpi.dtsi is the downstream version of bcm2835-rpi.dtsi.
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Other changes:
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- The led node has moved from /soc/leds to /leds. This is not a problem
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since the label is used to reference it.
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- The clk_osc reg property changes from 6 to 3.
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- The gpu nodes has their interrupt property set in the base file.
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- the clocks label does not point to the /clocks node anymore, but
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points to the cprman node. This is not a problem since the overlays
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that use the clock node refer to it directly: target-path = "/clocks";
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- some nodes now have 2 labels since mainline and downstream differs in
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this respect: cprman/clocks, spi0/spi, gpu/vc4.
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- some nodes doesn't have an explicit status = "okay" since they're not
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disabled in the base file: watchdog and random.
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- gpiomem doesn't need an explicit status = "okay".
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- bcm2708-rpi-cm.dts got the hpd-gpios property from bcm2708_common.dtsi,
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it's now set directly in that file.
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- bcm2709-rpi-2-b.dts has the timer node moved from /soc/timer to /timer.
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- Removed clock-frequency property on the bcm{2709,2710}.dtsi timer nodes.
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Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
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BCM270X_DT: Use raspberrypi-power to turn on USB power
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Use the raspberrypi-power driver to turn on USB power.
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Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
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BCM270X_DT: Add a .dtbo target, use for overlays
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Change the filenames and extensions to keep the pre-DDT style of
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overlay (<name>-overlay.dtb) distinct from new ones that use a
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different style of local fixups (<name>.dtbo), and to match other
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platforms.
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The RPi firmware uses the DDTK trailer atom to choose which type of
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overlay to use for each kernel.
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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BCM270X_DT: Don't generate "linux,phandle" props
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The EPAPR standard says to use "phandle" properties to store phandles,
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rather than the deprecated "linux,phandle" version. By default, dtc
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generates both, but adding "-H epapr" causes it to only generate
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"phandle"s, saving some space and clutter.
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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BCM270X_DT: Add overlay for enc28j60 on SPI2
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Works on SPI2 for compute module
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BCM270X_DT: Add midi-uart0 overlay
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MIDI requires 31.25kbaud, a baudrate unsupported by Linux. The
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midi-uart0 overlay configures uart0 (ttyAMA0) to use a fake clock
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so that requesting 38.4kbaud actually gets 31.25kbaud.
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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BCM270X_DT: Add i2c-sensor overlay
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The i2c-sensor overlay is a container for various pressure and
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temperature sensors, currently bmp085 and bmp280. The standalone
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bmp085_i2c-sensor overlay is now deprecated.
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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BCM270X_DT: overlays/*-overlay.dtb -> overlays/*.dtbo (#1752)
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We now create overlays as .dtbo files.
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build: support for .dtbo files for dtb overlays
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Kernel 4.4.6+ on RaspberryPi support .dtbo files for overlays, instead of .dtb.
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Patch the kernel, which has faulty rules to generate .dtbo the way yocto does
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Signed-off-by: Herve Jourdain <herve.jourdain@neuf.fr>
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
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BCM270X: Drop position requirement for CMA in VC4 overlay.
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No longer necessary since 2aefcd576195a739a7a256099571c9c4a401005f,
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and will probably let peeople that want to choose a larger CMA
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allocation (particularly on pi0/1).
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Signed-off-by: Eric Anholt <eric@anholt.net>
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BCM270X_DT: RPi Device Tree tidy
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Use the upstream sdhost node, add thermal-zones, and factor out some
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common elements.
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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kbuild: Silence unhelpful DTC warnings
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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BCM270X_DT: DT build rules no longer arch-specific
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Signed-off-by: Phil Elwell <phil@raspberrypi.org>
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---
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arch/arm/boot/dts/Makefile | 17 +
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arch/arm/boot/dts/bcm2708-rpi-b-plus.dts | 129 +
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arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts | 132 +
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arch/arm/boot/dts/bcm2708-rpi-b.dts | 119 +
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arch/arm/boot/dts/bcm2708-rpi-bt.dtsi | 26 +
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arch/arm/boot/dts/bcm2708-rpi-cm.dts | 112 +
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arch/arm/boot/dts/bcm2708-rpi-cm.dtsi | 18 +
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arch/arm/boot/dts/bcm2708-rpi-zero-w.dts | 169 +
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arch/arm/boot/dts/bcm2708-rpi-zero.dts | 123 +
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arch/arm/boot/dts/bcm2708-rpi.dtsi | 36 +
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arch/arm/boot/dts/bcm2708.dtsi | 12 +
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arch/arm/boot/dts/bcm2709-rpi-2-b.dts | 129 +
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arch/arm/boot/dts/bcm2709-rpi.dtsi | 5 +
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arch/arm/boot/dts/bcm2709.dtsi | 22 +
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arch/arm/boot/dts/bcm270x-rpi.dtsi | 154 +
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arch/arm/boot/dts/bcm270x.dtsi | 217 +
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arch/arm/boot/dts/bcm2710-rpi-2-b.dts | 129 +
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arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 201 +
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arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 203 +
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arch/arm/boot/dts/bcm2710-rpi-cm3.dts | 148 +
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arch/arm/boot/dts/bcm2710.dtsi | 25 +
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arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 310 +-
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arch/arm/boot/dts/bcm2711-rpi-400.dts | 624 ++-
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arch/arm/boot/dts/bcm2711-rpi-cm4.dts | 660 +++
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arch/arm/boot/dts/bcm2711-rpi-ds.dtsi | 205 +
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arch/arm/boot/dts/bcm2711.dtsi | 46 +-
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arch/arm/boot/dts/bcm271x-rpi-bt.dtsi | 26 +
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arch/arm/boot/dts/bcm2835-common.dtsi | 4 +-
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arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 5 +
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arch/arm/boot/dts/bcm2835-rpi-a.dts | 7 +
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arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 5 +
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arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 7 +
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arch/arm/boot/dts/bcm2835-rpi-b.dts | 7 +
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arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts | 5 +
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arch/arm/boot/dts/bcm2835-rpi-zero-w.dts | 5 +
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arch/arm/boot/dts/bcm2835-rpi-zero.dts | 5 +
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arch/arm/boot/dts/bcm2835-rpi.dtsi | 19 +-
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arch/arm/boot/dts/bcm2835.dtsi | 2 +-
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arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 5 +
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arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts | 5 +
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arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts | 5 +
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arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 5 +
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arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts | 5 +
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.../boot/dts/bcm283x-rpi-cam1-regulator.dtsi | 10 +
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arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi | 4 +
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arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi | 4 +
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arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi | 4 +
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.../boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi | 4 +
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.../boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi | 4 +
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arch/arm/boot/dts/bcm283x.dtsi | 26 +-
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arch/arm/boot/dts/overlays/Makefile | 248 ++
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arch/arm/boot/dts/overlays/README | 3530 +++++++++++++++++
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.../arm/boot/dts/overlays/act-led-overlay.dts | 27 +
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.../boot/dts/overlays/adafruit18-overlay.dts | 55 +
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.../dts/overlays/adau1977-adc-overlay.dts | 40 +
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.../dts/overlays/adau7002-simple-overlay.dts | 52 +
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.../arm/boot/dts/overlays/ads1015-overlay.dts | 98 +
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.../arm/boot/dts/overlays/ads1115-overlay.dts | 103 +
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.../arm/boot/dts/overlays/ads7846-overlay.dts | 89 +
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.../boot/dts/overlays/adv7282m-overlay.dts | 65 +
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.../boot/dts/overlays/adv728x-m-overlay.dts | 37 +
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.../overlays/akkordion-iqdacplus-overlay.dts | 49 +
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.../allo-boss-dac-pcm512x-audio-overlay.dts | 59 +
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.../overlays/allo-boss2-dac-audio-overlay.dts | 57 +
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.../dts/overlays/allo-digione-overlay.dts | 44 +
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.../allo-katana-dac-audio-overlay.dts | 57 +
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.../allo-piano-dac-pcm512x-audio-overlay.dts | 54 +
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...o-piano-dac-plus-pcm512x-audio-overlay.dts | 57 +
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arch/arm/boot/dts/overlays/anyspi-overlay.dts | 205 +
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.../boot/dts/overlays/apds9960-overlay.dts | 57 +
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.../boot/dts/overlays/applepi-dac-overlay.dts | 57 +
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.../boot/dts/overlays/at86rf233-overlay.dts | 57 +
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.../overlays/audioinjector-addons-overlay.dts | 60 +
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...dioinjector-isolated-soundcard-overlay.dts | 55 +
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.../overlays/audioinjector-ultra-overlay.dts | 71 +
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.../audioinjector-wm8731-audio-overlay.dts | 39 +
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.../dts/overlays/audiosense-pi-overlay.dts | 82 +
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.../boot/dts/overlays/audremap-overlay.dts | 42 +
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.../boot/dts/overlays/balena-fin-overlay.dts | 125 +
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.../arm/boot/dts/overlays/cap1106-overlay.dts | 52 +
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.../boot/dts/overlays/chipdip-dac-overlay.dts | 46 +
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arch/arm/boot/dts/overlays/cma-overlay.dts | 36 +
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arch/arm/boot/dts/overlays/dht11-overlay.dts | 41 +
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.../dts/overlays/dionaudio-loco-overlay.dts | 39 +
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.../overlays/dionaudio-loco-v2-overlay.dts | 49 +
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.../boot/dts/overlays/disable-bt-overlay.dts | 64 +
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.../dts/overlays/disable-wifi-overlay.dts | 20 +
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arch/arm/boot/dts/overlays/dpi18-overlay.dts | 39 +
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.../boot/dts/overlays/dpi18cpadhi-overlay.dts | 26 +
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arch/arm/boot/dts/overlays/dpi24-overlay.dts | 39 +
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arch/arm/boot/dts/overlays/draws-overlay.dts | 208 +
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.../arm/boot/dts/overlays/dwc-otg-overlay.dts | 14 +
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arch/arm/boot/dts/overlays/dwc2-overlay.dts | 26 +
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.../boot/dts/overlays/edt-ft5406-overlay.dts | 10 +
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arch/arm/boot/dts/overlays/edt-ft5406.dtsi | 55 +
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.../boot/dts/overlays/enc28j60-overlay.dts | 53 +
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.../dts/overlays/enc28j60-spi2-overlay.dts | 47 +
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.../arm/boot/dts/overlays/exc3000-overlay.dts | 48 +
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.../boot/dts/overlays/fe-pi-audio-overlay.dts | 70 +
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.../boot/dts/overlays/fsm-demo-overlay.dts | 104 +
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.../boot/dts/overlays/ghost-amp-overlay.dts | 145 +
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arch/arm/boot/dts/overlays/goodix-overlay.dts | 46 +
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.../googlevoicehat-soundcard-overlay.dts | 49 +
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.../boot/dts/overlays/gpio-fan-overlay.dts | 79 +
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.../arm/boot/dts/overlays/gpio-ir-overlay.dts | 49 +
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.../boot/dts/overlays/gpio-ir-tx-overlay.dts | 36 +
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.../boot/dts/overlays/gpio-key-overlay.dts | 48 +
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.../boot/dts/overlays/gpio-led-overlay.dts | 97 +
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.../overlays/gpio-no-bank0-irq-overlay.dts | 14 +
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.../boot/dts/overlays/gpio-no-irq-overlay.dts | 14 +
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.../dts/overlays/gpio-poweroff-overlay.dts | 37 +
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.../dts/overlays/gpio-shutdown-overlay.dts | 86 +
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.../boot/dts/overlays/hd44780-lcd-overlay.dts | 46 +
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.../hdmi-backlight-hwhack-gpio-overlay.dts | 47 +
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.../dts/overlays/hifiberry-amp-overlay.dts | 39 +
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.../dts/overlays/hifiberry-amp100-overlay.dts | 64 +
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.../dts/overlays/hifiberry-dac-overlay.dts | 34 +
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.../overlays/hifiberry-dacplus-overlay.dts | 65 +
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.../overlays/hifiberry-dacplusadc-overlay.dts | 72 +
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.../hifiberry-dacplusadcpro-overlay.dts | 65 +
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.../overlays/hifiberry-dacplusdsp-overlay.dts | 34 +
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.../overlays/hifiberry-dacplushd-overlay.dts | 106 +
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.../dts/overlays/hifiberry-digi-overlay.dts | 41 +
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.../overlays/hifiberry-digi-pro-overlay.dts | 43 +
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.../boot/dts/overlays/highperi-overlay.dts | 63 +
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arch/arm/boot/dts/overlays/hy28a-overlay.dts | 93 +
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.../boot/dts/overlays/hy28b-2017-overlay.dts | 152 +
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arch/arm/boot/dts/overlays/hy28b-overlay.dts | 148 +
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.../boot/dts/overlays/i-sabre-q2m-overlay.dts | 39 +
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.../boot/dts/overlays/i2c-bcm2708-overlay.dts | 13 +
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.../boot/dts/overlays/i2c-gpio-overlay.dts | 47 +
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.../arm/boot/dts/overlays/i2c-mux-overlay.dts | 139 +
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.../dts/overlays/i2c-pwm-pca9685a-overlay.dts | 26 +
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.../arm/boot/dts/overlays/i2c-rtc-common.dtsi | 323 ++
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.../dts/overlays/i2c-rtc-gpio-overlay.dts | 31 +
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.../arm/boot/dts/overlays/i2c-rtc-overlay.dts | 34 +
|
|
.../boot/dts/overlays/i2c-sensor-overlay.dts | 320 ++
|
|
arch/arm/boot/dts/overlays/i2c0-overlay.dts | 83 +
|
|
arch/arm/boot/dts/overlays/i2c1-overlay.dts | 44 +
|
|
arch/arm/boot/dts/overlays/i2c3-overlay.dts | 36 +
|
|
arch/arm/boot/dts/overlays/i2c4-overlay.dts | 36 +
|
|
arch/arm/boot/dts/overlays/i2c5-overlay.dts | 36 +
|
|
arch/arm/boot/dts/overlays/i2c6-overlay.dts | 36 +
|
|
.../dts/overlays/i2s-gpio28-31-overlay.dts | 18 +
|
|
.../boot/dts/overlays/ilitek251x-overlay.dts | 45 +
|
|
arch/arm/boot/dts/overlays/imx219-overlay.dts | 115 +
|
|
arch/arm/boot/dts/overlays/imx290-overlay.dts | 32 +
|
|
.../boot/dts/overlays/imx290_327-overlay.dtsi | 144 +
|
|
arch/arm/boot/dts/overlays/imx378-overlay.dts | 10 +
|
|
arch/arm/boot/dts/overlays/imx477-overlay.dts | 10 +
|
|
.../boot/dts/overlays/imx477_378-overlay.dtsi | 110 +
|
|
.../dts/overlays/iqaudio-codec-overlay.dts | 42 +
|
|
.../boot/dts/overlays/iqaudio-dac-overlay.dts | 46 +
|
|
.../dts/overlays/iqaudio-dacplus-overlay.dts | 49 +
|
|
.../iqaudio-digi-wm8804-audio-overlay.dts | 47 +
|
|
.../arm/boot/dts/overlays/irs1125-overlay.dts | 85 +
|
|
.../dts/overlays/jedec-spi-nor-overlay.dts | 309 ++
|
|
.../dts/overlays/justboom-both-overlay.dts | 65 +
|
|
.../dts/overlays/justboom-dac-overlay.dts | 46 +
|
|
.../dts/overlays/justboom-digi-overlay.dts | 41 +
|
|
.../arm/boot/dts/overlays/ltc294x-overlay.dts | 86 +
|
|
.../boot/dts/overlays/max98357a-overlay.dts | 84 +
|
|
.../boot/dts/overlays/maxtherm-overlay.dts | 186 +
|
|
.../boot/dts/overlays/mbed-dac-overlay.dts | 64 +
|
|
.../boot/dts/overlays/mcp23017-overlay.dts | 69 +
|
|
.../boot/dts/overlays/mcp23s17-overlay.dts | 732 ++++
|
|
.../dts/overlays/mcp2515-can0-overlay.dts | 73 +
|
|
.../dts/overlays/mcp2515-can1-overlay.dts | 73 +
|
|
.../boot/dts/overlays/mcp251xfd-overlay.dts | 226 ++
|
|
.../arm/boot/dts/overlays/mcp3008-overlay.dts | 205 +
|
|
.../arm/boot/dts/overlays/mcp3202-overlay.dts | 205 +
|
|
.../arm/boot/dts/overlays/mcp342x-overlay.dts | 164 +
|
|
.../dts/overlays/media-center-overlay.dts | 134 +
|
|
.../boot/dts/overlays/merus-amp-overlay.dts | 60 +
|
|
.../boot/dts/overlays/midi-uart0-overlay.dts | 36 +
|
|
.../boot/dts/overlays/midi-uart1-overlay.dts | 43 +
|
|
.../boot/dts/overlays/midi-uart2-overlay.dts | 37 +
|
|
.../boot/dts/overlays/midi-uart3-overlay.dts | 38 +
|
|
.../boot/dts/overlays/midi-uart4-overlay.dts | 38 +
|
|
.../boot/dts/overlays/midi-uart5-overlay.dts | 38 +
|
|
.../boot/dts/overlays/minipitft13-overlay.dts | 70 +
|
|
.../boot/dts/overlays/miniuart-bt-overlay.dts | 93 +
|
|
arch/arm/boot/dts/overlays/mmc-overlay.dts | 46 +
|
|
.../arm/boot/dts/overlays/mpu6050-overlay.dts | 29 +
|
|
.../arm/boot/dts/overlays/mz61581-overlay.dts | 117 +
|
|
arch/arm/boot/dts/overlays/ov5647-overlay.dts | 94 +
|
|
arch/arm/boot/dts/overlays/ov7251-overlay.dts | 113 +
|
|
arch/arm/boot/dts/overlays/ov9281-overlay.dts | 113 +
|
|
arch/arm/boot/dts/overlays/overlay_map.dts | 158 +
|
|
.../arm/boot/dts/overlays/papirus-overlay.dts | 89 +
|
|
.../arm/boot/dts/overlays/pca953x-overlay.dts | 240 ++
|
|
.../dts/overlays/pcie-32bit-dma-overlay.dts | 18 +
|
|
arch/arm/boot/dts/overlays/pibell-overlay.dts | 81 +
|
|
.../dts/overlays/pifacedigital-overlay.dts | 144 +
|
|
.../arm/boot/dts/overlays/pifi-40-overlay.dts | 50 +
|
|
.../boot/dts/overlays/pifi-dac-hd-overlay.dts | 49 +
|
|
.../dts/overlays/pifi-dac-zero-overlay.dts | 49 +
|
|
.../dts/overlays/pifi-mini-210-overlay.dts | 42 +
|
|
arch/arm/boot/dts/overlays/piglow-overlay.dts | 97 +
|
|
.../boot/dts/overlays/piscreen-overlay.dts | 102 +
|
|
.../boot/dts/overlays/piscreen2r-overlay.dts | 106 +
|
|
.../arm/boot/dts/overlays/pisound-overlay.dts | 120 +
|
|
.../arm/boot/dts/overlays/pitft22-overlay.dts | 69 +
|
|
.../overlays/pitft28-capacitive-overlay.dts | 91 +
|
|
.../overlays/pitft28-resistive-overlay.dts | 119 +
|
|
.../overlays/pitft35-resistive-overlay.dts | 119 +
|
|
.../boot/dts/overlays/pps-gpio-overlay.dts | 38 +
|
|
.../boot/dts/overlays/pwm-2chan-overlay.dts | 49 +
|
|
.../boot/dts/overlays/pwm-ir-tx-overlay.dts | 40 +
|
|
arch/arm/boot/dts/overlays/pwm-overlay.dts | 45 +
|
|
.../arm/boot/dts/overlays/qca7000-overlay.dts | 55 +
|
|
.../dts/overlays/qca7000-uart0-overlay.dts | 46 +
|
|
.../dts/overlays/rotary-encoder-overlay.dts | 59 +
|
|
.../dts/overlays/rpi-backlight-overlay.dts | 21 +
|
|
.../overlays/rpi-cirrus-wm5102-overlay.dts | 172 +
|
|
.../arm/boot/dts/overlays/rpi-dac-overlay.dts | 34 +
|
|
.../boot/dts/overlays/rpi-display-overlay.dts | 91 +
|
|
.../boot/dts/overlays/rpi-ft5406-overlay.dts | 25 +
|
|
.../arm/boot/dts/overlays/rpi-poe-overlay.dts | 102 +
|
|
.../dts/overlays/rpi-poe-plus-overlay.dts | 23 +
|
|
.../boot/dts/overlays/rpi-proto-overlay.dts | 39 +
|
|
.../boot/dts/overlays/rpi-sense-overlay.dts | 47 +
|
|
arch/arm/boot/dts/overlays/rpi-tv-overlay.dts | 34 +
|
|
.../boot/dts/overlays/rpivid-v4l2-overlay.dts | 50 +
|
|
.../rra-digidac1-wm8741-audio-overlay.dts | 49 +
|
|
.../boot/dts/overlays/sainsmart18-overlay.dts | 52 +
|
|
.../dts/overlays/sc16is750-i2c-overlay.dts | 43 +
|
|
.../dts/overlays/sc16is752-i2c-overlay.dts | 43 +
|
|
.../dts/overlays/sc16is752-spi0-overlay.dts | 49 +
|
|
.../dts/overlays/sc16is752-spi1-overlay.dts | 67 +
|
|
arch/arm/boot/dts/overlays/sdhost-overlay.dts | 38 +
|
|
arch/arm/boot/dts/overlays/sdio-overlay.dts | 77 +
|
|
.../overlays/seeed-can-fd-hat-v1-overlay.dts | 138 +
|
|
.../overlays/seeed-can-fd-hat-v2-overlay.dts | 117 +
|
|
.../boot/dts/overlays/sh1106-spi-overlay.dts | 84 +
|
|
.../boot/dts/overlays/si446x-spi0-overlay.dts | 53 +
|
|
.../arm/boot/dts/overlays/smi-dev-overlay.dts | 20 +
|
|
.../boot/dts/overlays/smi-nand-overlay.dts | 66 +
|
|
arch/arm/boot/dts/overlays/smi-overlay.dts | 37 +
|
|
.../dts/overlays/spi-gpio35-39-overlay.dts | 31 +
|
|
.../dts/overlays/spi-gpio40-45-overlay.dts | 36 +
|
|
.../arm/boot/dts/overlays/spi-rtc-overlay.dts | 75 +
|
|
.../boot/dts/overlays/spi0-1cs-overlay.dts | 42 +
|
|
.../boot/dts/overlays/spi0-2cs-overlay.dts | 37 +
|
|
.../boot/dts/overlays/spi1-1cs-overlay.dts | 57 +
|
|
.../boot/dts/overlays/spi1-2cs-overlay.dts | 69 +
|
|
.../boot/dts/overlays/spi1-3cs-overlay.dts | 81 +
|
|
.../boot/dts/overlays/spi2-1cs-overlay.dts | 57 +
|
|
.../boot/dts/overlays/spi2-2cs-overlay.dts | 69 +
|
|
.../boot/dts/overlays/spi2-3cs-overlay.dts | 81 +
|
|
.../boot/dts/overlays/spi3-1cs-overlay.dts | 44 +
|
|
.../boot/dts/overlays/spi3-2cs-overlay.dts | 56 +
|
|
.../boot/dts/overlays/spi4-1cs-overlay.dts | 44 +
|
|
.../boot/dts/overlays/spi4-2cs-overlay.dts | 56 +
|
|
.../boot/dts/overlays/spi5-1cs-overlay.dts | 44 +
|
|
.../boot/dts/overlays/spi5-2cs-overlay.dts | 56 +
|
|
.../boot/dts/overlays/spi6-1cs-overlay.dts | 44 +
|
|
.../boot/dts/overlays/spi6-2cs-overlay.dts | 56 +
|
|
.../arm/boot/dts/overlays/ssd1306-overlay.dts | 36 +
|
|
.../boot/dts/overlays/ssd1306-spi-overlay.dts | 84 +
|
|
.../boot/dts/overlays/ssd1331-spi-overlay.dts | 83 +
|
|
.../boot/dts/overlays/ssd1351-spi-overlay.dts | 83 +
|
|
.../dts/overlays/superaudioboard-overlay.dts | 73 +
|
|
arch/arm/boot/dts/overlays/sx150x-overlay.dts | 1706 ++++++++
|
|
.../dts/overlays/tc358743-audio-overlay.dts | 52 +
|
|
.../boot/dts/overlays/tc358743-overlay.dts | 107 +
|
|
.../boot/dts/overlays/tinylcd35-overlay.dts | 222 ++
|
|
.../boot/dts/overlays/tpm-slb9670-overlay.dts | 44 +
|
|
arch/arm/boot/dts/overlays/uart0-overlay.dts | 32 +
|
|
arch/arm/boot/dts/overlays/uart1-overlay.dts | 38 +
|
|
arch/arm/boot/dts/overlays/uart2-overlay.dts | 27 +
|
|
arch/arm/boot/dts/overlays/uart3-overlay.dts | 27 +
|
|
arch/arm/boot/dts/overlays/uart4-overlay.dts | 27 +
|
|
arch/arm/boot/dts/overlays/uart5-overlay.dts | 27 +
|
|
arch/arm/boot/dts/overlays/udrc-overlay.dts | 128 +
|
|
.../dts/overlays/ugreen-dabboard-overlay.dts | 49 +
|
|
.../boot/dts/overlays/upstream-overlay.dts | 101 +
|
|
.../dts/overlays/upstream-pi4-overlay.dts | 137 +
|
|
.../dts/overlays/vc4-fkms-v3d-overlay.dts | 40 +
|
|
.../dts/overlays/vc4-fkms-v3d-pi4-overlay.dts | 44 +
|
|
.../vc4-kms-dpi-at056tn53v1-overlay.dts | 44 +
|
|
.../overlays/vc4-kms-dsi-7inch-overlay.dts | 118 +
|
|
.../vc4-kms-dsi-lt070me05000-overlay.dts | 69 +
|
|
.../vc4-kms-dsi-lt070me05000-v2-overlay.dts | 64 +
|
|
.../overlays/vc4-kms-kippah-7inch-overlay.dts | 43 +
|
|
.../boot/dts/overlays/vc4-kms-v3d-overlay.dts | 123 +
|
|
.../dts/overlays/vc4-kms-v3d-pi4-overlay.dts | 197 +
|
|
.../dts/overlays/vc4-kms-vga666-overlay.dts | 100 +
|
|
arch/arm/boot/dts/overlays/vga666-overlay.dts | 30 +
|
|
.../arm/boot/dts/overlays/w1-gpio-overlay.dts | 40 +
|
|
.../dts/overlays/w1-gpio-pullup-overlay.dts | 42 +
|
|
arch/arm/boot/dts/overlays/w5500-overlay.dts | 63 +
|
|
.../arm/boot/dts/overlays/wittypi-overlay.dts | 44 +
|
|
.../dts/overlays/wm8960-soundcard-overlay.dts | 82 +
|
|
arch/arm64/boot/dts/Makefile | 2 +
|
|
arch/arm64/boot/dts/broadcom/Makefile | 12 +
|
|
.../boot/dts/broadcom/bcm2710-rpi-2-b.dts | 1 +
|
|
.../dts/broadcom/bcm2710-rpi-3-b-plus.dts | 1 +
|
|
.../boot/dts/broadcom/bcm2710-rpi-3-b.dts | 1 +
|
|
.../boot/dts/broadcom/bcm2710-rpi-cm3.dts | 1 +
|
|
.../boot/dts/broadcom/bcm2711-rpi-4-b.dts | 3 +-
|
|
.../boot/dts/broadcom/bcm2711-rpi-400.dts | 3 +-
|
|
.../boot/dts/broadcom/bcm2711-rpi-cm4.dts | 1 +
|
|
.../dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi | 1 +
|
|
.../dts/broadcom/bcm283x-rpi-lan7515.dtsi | 1 +
|
|
arch/arm64/boot/dts/overlays | 1 +
|
|
scripts/Makefile.dtbinst | 3 +-
|
|
scripts/Makefile.lib | 13 +
|
|
308 files changed, 27244 insertions(+), 48 deletions(-)
|
|
create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2708-rpi-b.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2708-rpi-bt.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2708-rpi-zero.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2708-rpi.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm2708.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm2709-rpi-2-b.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2709-rpi.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm2709.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm270x-rpi.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm270x.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm2710-rpi-2-b.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2710-rpi-cm3.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2710.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm2711-rpi-cm4.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2711-rpi-ds.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm271x-rpi-bt.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm283x-rpi-cam1-regulator.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi
|
|
create mode 100644 arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi
|
|
create mode 100644 arch/arm/boot/dts/overlays/Makefile
|
|
create mode 100644 arch/arm/boot/dts/overlays/README
|
|
create mode 100644 arch/arm/boot/dts/overlays/act-led-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/adafruit18-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ads1015-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ads1115-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ads7846-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/adv7282m-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/adv728x-m-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/allo-digione-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
|
|
create mode 100755 arch/arm/boot/dts/overlays/anyspi-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/apds9960-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/at86rf233-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/audremap-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/balena-fin-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/cap1106-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/cma-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/dht11-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/disable-bt-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/disable-wifi-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/dpi18-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/dpi18cpadhi-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/dpi24-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/draws-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/dwc2-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/edt-ft5406.dtsi
|
|
create mode 100644 arch/arm/boot/dts/overlays/enc28j60-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/exc3000-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/fsm-demo-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/goodix-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/gpio-fan-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/gpio-key-overlay.dts
|
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create mode 100755 arch/arm/boot/dts/overlays/gpio-led-overlay.dts
|
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create mode 100755 arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/highperi-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/hy28a-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/hy28b-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-common.dtsi
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
|
|
create mode 100755 arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c0-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c1-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c3-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c4-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c5-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2c6-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ilitek251x-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/imx219-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/imx290-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
|
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create mode 100644 arch/arm/boot/dts/overlays/imx378-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/imx477-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/imx477_378-overlay.dtsi
|
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create mode 100644 arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/irs1125-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/justboom-both-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ltc294x-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/max98357a-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/maxtherm-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/mcp23017-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
|
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create mode 100755 arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/mcp251xfd-overlay.dts
|
|
create mode 100755 arch/arm/boot/dts/overlays/mcp3008-overlay.dts
|
|
create mode 100755 arch/arm/boot/dts/overlays/mcp3202-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/mcp342x-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/media-center-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/merus-amp-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/midi-uart2-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/midi-uart3-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/midi-uart4-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/midi-uart5-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/minipitft13-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/mmc-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/mpu6050-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/mz61581-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ov5647-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ov7251-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ov9281-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/overlay_map.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/papirus-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pca953x-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pcie-32bit-dma-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/pibell-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pifi-40-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pifi-dac-hd-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pifi-dac-zero-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pifi-mini-210-overlay.dts
|
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create mode 100644 arch/arm/boot/dts/overlays/piglow-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/piscreen-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pisound-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pitft22-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/pwm-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/qca7000-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/qca7000-uart0-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rpi-display-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rpi-poe-plus-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rpivid-v4l2-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/sainsmart18-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/sdhost-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/sdio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/seeed-can-fd-hat-v1-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/seeed-can-fd-hat-v2-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/si446x-spi0-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/smi-dev-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/smi-nand-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/smi-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi0-1cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi0-2cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ssd1306-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ssd1331-spi-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
|
|
create mode 100755 arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/sx150x-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/tc358743-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts
|
|
create mode 100755 arch/arm/boot/dts/overlays/uart0-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/uart1-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/uart2-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/uart3-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/uart4-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/uart5-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/udrc-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/upstream-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/upstream-pi4-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/vc4-fkms-v3d-pi4-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dpi-at056tn53v1-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/vga666-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/w5500-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/wittypi-overlay.dts
|
|
create mode 100644 arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts
|
|
create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts
|
|
create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
|
|
create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
|
|
create mode 100644 arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts
|
|
create mode 100644 arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4.dts
|
|
create mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi
|
|
create mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
|
|
create mode 120000 arch/arm64/boot/dts/overlays
|
|
|
|
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
|
|
index 27ca1ca6e827..ab6a5c6ea5ee 100644
|
|
--- a/arch/arm/boot/dts/Makefile
|
|
+++ b/arch/arm/boot/dts/Makefile
|
|
@@ -1,4 +1,11 @@
|
|
# SPDX-License-Identifier: GPL-2.0
|
|
+
|
|
+dtb-$(CONFIG_ARCH_BCM2835) += \
|
|
+ bcm2708-rpi-b-rev1.dtb \
|
|
+ bcm2708-rpi-cm.dtb \
|
|
+ bcm2710-rpi-cm3.dtb \
|
|
+ bcm2711-rpi-cm4.dtb
|
|
+
|
|
dtb-$(CONFIG_ARCH_ALPINE) += \
|
|
alpine-db.dtb
|
|
dtb-$(CONFIG_MACH_ARTPEC6) += \
|
|
@@ -1499,3 +1506,13 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
|
|
aspeed-bmc-portwell-neptune.dtb \
|
|
aspeed-bmc-quanta-q71l.dtb \
|
|
aspeed-bmc-supermicro-x11spi.dtb
|
|
+
|
|
+targets += dtbs dtbs_install
|
|
+targets += $(dtb-y)
|
|
+
|
|
+subdir-y := overlays
|
|
+
|
|
+# Enable fixups to support overlays on BCM2835 platforms
|
|
+ifeq ($(CONFIG_ARCH_BCM2835),y)
|
|
+ DTC_FLAGS += -@
|
|
+endif
|
|
diff --git a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
|
|
new file mode 100644
|
|
index 000000000000..e42cba84ab0e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts
|
|
@@ -0,0 +1,129 @@
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm2708.dtsi"
|
|
+#include "bcm2708-rpi.dtsi"
|
|
+#include "bcm283x-rpi-smsc9514.dtsi"
|
|
+#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
|
|
+#include "bcm283x-rpi-cam1-regulator.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
|
|
+ model = "Raspberry Pi Model B+";
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <40 45>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&gpio 47 0>;
|
|
+ };
|
|
+
|
|
+ pwr_led: led-pwr {
|
|
+ label = "led1";
|
|
+ linux,default-trigger = "input";
|
|
+ gpios = <&gpio 35 0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+};
|
|
+
|
|
+&cam1_reg {
|
|
+ gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+
|
|
+ pwr_led_gpio = <&pwr_led>,"gpios:4";
|
|
+ pwr_led_activelow = <&pwr_led>,"gpios:8";
|
|
+ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts b/arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts
|
|
new file mode 100644
|
|
index 000000000000..4ea1e68f5e29
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2708-rpi-b-rev1.dts
|
|
@@ -0,0 +1,132 @@
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm2708.dtsi"
|
|
+#include "bcm2708-rpi.dtsi"
|
|
+#include "bcm283x-rpi-smsc9512.dtsi"
|
|
+#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
+#include "bcm283x-rpi-cam1-regulator.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "raspberrypi,model-b", "brcm,bcm2835";
|
|
+ model = "Raspberry Pi Model B";
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <28 29 30 31>;
|
|
+ brcm,function = <6>; /* alt2 */
|
|
+ };
|
|
+
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <40 45>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+/delete-node/ &i2c0mux;
|
|
+
|
|
+i2c0: &i2c0if {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c0_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+i2c_csi_dsi: &i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ aliases {
|
|
+ i2c0 = &i2c0;
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ i2c0 = <&i2c0>, "status";
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&gpio 16 1>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+};
|
|
+
|
|
+&cam1_reg {
|
|
+ gpio = <&gpio 27 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2708-rpi-b.dts b/arch/arm/boot/dts/bcm2708-rpi-b.dts
|
|
new file mode 100644
|
|
index 000000000000..a152c1c8e648
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2708-rpi-b.dts
|
|
@@ -0,0 +1,119 @@
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm2708.dtsi"
|
|
+#include "bcm2708-rpi.dtsi"
|
|
+#include "bcm283x-rpi-smsc9512.dtsi"
|
|
+#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
|
|
+#include "bcm283x-rpi-cam1-regulator.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "raspberrypi,model-b", "brcm,bcm2835";
|
|
+ model = "Raspberry Pi Model B";
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <28 29 30 31>;
|
|
+ brcm,function = <6>; /* alt2 */
|
|
+ };
|
|
+
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <40 45>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&gpio 16 1>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+};
|
|
+
|
|
+&cam1_reg {
|
|
+ gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2708-rpi-bt.dtsi b/arch/arm/boot/dts/bcm2708-rpi-bt.dtsi
|
|
new file mode 100644
|
|
index 000000000000..a18f80af97d3
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2708-rpi-bt.dtsi
|
|
@@ -0,0 +1,26 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+
|
|
+&uart0 {
|
|
+ bt: bluetooth {
|
|
+ compatible = "brcm,bcm43438-bt";
|
|
+ max-speed = <3000000>;
|
|
+ shutdown-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ minibt: bluetooth {
|
|
+ compatible = "brcm,bcm43438-bt";
|
|
+ max-speed = <460800>;
|
|
+ shutdown-gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ krnbt = <&bt>,"status";
|
|
+ krnbt_baudrate = <&bt>,"max-speed:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2708-rpi-cm.dts b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
|
|
new file mode 100644
|
|
index 000000000000..f61e3418425a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts
|
|
@@ -0,0 +1,112 @@
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm2708-rpi-cm.dtsi"
|
|
+#include "bcm283x-rpi-csi0-2lane.dtsi"
|
|
+#include "bcm283x-rpi-csi1-4lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "raspberrypi,compute-module", "brcm,bcm2835";
|
|
+ model = "Raspberry Pi Compute Module";
|
|
+
|
|
+ cam1_reg: cam1_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "cam1-regulator";
|
|
+ gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
|
|
+ enable-active-high;
|
|
+ status = "disabled";
|
|
+ };
|
|
+ cam0_reg: cam0_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "cam0-regulator";
|
|
+ gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
|
|
+ enable-active-high;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins;
|
|
+ brcm,function;
|
|
+ };
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
|
|
new file mode 100644
|
|
index 000000000000..d5572b2d2103
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dtsi
|
|
@@ -0,0 +1,18 @@
|
|
+#include "bcm2708.dtsi"
|
|
+#include "bcm2708-rpi.dtsi"
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&gpio 47 0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
|
|
new file mode 100644
|
|
index 000000000000..75a5b41514f9
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2708-rpi-zero-w.dts
|
|
@@ -0,0 +1,169 @@
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm2708.dtsi"
|
|
+#include "bcm2708-rpi.dtsi"
|
|
+#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
|
|
+#include "bcm2708-rpi-bt.dtsi"
|
|
+#include "bcm283x-rpi-cam1-regulator.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
|
|
+ model = "Raspberry Pi Zero W";
|
|
+
|
|
+ chosen {
|
|
+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart1;
|
|
+ serial1 = &uart0;
|
|
+ mmc1 = &mmcnr;
|
|
+ };
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ sdio_pins: sdio_pins {
|
|
+ brcm,pins = <34 35 36 37 38 39>;
|
|
+ brcm,function = <7>; /* ALT3 = SD1 */
|
|
+ brcm,pull = <0 2 2 2 2 2>;
|
|
+ };
|
|
+
|
|
+ bt_pins: bt_pins {
|
|
+ brcm,pins = <43>;
|
|
+ brcm,function = <4>; /* alt0:GPCLK2 */
|
|
+ brcm,pull = <0>; /* none */
|
|
+ };
|
|
+
|
|
+ uart0_pins: uart0_pins {
|
|
+ brcm,pins = <30 31 32 33>;
|
|
+ brcm,function = <7>; /* alt3=UART0 */
|
|
+ brcm,pull = <2 0 0 2>; /* up none none up */
|
|
+ };
|
|
+
|
|
+ uart1_pins: uart1_pins {
|
|
+ brcm,pins;
|
|
+ brcm,function;
|
|
+ brcm,pull;
|
|
+ };
|
|
+
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <>;
|
|
+ brcm,function = <>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&mmcnr {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdio_pins>;
|
|
+ bus-width = <4>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_pins &bt_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart1_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "actpwr";
|
|
+ gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+ brcm,disable-headphones = <1>;
|
|
+};
|
|
+
|
|
+&cam1_reg {
|
|
+ gpio = <&gpio 44 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2708-rpi-zero.dts b/arch/arm/boot/dts/bcm2708-rpi-zero.dts
|
|
new file mode 100644
|
|
index 000000000000..84591bd7d423
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2708-rpi-zero.dts
|
|
@@ -0,0 +1,123 @@
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm2708.dtsi"
|
|
+#include "bcm2708-rpi.dtsi"
|
|
+#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
|
|
+#include "bcm283x-rpi-cam1-regulator.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "raspberrypi,model-zero", "brcm,bcm2835";
|
|
+ model = "Raspberry Pi Zero";
|
|
+
|
|
+ chosen {
|
|
+ bootargs = "coherent_pool=1M snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
|
|
+ };
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <>;
|
|
+ brcm,function = <>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "actpwr";
|
|
+ gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+ brcm,disable-headphones = <1>;
|
|
+};
|
|
+
|
|
+&cam1_reg {
|
|
+ gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2708-rpi.dtsi b/arch/arm/boot/dts/bcm2708-rpi.dtsi
|
|
new file mode 100644
|
|
index 000000000000..e2458b15d64a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi
|
|
@@ -0,0 +1,36 @@
|
|
+/* Downstream modifications common to bcm2835, bcm2836, bcm2837 */
|
|
+
|
|
+#include "bcm2835-rpi.dtsi"
|
|
+#include "bcm270x-rpi.dtsi"
|
|
+
|
|
+/ {
|
|
+ memory@0 {
|
|
+ device_type = "memory";
|
|
+ reg = <0x0 0x0>;
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ i2c2 = &i2c2;
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ i2c2_iknowwhatimdoing = <&i2c2>,"status";
|
|
+ i2c2_baudrate = <&i2c2>,"clock-frequency:0";
|
|
+ sd_poll_once = <&sdhost>,"non-removable?";
|
|
+ };
|
|
+};
|
|
+
|
|
+&sdhost {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdhost_gpio48>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ status = "disabled";
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2708.dtsi b/arch/arm/boot/dts/bcm2708.dtsi
|
|
new file mode 100644
|
|
index 000000000000..36ec4989403f
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2708.dtsi
|
|
@@ -0,0 +1,12 @@
|
|
+#include "bcm2835.dtsi"
|
|
+#include "bcm270x.dtsi"
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ arm_freq;
|
|
+ };
|
|
+};
|
|
+
|
|
+&vc4 {
|
|
+ status = "disabled";
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
|
|
new file mode 100644
|
|
index 000000000000..e1381d2b3a2c
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts
|
|
@@ -0,0 +1,129 @@
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm2709.dtsi"
|
|
+#include "bcm2709-rpi.dtsi"
|
|
+#include "bcm283x-rpi-smsc9514.dtsi"
|
|
+#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
|
|
+#include "bcm283x-rpi-cam1-regulator.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
|
|
+ model = "Raspberry Pi 2 Model B";
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <40 45>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&gpio 47 0>;
|
|
+ };
|
|
+
|
|
+ pwr_led: led-pwr {
|
|
+ label = "led1";
|
|
+ linux,default-trigger = "input";
|
|
+ gpios = <&gpio 35 0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+};
|
|
+
|
|
+&cam1_reg {
|
|
+ gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+
|
|
+ pwr_led_gpio = <&pwr_led>,"gpios:4";
|
|
+ pwr_led_activelow = <&pwr_led>,"gpios:8";
|
|
+ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2709-rpi.dtsi b/arch/arm/boot/dts/bcm2709-rpi.dtsi
|
|
new file mode 100644
|
|
index 000000000000..babfa41cd9f7
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2709-rpi.dtsi
|
|
@@ -0,0 +1,5 @@
|
|
+#include "bcm2708-rpi.dtsi"
|
|
+
|
|
+&vchiq {
|
|
+ compatible = "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq";
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2709.dtsi b/arch/arm/boot/dts/bcm2709.dtsi
|
|
new file mode 100644
|
|
index 000000000000..68eafc1b281a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2709.dtsi
|
|
@@ -0,0 +1,22 @@
|
|
+#include "bcm2836.dtsi"
|
|
+#include "bcm270x.dtsi"
|
|
+
|
|
+/ {
|
|
+ soc {
|
|
+ ranges = <0x7e000000 0x3f000000 0x01000000>,
|
|
+ <0x40000000 0x40000000 0x00040000>;
|
|
+
|
|
+ /delete-node/ timer@7e003000;
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ arm_freq = <&v7_cpu0>, "clock-frequency:0",
|
|
+ <&v7_cpu1>, "clock-frequency:0",
|
|
+ <&v7_cpu2>, "clock-frequency:0",
|
|
+ <&v7_cpu3>, "clock-frequency:0";
|
|
+ };
|
|
+};
|
|
+
|
|
+&vc4 {
|
|
+ status = "disabled";
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm270x-rpi.dtsi b/arch/arm/boot/dts/bcm270x-rpi.dtsi
|
|
new file mode 100644
|
|
index 000000000000..68a7e1c09db1
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm270x-rpi.dtsi
|
|
@@ -0,0 +1,154 @@
|
|
+/* Downstream modifications to bcm2835-rpi.dtsi */
|
|
+
|
|
+/ {
|
|
+ aliases {
|
|
+ audio = &audio;
|
|
+ aux = &aux;
|
|
+ sound = &sound;
|
|
+ soc = &soc;
|
|
+ dma = &dma;
|
|
+ intc = &intc;
|
|
+ watchdog = &watchdog;
|
|
+ random = &random;
|
|
+ mailbox = &mailbox;
|
|
+ gpio = &gpio;
|
|
+ uart0 = &uart0;
|
|
+ uart1 = &uart1;
|
|
+ sdhost = &sdhost;
|
|
+ mmc = &mmc;
|
|
+ mmc1 = &mmc;
|
|
+ mmc0 = &sdhost;
|
|
+ i2s = &i2s;
|
|
+ i2c0 = &i2c0;
|
|
+ i2c1 = &i2c1;
|
|
+ i2c10 = &i2c_csi_dsi;
|
|
+ spi0 = &spi0;
|
|
+ spi1 = &spi1;
|
|
+ spi2 = &spi2;
|
|
+ usb = &usb;
|
|
+ leds = &leds;
|
|
+ fb = &fb;
|
|
+ thermal = &thermal;
|
|
+ axiperf = &axiperf;
|
|
+ };
|
|
+
|
|
+ /* Define these notional regulators for use by overlays */
|
|
+ vdd_3v3_reg: fixedregulator_3v3 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-always-on;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-name = "3v3";
|
|
+ };
|
|
+
|
|
+ vdd_5v0_reg: fixedregulator_5v0 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-always-on;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-name = "5v0";
|
|
+ };
|
|
+
|
|
+ leds: leds {
|
|
+ compatible = "gpio-leds";
|
|
+ };
|
|
+
|
|
+ soc {
|
|
+ gpiomem {
|
|
+ compatible = "brcm,bcm2835-gpiomem";
|
|
+ reg = <0x7e200000 0x1000>;
|
|
+ };
|
|
+
|
|
+ fb: fb {
|
|
+ compatible = "brcm,bcm2708-fb";
|
|
+ firmware = <&firmware>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ vcsm: vcsm {
|
|
+ compatible = "raspberrypi,bcm2835-vcsm";
|
|
+ firmware = <&firmware>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ /* External sound card */
|
|
+ sound: sound {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cache_line_size;
|
|
+
|
|
+ uart0 = <&uart0>,"status";
|
|
+ uart1 = <&uart1>,"status";
|
|
+ i2s = <&i2s>,"status";
|
|
+ spi = <&spi0>,"status";
|
|
+ i2c0 = <&i2c0if>,"status",<&i2c0mux>,"status";
|
|
+ i2c1 = <&i2c1>,"status";
|
|
+ i2c0_baudrate = <&i2c0if>,"clock-frequency:0";
|
|
+ i2c1_baudrate = <&i2c1>,"clock-frequency:0";
|
|
+
|
|
+ audio = <&audio>,"status";
|
|
+ watchdog = <&watchdog>,"status";
|
|
+ random = <&random>,"status";
|
|
+ sd_overclock = <&sdhost>,"brcm,overclock-50:0";
|
|
+ sd_force_pio = <&sdhost>,"brcm,force-pio?";
|
|
+ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0";
|
|
+ sd_debug = <&sdhost>,"brcm,debug";
|
|
+ sdio_overclock = <&mmc>,"brcm,overclock-50:0",
|
|
+ <&mmcnr>,"brcm,overclock-50:0";
|
|
+ axiperf = <&axiperf>,"status";
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ skip-init;
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ skip-init;
|
|
+};
|
|
+
|
|
+&txp {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&i2c0mux {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&clocks {
|
|
+ firmware = <&firmware>;
|
|
+};
|
|
+
|
|
+&sdhci {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&emmc_gpio48>;
|
|
+ bus-width = <4>;
|
|
+};
|
|
+
|
|
+&cpu_thermal {
|
|
+ /delete-node/ trips;
|
|
+};
|
|
+
|
|
+&vec {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&vchiq {
|
|
+ /* Onboard audio */
|
|
+ audio: bcm2835_audio {
|
|
+ compatible = "brcm,bcm2835-audio";
|
|
+ brcm,pwm-channels = <8>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm270x.dtsi b/arch/arm/boot/dts/bcm270x.dtsi
|
|
new file mode 100644
|
|
index 000000000000..badcf341ecd2
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm270x.dtsi
|
|
@@ -0,0 +1,217 @@
|
|
+/* Downstream bcm283x.dtsi diff */
|
|
+#include <dt-bindings/power/raspberrypi-power.h>
|
|
+
|
|
+/ {
|
|
+ chosen {
|
|
+ bootargs = "coherent_pool=1M snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
|
|
+ /delete-property/ stdout-path;
|
|
+ };
|
|
+
|
|
+ soc: soc {
|
|
+
|
|
+ watchdog: watchdog@7e100000 {
|
|
+ /* Add label */
|
|
+ };
|
|
+
|
|
+ random: rng@7e104000 {
|
|
+ /* Add label */
|
|
+ };
|
|
+
|
|
+ spi0: spi@7e204000 {
|
|
+ /* Add label */
|
|
+ };
|
|
+
|
|
+#ifndef BCM2711
|
|
+ pixelvalve0: pixelvalve@7e206000 {
|
|
+ /* Add label */
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ pixelvalve1: pixelvalve@7e207000 {
|
|
+ /* Add label */
|
|
+ status = "disabled";
|
|
+ };
|
|
+#endif
|
|
+
|
|
+ /delete-node/ mmc@7e300000;
|
|
+
|
|
+ sdhci: mmc: mmc@7e300000 {
|
|
+ compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
|
|
+ reg = <0x7e300000 0x100>;
|
|
+ interrupts = <2 30>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_EMMC>;
|
|
+ dmas = <&dma 11>;
|
|
+ dma-names = "rx-tx";
|
|
+ brcm,overclock-50 = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ /* A clone of mmc but with non-removable set */
|
|
+ mmcnr: mmcnr@7e300000 {
|
|
+ compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
|
|
+ reg = <0x7e300000 0x100>;
|
|
+ interrupts = <2 30>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_EMMC>;
|
|
+ dmas = <&dma 11>;
|
|
+ dma-names = "rx-tx";
|
|
+ brcm,overclock-50 = <0>;
|
|
+ non-removable;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ hvs: hvs@7e400000 {
|
|
+ /* Add label */
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ firmwarekms: firmwarekms@7e600000 {
|
|
+ compatible = "raspberrypi,rpi-firmware-kms";
|
|
+ /* SMI interrupt reg */
|
|
+ reg = <0x7e600000 0x100>;
|
|
+ interrupts = <2 16>;
|
|
+ brcm,firmware = <&firmware>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ smi: smi@7e600000 {
|
|
+ compatible = "brcm,bcm2835-smi";
|
|
+ reg = <0x7e600000 0x100>;
|
|
+ interrupts = <2 16>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_SMI>;
|
|
+ assigned-clocks = <&clocks BCM2835_CLOCK_SMI>;
|
|
+ assigned-clock-rates = <125000000>;
|
|
+ dmas = <&dma 4>;
|
|
+ dma-names = "rx-tx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ csi0: csi@7e800000 {
|
|
+ compatible = "brcm,bcm2835-unicam";
|
|
+ reg = <0x7e800000 0x800>,
|
|
+ <0x7e802000 0x4>;
|
|
+ interrupts = <2 6>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_CAM0>,
|
|
+ <&firmware_clocks 4>;
|
|
+ clock-names = "lp", "vpu";
|
|
+ power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ #clock-cells = <1>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ csi1: csi@7e801000 {
|
|
+ compatible = "brcm,bcm2835-unicam";
|
|
+ reg = <0x7e801000 0x800>,
|
|
+ <0x7e802004 0x4>;
|
|
+ interrupts = <2 7>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_CAM1>,
|
|
+ <&firmware_clocks 4>;
|
|
+ clock-names = "lp", "vpu";
|
|
+ power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ #clock-cells = <1>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+#ifndef BCM2711
|
|
+ pixelvalve2: pixelvalve@7e807000 {
|
|
+ /* Add label */
|
|
+ status = "disabled";
|
|
+ };
|
|
+#endif
|
|
+
|
|
+ hdmi@7e902000 { /* hdmi */
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ usb@7e980000 { /* usb */
|
|
+ compatible = "brcm,bcm2708-usb";
|
|
+ reg = <0x7e980000 0x10000>,
|
|
+ <0x7e006000 0x1000>;
|
|
+ interrupt-names = "usb",
|
|
+ "soft";
|
|
+ interrupts = <1 9>,
|
|
+ <2 0>;
|
|
+ };
|
|
+
|
|
+#ifndef BCM2711
|
|
+ v3d@7ec00000 { /* vd3 */
|
|
+ compatible = "brcm,vc4-v3d";
|
|
+ power-domains = <&power RPI_POWER_DOMAIN_V3D>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+#endif
|
|
+
|
|
+ axiperf: axiperf {
|
|
+ compatible = "brcm,bcm2835-axiperf";
|
|
+ reg = <0x7e009800 0x100>,
|
|
+ <0x7ee08000 0x100>;
|
|
+ firmware = <&firmware>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cam0-pwdn-ctrl;
|
|
+ cam0-pwdn;
|
|
+ cam0-led-ctrl;
|
|
+ cam0-led;
|
|
+ };
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ interrupts = <2 17>, <2 18>;
|
|
+
|
|
+ dpi_18bit_cpadhi_gpio0: dpi_18bit_cpadhi_gpio0 {
|
|
+ brcm,pins = <0 1 2 3 4 5 6 7 8 9
|
|
+ 12 13 14 15 16 17
|
|
+ 20 21 22 23 24 25>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT2>;
|
|
+ brcm,pull = <0>; /* no pull */
|
|
+ };
|
|
+ dpi_18bit_cpadhi_gpio2: dpi_18bit_cpadhi_gpio2 {
|
|
+ brcm,pins = <2 3 4 5 6 7 8 9
|
|
+ 12 13 14 15 16 17
|
|
+ 20 21 22 23 24 25>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT2>;
|
|
+ };
|
|
+ dpi_18bit_gpio0: dpi_18bit_gpio0 {
|
|
+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
|
|
+ 12 13 14 15 16 17 18 19
|
|
+ 20 21>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT2>;
|
|
+ };
|
|
+ dpi_18bit_gpio2: dpi_18bit_gpio2 {
|
|
+ brcm,pins = <2 3 4 5 6 7 8 9 10 11
|
|
+ 12 13 14 15 16 17 18 19
|
|
+ 20 21>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT2>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ /* Enable CTS bug workaround */
|
|
+ cts-event-workaround;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ #sound-dai-cells = <0>;
|
|
+ dmas = <&dma 2>, <&dma 3>;
|
|
+ dma-names = "tx", "rx";
|
|
+};
|
|
+
|
|
+&sdhost {
|
|
+ dmas = <&dma (13|(1<<29))>;
|
|
+ dma-names = "rx-tx";
|
|
+ bus-width = <4>;
|
|
+ brcm,overclock-50 = <0>;
|
|
+ brcm,pio-limit = <1>;
|
|
+ firmware = <&firmware>;
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ dmas = <&dma 6>, <&dma 7>;
|
|
+ dma-names = "tx", "rx";
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2710-rpi-2-b.dts b/arch/arm/boot/dts/bcm2710-rpi-2-b.dts
|
|
new file mode 100644
|
|
index 000000000000..ae9db1b1be1b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2710-rpi-2-b.dts
|
|
@@ -0,0 +1,129 @@
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm2710.dtsi"
|
|
+#include "bcm2709-rpi.dtsi"
|
|
+#include "bcm283x-rpi-smsc9514.dtsi"
|
|
+#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
|
|
+#include "bcm283x-rpi-cam1-regulator.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "raspberrypi,2-model-b-rev2", "brcm,bcm2837";
|
|
+ model = "Raspberry Pi 2 Model B rev 1.2";
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <40 45>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&gpio 47 0>;
|
|
+ };
|
|
+
|
|
+ pwr_led: led-pwr {
|
|
+ label = "led1";
|
|
+ linux,default-trigger = "input";
|
|
+ gpios = <&gpio 35 0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+};
|
|
+
|
|
+&cam1_reg {
|
|
+ gpio = <&gpio 41 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+
|
|
+ pwr_led_gpio = <&pwr_led>,"gpios:4";
|
|
+ pwr_led_activelow = <&pwr_led>,"gpios:8";
|
|
+ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
|
|
new file mode 100644
|
|
index 000000000000..7e12c05cc28b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
|
|
@@ -0,0 +1,201 @@
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm2710.dtsi"
|
|
+#include "bcm2709-rpi.dtsi"
|
|
+#include "bcm283x-rpi-lan7515.dtsi"
|
|
+#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
|
|
+#include "bcm271x-rpi-bt.dtsi"
|
|
+#include "bcm283x-rpi-cam1-regulator.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
|
|
+ model = "Raspberry Pi 3 Model B+";
|
|
+
|
|
+ chosen {
|
|
+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart1;
|
|
+ serial1 = &uart0;
|
|
+ mmc1 = &mmcnr;
|
|
+ };
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ sdio_pins: sdio_pins {
|
|
+ brcm,pins = <34 35 36 37 38 39>;
|
|
+ brcm,function = <7>; // alt3 = SD1
|
|
+ brcm,pull = <0 2 2 2 2 2>;
|
|
+ };
|
|
+
|
|
+ bt_pins: bt_pins {
|
|
+ brcm,pins = <43>;
|
|
+ brcm,function = <4>; /* alt0:GPCLK2 */
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+
|
|
+ uart0_pins: uart0_pins {
|
|
+ brcm,pins = <32 33>;
|
|
+ brcm,function = <7>; /* alt3=UART0 */
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart1_pins: uart1_pins {
|
|
+ brcm,pins;
|
|
+ brcm,function;
|
|
+ brcm,pull;
|
|
+ };
|
|
+
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <40 41>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&mmcnr {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdio_pins>;
|
|
+ bus-width = <4>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&firmware {
|
|
+ expgpio: expgpio {
|
|
+ compatible = "raspberrypi,firmware-gpio";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_pins &bt_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart1_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&gpio 29 0>;
|
|
+ };
|
|
+
|
|
+ pwr_led: led-pwr {
|
|
+ label = "led1";
|
|
+ linux,default-trigger = "default-on";
|
|
+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ hpd-gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+};
|
|
+
|
|
+ð_phy {
|
|
+ microchip,eee-enabled;
|
|
+ microchip,tx-lpi-timer = <600>; /* non-aggressive*/
|
|
+ microchip,downshift-after = <2>;
|
|
+};
|
|
+
|
|
+&cam1_reg {
|
|
+ gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+
|
|
+ pwr_led_gpio = <&pwr_led>,"gpios:4";
|
|
+ pwr_led_activelow = <&pwr_led>,"gpios:8";
|
|
+ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
|
|
+
|
|
+ eee = <ð_phy>,"microchip,eee-enabled?";
|
|
+ tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0";
|
|
+ eth_led0 = <ð_phy>,"microchip,led-modes:0";
|
|
+ eth_led1 = <ð_phy>,"microchip,led-modes:4";
|
|
+ eth_downshift_after = <ð_phy>,"microchip,downshift-after:0";
|
|
+ eth_max_speed = <ð_phy>,"max-speed:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2710-rpi-3-b.dts b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
|
|
new file mode 100644
|
|
index 000000000000..d40722ddc286
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
|
|
@@ -0,0 +1,203 @@
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm2710.dtsi"
|
|
+#include "bcm2709-rpi.dtsi"
|
|
+#include "bcm283x-rpi-smsc9514.dtsi"
|
|
+#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
|
|
+#include "bcm271x-rpi-bt.dtsi"
|
|
+#include "bcm283x-rpi-cam1-regulator.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
|
|
+ model = "Raspberry Pi 3 Model B";
|
|
+
|
|
+ chosen {
|
|
+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart1;
|
|
+ serial1 = &uart0;
|
|
+ mmc1 = &mmcnr;
|
|
+ };
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ sdio_pins: sdio_pins {
|
|
+ brcm,pins = <34 35 36 37 38 39>;
|
|
+ brcm,function = <7>; // alt3 = SD1
|
|
+ brcm,pull = <0 2 2 2 2 2>;
|
|
+ };
|
|
+
|
|
+ bt_pins: bt_pins {
|
|
+ brcm,pins = <43>;
|
|
+ brcm,function = <4>; /* alt0:GPCLK2 */
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+
|
|
+ uart0_pins: uart0_pins {
|
|
+ brcm,pins = <32 33>;
|
|
+ brcm,function = <7>; /* alt3=UART0 */
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart1_pins: uart1_pins {
|
|
+ brcm,pins;
|
|
+ brcm,function;
|
|
+ brcm,pull;
|
|
+ };
|
|
+
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <40 41>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&mmcnr {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdio_pins>;
|
|
+ bus-width = <4>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&soc {
|
|
+ virtgpio: virtgpio {
|
|
+ compatible = "brcm,bcm2835-virtgpio";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ firmware = <&firmware>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+};
|
|
+
|
|
+&firmware {
|
|
+ expgpio: expgpio {
|
|
+ compatible = "raspberrypi,firmware-gpio";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_pins &bt_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart1_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&bt {
|
|
+ max-speed = <921600>;
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&virtgpio 0 0>;
|
|
+ };
|
|
+
|
|
+ pwr_led: led-pwr {
|
|
+ label = "led1";
|
|
+ linux,default-trigger = "input";
|
|
+ gpios = <&expgpio 7 0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+};
|
|
+
|
|
+&cam1_reg {
|
|
+ gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+
|
|
+ pwr_led_gpio = <&pwr_led>,"gpios:4";
|
|
+ pwr_led_activelow = <&pwr_led>,"gpios:8";
|
|
+ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2710-rpi-cm3.dts b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
|
|
new file mode 100644
|
|
index 000000000000..c386a855cdc3
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2710-rpi-cm3.dts
|
|
@@ -0,0 +1,148 @@
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm2710.dtsi"
|
|
+#include "bcm2709-rpi.dtsi"
|
|
+#include "bcm283x-rpi-csi0-2lane.dtsi"
|
|
+#include "bcm283x-rpi-csi1-4lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_28.dtsi"
|
|
+/ {
|
|
+ compatible = "raspberrypi,3-compute-module", "brcm,bcm2837";
|
|
+ model = "Raspberry Pi Compute Module 3";
|
|
+
|
|
+ cam1_reg: cam1_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "cam1-regulator";
|
|
+ gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
|
|
+ enable-active-high;
|
|
+ status = "disabled";
|
|
+ };
|
|
+ cam0_reg: cam0_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "cam0-regulator";
|
|
+ gpio = <&gpio 30 GPIO_ACTIVE_HIGH>;
|
|
+ enable-active-high;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins;
|
|
+ brcm,function;
|
|
+ };
|
|
+};
|
|
+
|
|
+&soc {
|
|
+ virtgpio: virtgpio {
|
|
+ compatible = "brcm,bcm2835-virtgpio";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ firmware = <&firmware>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+};
|
|
+
|
|
+&firmware {
|
|
+ expgpio: expgpio {
|
|
+ compatible = "raspberrypi,firmware-gpio";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&virtgpio 0 0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&hdmi {
|
|
+ hpd-gpios = <&expgpio 0 GPIO_ACTIVE_LOW>;
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2710.dtsi b/arch/arm/boot/dts/bcm2710.dtsi
|
|
new file mode 100644
|
|
index 000000000000..e7e5c913f1d1
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2710.dtsi
|
|
@@ -0,0 +1,25 @@
|
|
+#include "bcm2837.dtsi"
|
|
+#include "bcm270x.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2837", "brcm,bcm2836";
|
|
+
|
|
+ arm-pmu {
|
|
+ compatible = "arm,cortex-a53-pmu", "arm,cortex-a7-pmu";
|
|
+ };
|
|
+
|
|
+ soc {
|
|
+ /delete-node/ timer@7e003000;
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ arm_freq = <&cpu0>, "clock-frequency:0",
|
|
+ <&cpu1>, "clock-frequency:0",
|
|
+ <&cpu2>, "clock-frequency:0",
|
|
+ <&cpu3>, "clock-frequency:0";
|
|
+ };
|
|
+};
|
|
+
|
|
+&vc4 {
|
|
+ status = "disabled";
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
|
|
index 72ce80fbf266..f6e0247f7d1b 100644
|
|
--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
|
|
+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
|
|
@@ -2,7 +2,7 @@
|
|
/dts-v1/;
|
|
#include "bcm2711.dtsi"
|
|
#include "bcm2711-rpi.dtsi"
|
|
-#include "bcm283x-rpi-usb-peripheral.dtsi"
|
|
+//#include "bcm283x-rpi-usb-peripheral.dtsi"
|
|
|
|
/ {
|
|
compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
|
|
@@ -72,7 +72,7 @@ &expgpio {
|
|
"VDD_SD_IO_SEL",
|
|
"CAM_GPIO",
|
|
"SD_PWR_ON",
|
|
- "";
|
|
+ "SD_OC_N";
|
|
};
|
|
|
|
&gpio {
|
|
@@ -260,3 +260,309 @@ &vc4 {
|
|
&vec {
|
|
status = "disabled";
|
|
};
|
|
+
|
|
+// =============================================
|
|
+// Downstream rpi- changes
|
|
+
|
|
+#define BCM2711
|
|
+
|
|
+#include "bcm270x.dtsi"
|
|
+#include "bcm271x-rpi-bt.dtsi"
|
|
+
|
|
+/ {
|
|
+ soc {
|
|
+ /delete-node/ pixelvalve@7e807000;
|
|
+ /delete-node/ hdmi@7e902000;
|
|
+ };
|
|
+};
|
|
+
|
|
+#include "bcm2711-rpi-ds.dtsi"
|
|
+#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
|
|
+#include "bcm283x-rpi-cam1-regulator.dtsi"
|
|
+
|
|
+/ {
|
|
+ chosen {
|
|
+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart1;
|
|
+ serial1 = &uart0;
|
|
+ mmc0 = &emmc2;
|
|
+ mmc1 = &mmcnr;
|
|
+ mmc2 = &sdhost;
|
|
+ i2c3 = &i2c3;
|
|
+ i2c4 = &i2c4;
|
|
+ i2c5 = &i2c5;
|
|
+ i2c6 = &i2c6;
|
|
+ i2c20 = &ddc0;
|
|
+ i2c21 = &ddc1;
|
|
+ spi3 = &spi3;
|
|
+ spi4 = &spi4;
|
|
+ spi5 = &spi5;
|
|
+ spi6 = &spi6;
|
|
+ /delete-property/ intc;
|
|
+ };
|
|
+
|
|
+ /delete-node/ wifi-pwrseq;
|
|
+};
|
|
+
|
|
+&mmcnr {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdio_pins>;
|
|
+ bus-width = <4>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ pinctrl-0 = <&uart0_pins &bt_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ pinctrl-0 = <&uart1_pins>;
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ spi3_pins: spi3_pins {
|
|
+ brcm,pins = <1 2 3>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ };
|
|
+
|
|
+ spi3_cs_pins: spi3_cs_pins {
|
|
+ brcm,pins = <0 24>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ spi4_pins: spi4_pins {
|
|
+ brcm,pins = <5 6 7>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ };
|
|
+
|
|
+ spi4_cs_pins: spi4_cs_pins {
|
|
+ brcm,pins = <4 25>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ spi5_pins: spi5_pins {
|
|
+ brcm,pins = <13 14 15>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ };
|
|
+
|
|
+ spi5_cs_pins: spi5_cs_pins {
|
|
+ brcm,pins = <12 26>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ spi6_pins: spi6_pins {
|
|
+ brcm,pins = <19 20 21>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ };
|
|
+
|
|
+ spi6_cs_pins: spi6_cs_pins {
|
|
+ brcm,pins = <18 27>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c3_pins: i2c3 {
|
|
+ brcm,pins = <4 5>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c4_pins: i2c4 {
|
|
+ brcm,pins = <8 9>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c5_pins: i2c5 {
|
|
+ brcm,pins = <12 13>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c6_pins: i2c6 {
|
|
+ brcm,pins = <22 23>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ };
|
|
+
|
|
+ sdio_pins: sdio_pins {
|
|
+ brcm,pins = <34 35 36 37 38 39>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
|
|
+ brcm,pull = <0 2 2 2 2 2>;
|
|
+ };
|
|
+
|
|
+ bt_pins: bt_pins {
|
|
+ brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
|
|
+ // to fool pinctrl
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <2>;
|
|
+ };
|
|
+
|
|
+ uart0_pins: uart0_pins {
|
|
+ brcm,pins = <32 33>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart1_pins: uart1_pins {
|
|
+ brcm,pins;
|
|
+ brcm,function;
|
|
+ brcm,pull;
|
|
+ };
|
|
+
|
|
+ uart2_pins: uart2_pins {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT4>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart3_pins: uart3_pins {
|
|
+ brcm,pins = <4 5>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT4>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart4_pins: uart4_pins {
|
|
+ brcm,pins = <8 9>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT4>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart5_pins: uart5_pins {
|
|
+ brcm,pins = <12 13>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT4>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+// =============================================
|
|
+// Board specific stuff here
|
|
+
|
|
+&sdhost {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&phy1 {
|
|
+ led-modes = <0x00 0x08>; /* link/activity link */
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <40 41>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ pwr_led: led-pwr {
|
|
+ label = "led1";
|
|
+ linux,default-trigger = "default-on";
|
|
+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pwm1 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+};
|
|
+
|
|
+&cam1_reg {
|
|
+ gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+
|
|
+ pwr_led_gpio = <&pwr_led>,"gpios:4";
|
|
+ pwr_led_activelow = <&pwr_led>,"gpios:8";
|
|
+ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
|
|
+
|
|
+ eth_led0 = <&phy1>,"led-modes:0";
|
|
+ eth_led1 = <&phy1>,"led-modes:4";
|
|
+
|
|
+ sd_poll_once = <&emmc2>, "non-removable?";
|
|
+ spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
|
|
+ <&spi0>, "dmas:8=", <&dma40>;
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2711-rpi-400.dts b/arch/arm/boot/dts/bcm2711-rpi-400.dts
|
|
index f4d2fc20397c..bed192b085df 100644
|
|
--- a/arch/arm/boot/dts/bcm2711-rpi-400.dts
|
|
+++ b/arch/arm/boot/dts/bcm2711-rpi-400.dts
|
|
@@ -1,6 +1,9 @@
|
|
// SPDX-License-Identifier: GPL-2.0
|
|
/dts-v1/;
|
|
-#include "bcm2711-rpi-4-b.dts"
|
|
+#include "bcm2711.dtsi"
|
|
+#include "bcm2835-rpi.dtsi"
|
|
+
|
|
+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
|
|
|
|
/ {
|
|
compatible = "raspberrypi,400", "brcm,bcm2711";
|
|
@@ -11,35 +14,624 @@ chosen {
|
|
stdout-path = "serial1:115200n8";
|
|
};
|
|
|
|
+ /* Will be filled by the bootloader */
|
|
+ memory@0 {
|
|
+ device_type = "memory";
|
|
+ reg = <0 0 0>;
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ emmc2bus = &emmc2bus;
|
|
+ ethernet0 = &genet;
|
|
+ pcie0 = &pcie0;
|
|
+ blconfig = &blconfig;
|
|
+ };
|
|
+
|
|
leds {
|
|
- /delete-node/ led-act;
|
|
+ led-act {
|
|
+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
|
|
led-pwr {
|
|
- gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
|
|
+ label = "PWR";
|
|
+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
|
+ default-state = "keep";
|
|
+ linux,default-trigger = "default-on";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ wifi_pwrseq: wifi-pwrseq {
|
|
+ compatible = "mmc-pwrseq-simple";
|
|
+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ sd_io_1v8_reg: sd_io_1v8_reg {
|
|
+ compatible = "regulator-gpio";
|
|
+ regulator-name = "vdd-sd-io";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-boot-on;
|
|
+ regulator-always-on;
|
|
+ regulator-settling-time-us = <5000>;
|
|
+ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
|
|
+ states = <1800000 0x1
|
|
+ 3300000 0x0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ sd_vcc_reg: sd_vcc_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "vcc-sd";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-boot-on;
|
|
+ enable-active-high;
|
|
+ gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&ddc0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&ddc1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&firmware {
|
|
+ firmware_clocks: clocks {
|
|
+ compatible = "raspberrypi,firmware-clocks";
|
|
+ #clock-cells = <1>;
|
|
+ };
|
|
+
|
|
+ expgpio: gpio {
|
|
+ compatible = "raspberrypi,firmware-gpio";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ gpio-line-names = "BT_ON",
|
|
+ "WL_ON",
|
|
+ "PWR_LED_OFF",
|
|
+ "GLOBAL_RESET",
|
|
+ "VDD_SD_IO_SEL",
|
|
+ "GLOBAL_SHUTDOWN",
|
|
+ "SD_PWR_ON",
|
|
+ "SHUTDOWN_REQUEST";
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ reset: reset {
|
|
+ compatible = "raspberrypi,firmware-reset";
|
|
+ #reset-cells = <1>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ /*
|
|
+ * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
|
|
+ * the official GPU firmware DT blob.
|
|
+ *
|
|
+ * Legend:
|
|
+ * "FOO" = GPIO line named "FOO" on the schematic
|
|
+ * "FOO_N" = GPIO line named "FOO" on schematic, active low
|
|
+ */
|
|
+ gpio-line-names = "ID_SDA",
|
|
+ "ID_SCL",
|
|
+ "SDA1",
|
|
+ "SCL1",
|
|
+ "GPIO_GCLK",
|
|
+ "GPIO5",
|
|
+ "GPIO6",
|
|
+ "SPI_CE1_N",
|
|
+ "SPI_CE0_N",
|
|
+ "SPI_MISO",
|
|
+ "SPI_MOSI",
|
|
+ "SPI_SCLK",
|
|
+ "GPIO12",
|
|
+ "GPIO13",
|
|
+ /* Serial port */
|
|
+ "TXD1",
|
|
+ "RXD1",
|
|
+ "GPIO16",
|
|
+ "GPIO17",
|
|
+ "GPIO18",
|
|
+ "GPIO19",
|
|
+ "GPIO20",
|
|
+ "GPIO21",
|
|
+ "GPIO22",
|
|
+ "GPIO23",
|
|
+ "GPIO24",
|
|
+ "GPIO25",
|
|
+ "GPIO26",
|
|
+ "GPIO27",
|
|
+ "RGMII_MDIO",
|
|
+ "RGMIO_MDC",
|
|
+ /* Used by BT module */
|
|
+ "CTS0",
|
|
+ "RTS0",
|
|
+ "TXD0",
|
|
+ "RXD0",
|
|
+ /* Used by Wifi */
|
|
+ "SD1_CLK",
|
|
+ "SD1_CMD",
|
|
+ "SD1_DATA0",
|
|
+ "SD1_DATA1",
|
|
+ "SD1_DATA2",
|
|
+ "SD1_DATA3",
|
|
+ /* Shared with SPI flash */
|
|
+ "PWM0_MISO",
|
|
+ "PWM1_MOSI",
|
|
+ "STATUS_LED_G_CLK",
|
|
+ "SPIFLASH_CE_N",
|
|
+ "SDA0",
|
|
+ "SCL0",
|
|
+ "RGMII_RXCLK",
|
|
+ "RGMII_RXCTL",
|
|
+ "RGMII_RXD0",
|
|
+ "RGMII_RXD1",
|
|
+ "RGMII_RXD2",
|
|
+ "RGMII_RXD3",
|
|
+ "RGMII_TXCLK",
|
|
+ "RGMII_TXCTL",
|
|
+ "RGMII_TXD0",
|
|
+ "RGMII_TXD1",
|
|
+ "RGMII_TXD2",
|
|
+ "RGMII_TXD3";
|
|
+};
|
|
+
|
|
+&hdmi0 {
|
|
+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
|
|
+ clock-names = "hdmi", "bvb", "audio", "cec";
|
|
+ wifi-2.4ghz-coexistence;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hdmi1 {
|
|
+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
|
|
+ clock-names = "hdmi", "bvb", "audio", "cec";
|
|
+ wifi-2.4ghz-coexistence;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hvs {
|
|
+ clocks = <&firmware_clocks 4>;
|
|
+};
|
|
+
|
|
+&pixelvalve0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pixelvalve1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pixelvalve2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pixelvalve4 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwm1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&rmem {
|
|
+ /*
|
|
+ * RPi4's co-processor will copy the board's bootloader configuration
|
|
+ * into memory for the OS to consume. It'll also update this node with
|
|
+ * its placement information.
|
|
+ */
|
|
+ blconfig: nvram@0 {
|
|
+ compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ reg = <0x0 0x0 0x0>;
|
|
+ no-map;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+/* SDHCI is used to control the SDIO for wireless */
|
|
+&sdhci {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&emmc_gpio34>;
|
|
+ bus-width = <4>;
|
|
+ non-removable;
|
|
+ mmc-pwrseq = <&wifi_pwrseq>;
|
|
+ status = "okay";
|
|
+
|
|
+ brcmf: wifi@1 {
|
|
+ reg = <1>;
|
|
+ compatible = "brcm,bcm4329-fmac";
|
|
+ };
|
|
+};
|
|
+
|
|
+/* EMMC2 is used to drive the SD card */
|
|
+&emmc2 {
|
|
+ vqmmc-supply = <&sd_io_1v8_reg>;
|
|
+ vmmc-supply = <&sd_vcc_reg>;
|
|
+ broken-cd;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&genet {
|
|
+ phy-handle = <&phy1>;
|
|
+ phy-mode = "rgmii-rxid";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&genet_mdio {
|
|
+ phy1: ethernet-phy@1 {
|
|
+ /* No PHY interrupt */
|
|
+ reg = <0x1>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pcie0 {
|
|
+ pci@0,0 {
|
|
+ device-type = "pci";
|
|
+ #address-cells = <3>;
|
|
+ #size-cells = <2>;
|
|
+ ranges;
|
|
+
|
|
+ reg = <0 0 0 0 0>;
|
|
+
|
|
+ usb@0,0 {
|
|
+ reg = <0x0 0 0 0 0>;
|
|
+ resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
|
|
};
|
|
};
|
|
+};
|
|
+
|
|
+/* uart0 communicates with the BT module */
|
|
+&uart0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
|
|
+ uart-has-rtscts;
|
|
+ status = "okay";
|
|
+
|
|
+ bluetooth {
|
|
+ compatible = "brcm,bcm43438-bt";
|
|
+ max-speed = <2000000>;
|
|
+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+};
|
|
+
|
|
+/* uart1 is mapped to the pin header */
|
|
+&uart1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart1_gpio14>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vchiq {
|
|
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&vc4 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vec {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+// =============================================
|
|
+// Downstream rpi- changes
|
|
+
|
|
+#define BCM2711
|
|
+
|
|
+#include "bcm270x.dtsi"
|
|
+#include "bcm271x-rpi-bt.dtsi"
|
|
+
|
|
+/ {
|
|
+ soc {
|
|
+ /delete-node/ pixelvalve@7e807000;
|
|
+ /delete-node/ hdmi@7e902000;
|
|
+ };
|
|
+};
|
|
|
|
- gpio-poweroff {
|
|
+#include "bcm2711-rpi-ds.dtsi"
|
|
+#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
|
|
+
|
|
+/ {
|
|
+ chosen {
|
|
+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart1;
|
|
+ serial1 = &uart0;
|
|
+ mmc0 = &emmc2;
|
|
+ mmc1 = &mmcnr;
|
|
+ mmc2 = &sdhost;
|
|
+ i2c3 = &i2c3;
|
|
+ i2c4 = &i2c4;
|
|
+ i2c5 = &i2c5;
|
|
+ i2c6 = &i2c6;
|
|
+ i2c20 = &ddc0;
|
|
+ i2c21 = &ddc1;
|
|
+ spi3 = &spi3;
|
|
+ spi4 = &spi4;
|
|
+ spi5 = &spi5;
|
|
+ spi6 = &spi6;
|
|
+ /delete-property/ intc;
|
|
+ };
|
|
+
|
|
+ /delete-node/ wifi-pwrseq;
|
|
+};
|
|
+
|
|
+&mmcnr {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdio_pins>;
|
|
+ bus-width = <4>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ pinctrl-0 = <&uart0_pins &bt_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ pinctrl-0 = <&uart1_pins>;
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ spi3_pins: spi3_pins {
|
|
+ brcm,pins = <1 2 3>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ };
|
|
+
|
|
+ spi3_cs_pins: spi3_cs_pins {
|
|
+ brcm,pins = <0 24>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ spi4_pins: spi4_pins {
|
|
+ brcm,pins = <5 6 7>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ };
|
|
+
|
|
+ spi4_cs_pins: spi4_cs_pins {
|
|
+ brcm,pins = <4 25>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ spi5_pins: spi5_pins {
|
|
+ brcm,pins = <13 14 15>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ };
|
|
+
|
|
+ spi5_cs_pins: spi5_cs_pins {
|
|
+ brcm,pins = <12 26>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ spi6_pins: spi6_pins {
|
|
+ brcm,pins = <19 20 21>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ };
|
|
+
|
|
+ spi6_cs_pins: spi6_cs_pins {
|
|
+ brcm,pins = <18 27>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c3_pins: i2c3 {
|
|
+ brcm,pins = <4 5>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c4_pins: i2c4 {
|
|
+ brcm,pins = <8 9>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c5_pins: i2c5 {
|
|
+ brcm,pins = <12 13>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c6_pins: i2c6 {
|
|
+ brcm,pins = <22 23>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ };
|
|
+
|
|
+ sdio_pins: sdio_pins {
|
|
+ brcm,pins = <34 35 36 37 38 39>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
|
|
+ brcm,pull = <0 2 2 2 2 2>;
|
|
+ };
|
|
+
|
|
+ bt_pins: bt_pins {
|
|
+ brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
|
|
+ // to fool pinctrl
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <2>;
|
|
+ };
|
|
+
|
|
+ uart0_pins: uart0_pins {
|
|
+ brcm,pins = <32 33>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart1_pins: uart1_pins {
|
|
+ brcm,pins;
|
|
+ brcm,function;
|
|
+ brcm,pull;
|
|
+ };
|
|
+
|
|
+ uart2_pins: uart2_pins {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT4>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart3_pins: uart3_pins {
|
|
+ brcm,pins = <4 5>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT4>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart4_pins: uart4_pins {
|
|
+ brcm,pins = <8 9>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT4>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart5_pins: uart5_pins {
|
|
+ brcm,pins = <12 13>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT4>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+// =============================================
|
|
+// Board specific stuff here
|
|
+
|
|
+/ {
|
|
+ power_ctrl: power_ctrl {
|
|
compatible = "gpio-poweroff";
|
|
- gpios = <&expgpio 5 GPIO_ACTIVE_HIGH>;
|
|
+ gpios = <&expgpio 5 0>;
|
|
+ force;
|
|
+ };
|
|
+};
|
|
+
|
|
+&sdhost {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&phy1 {
|
|
+ led-modes = <0x00 0x08>; /* link/activity link */
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <>;
|
|
+ brcm,function = <>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "default-on";
|
|
+ default-state = "on";
|
|
+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ pwr_led: led-pwr {
|
|
+ label = "led1";
|
|
+ linux,default-trigger = "default-on";
|
|
+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
-&expgpio {
|
|
- gpio-line-names = "BT_ON",
|
|
- "WL_ON",
|
|
- "PWR_LED_OFF",
|
|
- "GLOBAL_RESET",
|
|
- "VDD_SD_IO_SEL",
|
|
- "GLOBAL_SHUTDOWN",
|
|
- "SD_PWR_ON",
|
|
- "SHUTDOWN_REQUEST";
|
|
+&pwm1 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+ brcm,disable-headphones = <1>;
|
|
};
|
|
|
|
&genet_mdio {
|
|
clock-frequency = <1950000>;
|
|
};
|
|
|
|
-&pm {
|
|
- /delete-property/ system-power-controller;
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+
|
|
+ pwr_led_gpio = <&pwr_led>,"gpios:4";
|
|
+ pwr_led_activelow = <&pwr_led>,"gpios:8";
|
|
+ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
|
|
+
|
|
+ eth_led0 = <&phy1>,"led-modes:0";
|
|
+ eth_led1 = <&phy1>,"led-modes:4";
|
|
+
|
|
+ sd_poll_once = <&emmc2>, "non-removable?";
|
|
+ spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
|
|
+ <&spi0>, "dmas:8=", <&dma40>;
|
|
+ };
|
|
};
|
|
diff --git a/arch/arm/boot/dts/bcm2711-rpi-cm4.dts b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
|
|
new file mode 100644
|
|
index 000000000000..76dd97513a20
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
|
|
@@ -0,0 +1,660 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+/dts-v1/;
|
|
+#include "bcm2711.dtsi"
|
|
+#include "bcm2835-rpi.dtsi"
|
|
+
|
|
+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "raspberrypi,4-compute-module", "brcm,bcm2711";
|
|
+ model = "Raspberry Pi Compute Module 4";
|
|
+
|
|
+ chosen {
|
|
+ /* 8250 auxiliary UART instead of pl011 */
|
|
+ stdout-path = "serial1:115200n8";
|
|
+ };
|
|
+
|
|
+ /* Will be filled by the bootloader */
|
|
+ memory@0 {
|
|
+ device_type = "memory";
|
|
+ reg = <0 0 0>;
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ emmc2bus = &emmc2bus;
|
|
+ ethernet0 = &genet;
|
|
+ pcie0 = &pcie0;
|
|
+ blconfig = &blconfig;
|
|
+ };
|
|
+
|
|
+ leds {
|
|
+ led-act {
|
|
+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ led-pwr {
|
|
+ label = "PWR";
|
|
+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
|
+ default-state = "keep";
|
|
+ linux,default-trigger = "default-on";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ wifi_pwrseq: wifi-pwrseq {
|
|
+ compatible = "mmc-pwrseq-simple";
|
|
+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ sd_io_1v8_reg: sd_io_1v8_reg {
|
|
+ compatible = "regulator-gpio";
|
|
+ regulator-name = "vdd-sd-io";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-boot-on;
|
|
+ regulator-always-on;
|
|
+ regulator-settling-time-us = <5000>;
|
|
+ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
|
|
+ states = <1800000 0x1
|
|
+ 3300000 0x0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ sd_vcc_reg: sd_vcc_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "vcc-sd";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-boot-on;
|
|
+ enable-active-high;
|
|
+ gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&ddc0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&ddc1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&firmware {
|
|
+ firmware_clocks: clocks {
|
|
+ compatible = "raspberrypi,firmware-clocks";
|
|
+ #clock-cells = <1>;
|
|
+ };
|
|
+
|
|
+ expgpio: gpio {
|
|
+ compatible = "raspberrypi,firmware-gpio";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ gpio-line-names = "BT_ON",
|
|
+ "WL_ON",
|
|
+ "PWR_LED_OFF",
|
|
+ "ANT1",
|
|
+ "VDD_SD_IO_SEL",
|
|
+ "CAM_GPIO",
|
|
+ "SD_PWR_ON",
|
|
+ "ANT2";
|
|
+ status = "okay";
|
|
+
|
|
+ ant1: ant1 {
|
|
+ gpio-hog;
|
|
+ gpios = <3 GPIO_ACTIVE_HIGH>;
|
|
+ output-high;
|
|
+ };
|
|
+
|
|
+ ant2: ant2 {
|
|
+ gpio-hog;
|
|
+ gpios = <7 GPIO_ACTIVE_HIGH>;
|
|
+ output-low;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ reset: reset {
|
|
+ compatible = "raspberrypi,firmware-reset";
|
|
+ #reset-cells = <1>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ /*
|
|
+ * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
|
|
+ * the official GPU firmware DT blob.
|
|
+ *
|
|
+ * Legend:
|
|
+ * "FOO" = GPIO line named "FOO" on the schematic
|
|
+ * "FOO_N" = GPIO line named "FOO" on schematic, active low
|
|
+ */
|
|
+ gpio-line-names = "ID_SDA",
|
|
+ "ID_SCL",
|
|
+ "SDA1",
|
|
+ "SCL1",
|
|
+ "GPIO_GCLK",
|
|
+ "GPIO5",
|
|
+ "GPIO6",
|
|
+ "SPI_CE1_N",
|
|
+ "SPI_CE0_N",
|
|
+ "SPI_MISO",
|
|
+ "SPI_MOSI",
|
|
+ "SPI_SCLK",
|
|
+ "GPIO12",
|
|
+ "GPIO13",
|
|
+ /* Serial port */
|
|
+ "TXD1",
|
|
+ "RXD1",
|
|
+ "GPIO16",
|
|
+ "GPIO17",
|
|
+ "GPIO18",
|
|
+ "GPIO19",
|
|
+ "GPIO20",
|
|
+ "GPIO21",
|
|
+ "GPIO22",
|
|
+ "GPIO23",
|
|
+ "GPIO24",
|
|
+ "GPIO25",
|
|
+ "GPIO26",
|
|
+ "GPIO27",
|
|
+ "RGMII_MDIO",
|
|
+ "RGMIO_MDC",
|
|
+ /* Used by BT module */
|
|
+ "CTS0",
|
|
+ "RTS0",
|
|
+ "TXD0",
|
|
+ "RXD0",
|
|
+ /* Used by Wifi */
|
|
+ "SD1_CLK",
|
|
+ "SD1_CMD",
|
|
+ "SD1_DATA0",
|
|
+ "SD1_DATA1",
|
|
+ "SD1_DATA2",
|
|
+ "SD1_DATA3",
|
|
+ /* Shared with SPI flash */
|
|
+ "PWM0_MISO",
|
|
+ "PWM1_MOSI",
|
|
+ "STATUS_LED_G_CLK",
|
|
+ "SPIFLASH_CE_N",
|
|
+ "SDA0",
|
|
+ "SCL0",
|
|
+ "RGMII_RXCLK",
|
|
+ "RGMII_RXCTL",
|
|
+ "RGMII_RXD0",
|
|
+ "RGMII_RXD1",
|
|
+ "RGMII_RXD2",
|
|
+ "RGMII_RXD3",
|
|
+ "RGMII_TXCLK",
|
|
+ "RGMII_TXCTL",
|
|
+ "RGMII_TXD0",
|
|
+ "RGMII_TXD1",
|
|
+ "RGMII_TXD2",
|
|
+ "RGMII_TXD3";
|
|
+};
|
|
+
|
|
+&hdmi0 {
|
|
+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>;
|
|
+ clock-names = "hdmi", "bvb", "audio", "cec";
|
|
+ wifi-2.4ghz-coexistence;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hdmi1 {
|
|
+ clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
|
|
+ clock-names = "hdmi", "bvb", "audio", "cec";
|
|
+ wifi-2.4ghz-coexistence;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hvs {
|
|
+ clocks = <&firmware_clocks 4>;
|
|
+};
|
|
+
|
|
+&pixelvalve0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pixelvalve1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pixelvalve2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pixelvalve4 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pwm1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&rmem {
|
|
+ /*
|
|
+ * RPi4's co-processor will copy the board's bootloader configuration
|
|
+ * into memory for the OS to consume. It'll also update this node with
|
|
+ * its placement information.
|
|
+ */
|
|
+ blconfig: nvram@0 {
|
|
+ compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ reg = <0x0 0x0 0x0>;
|
|
+ no-map;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+/* SDHCI is used to control the SDIO for wireless */
|
|
+&sdhci {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&emmc_gpio34>;
|
|
+ bus-width = <4>;
|
|
+ non-removable;
|
|
+ mmc-pwrseq = <&wifi_pwrseq>;
|
|
+ status = "okay";
|
|
+
|
|
+ brcmf: wifi@1 {
|
|
+ reg = <1>;
|
|
+ compatible = "brcm,bcm4329-fmac";
|
|
+ };
|
|
+};
|
|
+
|
|
+/* EMMC2 is used to drive the EMMC card */
|
|
+&emmc2 {
|
|
+ bus-width = <8>;
|
|
+ vqmmc-supply = <&sd_io_1v8_reg>;
|
|
+ vmmc-supply = <&sd_vcc_reg>;
|
|
+ broken-cd;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&genet {
|
|
+ phy-handle = <&phy1>;
|
|
+ phy-mode = "rgmii-rxid";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&genet_mdio {
|
|
+ phy1: ethernet-phy@0 {
|
|
+ /* No PHY interrupt */
|
|
+ reg = <0x0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pcie0 {
|
|
+ pci@0,0 {
|
|
+ device-type = "pci";
|
|
+ #address-cells = <3>;
|
|
+ #size-cells = <2>;
|
|
+ ranges;
|
|
+
|
|
+ reg = <0 0 0 0 0>;
|
|
+
|
|
+ usb@0,0 {
|
|
+ reg = <0 0 0 0 0>;
|
|
+ resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+/* uart0 communicates with the BT module */
|
|
+&uart0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
|
|
+ uart-has-rtscts;
|
|
+ status = "okay";
|
|
+
|
|
+ bluetooth {
|
|
+ compatible = "brcm,bcm43438-bt";
|
|
+ max-speed = <2000000>;
|
|
+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+};
|
|
+
|
|
+/* uart1 is mapped to the pin header */
|
|
+&uart1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart1_gpio14>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vchiq {
|
|
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&vc4 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vec {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+// =============================================
|
|
+// Downstream rpi- changes
|
|
+
|
|
+#define BCM2711
|
|
+
|
|
+#include "bcm270x.dtsi"
|
|
+#include "bcm271x-rpi-bt.dtsi"
|
|
+
|
|
+/ {
|
|
+ soc {
|
|
+ /delete-node/ pixelvalve@7e807000;
|
|
+ /delete-node/ hdmi@7e902000;
|
|
+ };
|
|
+};
|
|
+
|
|
+#include "bcm2711-rpi-ds.dtsi"
|
|
+#include "bcm283x-rpi-csi0-2lane.dtsi"
|
|
+#include "bcm283x-rpi-csi1-4lane.dtsi"
|
|
+#include "bcm283x-rpi-i2c0mux_0_44.dtsi"
|
|
+#include "bcm283x-rpi-cam1-regulator.dtsi"
|
|
+
|
|
+/ {
|
|
+ chosen {
|
|
+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1";
|
|
+ };
|
|
+
|
|
+ aliases {
|
|
+ serial0 = &uart1;
|
|
+ serial1 = &uart0;
|
|
+ mmc0 = &emmc2;
|
|
+ mmc1 = &mmcnr;
|
|
+ mmc2 = &sdhost;
|
|
+ i2c3 = &i2c3;
|
|
+ i2c4 = &i2c4;
|
|
+ i2c5 = &i2c5;
|
|
+ i2c6 = &i2c6;
|
|
+ i2c20 = &ddc0;
|
|
+ i2c21 = &ddc1;
|
|
+ spi3 = &spi3;
|
|
+ spi4 = &spi4;
|
|
+ spi5 = &spi5;
|
|
+ spi6 = &spi6;
|
|
+ /delete-property/ intc;
|
|
+ };
|
|
+
|
|
+ /delete-node/ wifi-pwrseq;
|
|
+};
|
|
+
|
|
+&mmcnr {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdio_pins>;
|
|
+ bus-width = <4>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ pinctrl-0 = <&uart0_pins &bt_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ pinctrl-0 = <&uart1_pins>;
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev0: spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+
|
|
+ spidev1: spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ spi3_pins: spi3_pins {
|
|
+ brcm,pins = <1 2 3>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ };
|
|
+
|
|
+ spi3_cs_pins: spi3_cs_pins {
|
|
+ brcm,pins = <0 24>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ spi4_pins: spi4_pins {
|
|
+ brcm,pins = <5 6 7>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ };
|
|
+
|
|
+ spi4_cs_pins: spi4_cs_pins {
|
|
+ brcm,pins = <4 25>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ spi5_pins: spi5_pins {
|
|
+ brcm,pins = <13 14 15>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ };
|
|
+
|
|
+ spi5_cs_pins: spi5_cs_pins {
|
|
+ brcm,pins = <12 26>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ spi6_pins: spi6_pins {
|
|
+ brcm,pins = <19 20 21>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ };
|
|
+
|
|
+ spi6_cs_pins: spi6_cs_pins {
|
|
+ brcm,pins = <18 27>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c3_pins: i2c3 {
|
|
+ brcm,pins = <4 5>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c4_pins: i2c4 {
|
|
+ brcm,pins = <8 9>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c5_pins: i2c5 {
|
|
+ brcm,pins = <12 13>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2c6_pins: i2c6 {
|
|
+ brcm,pins = <22 23>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ brcm,pull = <BCM2835_PUD_UP>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ };
|
|
+
|
|
+ sdio_pins: sdio_pins {
|
|
+ brcm,pins = <34 35 36 37 38 39>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
|
|
+ brcm,pull = <0 2 2 2 2 2>;
|
|
+ };
|
|
+
|
|
+ bt_pins: bt_pins {
|
|
+ brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
|
|
+ // to fool pinctrl
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <2>;
|
|
+ };
|
|
+
|
|
+ uart0_pins: uart0_pins {
|
|
+ brcm,pins = <32 33>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT3>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart1_pins: uart1_pins {
|
|
+ brcm,pins;
|
|
+ brcm,function;
|
|
+ brcm,pull;
|
|
+ };
|
|
+
|
|
+ uart2_pins: uart2_pins {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT4>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart3_pins: uart3_pins {
|
|
+ brcm,pins = <4 5>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT4>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart4_pins: uart4_pins {
|
|
+ brcm,pins = <8 9>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT4>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+
|
|
+ uart5_pins: uart5_pins {
|
|
+ brcm,pins = <12 13>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT4>;
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0if {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+// =============================================
|
|
+// Board specific stuff here
|
|
+
|
|
+&pcie0 {
|
|
+ brcm,enable-l1ss;
|
|
+};
|
|
+
|
|
+&sdhost {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&phy1 {
|
|
+ led-modes = <0x00 0x08>; /* link/activity link */
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ audio_pins: audio_pins {
|
|
+ brcm,pins = <>;
|
|
+ brcm,function = <>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: led-act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ pwr_led: led-pwr {
|
|
+ label = "led1";
|
|
+ linux,default-trigger = "default-on";
|
|
+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pwm1 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&audio {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&audio_pins>;
|
|
+ brcm,disable-headphones = <1>;
|
|
+};
|
|
+
|
|
+cam0_reg: &cam1_reg {
|
|
+ gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+
|
|
+ pwr_led_gpio = <&pwr_led>,"gpios:4";
|
|
+ pwr_led_activelow = <&pwr_led>,"gpios:8";
|
|
+ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
|
|
+
|
|
+ eth_led0 = <&phy1>,"led-modes:0";
|
|
+ eth_led1 = <&phy1>,"led-modes:4";
|
|
+
|
|
+ ant1 = <&ant1>,"output-high?=on",
|
|
+ <&ant1>, "output-low?=off",
|
|
+ <&ant2>, "output-high?=off",
|
|
+ <&ant2>, "output-low?=on";
|
|
+ ant2 = <&ant1>,"output-high?=off",
|
|
+ <&ant1>, "output-low?=on",
|
|
+ <&ant2>, "output-high?=on",
|
|
+ <&ant2>, "output-low?=off";
|
|
+ noant = <&ant1>,"output-high?=off",
|
|
+ <&ant1>, "output-low?=on",
|
|
+ <&ant2>, "output-high?=off",
|
|
+ <&ant2>, "output-low?=on";
|
|
+
|
|
+ sd_poll_once = <&emmc2>, "non-removable?";
|
|
+ spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
|
|
+ <&spi0>, "dmas:8=", <&dma40>;
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2711-rpi-ds.dtsi b/arch/arm/boot/dts/bcm2711-rpi-ds.dtsi
|
|
new file mode 100644
|
|
index 000000000000..ebf73b789b4a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2711-rpi-ds.dtsi
|
|
@@ -0,0 +1,205 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+#include "bcm270x-rpi.dtsi"
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ arm_freq;
|
|
+ };
|
|
+
|
|
+ v3dbus: v3dbus {
|
|
+ compatible = "simple-bus";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <2>;
|
|
+ ranges = <0x7c500000 0x0 0xfc500000 0x0 0x03300000>,
|
|
+ <0x40000000 0x0 0xff800000 0x0 0x00800000>;
|
|
+ dma-ranges = <0x00000000 0x0 0x00000000 0x4 0x00000000>;
|
|
+
|
|
+ v3d: v3d@7ec04000 {
|
|
+ compatible = "brcm,2711-v3d";
|
|
+ reg =
|
|
+ <0x7ec00000 0x0 0x4000>,
|
|
+ <0x7ec04000 0x0 0x4000>;
|
|
+ reg-names = "hub", "core0";
|
|
+
|
|
+ power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
|
|
+ resets = <&pm BCM2835_RESET_V3D>;
|
|
+ clocks = <&firmware_clocks 5>;
|
|
+ clocks-names = "v3d";
|
|
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ scb: scb {
|
|
+ /* Add a label */
|
|
+ };
|
|
+};
|
|
+
|
|
+&vc4 {
|
|
+ raspberrypi,firmware = <&firmware>;
|
|
+};
|
|
+
|
|
+&cma {
|
|
+ /* Limit cma to the lower 768MB to allow room for HIGHMEM on 32-bit */
|
|
+ alloc-ranges = <0x0 0x00000000 0x30000000>;
|
|
+};
|
|
+
|
|
+&scb {
|
|
+ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>,
|
|
+ <0x0 0x40000000 0x0 0xff800000 0x0 0x00800000>,
|
|
+ <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>,
|
|
+ <0x0 0x00000000 0x0 0x00000000 0x0 0xfc000000>;
|
|
+ dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x4 0x00000000>;
|
|
+
|
|
+ dma40: dma@7e007b00 {
|
|
+ compatible = "brcm,bcm2711-dma";
|
|
+ reg = <0x0 0x7e007b00 0x0 0x400>;
|
|
+ interrupts =
|
|
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, /* dma4 11 */
|
|
+ <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, /* dma4 12 */
|
|
+ <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, /* dma4 13 */
|
|
+ <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; /* dma4 14 */
|
|
+ interrupt-names = "dma11",
|
|
+ "dma12",
|
|
+ "dma13",
|
|
+ "dma14";
|
|
+ #dma-cells = <1>;
|
|
+ brcm,dma-channel-mask = <0x7800>;
|
|
+ };
|
|
+
|
|
+ xhci: xhci@7e9c0000 {
|
|
+ compatible = "generic-xhci";
|
|
+ status = "disabled";
|
|
+ reg = <0x0 0x7e9c0000 0x0 0x100000>;
|
|
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ power-domains = <&power RPI_POWER_DOMAIN_USB>;
|
|
+ };
|
|
+
|
|
+ hevc-decoder@7eb00000 {
|
|
+ compatible = "raspberrypi,rpivid-hevc-decoder";
|
|
+ reg = <0x0 0x7eb00000 0x0 0x10000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ rpivid-local-intc@7eb10000 {
|
|
+ compatible = "raspberrypi,rpivid-local-intc";
|
|
+ reg = <0x0 0x7eb10000 0x0 0x1000>;
|
|
+ status = "okay";
|
|
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ };
|
|
+
|
|
+ h264-decoder@7eb20000 {
|
|
+ compatible = "raspberrypi,rpivid-h264-decoder";
|
|
+ reg = <0x0 0x7eb20000 0x0 0x10000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ vp9-decoder@7eb30000 {
|
|
+ compatible = "raspberrypi,rpivid-vp9-decoder";
|
|
+ reg = <0x0 0x7eb30000 0x0 0x10000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+&dma40 {
|
|
+ /* The VPU firmware uses DMA channel 11 for VCHIQ */
|
|
+ brcm,dma-channel-mask = <0x7000>;
|
|
+};
|
|
+
|
|
+&vchiq {
|
|
+ compatible = "brcm,bcm2711-vchiq";
|
|
+};
|
|
+
|
|
+&firmwarekms {
|
|
+ compatible = "raspberrypi,rpi-firmware-kms-2711";
|
|
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&smi {
|
|
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&mmc {
|
|
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&mmcnr {
|
|
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&csi0 {
|
|
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&csi1 {
|
|
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&random {
|
|
+ compatible = "brcm,bcm2711-rng200";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb {
|
|
+ /* Enable the FIQ support */
|
|
+ reg = <0x7e980000 0x10000>,
|
|
+ <0x7e00b200 0x200>;
|
|
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&emmc2 {
|
|
+ mmc-ddr-3_3v;
|
|
+};
|
|
+
|
|
+&vc4 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pixelvalve0 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pixelvalve1 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pixelvalve2 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pixelvalve3 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&pixelvalve4 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&hdmi0 {
|
|
+ dmas = <&dma (10|(1<<27)|(1<<24)|(10<<16)|(15<<20))>;
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&ddc0 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&hdmi1 {
|
|
+ dmas = <&dma (17|(1<<27)|(1<<24)|(10<<16)|(15<<20))>;
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&ddc1 {
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&dvp {
|
|
+ status = "disabled";
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi
|
|
index 89af57482bc8..131db82e079d 100644
|
|
--- a/arch/arm/boot/dts/bcm2711.dtsi
|
|
+++ b/arch/arm/boot/dts/bcm2711.dtsi
|
|
@@ -323,6 +323,7 @@ aon_intr: interrupt-controller@7ef00100 {
|
|
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
+ status = "disabled";
|
|
};
|
|
|
|
hdmi0: hdmi@7ef00700 {
|
|
@@ -335,7 +336,8 @@ hdmi0: hdmi@7ef00700 {
|
|
<0x7ef01f00 0x400>,
|
|
<0x7ef00200 0x80>,
|
|
<0x7ef04300 0x100>,
|
|
- <0x7ef20000 0x100>;
|
|
+ <0x7ef20000 0x100>,
|
|
+ <0x7ef00100 0x30>;
|
|
reg-names = "hdmi",
|
|
"dvp",
|
|
"phy",
|
|
@@ -344,7 +346,12 @@ hdmi0: hdmi@7ef00700 {
|
|
"metadata",
|
|
"csc",
|
|
"cec",
|
|
- "hd";
|
|
+ "hd",
|
|
+ "intr2";
|
|
+ clocks = <&firmware_clocks 13>,
|
|
+ <&firmware_clocks 14>,
|
|
+ <&dvp 0>,
|
|
+ <&clk_27MHz>;
|
|
clock-names = "hdmi", "bvb", "audio", "cec";
|
|
resets = <&dvp 0>;
|
|
interrupt-parent = <&aon_intr>;
|
|
@@ -353,7 +360,7 @@ hdmi0: hdmi@7ef00700 {
|
|
interrupt-names = "cec-tx", "cec-rx", "cec-low",
|
|
"wakeup", "hpd-connected", "hpd-removed";
|
|
ddc = <&ddc0>;
|
|
- dmas = <&dma 10>;
|
|
+ dmas = <&dma (10 | (1 << 27) | (1 << 24)| (15 << 20) | (10 << 16))>;
|
|
dma-names = "audio-rx";
|
|
status = "disabled";
|
|
};
|
|
@@ -376,7 +383,8 @@ hdmi1: hdmi@7ef05700 {
|
|
<0x7ef06f00 0x400>,
|
|
<0x7ef00280 0x80>,
|
|
<0x7ef09300 0x100>,
|
|
- <0x7ef20000 0x100>;
|
|
+ <0x7ef20000 0x100>,
|
|
+ <0x7ef00100 0x30>;
|
|
reg-names = "hdmi",
|
|
"dvp",
|
|
"phy",
|
|
@@ -385,16 +393,21 @@ hdmi1: hdmi@7ef05700 {
|
|
"metadata",
|
|
"csc",
|
|
"cec",
|
|
- "hd";
|
|
+ "hd",
|
|
+ "intr2";
|
|
ddc = <&ddc1>;
|
|
clock-names = "hdmi", "bvb", "audio", "cec";
|
|
+ clocks = <&firmware_clocks 13>,
|
|
+ <&firmware_clocks 14>,
|
|
+ <&dvp 0>,
|
|
+ <&clk_27MHz>;
|
|
resets = <&dvp 1>;
|
|
interrupt-parent = <&aon_intr>;
|
|
interrupts = <8>, <7>, <6>,
|
|
<9>, <10>, <11>;
|
|
interrupt-names = "cec-tx", "cec-rx", "cec-low",
|
|
"wakeup", "hpd-connected", "hpd-removed";
|
|
- dmas = <&dma 17>;
|
|
+ dmas = <&dma (17 | (1 << 27) | (1 << 24)| (15 << 20) | (10 << 16))>;
|
|
dma-names = "audio-rx";
|
|
status = "disabled";
|
|
};
|
|
@@ -545,14 +558,14 @@ l2: l2-cache0 {
|
|
scb {
|
|
compatible = "simple-bus";
|
|
#address-cells = <2>;
|
|
- #size-cells = <1>;
|
|
+ #size-cells = <2>;
|
|
|
|
- ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>,
|
|
- <0x6 0x00000000 0x6 0x00000000 0x40000000>;
|
|
+ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>,
|
|
+ <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>;
|
|
|
|
pcie0: pcie@7d500000 {
|
|
compatible = "brcm,bcm2711-pcie";
|
|
- reg = <0x0 0x7d500000 0x9310>;
|
|
+ reg = <0x0 0x7d500000 0x0 0x9310>;
|
|
device_type = "pci";
|
|
#address-cells = <3>;
|
|
#interrupt-cells = <1>;
|
|
@@ -572,8 +585,8 @@ IRQ_TYPE_LEVEL_HIGH>,
|
|
msi-controller;
|
|
msi-parent = <&pcie0>;
|
|
|
|
- ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000
|
|
- 0x0 0x04000000>;
|
|
+ ranges = <0x02000000 0x0 0xc0000000 0x6 0x00000000
|
|
+ 0x0 0x40000000>;
|
|
/*
|
|
* The wrapper around the PCIe block has a bug
|
|
* preventing it from accessing beyond the first 3GB of
|
|
@@ -586,7 +599,7 @@ IRQ_TYPE_LEVEL_HIGH>,
|
|
|
|
genet: ethernet@7d580000 {
|
|
compatible = "brcm,bcm2711-genet-v5";
|
|
- reg = <0x0 0x7d580000 0x10000>;
|
|
+ reg = <0x0 0x7d580000 0x0 0x10000>;
|
|
#address-cells = <0x1>;
|
|
#size-cells = <0x1>;
|
|
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
|
|
@@ -1096,7 +1109,7 @@ &cma {
|
|
alloc-ranges = <0x0 0x00000000 0x40000000>;
|
|
};
|
|
|
|
-&i2c0 {
|
|
+&i2c0if {
|
|
compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
@@ -1152,8 +1165,3 @@ &uart1 {
|
|
&usb {
|
|
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
-
|
|
-&vec {
|
|
- compatible = "brcm,bcm2711-vec";
|
|
- interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
|
|
-};
|
|
diff --git a/arch/arm/boot/dts/bcm271x-rpi-bt.dtsi b/arch/arm/boot/dts/bcm271x-rpi-bt.dtsi
|
|
new file mode 100644
|
|
index 000000000000..6b9b79f74cf3
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm271x-rpi-bt.dtsi
|
|
@@ -0,0 +1,26 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+
|
|
+&uart0 {
|
|
+ bt: bluetooth {
|
|
+ compatible = "brcm,bcm43438-bt";
|
|
+ max-speed = <3000000>;
|
|
+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ minibt: bluetooth {
|
|
+ compatible = "brcm,bcm43438-bt";
|
|
+ max-speed = <460800>;
|
|
+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ krnbt = <&bt>,"status";
|
|
+ krnbt_baudrate = <&bt>,"max-speed:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2835-common.dtsi b/arch/arm/boot/dts/bcm2835-common.dtsi
|
|
index c25e797b9060..06d8c3882cb7 100644
|
|
--- a/arch/arm/boot/dts/bcm2835-common.dtsi
|
|
+++ b/arch/arm/boot/dts/bcm2835-common.dtsi
|
|
@@ -124,12 +124,14 @@ hdmi: hdmi@7e902000 {
|
|
compatible = "brcm,bcm2835-hdmi";
|
|
reg = <0x7e902000 0x600>,
|
|
<0x7e808000 0x100>;
|
|
+ reg-names = "hdmi",
|
|
+ "hd";
|
|
interrupts = <2 8>, <2 9>;
|
|
ddc = <&i2c2>;
|
|
clocks = <&clocks BCM2835_PLLH_PIX>,
|
|
<&clocks BCM2835_CLOCK_HSM>;
|
|
clock-names = "pixel", "hdmi";
|
|
- dmas = <&dma 17>;
|
|
+ dmas = <&dma (17|(1<<27)|(1<<24))>;
|
|
dma-names = "audio-rx";
|
|
status = "disabled";
|
|
};
|
|
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
|
|
index 40b9405f1a8e..d2384d8e8555 100644
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
|
|
@@ -126,3 +126,8 @@ &uart0 {
|
|
pinctrl-0 = <&uart0_gpio14>;
|
|
status = "okay";
|
|
};
|
|
+
|
|
+/* i2c on camera/display connector is gpio 28&29 */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio28>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts
|
|
index 11edb581dbaf..4ceca674b752 100644
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
|
|
@@ -121,3 +121,10 @@ &uart0 {
|
|
pinctrl-0 = <&uart0_gpio14>;
|
|
status = "okay";
|
|
};
|
|
+
|
|
+/* i2c0 on camera/display connector is gpio 0&1. Not exposed on header.
|
|
+ * To avoid having to remap everything, map both ports to gpios 0&1
|
|
+ */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio0>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
|
|
index 1b435c64bd9c..8f2d10d82fa1 100644
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
|
|
@@ -128,3 +128,8 @@ &uart0 {
|
|
pinctrl-0 = <&uart0_gpio14>;
|
|
status = "okay";
|
|
};
|
|
+
|
|
+/* i2c on camera/display connector is gpio 28&29 */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio28>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
|
|
index a23c25c00eea..547c88a3ae9f 100644
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
|
|
@@ -121,3 +121,10 @@ &uart0 {
|
|
pinctrl-0 = <&uart0_gpio14>;
|
|
status = "okay";
|
|
};
|
|
+
|
|
+/* i2c0 on camera/display connector is gpio 0&1. Not exposed on header.
|
|
+ * To avoid having to remap everything, map both ports to gpios 0&1
|
|
+ */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio0>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts
|
|
index 1b63d6b19750..073fc99ef8a2 100644
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
|
|
@@ -116,3 +116,10 @@ &uart0 {
|
|
pinctrl-0 = <&uart0_gpio14>;
|
|
status = "okay";
|
|
};
|
|
+
|
|
+/* camera/display connector use BSC1 on GPIOS 2&3.
|
|
+ * To avoid having to remap everything, map both ports to gpios 0&1
|
|
+ */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio0>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts b/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts
|
|
index a75c882e6575..95564c93a645 100644
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-cm1-io1.dts
|
|
@@ -95,3 +95,8 @@ &uart0 {
|
|
pinctrl-0 = <&uart0_gpio14>;
|
|
status = "okay";
|
|
};
|
|
+
|
|
+/* WHAT TO DO HERE? */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio28>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
|
|
index 33b2b77aa47d..3ea5c7e6be54 100644
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
|
|
@@ -149,3 +149,8 @@ &uart1 {
|
|
pinctrl-0 = <&uart1_gpio14>;
|
|
status = "okay";
|
|
};
|
|
+
|
|
+/* i2c on camera/display connector is gpio 28&29 */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio28>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
|
|
index 6f9b3a908f28..a0eabab12c99 100644
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
|
|
@@ -117,3 +117,8 @@ &uart0 {
|
|
pinctrl-0 = <&uart0_gpio14>;
|
|
status = "okay";
|
|
};
|
|
+
|
|
+/* i2c on camera/display connector is gpio 28&29 */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio28>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
|
index 87ddcad76083..edc55bba5ff4 100644
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
|
@@ -19,6 +19,11 @@ firmware: firmware {
|
|
|
|
mboxes = <&mailbox>;
|
|
dma-ranges;
|
|
+
|
|
+ firmware_clocks: clocks {
|
|
+ compatible = "raspberrypi,firmware-clocks";
|
|
+ #clock-cells = <1>;
|
|
+ };
|
|
};
|
|
|
|
power: power {
|
|
@@ -49,13 +54,17 @@ alt0: alt0 {
|
|
};
|
|
};
|
|
|
|
-&i2c0 {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&i2c0_gpio0>;
|
|
+&i2c0if {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
+&i2c0mux {
|
|
+ pinctrl-0 = <&i2c0_gpio0>;
|
|
+ /* pinctrl-1 varies based on platform */
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
&i2c1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c1_gpio2>;
|
|
@@ -67,6 +76,10 @@ &usb {
|
|
power-domains = <&power RPI_POWER_DOMAIN_USB>;
|
|
};
|
|
|
|
+&vc4 {
|
|
+ raspberrypi,firmware = <&firmware>;
|
|
+};
|
|
+
|
|
&vec {
|
|
power-domains = <&power RPI_POWER_DOMAIN_VEC>;
|
|
status = "okay";
|
|
diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
|
|
index 0549686134ea..2ea891228ea0 100644
|
|
--- a/arch/arm/boot/dts/bcm2835.dtsi
|
|
+++ b/arch/arm/boot/dts/bcm2835.dtsi
|
|
@@ -19,7 +19,7 @@ cpu@0 {
|
|
|
|
soc {
|
|
ranges = <0x7e000000 0x20000000 0x02000000>;
|
|
- dma-ranges = <0x40000000 0x00000000 0x20000000>;
|
|
+ dma-ranges = <0x80000000 0x00000000 0x20000000>;
|
|
};
|
|
|
|
arm-pmu {
|
|
diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
|
|
index d8af8eeac7b6..bf22b74359d8 100644
|
|
--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
|
|
+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
|
|
@@ -128,3 +128,8 @@ &uart0 {
|
|
pinctrl-0 = <&uart0_gpio14>;
|
|
status = "okay";
|
|
};
|
|
+
|
|
+/* i2c on camera/display connector is gpio 28&29 */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio28>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
|
|
index 77099a7871b0..9529c0475673 100644
|
|
--- a/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
|
|
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
|
|
@@ -178,3 +178,8 @@ &uart1 {
|
|
pinctrl-0 = <&uart1_gpio14>;
|
|
status = "okay";
|
|
};
|
|
+
|
|
+/* i2c on camera/display connector is gpio 44&45 */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio44>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
|
|
index 61010266ca9a..40cb269aed0f 100644
|
|
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
|
|
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
|
|
@@ -181,3 +181,8 @@ &uart1 {
|
|
pinctrl-0 = <&uart1_gpio14>;
|
|
status = "okay";
|
|
};
|
|
+
|
|
+/* i2c on camera/display connector is gpio 44&45 */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio44>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
|
|
index dd4a48604097..8f16b6b3fe08 100644
|
|
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
|
|
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
|
|
@@ -174,3 +174,8 @@ &sdhost {
|
|
status = "okay";
|
|
bus-width = <4>;
|
|
};
|
|
+
|
|
+/* i2c on camera/display connector is gpio 44&45 */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio44>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts b/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
|
|
index 588d9411ceb6..dde209ade51b 100644
|
|
--- a/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
|
|
+++ b/arch/arm/boot/dts/bcm2837-rpi-cm3-io3.dts
|
|
@@ -94,3 +94,8 @@ &uart0 {
|
|
pinctrl-0 = <&uart0_gpio14>;
|
|
status = "okay";
|
|
};
|
|
+
|
|
+/* WHAT TO DO HERE? */
|
|
+&i2c0mux {
|
|
+ pinctrl-1 = <&i2c0_gpio28>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm283x-rpi-cam1-regulator.dtsi b/arch/arm/boot/dts/bcm283x-rpi-cam1-regulator.dtsi
|
|
new file mode 100644
|
|
index 000000000000..55237d03ed94
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm283x-rpi-cam1-regulator.dtsi
|
|
@@ -0,0 +1,10 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+
|
|
+/ {
|
|
+ cam1_reg: cam1_reg {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "cam1-reg";
|
|
+ enable-active-high;
|
|
+ status = "disabled";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi b/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi
|
|
new file mode 100644
|
|
index 000000000000..6e4ce8622b47
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm283x-rpi-csi0-2lane.dtsi
|
|
@@ -0,0 +1,4 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+&csi0 {
|
|
+ brcm,num-data-lanes = <2>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi b/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
|
|
new file mode 100644
|
|
index 000000000000..6938f4daacdc
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
|
|
@@ -0,0 +1,4 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+&csi1 {
|
|
+ brcm,num-data-lanes = <2>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi b/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi
|
|
new file mode 100644
|
|
index 000000000000..b37037437bee
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm283x-rpi-csi1-4lane.dtsi
|
|
@@ -0,0 +1,4 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+&csi1 {
|
|
+ brcm,num-data-lanes = <4>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi b/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi
|
|
new file mode 100644
|
|
index 000000000000..38f0074bce3f
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_28.dtsi
|
|
@@ -0,0 +1,4 @@
|
|
+&i2c0mux {
|
|
+ pinctrl-0 = <&i2c0_gpio0>;
|
|
+ pinctrl-1 = <&i2c0_gpio28>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi b/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi
|
|
new file mode 100644
|
|
index 000000000000..119946d878db
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm283x-rpi-i2c0mux_0_44.dtsi
|
|
@@ -0,0 +1,4 @@
|
|
+&i2c0mux {
|
|
+ pinctrl-0 = <&i2c0_gpio0>;
|
|
+ pinctrl-1 = <&i2c0_gpio44>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
|
|
index c113661a6668..62d7ee513549 100644
|
|
--- a/arch/arm/boot/dts/bcm283x.dtsi
|
|
+++ b/arch/arm/boot/dts/bcm283x.dtsi
|
|
@@ -336,7 +336,7 @@ spi: spi@7e204000 {
|
|
status = "disabled";
|
|
};
|
|
|
|
- i2c0: i2c@7e205000 {
|
|
+ i2c0if: i2c@7e205000 {
|
|
compatible = "brcm,bcm2835-i2c";
|
|
reg = <0x7e205000 0x200>;
|
|
interrupts = <2 21>;
|
|
@@ -346,6 +346,30 @@ i2c0: i2c@7e205000 {
|
|
status = "disabled";
|
|
};
|
|
|
|
+ i2c0mux: i2c0mux {
|
|
+ compatible = "i2c-mux-pinctrl";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ i2c-parent = <&i2c0if>;
|
|
+
|
|
+ pinctrl-names = "i2c0", "i2c_csi_dsi";
|
|
+
|
|
+ status = "disabled";
|
|
+
|
|
+ i2c0: i2c@0 {
|
|
+ reg = <0>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ };
|
|
+
|
|
+ i2c_csi_dsi: i2c@1 {
|
|
+ reg = <1>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
dpi: dpi@7e208000 {
|
|
compatible = "brcm,bcm2835-dpi";
|
|
reg = <0x7e208000 0x8c>;
|
|
diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile
|
|
new file mode 100644
|
|
index 000000000000..44aedc149ff0
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/Makefile
|
|
@@ -0,0 +1,248 @@
|
|
+# Overlays for the Raspberry Pi platform
|
|
+
|
|
+dtb-$(CONFIG_ARCH_BCM2835) += overlay_map.dtb
|
|
+
|
|
+dtbo-$(CONFIG_ARCH_BCM2835) += \
|
|
+ act-led.dtbo \
|
|
+ adafruit18.dtbo \
|
|
+ adau1977-adc.dtbo \
|
|
+ adau7002-simple.dtbo \
|
|
+ ads1015.dtbo \
|
|
+ ads1115.dtbo \
|
|
+ ads7846.dtbo \
|
|
+ adv7282m.dtbo \
|
|
+ adv728x-m.dtbo \
|
|
+ akkordion-iqdacplus.dtbo \
|
|
+ allo-boss-dac-pcm512x-audio.dtbo \
|
|
+ allo-boss2-dac-audio.dtbo \
|
|
+ allo-digione.dtbo \
|
|
+ allo-katana-dac-audio.dtbo \
|
|
+ allo-piano-dac-pcm512x-audio.dtbo \
|
|
+ allo-piano-dac-plus-pcm512x-audio.dtbo \
|
|
+ anyspi.dtbo \
|
|
+ apds9960.dtbo \
|
|
+ applepi-dac.dtbo \
|
|
+ at86rf233.dtbo \
|
|
+ audioinjector-addons.dtbo \
|
|
+ audioinjector-isolated-soundcard.dtbo \
|
|
+ audioinjector-ultra.dtbo \
|
|
+ audioinjector-wm8731-audio.dtbo \
|
|
+ audiosense-pi.dtbo \
|
|
+ audremap.dtbo \
|
|
+ balena-fin.dtbo \
|
|
+ cap1106.dtbo \
|
|
+ chipdip-dac.dtbo \
|
|
+ cma.dtbo \
|
|
+ dht11.dtbo \
|
|
+ dionaudio-loco.dtbo \
|
|
+ dionaudio-loco-v2.dtbo \
|
|
+ disable-bt.dtbo \
|
|
+ disable-wifi.dtbo \
|
|
+ dpi18.dtbo \
|
|
+ dpi18cpadhi.dtbo \
|
|
+ dpi24.dtbo \
|
|
+ draws.dtbo \
|
|
+ dwc-otg.dtbo \
|
|
+ dwc2.dtbo \
|
|
+ edt-ft5406.dtbo \
|
|
+ enc28j60.dtbo \
|
|
+ enc28j60-spi2.dtbo \
|
|
+ exc3000.dtbo \
|
|
+ fe-pi-audio.dtbo \
|
|
+ fsm-demo.dtbo \
|
|
+ ghost-amp.dtbo \
|
|
+ goodix.dtbo \
|
|
+ googlevoicehat-soundcard.dtbo \
|
|
+ gpio-fan.dtbo \
|
|
+ gpio-ir.dtbo \
|
|
+ gpio-ir-tx.dtbo \
|
|
+ gpio-key.dtbo \
|
|
+ gpio-led.dtbo \
|
|
+ gpio-no-bank0-irq.dtbo \
|
|
+ gpio-no-irq.dtbo \
|
|
+ gpio-poweroff.dtbo \
|
|
+ gpio-shutdown.dtbo \
|
|
+ hd44780-lcd.dtbo \
|
|
+ hdmi-backlight-hwhack-gpio.dtbo \
|
|
+ hifiberry-amp.dtbo \
|
|
+ hifiberry-amp100.dtbo \
|
|
+ hifiberry-dac.dtbo \
|
|
+ hifiberry-dacplus.dtbo \
|
|
+ hifiberry-dacplusadc.dtbo \
|
|
+ hifiberry-dacplusadcpro.dtbo \
|
|
+ hifiberry-dacplusdsp.dtbo \
|
|
+ hifiberry-dacplushd.dtbo \
|
|
+ hifiberry-digi.dtbo \
|
|
+ hifiberry-digi-pro.dtbo \
|
|
+ highperi.dtbo \
|
|
+ hy28a.dtbo \
|
|
+ hy28b.dtbo \
|
|
+ hy28b-2017.dtbo \
|
|
+ i-sabre-q2m.dtbo \
|
|
+ i2c-bcm2708.dtbo \
|
|
+ i2c-gpio.dtbo \
|
|
+ i2c-mux.dtbo \
|
|
+ i2c-pwm-pca9685a.dtbo \
|
|
+ i2c-rtc.dtbo \
|
|
+ i2c-rtc-gpio.dtbo \
|
|
+ i2c-sensor.dtbo \
|
|
+ i2c0.dtbo \
|
|
+ i2c1.dtbo \
|
|
+ i2c3.dtbo \
|
|
+ i2c4.dtbo \
|
|
+ i2c5.dtbo \
|
|
+ i2c6.dtbo \
|
|
+ i2s-gpio28-31.dtbo \
|
|
+ ilitek251x.dtbo \
|
|
+ imx219.dtbo \
|
|
+ imx290.dtbo \
|
|
+ imx378.dtbo \
|
|
+ imx477.dtbo \
|
|
+ iqaudio-codec.dtbo \
|
|
+ iqaudio-dac.dtbo \
|
|
+ iqaudio-dacplus.dtbo \
|
|
+ iqaudio-digi-wm8804-audio.dtbo \
|
|
+ irs1125.dtbo \
|
|
+ jedec-spi-nor.dtbo \
|
|
+ justboom-both.dtbo \
|
|
+ justboom-dac.dtbo \
|
|
+ justboom-digi.dtbo \
|
|
+ ltc294x.dtbo \
|
|
+ max98357a.dtbo \
|
|
+ maxtherm.dtbo \
|
|
+ mbed-dac.dtbo \
|
|
+ mcp23017.dtbo \
|
|
+ mcp23s17.dtbo \
|
|
+ mcp2515-can0.dtbo \
|
|
+ mcp2515-can1.dtbo \
|
|
+ mcp251xfd.dtbo \
|
|
+ mcp3008.dtbo \
|
|
+ mcp3202.dtbo \
|
|
+ mcp342x.dtbo \
|
|
+ media-center.dtbo \
|
|
+ merus-amp.dtbo \
|
|
+ midi-uart0.dtbo \
|
|
+ midi-uart1.dtbo \
|
|
+ midi-uart2.dtbo \
|
|
+ midi-uart3.dtbo \
|
|
+ midi-uart4.dtbo \
|
|
+ midi-uart5.dtbo \
|
|
+ minipitft13.dtbo \
|
|
+ miniuart-bt.dtbo \
|
|
+ mmc.dtbo \
|
|
+ mpu6050.dtbo \
|
|
+ mz61581.dtbo \
|
|
+ ov5647.dtbo \
|
|
+ ov7251.dtbo \
|
|
+ ov9281.dtbo \
|
|
+ papirus.dtbo \
|
|
+ pca953x.dtbo \
|
|
+ pcie-32bit-dma.dtbo \
|
|
+ pibell.dtbo \
|
|
+ pifacedigital.dtbo \
|
|
+ pifi-40.dtbo \
|
|
+ pifi-dac-hd.dtbo \
|
|
+ pifi-dac-zero.dtbo \
|
|
+ pifi-mini-210.dtbo \
|
|
+ piglow.dtbo \
|
|
+ piscreen.dtbo \
|
|
+ piscreen2r.dtbo \
|
|
+ pisound.dtbo \
|
|
+ pitft22.dtbo \
|
|
+ pitft28-capacitive.dtbo \
|
|
+ pitft28-resistive.dtbo \
|
|
+ pitft35-resistive.dtbo \
|
|
+ pps-gpio.dtbo \
|
|
+ pwm.dtbo \
|
|
+ pwm-2chan.dtbo \
|
|
+ pwm-ir-tx.dtbo \
|
|
+ qca7000.dtbo \
|
|
+ qca7000-uart0.dtbo \
|
|
+ rotary-encoder.dtbo \
|
|
+ rpi-backlight.dtbo \
|
|
+ rpi-cirrus-wm5102.dtbo \
|
|
+ rpi-dac.dtbo \
|
|
+ rpi-display.dtbo \
|
|
+ rpi-ft5406.dtbo \
|
|
+ rpi-poe.dtbo \
|
|
+ rpi-poe-plus.dtbo \
|
|
+ rpi-proto.dtbo \
|
|
+ rpi-sense.dtbo \
|
|
+ rpi-tv.dtbo \
|
|
+ rpivid-v4l2.dtbo \
|
|
+ rra-digidac1-wm8741-audio.dtbo \
|
|
+ sainsmart18.dtbo \
|
|
+ sc16is750-i2c.dtbo \
|
|
+ sc16is752-i2c.dtbo \
|
|
+ sc16is752-spi0.dtbo \
|
|
+ sc16is752-spi1.dtbo \
|
|
+ sdhost.dtbo \
|
|
+ sdio.dtbo \
|
|
+ seeed-can-fd-hat-v1.dtbo \
|
|
+ seeed-can-fd-hat-v2.dtbo \
|
|
+ sh1106-spi.dtbo \
|
|
+ si446x-spi0.dtbo \
|
|
+ smi.dtbo \
|
|
+ smi-dev.dtbo \
|
|
+ smi-nand.dtbo \
|
|
+ spi-gpio35-39.dtbo \
|
|
+ spi-gpio40-45.dtbo \
|
|
+ spi-rtc.dtbo \
|
|
+ spi0-1cs.dtbo \
|
|
+ spi0-2cs.dtbo \
|
|
+ spi1-1cs.dtbo \
|
|
+ spi1-2cs.dtbo \
|
|
+ spi1-3cs.dtbo \
|
|
+ spi2-1cs.dtbo \
|
|
+ spi2-2cs.dtbo \
|
|
+ spi2-3cs.dtbo \
|
|
+ spi3-1cs.dtbo \
|
|
+ spi3-2cs.dtbo \
|
|
+ spi4-1cs.dtbo \
|
|
+ spi4-2cs.dtbo \
|
|
+ spi5-1cs.dtbo \
|
|
+ spi5-2cs.dtbo \
|
|
+ spi6-1cs.dtbo \
|
|
+ spi6-2cs.dtbo \
|
|
+ ssd1306.dtbo \
|
|
+ ssd1306-spi.dtbo \
|
|
+ ssd1331-spi.dtbo \
|
|
+ ssd1351-spi.dtbo \
|
|
+ superaudioboard.dtbo \
|
|
+ sx150x.dtbo \
|
|
+ tc358743.dtbo \
|
|
+ tc358743-audio.dtbo \
|
|
+ tinylcd35.dtbo \
|
|
+ tpm-slb9670.dtbo \
|
|
+ uart0.dtbo \
|
|
+ uart1.dtbo \
|
|
+ uart2.dtbo \
|
|
+ uart3.dtbo \
|
|
+ uart4.dtbo \
|
|
+ uart5.dtbo \
|
|
+ udrc.dtbo \
|
|
+ ugreen-dabboard.dtbo \
|
|
+ upstream.dtbo \
|
|
+ upstream-pi4.dtbo \
|
|
+ vc4-fkms-v3d.dtbo \
|
|
+ vc4-fkms-v3d-pi4.dtbo \
|
|
+ vc4-kms-dpi-at056tn53v1.dtbo \
|
|
+ vc4-kms-dsi-7inch.dtbo \
|
|
+ vc4-kms-dsi-lt070me05000.dtbo \
|
|
+ vc4-kms-dsi-lt070me05000-v2.dtbo \
|
|
+ vc4-kms-kippah-7inch.dtbo \
|
|
+ vc4-kms-v3d.dtbo \
|
|
+ vc4-kms-v3d-pi4.dtbo \
|
|
+ vc4-kms-vga666.dtbo \
|
|
+ vga666.dtbo \
|
|
+ w1-gpio.dtbo \
|
|
+ w1-gpio-pullup.dtbo \
|
|
+ w5500.dtbo \
|
|
+ wittypi.dtbo \
|
|
+ wm8960-soundcard.dtbo
|
|
+
|
|
+targets += dtbs dtbs_install
|
|
+targets += $(dtbo-y)
|
|
+
|
|
+always-y := $(dtbo-y)
|
|
+clean-files := *.dtbo
|
|
diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README
|
|
new file mode 100644
|
|
index 000000000000..eb2c9adfb1a8
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/README
|
|
@@ -0,0 +1,3530 @@
|
|
+Introduction
|
|
+============
|
|
+
|
|
+This directory contains Device Tree overlays. Device Tree makes it possible
|
|
+to support many hardware configurations with a single kernel and without the
|
|
+need to explicitly load or blacklist kernel modules. Note that this isn't a
|
|
+"pure" Device Tree configuration (c.f. MACH_BCM2835) - some on-board devices
|
|
+are still configured by the board support code, but the intention is to
|
|
+eventually reach that goal.
|
|
+
|
|
+On Raspberry Pi, Device Tree usage is controlled from /boot/config.txt. By
|
|
+default, the Raspberry Pi kernel boots with device tree enabled. You can
|
|
+completely disable DT usage (for now) by adding:
|
|
+
|
|
+ device_tree=
|
|
+
|
|
+to your config.txt, which should cause your Pi to revert to the old way of
|
|
+doing things after a reboot.
|
|
+
|
|
+In /boot you will find a .dtb for each base platform. This describes the
|
|
+hardware that is part of the Raspberry Pi board. The loader (start.elf and its
|
|
+siblings) selects the .dtb file appropriate for the platform by name, and reads
|
|
+it into memory. At this point, all of the optional interfaces (i2c, i2s, spi)
|
|
+are disabled, but they can be enabled using Device Tree parameters:
|
|
+
|
|
+ dtparam=i2c=on,i2s=on,spi=on
|
|
+
|
|
+However, this shouldn't be necessary in many use cases because loading an
|
|
+overlay that requires one of those interfaces will cause it to be enabled
|
|
+automatically, and it is advisable to only enable interfaces if they are
|
|
+needed.
|
|
+
|
|
+Configuring additional, optional hardware is done using Device Tree overlays
|
|
+(see below).
|
|
+
|
|
+GPIO numbering uses the hardware pin numbering scheme (aka BCM scheme) and
|
|
+not the physical pin numbers.
|
|
+
|
|
+raspi-config
|
|
+============
|
|
+
|
|
+The Advanced Options section of the raspi-config utility can enable and disable
|
|
+Device Tree use, as well as toggling the I2C and SPI interfaces. Note that it
|
|
+is possible to both enable an interface and blacklist the driver, if for some
|
|
+reason you should want to defer the loading.
|
|
+
|
|
+Modules
|
|
+=======
|
|
+
|
|
+As well as describing the hardware, Device Tree also gives enough information
|
|
+to allow suitable driver modules to be located and loaded, with the corollary
|
|
+that unneeded modules are not loaded. As a result it should be possible to
|
|
+remove lines from /etc/modules, and /etc/modprobe.d/raspi-blacklist.conf can
|
|
+have its contents deleted (or commented out).
|
|
+
|
|
+Using Overlays
|
|
+==============
|
|
+
|
|
+Overlays are loaded using the "dtoverlay" config.txt setting. As an example,
|
|
+consider I2C Real Time Clock drivers. In the pre-DT world these would be loaded
|
|
+by writing a magic string comprising a device identifier and an I2C address to
|
|
+a special file in /sys/class/i2c-adapter, having first loaded the driver for
|
|
+the I2C interface and the RTC device - something like this:
|
|
+
|
|
+ modprobe i2c-bcm2835
|
|
+ modprobe rtc-ds1307
|
|
+ echo ds1307 0x68 > /sys/class/i2c-adapter/i2c-1/new_device
|
|
+
|
|
+With DT enabled, this becomes a line in config.txt:
|
|
+
|
|
+ dtoverlay=i2c-rtc,ds1307
|
|
+
|
|
+This causes the file /boot/overlays/i2c-rtc.dtbo to be loaded and a "node"
|
|
+describing the DS1307 I2C device to be added to the Device Tree for the Pi. By
|
|
+default it usees address 0x68, but this can be modified with an additional DT
|
|
+parameter:
|
|
+
|
|
+ dtoverlay=i2c-rtc,ds1307,addr=0x68
|
|
+
|
|
+Parameters usually have default values, although certain parameters are
|
|
+mandatory. See the list of overlays below for a description of the parameters
|
|
+and their defaults.
|
|
+
|
|
+Making new Overlays based on existing Overlays
|
|
+==============================================
|
|
+
|
|
+Recent overlays have been designed in a more general way, so that they can be
|
|
+adapted to hardware by changing their parameters. When you have additional
|
|
+hardware with more than one device of a kind, you end up using the same overlay
|
|
+multiple times with other parameters, e.g.
|
|
+
|
|
+ # 2 CAN FD interfaces on spi but with different pins
|
|
+ dtoverlay=mcp251xfd,spi0-0,interrupt=25
|
|
+ dtoverlay=mcp251xfd,spi0-1,interrupt=24
|
|
+
|
|
+ # a realtime clock on i2c
|
|
+ dtoverlay=i2c-rtc,pcf85063
|
|
+
|
|
+While this approach does work, it requires knowledge about the hardware design.
|
|
+It is more feasible to simplify things for the end user by providing a single
|
|
+overlay as it is done the traditional way.
|
|
+
|
|
+A new overlay can be generated by using ovmerge utility.
|
|
+https://github.com/raspberrypi/utils/blob/master/ovmerge/ovmerge
|
|
+
|
|
+To generate an overlay for the above configuration we pass the configuration
|
|
+to ovmerge and add the -c flag.
|
|
+
|
|
+ ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 \
|
|
+ mcp251xfd-overlay.dts,spi0-1,interrupt=24 \
|
|
+ i2c-rtc-overlay.dts,pcf85063 \
|
|
+ >> merged-overlay.dts
|
|
+
|
|
+The -c option writes the command above as a comment into the overlay as
|
|
+a marker that this overlay is generated and how it was generated.
|
|
+After compiling the overlay it can be loaded in a single line.
|
|
+
|
|
+ dtoverlay=merged
|
|
+
|
|
+It does the same as the original configuration but without parameters.
|
|
+
|
|
+The Overlay and Parameter Reference
|
|
+===================================
|
|
+
|
|
+N.B. When editing this file, please preserve the indentation levels to make it
|
|
+simple to parse programmatically. NO HARD TABS.
|
|
+
|
|
+
|
|
+Name: <The base DTB>
|
|
+Info: Configures the base Raspberry Pi hardware
|
|
+Load: <loaded automatically>
|
|
+Params:
|
|
+ ant1 Select antenna 1 (default). CM4 only.
|
|
+
|
|
+ ant2 Select antenna 2. CM4 only.
|
|
+
|
|
+ noant Disable both antennas. CM4 only.
|
|
+
|
|
+ audio Set to "on" to enable the onboard ALSA audio
|
|
+ interface (default "off")
|
|
+
|
|
+ axiperf Set to "on" to enable the AXI bus performance
|
|
+ monitors.
|
|
+ See /sys/kernel/debug/raspberrypi_axi_monitor
|
|
+ for the results.
|
|
+
|
|
+ eee Enable Energy Efficient Ethernet support for
|
|
+ compatible devices (default "on"). See also
|
|
+ "tx_lpi_timer". Pi3B+ only.
|
|
+
|
|
+ eth_downshift_after Set the number of auto-negotiation failures
|
|
+ after which the 1000Mbps modes are disabled.
|
|
+ Legal values are 2, 3, 4, 5 and 0, where
|
|
+ 0 means never downshift (default 2). Pi3B+ only.
|
|
+
|
|
+ eth_led0 Set mode of LED0 - amber on Pi3B+ (default "1"),
|
|
+ green on Pi4 (default "0").
|
|
+ The legal values are:
|
|
+
|
|
+ Pi3B+
|
|
+
|
|
+ 0=link/activity 1=link1000/activity
|
|
+ 2=link100/activity 3=link10/activity
|
|
+ 4=link100/1000/activity 5=link10/1000/activity
|
|
+ 6=link10/100/activity 14=off 15=on
|
|
+
|
|
+ Pi4
|
|
+
|
|
+ 0=Speed/Activity 1=Speed
|
|
+ 2=Flash activity 3=FDX
|
|
+ 4=Off 5=On
|
|
+ 6=Alt 7=Speed/Flash
|
|
+ 8=Link 9=Activity
|
|
+
|
|
+ eth_led1 Set mode of LED1 - green on Pi3B+ (default "6"),
|
|
+ amber on Pi4 (default "8"). See eth_led0 for
|
|
+ legal values.
|
|
+
|
|
+ eth_max_speed Set the maximum speed a link is allowed
|
|
+ to negotiate. Legal values are 10, 100 and
|
|
+ 1000 (default 1000). Pi3B+ only.
|
|
+
|
|
+ i2c_arm Set to "on" to enable the ARM's i2c interface
|
|
+ (default "off")
|
|
+
|
|
+ i2c_vc Set to "on" to enable the i2c interface
|
|
+ usually reserved for the VideoCore processor
|
|
+ (default "off")
|
|
+
|
|
+ i2c An alias for i2c_arm
|
|
+
|
|
+ i2c_arm_baudrate Set the baudrate of the ARM's i2c interface
|
|
+ (default "100000")
|
|
+
|
|
+ i2c_vc_baudrate Set the baudrate of the VideoCore i2c interface
|
|
+ (default "100000")
|
|
+
|
|
+ i2c_baudrate An alias for i2c_arm_baudrate
|
|
+
|
|
+ i2s Set to "on" to enable the i2s interface
|
|
+ (default "off")
|
|
+
|
|
+ krnbt Set to "on" to enable autoprobing of Bluetooth
|
|
+ driver without need of hciattach/btattach
|
|
+ (default "off")
|
|
+
|
|
+ krnbt_baudrate Set the baudrate of the PL011 UART when used
|
|
+ with krnbt=on
|
|
+
|
|
+ spi Set to "on" to enable the spi interfaces
|
|
+ (default "off")
|
|
+
|
|
+ spi_dma4 Use to enable 40-bit DMA on spi interfaces
|
|
+ (the assigned value doesn't matter)
|
|
+ (2711 only)
|
|
+
|
|
+ random Set to "on" to enable the hardware random
|
|
+ number generator (default "on")
|
|
+
|
|
+ sd_overclock Clock (in MHz) to use when the MMC framework
|
|
+ requests 50MHz
|
|
+
|
|
+ sd_poll_once Looks for a card once after booting. Useful
|
|
+ for network booting scenarios to avoid the
|
|
+ overhead of continuous polling. N.B. Using
|
|
+ this option restricts the system to using a
|
|
+ single card per boot (or none at all).
|
|
+ (default off)
|
|
+
|
|
+ sd_force_pio Disable DMA support for SD driver (default off)
|
|
+
|
|
+ sd_pio_limit Number of blocks above which to use DMA for
|
|
+ SD card (default 1)
|
|
+
|
|
+ sd_debug Enable debug output from SD driver (default off)
|
|
+
|
|
+ sdio_overclock Clock (in MHz) to use when the MMC framework
|
|
+ requests 50MHz for the SDIO/WLAN interface.
|
|
+
|
|
+ tx_lpi_timer Set the delay in microseconds between going idle
|
|
+ and entering the low power state (default 600).
|
|
+ Requires EEE to be enabled - see "eee".
|
|
+
|
|
+ uart0 Set to "off" to disable uart0 (default "on")
|
|
+
|
|
+ uart1 Set to "on" or "off" to enable or disable uart1
|
|
+ (default varies)
|
|
+
|
|
+ watchdog Set to "on" to enable the hardware watchdog
|
|
+ (default "off")
|
|
+
|
|
+ act_led_trigger Choose which activity the LED tracks.
|
|
+ Use "heartbeat" for a nice load indicator.
|
|
+ (default "mmc")
|
|
+
|
|
+ act_led_activelow Set to "on" to invert the sense of the LED
|
|
+ (default "off")
|
|
+ N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led
|
|
+ overlay.
|
|
+
|
|
+ act_led_gpio Set which GPIO to use for the activity LED
|
|
+ (in case you want to connect it to an external
|
|
+ device)
|
|
+ (default "16" on a non-Plus board, "47" on a
|
|
+ Plus or Pi 2)
|
|
+ N.B. For Pi 3B, 3B+, 3A+ and 4B, use the act-led
|
|
+ overlay.
|
|
+
|
|
+ pwr_led_trigger
|
|
+ pwr_led_activelow
|
|
+ pwr_led_gpio
|
|
+ As for act_led_*, but using the PWR LED.
|
|
+ Not available on Model A/B boards.
|
|
+
|
|
+ N.B. It is recommended to only enable those interfaces that are needed.
|
|
+ Leaving all interfaces enabled can lead to unwanted behaviour (i2c_vc
|
|
+ interfering with Pi Camera, I2S and SPI hogging GPIO pins, etc.)
|
|
+ Note also that i2c, i2c_arm and i2c_vc are aliases for the physical
|
|
+ interfaces i2c0 and i2c1. Use of the numeric variants is still possible
|
|
+ but deprecated because the ARM/VC assignments differ between board
|
|
+ revisions. The same board-specific mapping applies to i2c_baudrate,
|
|
+ and the other i2c baudrate parameters.
|
|
+
|
|
+
|
|
+Name: act-led
|
|
+Info: Pi 3B, 3B+, 3A+ and 4B use a GPIO expander to drive the LEDs which can
|
|
+ only be accessed from the VPU. There is a special driver for this with a
|
|
+ separate DT node, which has the unfortunate consequence of breaking the
|
|
+ act_led_gpio and act_led_activelow dtparams.
|
|
+ This overlay changes the GPIO controller back to the standard one and
|
|
+ restores the dtparams.
|
|
+Load: dtoverlay=act-led,<param>=<val>
|
|
+Params: activelow Set to "on" to invert the sense of the LED
|
|
+ (default "off")
|
|
+
|
|
+ gpio Set which GPIO to use for the activity LED
|
|
+ (in case you want to connect it to an external
|
|
+ device)
|
|
+ REQUIRED
|
|
+
|
|
+
|
|
+Name: adafruit18
|
|
+Info: Overlay for the SPI-connected Adafruit 1.8" display (based on the
|
|
+ ST7735R chip). It includes support for the "green tab" version.
|
|
+Load: dtoverlay=adafruit18,<param>=<val>
|
|
+Params: green Use the adafruit18_green variant.
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+ speed SPI bus speed in Hz (default 4000000)
|
|
+ fps Display frame rate in Hz
|
|
+ bgr Enable BGR mode (default off)
|
|
+ debug Debug output level {0-7}
|
|
+ dc_pin GPIO pin for D/C (default 24)
|
|
+ reset_pin GPIO pin for RESET (default 25)
|
|
+ led_pin GPIO used to control backlight (default 18)
|
|
+
|
|
+
|
|
+Name: adau1977-adc
|
|
+Info: Overlay for activation of ADAU1977 ADC codec over I2C for control
|
|
+ and I2S for data.
|
|
+Load: dtoverlay=adau1977-adc
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: adau7002-simple
|
|
+Info: Overlay for the activation of ADAU7002 stereo PDM to I2S converter.
|
|
+Load: dtoverlay=adau7002-simple,<param>=<val>
|
|
+Params: card-name Override the default, "adau7002", card name.
|
|
+
|
|
+
|
|
+Name: ads1015
|
|
+Info: Overlay for activation of Texas Instruments ADS1015 ADC over I2C
|
|
+Load: dtoverlay=ads1015,<param>=<val>
|
|
+Params: addr I2C bus address of device. Set based on how the
|
|
+ addr pin is wired. (default=0x48 assumes addr
|
|
+ is pulled to GND)
|
|
+ cha_enable Enable virtual channel a. (default=true)
|
|
+ cha_cfg Set the configuration for virtual channel a.
|
|
+ (default=4 configures this channel for the
|
|
+ voltage at A0 with respect to GND)
|
|
+ cha_datarate Set the datarate (samples/sec) for this channel.
|
|
+ (default=4 sets 1600 sps)
|
|
+ cha_gain Set the gain of the Programmable Gain
|
|
+ Amplifier for this channel. (default=2 sets the
|
|
+ full scale of the channel to 2.048 Volts)
|
|
+
|
|
+ Channel (ch) parameters can be set for each enabled channel.
|
|
+ A maximum of 4 channels can be enabled (letters a thru d).
|
|
+ For more information refer to the device datasheet at:
|
|
+ http://www.ti.com/lit/ds/symlink/ads1015.pdf
|
|
+
|
|
+
|
|
+Name: ads1115
|
|
+Info: Texas Instruments ADS1115 ADC
|
|
+Load: dtoverlay=ads1115,<param>[=<val>]
|
|
+Params: addr I2C bus address of device. Set based on how the
|
|
+ addr pin is wired. (default=0x48 assumes addr
|
|
+ is pulled to GND)
|
|
+ cha_enable Enable virtual channel a.
|
|
+ cha_cfg Set the configuration for virtual channel a.
|
|
+ (default=4 configures this channel for the
|
|
+ voltage at A0 with respect to GND)
|
|
+ cha_datarate Set the datarate (samples/sec) for this channel.
|
|
+ (default=7 sets 860 sps)
|
|
+ cha_gain Set the gain of the Programmable Gain
|
|
+ Amplifier for this channel. (Default 1 sets the
|
|
+ full scale of the channel to 4.096 Volts)
|
|
+
|
|
+ Channel parameters can be set for each enabled channel.
|
|
+ A maximum of 4 channels can be enabled (letters a thru d).
|
|
+ For more information refer to the device datasheet at:
|
|
+ http://www.ti.com/lit/ds/symlink/ads1115.pdf
|
|
+
|
|
+
|
|
+Name: ads7846
|
|
+Info: ADS7846 Touch controller
|
|
+Load: dtoverlay=ads7846,<param>=<val>
|
|
+Params: cs SPI bus Chip Select (default 1)
|
|
+ speed SPI bus speed (default 2MHz, max 3.25MHz)
|
|
+ penirq GPIO used for PENIRQ. REQUIRED
|
|
+ penirq_pull Set GPIO pull (default 0=none, 2=pullup)
|
|
+ swapxy Swap x and y axis
|
|
+ xmin Minimum value on the X axis (default 0)
|
|
+ ymin Minimum value on the Y axis (default 0)
|
|
+ xmax Maximum value on the X axis (default 4095)
|
|
+ ymax Maximum value on the Y axis (default 4095)
|
|
+ pmin Minimum reported pressure value (default 0)
|
|
+ pmax Maximum reported pressure value (default 65535)
|
|
+ xohms Touchpanel sensitivity (X-plate resistance)
|
|
+ (default 400)
|
|
+
|
|
+ penirq is required and usually xohms (60-100) has to be set as well.
|
|
+ Apart from that, pmax (255) and swapxy are also common.
|
|
+ The rest of the calibration can be done with xinput-calibrator.
|
|
+ See: github.com/notro/fbtft/wiki/FBTFT-on-Raspian
|
|
+ Device Tree binding document:
|
|
+ www.kernel.org/doc/Documentation/devicetree/bindings/input/ads7846.txt
|
|
+
|
|
+
|
|
+Name: adv7282m
|
|
+Info: Analog Devices ADV7282M analogue video to CSI2 bridge.
|
|
+ Uses Unicam1, which is the standard camera connector on most Pi
|
|
+ variants.
|
|
+Load: dtoverlay=adv7282m,<param>=<val>
|
|
+Params: addr Overrides the I2C address (default 0x21)
|
|
+
|
|
+
|
|
+Name: adv728x-m
|
|
+Info: Analog Devices ADV728[0|1|2]-M analogue video to CSI2 bridges.
|
|
+ This is a wrapper for adv7282m, and defaults to ADV7282M.
|
|
+Load: dtoverlay=adv728x-m,<param>=<val>
|
|
+Params: addr Overrides the I2C address (default 0x21)
|
|
+ adv7280m Select ADV7280-M.
|
|
+ adv7281m Select ADV7281-M.
|
|
+ adv7281ma Select ADV7281-MA.
|
|
+
|
|
+
|
|
+Name: akkordion-iqdacplus
|
|
+Info: Configures the Digital Dreamtime Akkordion Music Player (based on the
|
|
+ OEM IQAudIO DAC+ or DAC Zero module).
|
|
+Load: dtoverlay=akkordion-iqdacplus,<param>=<val>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control. Enable with
|
|
+ dtoverlay=akkordion-iqdacplus,24db_digital_gain
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24db_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+
|
|
+
|
|
+Name: allo-boss-dac-pcm512x-audio
|
|
+Info: Configures the Allo Boss DAC audio cards.
|
|
+Load: dtoverlay=allo-boss-dac-pcm512x-audio,<param>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control. Enable with
|
|
+ "dtoverlay=allo-boss-dac-pcm512x-audio,
|
|
+ 24db_digital_gain"
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24db_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+ slave Force Boss DAC into slave mode, using Pi a
|
|
+ master for bit clock and frame clock. Enable
|
|
+ with "dtoverlay=allo-boss-dac-pcm512x-audio,
|
|
+ slave"
|
|
+
|
|
+
|
|
+Name: allo-boss2-dac-audio
|
|
+Info: Configures the Allo Boss2 DAC audio card
|
|
+Load: dtoverlay=allo-boss2-dac-audio
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: allo-digione
|
|
+Info: Configures the Allo Digione audio card
|
|
+Load: dtoverlay=allo-digione
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: allo-katana-dac-audio
|
|
+Info: Configures the Allo Katana DAC audio card
|
|
+Load: dtoverlay=allo-katana-dac-audio
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: allo-piano-dac-pcm512x-audio
|
|
+Info: Configures the Allo Piano DAC (2.0/2.1) audio cards.
|
|
+ (NB. This initial support is for 2.0 channel audio ONLY! ie. stereo.
|
|
+ The subwoofer outputs on the Piano 2.1 are not currently supported!)
|
|
+Load: dtoverlay=allo-piano-dac-pcm512x-audio,<param>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control.
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24db_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+
|
|
+
|
|
+Name: allo-piano-dac-plus-pcm512x-audio
|
|
+Info: Configures the Allo Piano DAC (2.1) audio cards.
|
|
+Load: dtoverlay=allo-piano-dac-plus-pcm512x-audio,<param>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control.
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24db_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+ glb_mclk This option is only with Kali board. If enabled,
|
|
+ MCLK for Kali is used and PLL is disabled for
|
|
+ better voice quality. (default Off)
|
|
+
|
|
+
|
|
+Name: anyspi
|
|
+Info: Universal device tree overlay for SPI devices
|
|
+
|
|
+ Just specify the SPI address and device name ("compatible" property).
|
|
+ This overlay lacks any device-specific parameter support!
|
|
+
|
|
+ For devices on spi1 or spi2, the interfaces should be enabled
|
|
+ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
|
|
+
|
|
+ Examples:
|
|
+ 1. SPI NOR flash on spi0.1, maximum SPI clock frequency 45MHz:
|
|
+ dtoverlay=anyspi:spi0-1,dev="jedec,spi-nor",speed=45000000
|
|
+ 2. MCP3204 ADC on spi1.2, maximum SPI clock frequency 500kHz:
|
|
+ dtoverlay=anyspi:spi1-2,dev="microchip,mcp3204"
|
|
+Load: dtoverlay=anyspi,<param>=<val>
|
|
+Params: spi<n>-<m> Configure device at spi<n>, cs<m>
|
|
+ (boolean, required)
|
|
+ dev Set device name to search compatible module
|
|
+ (string, required)
|
|
+ speed Set SPI clock frequency in Hz
|
|
+ (integer, optional, default 500000)
|
|
+
|
|
+
|
|
+Name: apds9960
|
|
+Info: Configures the AVAGO APDS9960 digital proximity, ambient light, RGB and
|
|
+ gesture sensor
|
|
+Load: dtoverlay=apds9960,<param>=<val>
|
|
+Params: gpiopin GPIO used for INT (default 4)
|
|
+ noints Disable the interrupt GPIO line.
|
|
+
|
|
+
|
|
+Name: applepi-dac
|
|
+Info: Configures the Orchard Audio ApplePi-DAC audio card
|
|
+Load: dtoverlay=applepi-dac
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: at86rf233
|
|
+Info: Configures the Atmel AT86RF233 802.15.4 low-power WPAN transceiver,
|
|
+ connected to spi0.0
|
|
+Load: dtoverlay=at86rf233,<param>=<val>
|
|
+Params: interrupt GPIO used for INT (default 23)
|
|
+ reset GPIO used for Reset (default 24)
|
|
+ sleep GPIO used for Sleep (default 25)
|
|
+ speed SPI bus speed in Hz (default 3000000)
|
|
+ trim Fine tuning of the internal capacitance
|
|
+ arrays (0=+0pF, 15=+4.5pF, default 15)
|
|
+
|
|
+
|
|
+Name: audioinjector-addons
|
|
+Info: Configures the audioinjector.net audio add on soundcards
|
|
+Load: dtoverlay=audioinjector-addons,<param>=<val>
|
|
+Params: non-stop-clocks Keeps the clocks running even when the stream
|
|
+ is paused or stopped (default off)
|
|
+
|
|
+
|
|
+Name: audioinjector-isolated-soundcard
|
|
+Info: Configures the audioinjector.net isolated soundcard
|
|
+Load: dtoverlay=audioinjector-isolated-soundcard
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: audioinjector-ultra
|
|
+Info: Configures the audioinjector.net ultra soundcard
|
|
+Load: dtoverlay=audioinjector-ultra
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: audioinjector-wm8731-audio
|
|
+Info: Configures the audioinjector.net audio add on soundcard
|
|
+Load: dtoverlay=audioinjector-wm8731-audio
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: audiosense-pi
|
|
+Info: Configures the audiosense-pi add on soundcard
|
|
+ For more information refer to
|
|
+ https://gitlab.com/kakar0t/audiosense-pi
|
|
+Load: dtoverlay=audiosense-pi
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: audremap
|
|
+Info: Switches PWM sound output to GPIOs on the 40-pin header
|
|
+Load: dtoverlay=audremap,<param>=<val>
|
|
+Params: swap_lr Reverse the channel allocation, which will also
|
|
+ swap the audio jack outputs (default off)
|
|
+ enable_jack Don't switch off the audio jack output
|
|
+ (default off)
|
|
+ pins_12_13 Select GPIOs 12 & 13 (default)
|
|
+ pins_18_19 Select GPIOs 18 & 19
|
|
+
|
|
+
|
|
+Name: balena-fin
|
|
+Info: Overlay that enables WLAN, Bluetooth and the GPIO expander on the
|
|
+ balenaFin carrier board for the Raspberry Pi Compute Module 3/3+ Lite.
|
|
+Load: dtoverlay=balena-fin
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: bmp085_i2c-sensor
|
|
+Info: This overlay is now deprecated - see i2c-sensor
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: cap1106
|
|
+Info: Enables the ability to use the cap1106 touch sensor as a keyboard
|
|
+Load: dtoverlay=cap1106,<param>=<val>
|
|
+Params: int_pin GPIO pin for interrupt signal (default 23)
|
|
+
|
|
+
|
|
+Name: chipdip-dac
|
|
+Info: Configures Chip Dip audio cards.
|
|
+Load: dtoverlay=chipdip-dac
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: cma
|
|
+Info: Set custom CMA sizes, only use if you know what you are doing, might
|
|
+ clash with other overlays like vc4-fkms-v3d and vc4-kms-v3d.
|
|
+Load: dtoverlay=cma,<param>=<val>
|
|
+Params: cma-512 CMA is 512MB (needs 1GB)
|
|
+ cma-448 CMA is 448MB (needs 1GB)
|
|
+ cma-384 CMA is 384MB (needs 1GB)
|
|
+ cma-320 CMA is 320MB (needs 1GB)
|
|
+ cma-256 CMA is 256MB (needs 1GB)
|
|
+ cma-192 CMA is 192MB (needs 1GB)
|
|
+ cma-128 CMA is 128MB
|
|
+ cma-96 CMA is 96MB
|
|
+ cma-64 CMA is 64MB
|
|
+ cma-size CMA size in bytes, 4MB aligned
|
|
+ cma-default Use upstream's default value
|
|
+
|
|
+
|
|
+Name: dht11
|
|
+Info: Overlay for the DHT11/DHT21/DHT22 humidity/temperature sensors
|
|
+ Also sometimes found with the part number(s) AM230x.
|
|
+Load: dtoverlay=dht11,<param>=<val>
|
|
+Params: gpiopin GPIO connected to the sensor's DATA output.
|
|
+ (default 4)
|
|
+
|
|
+
|
|
+Name: dionaudio-loco
|
|
+Info: Configures the Dion Audio LOCO DAC-AMP
|
|
+Load: dtoverlay=dionaudio-loco
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: dionaudio-loco-v2
|
|
+Info: Configures the Dion Audio LOCO-V2 DAC-AMP
|
|
+Load: dtoverlay=dionaudio-loco-v2,<param>=<val>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control. Enable with
|
|
+ "dtoverlay=hifiberry-dacplus,24db_digital_gain"
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24dB_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+
|
|
+
|
|
+Name: disable-bt
|
|
+Info: Disable onboard Bluetooth on Pi 3B, 3B+, 3A+, 4B and Zero W, restoring
|
|
+ UART0/ttyAMA0 over GPIOs 14 & 15.
|
|
+ N.B. To disable the systemd service that initialises the modem so it
|
|
+ doesn't use the UART, use 'sudo systemctl disable hciuart'.
|
|
+Load: dtoverlay=disable-bt
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: disable-wifi
|
|
+Info: Disable onboard WLAN on Pi 3B, 3B+, 3A+, 4B and Zero W.
|
|
+Load: dtoverlay=disable-wifi
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: dpi18
|
|
+Info: Overlay for a generic 18-bit DPI display
|
|
+ This uses GPIOs 0-21 (so no I2C, uart etc.), and activates the output
|
|
+ 2-3 seconds after the kernel has started.
|
|
+Load: dtoverlay=dpi18
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: dpi18cpadhi
|
|
+Info: Overlay for a generic 18-bit DPI display (in 'mode 6' connection scheme)
|
|
+ This uses GPIOs 0-9,12-17,20-25 (so no I2C, uart etc.), and activates
|
|
+ the output 3-3 seconds after the kernel has started.
|
|
+Load: dtoverlay=dpi18cpadhi
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: dpi24
|
|
+Info: Overlay for a generic 24-bit DPI display
|
|
+ This uses GPIOs 0-27 (so no I2C, uart etc.), and activates the output
|
|
+ 2-3 seconds after the kernel has started.
|
|
+Load: dtoverlay=dpi24
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: draws
|
|
+Info: Configures the NW Digital Radio DRAWS Hat
|
|
+
|
|
+ The board includes an ADC to measure various board values and also
|
|
+ provides two analog user inputs on the expansion header. The ADC
|
|
+ can be configured for various sample rates and gain values to adjust
|
|
+ the input range. Tables describing the two parameters follow.
|
|
+
|
|
+ ADC Gain Values:
|
|
+ 0 = +/- 6.144V
|
|
+ 1 = +/- 4.096V
|
|
+ 2 = +/- 2.048V
|
|
+ 3 = +/- 1.024V
|
|
+ 4 = +/- 0.512V
|
|
+ 5 = +/- 0.256V
|
|
+ 6 = +/- 0.256V
|
|
+ 7 = +/- 0.256V
|
|
+
|
|
+ ADC Datarate Values:
|
|
+ 0 = 128sps
|
|
+ 1 = 250sps
|
|
+ 2 = 490sps
|
|
+ 3 = 920sps
|
|
+ 4 = 1600sps (default)
|
|
+ 5 = 2400sps
|
|
+ 6 = 3300sps
|
|
+ 7 = 3300sps
|
|
+Load: dtoverlay=draws,<param>=<val>
|
|
+Params: draws_adc_ch4_gain Sets the full scale resolution of the ADCs
|
|
+ input voltage sensor (default 1)
|
|
+
|
|
+ draws_adc_ch4_datarate Sets the datarate of the ADCs input voltage
|
|
+ sensor
|
|
+
|
|
+ draws_adc_ch5_gain Sets the full scale resolution of the ADCs
|
|
+ 5V rail voltage sensor (default 1)
|
|
+
|
|
+ draws_adc_ch5_datarate Sets the datarate of the ADCs 4V rail voltage
|
|
+ sensor
|
|
+
|
|
+ draws_adc_ch6_gain Sets the full scale resolution of the ADCs
|
|
+ AIN2 input (default 2)
|
|
+
|
|
+ draws_adc_ch6_datarate Sets the datarate of the ADCs AIN2 input
|
|
+
|
|
+ draws_adc_ch7_gain Sets the full scale resolution of the ADCs
|
|
+ AIN3 input (default 2)
|
|
+
|
|
+ draws_adc_ch7_datarate Sets the datarate of the ADCs AIN3 input
|
|
+
|
|
+ alsaname Name of the ALSA audio device (default "draws")
|
|
+
|
|
+
|
|
+Name: dwc-otg
|
|
+Info: Selects the dwc_otg USB controller driver which has fiq support. This
|
|
+ is the default on all except the Pi Zero which defaults to dwc2.
|
|
+Load: dtoverlay=dwc-otg
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: dwc2
|
|
+Info: Selects the dwc2 USB controller driver
|
|
+Load: dtoverlay=dwc2,<param>=<val>
|
|
+Params: dr_mode Dual role mode: "host", "peripheral" or "otg"
|
|
+
|
|
+ g-rx-fifo-size Size of rx fifo size in gadget mode
|
|
+
|
|
+ g-np-tx-fifo-size Size of non-periodic tx fifo size in gadget
|
|
+ mode
|
|
+
|
|
+
|
|
+[ The ds1307-rtc overlay has been deleted. See i2c-rtc. ]
|
|
+
|
|
+
|
|
+Name: edt-ft5406
|
|
+Info: Overlay for the EDT FT5406 touchscreen on the CSI/DSI I2C interface.
|
|
+ This works with the Raspberry Pi 7" touchscreen when not being polled
|
|
+ by the firmware.
|
|
+ You MUST use either "disable_touchscreen=1" or "ignore_lcd=1" in
|
|
+ config.txt to stop the firmware polling the touchscreen.
|
|
+Load: dtoverlay=edt-ft5406,<param>=<val>
|
|
+Params: sizex Touchscreen size x (default 800)
|
|
+ sizey Touchscreen size y (default 480)
|
|
+ invx Touchscreen inverted x axis
|
|
+ invy Touchscreen inverted y axis
|
|
+ swapxy Touchscreen swapped x y axis
|
|
+
|
|
+
|
|
+Name: enc28j60
|
|
+Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI0
|
|
+Load: dtoverlay=enc28j60,<param>=<val>
|
|
+Params: int_pin GPIO used for INT (default 25)
|
|
+
|
|
+ speed SPI bus speed (default 12000000)
|
|
+
|
|
+
|
|
+Name: enc28j60-spi2
|
|
+Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI2
|
|
+Load: dtoverlay=enc28j60-spi2,<param>=<val>
|
|
+Params: int_pin GPIO used for INT (default 39)
|
|
+
|
|
+ speed SPI bus speed (default 12000000)
|
|
+
|
|
+
|
|
+Name: exc3000
|
|
+Info: Enables I2C connected EETI EXC3000 multiple touch controller using
|
|
+ GPIO 4 (pin 7 on GPIO header) for interrupt.
|
|
+Load: dtoverlay=exc3000,<param>=<val>
|
|
+Params: interrupt GPIO used for interrupt (default 4)
|
|
+ sizex Touchscreen size x (default 4096)
|
|
+ sizey Touchscreen size y (default 4096)
|
|
+ invx Touchscreen inverted x axis
|
|
+ invy Touchscreen inverted y axis
|
|
+ swapxy Touchscreen swapped x y axis
|
|
+
|
|
+
|
|
+Name: fe-pi-audio
|
|
+Info: Configures the Fe-Pi Audio Sound Card
|
|
+Load: dtoverlay=fe-pi-audio
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: fsm-demo
|
|
+Info: A demonstration of the gpio-fsm driver. The GPIOs are chosen to work
|
|
+ nicely with a "traffic-light" display of red, amber and green LEDs on
|
|
+ GPIOs 7, 8 and 25 respectively.
|
|
+Load: dtoverlay=fsm-demo,<param>=<val>
|
|
+Params: fsm_debug Enable debug logging (default off)
|
|
+
|
|
+
|
|
+Name: ghost-amp
|
|
+Info: An overlay for the Ghost amplifier.
|
|
+Load: dtoverlay=ghost-amp,<param>=<val>
|
|
+Params: fsm_debug Enable debug logging of the GPIO FSM (default
|
|
+ off)
|
|
+
|
|
+
|
|
+Name: goodix
|
|
+Info: Enables I2C connected Goodix gt9271 multiple touch controller using
|
|
+ GPIOs 4 and 17 (pins 7 and 11 on GPIO header) for interrupt and reset.
|
|
+Load: dtoverlay=goodix,<param>=<val>
|
|
+Params: interrupt GPIO used for interrupt (default 4)
|
|
+ reset GPIO used for reset (default 17)
|
|
+
|
|
+
|
|
+Name: googlevoicehat-soundcard
|
|
+Info: Configures the Google voiceHAT soundcard
|
|
+Load: dtoverlay=googlevoicehat-soundcard
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: gpio-fan
|
|
+Info: Configure a GPIO pin to control a cooling fan.
|
|
+Load: dtoverlay=gpio-fan,<param>=<val>
|
|
+Params: gpiopin GPIO used to control the fan (default 12)
|
|
+ temp Temperature at which the fan switches on, in
|
|
+ millicelcius (default 55000)
|
|
+
|
|
+
|
|
+Name: gpio-ir
|
|
+Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core-
|
|
+ based gpio_ir_recv driver maps received keys directly to a
|
|
+ /dev/input/event* device, all decoding is done by the kernel - LIRC is
|
|
+ not required! The key mapping and other decoding parameters can be
|
|
+ configured by "ir-keytable" tool.
|
|
+Load: dtoverlay=gpio-ir,<param>=<val>
|
|
+Params: gpio_pin Input pin number. Default is 18.
|
|
+
|
|
+ gpio_pull Desired pull-up/down state (off, down, up)
|
|
+ Default is "up".
|
|
+
|
|
+ invert "1" = invert the input (active-low signalling).
|
|
+ "0" = non-inverted input (active-high
|
|
+ signalling). Default is "1".
|
|
+
|
|
+ rc-map-name Default rc keymap (can also be changed by
|
|
+ ir-keytable), defaults to "rc-rc6-mce"
|
|
+
|
|
+
|
|
+Name: gpio-ir-tx
|
|
+Info: Use GPIO pin as bit-banged infrared transmitter output.
|
|
+ This is an alternative to "pwm-ir-tx". gpio-ir-tx doesn't require
|
|
+ a PWM so it can be used together with onboard analog audio.
|
|
+Load: dtoverlay=gpio-ir-tx,<param>=<val>
|
|
+Params: gpio_pin Output GPIO (default 18)
|
|
+
|
|
+ invert "1" = invert the output (make it active-low).
|
|
+ Default is "0" (active-high).
|
|
+
|
|
+
|
|
+Name: gpio-key
|
|
+Info: This is a generic overlay for activating GPIO keypresses using
|
|
+ the gpio-keys library and this dtoverlay. Multiple keys can be
|
|
+ set up using multiple calls to the overlay for configuring
|
|
+ additional buttons or joysticks. You can see available keycodes
|
|
+ at https://github.com/torvalds/linux/blob/v4.12/include/uapi/
|
|
+ linux/input-event-codes.h#L64
|
|
+Load: dtoverlay=gpio-key,<param>=<val>
|
|
+Params: gpio GPIO pin to trigger on (default 3)
|
|
+ active_low When this is 1 (active low), a falling
|
|
+ edge generates a key down event and a
|
|
+ rising edge generates a key up event.
|
|
+ When this is 0 (active high), this is
|
|
+ reversed. The default is 1 (active low)
|
|
+ gpio_pull Desired pull-up/down state (off, down, up)
|
|
+ Default is "up". Note that the default pin
|
|
+ (GPIO3) has an external pullup
|
|
+ label Set a label for the key
|
|
+ keycode Set the key code for the button
|
|
+
|
|
+
|
|
+
|
|
+Name: gpio-led
|
|
+Info: This is a generic overlay for activating LEDs (or any other component)
|
|
+ by a GPIO pin. Multiple LEDs can be set up using multiple calls to the
|
|
+ overlay. While there are many existing methods to activate LEDs on the
|
|
+ RPi, this method offers some advantages:
|
|
+ 1) Does not require any userspace programs.
|
|
+ 2) LEDs can be connected to the kernel's led-trigger framework,
|
|
+ and drive the LED based on triggers such as cpu load, heartbeat,
|
|
+ kernel panic, key input, timers and others.
|
|
+ 3) LED can be tied to the input state of another GPIO pin.
|
|
+ 4) The LED is setup early during the kernel boot process (useful
|
|
+ for cpu/heartbeat/panic triggers).
|
|
+
|
|
+ Typical electrical connection is:
|
|
+ RPI-GPIO.19 -> LED -> 300ohm resister -> RPI-GND
|
|
+ The GPIO pin number can be changed with the 'gpio=' parameter.
|
|
+
|
|
+ To control an LED from userspace, write a 0 or 1 value:
|
|
+ echo 1 > /sys/class/leds/myled1/brightness
|
|
+ The 'myled1' name can be changed with the 'label=' parameter.
|
|
+
|
|
+ To connect the LED to a kernel trigger from userspace:
|
|
+ echo cpu > /sys/class/leds/myled1/trigger
|
|
+ echo heartbeat > /sys/class/leds/myled1/trigger
|
|
+ echo none > /sys/class/leds/myled1/trigger
|
|
+ To connect the LED to GPIO.26 pin (physical pin 37):
|
|
+ echo gpio > /sys/class/leds/myled1/trigger
|
|
+ echo 26 > /sys/class/leds/myled1/gpio
|
|
+ Available triggers:
|
|
+ cat /sys/class/leds/myled1/trigger
|
|
+
|
|
+ More information about the Linux kernel LED/Trigger system:
|
|
+ https://www.kernel.org/doc/Documentation/leds/leds-class.rst
|
|
+ https://www.kernel.org/doc/Documentation/leds/ledtrig-oneshot.rst
|
|
+Load: dtoverlay=gpio-led,<param>=<val>
|
|
+Params: gpio GPIO pin connected to the LED (default 19)
|
|
+ label The label for this LED. It will appear under
|
|
+ /sys/class/leds/<label> . Default 'myled1'.
|
|
+ trigger Set the led-trigger to connect to this LED.
|
|
+ default 'none' (LED is user-controlled).
|
|
+ Some possible triggers:
|
|
+ cpu - CPU load (all CPUs)
|
|
+ cpu0 - CPU load of first CPU.
|
|
+ mmc - disk activity (all disks)
|
|
+ panic - turn on on kernel panic
|
|
+ heartbeat - indicate system health
|
|
+ gpio - connect to a GPIO input pin (note:
|
|
+ currently the GPIO PIN can not be set
|
|
+ using overlay parameters, must be
|
|
+ done in userspace, see examples above.
|
|
+ active_low Set to 1 to turn invert the LED control
|
|
+ (writing 0 to /sys/class/leds/XXX/brightness
|
|
+ will turn on the GPIO/LED). Default '0'.
|
|
+
|
|
+
|
|
+Name: gpio-no-bank0-irq
|
|
+Info: Use this overlay to disable GPIO interrupts for GPIOs in bank 0 (0-27),
|
|
+ which can be useful for UIO drivers.
|
|
+ N.B. Using this overlay will trigger a kernel WARN during booting, but
|
|
+ this can safely be ignored - the system should work as expected.
|
|
+Load: dtoverlay=gpio-no-bank0-irq
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: gpio-no-irq
|
|
+Info: Use this overlay to disable all GPIO interrupts, which can be useful
|
|
+ for user-space GPIO edge detection systems.
|
|
+Load: dtoverlay=gpio-no-irq
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: gpio-poweroff
|
|
+Info: Drives a GPIO high or low on poweroff (including halt). Using this
|
|
+ overlay interferes with the normal power-down sequence, preventing the
|
|
+ kernel from resetting the SoC (a necessary step in a normal power-off
|
|
+ or reboot). This also disables the ability to trigger a boot by driving
|
|
+ GPIO3 low.
|
|
+
|
|
+ Users of this overlay are required to provide an external mechanism to
|
|
+ switch off the power supply when signalled - failure to do so results
|
|
+ in a kernel BUG, increased power consumption and undefined behaviour.
|
|
+Load: dtoverlay=gpio-poweroff,<param>=<val>
|
|
+Params: gpiopin GPIO for signalling (default 26)
|
|
+
|
|
+ active_low Set if the power control device requires a
|
|
+ high->low transition to trigger a power-down.
|
|
+ Note that this will require the support of a
|
|
+ custom dt-blob.bin to prevent a power-down
|
|
+ during the boot process, and that a reboot
|
|
+ will also cause the pin to go low.
|
|
+ input Set if the gpio pin should be configured as
|
|
+ an input.
|
|
+ export Set to export the configured pin to sysfs
|
|
+ timeout_ms Specify (in ms) how long the kernel waits for
|
|
+ power-down before issuing a WARN (default 3000).
|
|
+
|
|
+
|
|
+Name: gpio-shutdown
|
|
+Info: Initiates a shutdown when GPIO pin changes. The given GPIO pin
|
|
+ is configured as an input key that generates KEY_POWER events.
|
|
+
|
|
+ This event is handled by systemd-logind by initiating a
|
|
+ shutdown. Systemd versions older than 225 need an udev rule
|
|
+ enable listening to the input device:
|
|
+
|
|
+ ACTION!="REMOVE", SUBSYSTEM=="input", KERNEL=="event*", \
|
|
+ SUBSYSTEMS=="platform", DRIVERS=="gpio-keys", \
|
|
+ ATTRS{keys}=="116", TAG+="power-switch"
|
|
+
|
|
+ Alternatively this event can be handled also on systems without
|
|
+ systemd, just by traditional SysV init daemon. KEY_POWER event
|
|
+ (keycode 116) needs to be mapped to KeyboardSignal on console
|
|
+ and then kb::kbrequest inittab action which is triggered by
|
|
+ KeyboardSignal from console can be configured to issue system
|
|
+ shutdown. Steps for this configuration are:
|
|
+
|
|
+ Add following lines to the /etc/console-setup/remap.inc file:
|
|
+
|
|
+ # Key Power as special keypress
|
|
+ keycode 116 = KeyboardSignal
|
|
+
|
|
+ Then add following lines to /etc/inittab file:
|
|
+
|
|
+ # Action on special keypress (Key Power)
|
|
+ kb::kbrequest:/sbin/shutdown -t1 -a -h -P now
|
|
+
|
|
+ And finally reload configuration by calling following commands:
|
|
+
|
|
+ # dpkg-reconfigure console-setup
|
|
+ # service console-setup reload
|
|
+ # init q
|
|
+
|
|
+ This overlay only handles shutdown. After shutdown, the system
|
|
+ can be powered up again by driving GPIO3 low. The default
|
|
+ configuration uses GPIO3 with a pullup, so if you connect a
|
|
+ button between GPIO3 and GND (pin 5 and 6 on the 40-pin header),
|
|
+ you get a shutdown and power-up button. Please note that
|
|
+ Raspberry Pi 1 Model B rev 1 uses GPIO1 instead of GPIO3.
|
|
+Load: dtoverlay=gpio-shutdown,<param>=<val>
|
|
+Params: gpio_pin GPIO pin to trigger on (default 3)
|
|
+ For Raspberry Pi 1 Model B rev 1 set this
|
|
+ explicitly to value 1, e.g.:
|
|
+
|
|
+ dtoverlay=gpio-shutdown,gpio_pin=1
|
|
+
|
|
+ active_low When this is 1 (active low), a falling
|
|
+ edge generates a key down event and a
|
|
+ rising edge generates a key up event.
|
|
+ When this is 0 (active high), this is
|
|
+ reversed. The default is 1 (active low).
|
|
+
|
|
+ gpio_pull Desired pull-up/down state (off, down, up)
|
|
+ Default is "up".
|
|
+
|
|
+ Note that the default pin (GPIO3) has an
|
|
+ external pullup. Same applies for GPIO1
|
|
+ on Raspberry Pi 1 Model B rev 1.
|
|
+
|
|
+ debounce Specify the debounce interval in milliseconds
|
|
+ (default 100)
|
|
+
|
|
+
|
|
+Name: hd44780-lcd
|
|
+Info: Configures an HD44780 compatible LCD display. Uses 4 gpio pins for
|
|
+ data, 2 gpio pins for enable and register select and 1 optional pin
|
|
+ for enabling/disabling the backlight display.
|
|
+Load: dtoverlay=hd44780-lcd,<param>=<val>
|
|
+Params: pin_d4 GPIO pin for data pin D4 (default 6)
|
|
+
|
|
+ pin_d5 GPIO pin for data pin D5 (default 13)
|
|
+
|
|
+ pin_d6 GPIO pin for data pin D6 (default 19)
|
|
+
|
|
+ pin_d7 GPIO pin for data pin D7 (default 26)
|
|
+
|
|
+ pin_en GPIO pin for "Enable" (default 21)
|
|
+
|
|
+ pin_rs GPIO pin for "Register Select" (default 20)
|
|
+
|
|
+ pin_bl Optional pin for enabling/disabling the
|
|
+ display backlight. (default disabled)
|
|
+
|
|
+ display_height Height of the display in characters
|
|
+
|
|
+ display_width Width of the display in characters
|
|
+
|
|
+
|
|
+Name: hdmi-backlight-hwhack-gpio
|
|
+Info: Devicetree overlay for GPIO based backlight on/off capability.
|
|
+ Use this if you have one of those HDMI displays whose backlight cannot
|
|
+ be controlled via DPMS over HDMI and plan to do a little soldering to
|
|
+ use an RPi gpio pin for on/off switching. See:
|
|
+ https://www.waveshare.com/wiki/7inch_HDMI_LCD_(C)#Backlight_Control
|
|
+Load: dtoverlay=hdmi-backlight-hwhack-gpio,<param>=<val>
|
|
+Params: gpio_pin GPIO pin used (default 17)
|
|
+ active_low Set this to 1 if the display backlight is
|
|
+ switched on when the wire goes low.
|
|
+ Leave the default (value 0) if the backlight
|
|
+ expects a high to switch it on.
|
|
+
|
|
+
|
|
+Name: hifiberry-amp
|
|
+Info: Configures the HifiBerry Amp and Amp+ audio cards
|
|
+Load: dtoverlay=hifiberry-amp
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: hifiberry-amp100
|
|
+Info: Configures the HifiBerry AMP100 audio card
|
|
+Load: dtoverlay=hifiberry-amp100,<param>=<val>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control. Enable with
|
|
+ "dtoverlay=hifiberry-amp100,24db_digital_gain"
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24dB_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+ slave Force DAC+ Pro into slave mode, using Pi as
|
|
+ master for bit clock and frame clock.
|
|
+ leds_off If set to 'true' the onboard indicator LEDs
|
|
+ are switched off at all times.
|
|
+ auto_mute If set to 'true' the amplifier is automatically
|
|
+ muted when the DAC is not playing.
|
|
+ mute_ext_ctl The amplifier's HW mute control is enabled
|
|
+ in ALSA mixer and set to <val>.
|
|
+ Will be overwritten by ALSA user settings.
|
|
+
|
|
+
|
|
+Name: hifiberry-dac
|
|
+Info: Configures the HifiBerry DAC audio cards
|
|
+Load: dtoverlay=hifiberry-dac
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: hifiberry-dacplus
|
|
+Info: Configures the HifiBerry DAC+ audio card
|
|
+Load: dtoverlay=hifiberry-dacplus,<param>=<val>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control. Enable with
|
|
+ "dtoverlay=hifiberry-dacplus,24db_digital_gain"
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24dB_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+ slave Force DAC+ Pro into slave mode, using Pi as
|
|
+ master for bit clock and frame clock.
|
|
+ leds_off If set to 'true' the onboard indicator LEDs
|
|
+ are switched off at all times.
|
|
+
|
|
+
|
|
+Name: hifiberry-dacplusadc
|
|
+Info: Configures the HifiBerry DAC+ADC audio card
|
|
+Load: dtoverlay=hifiberry-dacplusadc,<param>=<val>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control. Enable with
|
|
+ "dtoverlay=hifiberry-dacplus,24db_digital_gain"
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24dB_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+ slave Force DAC+ Pro into slave mode, using Pi as
|
|
+ master for bit clock and frame clock.
|
|
+ leds_off If set to 'true' the onboard indicator LEDs
|
|
+ are switched off at all times.
|
|
+
|
|
+
|
|
+Name: hifiberry-dacplusadcpro
|
|
+Info: Configures the HifiBerry DAC+ADC PRO audio card
|
|
+Load: dtoverlay=hifiberry-dacplusadcpro,<param>=<val>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control. Enable with
|
|
+ "dtoverlay=hifiberry-dacplusadcpro,24db_digital_gain"
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24dB_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+ slave Force DAC+ADC Pro into slave mode, using Pi as
|
|
+ master for bit clock and frame clock.
|
|
+ leds_off If set to 'true' the onboard indicator LEDs
|
|
+ are switched off at all times.
|
|
+
|
|
+
|
|
+Name: hifiberry-dacplusdsp
|
|
+Info: Configures the HifiBerry DAC+DSP audio card
|
|
+Load: dtoverlay=hifiberry-dacplusdsp
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: hifiberry-dacplushd
|
|
+Info: Configures the HifiBerry DAC+ HD audio card
|
|
+Load: dtoverlay=hifiberry-dacplushd
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: hifiberry-digi
|
|
+Info: Configures the HifiBerry Digi and Digi+ audio card
|
|
+Load: dtoverlay=hifiberry-digi
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: hifiberry-digi-pro
|
|
+Info: Configures the HifiBerry Digi+ Pro audio card
|
|
+Load: dtoverlay=hifiberry-digi-pro
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: highperi
|
|
+Info: Enables "High Peripheral" mode
|
|
+Load: dtoverlay=highperi
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: hy28a
|
|
+Info: HY28A - 2.8" TFT LCD Display Module by HAOYU Electronics
|
|
+ Default values match Texy's display shield
|
|
+Load: dtoverlay=hy28a,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+
|
|
+ fps Delay between frame updates
|
|
+
|
|
+ debug Debug output level {0-7}
|
|
+
|
|
+ xohms Touchpanel sensitivity (X-plate resistance)
|
|
+
|
|
+ resetgpio GPIO used to reset controller
|
|
+
|
|
+ ledgpio GPIO used to control backlight
|
|
+
|
|
+
|
|
+Name: hy28b
|
|
+Info: HY28B - 2.8" TFT LCD Display Module by HAOYU Electronics
|
|
+ Default values match Texy's display shield
|
|
+Load: dtoverlay=hy28b,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+
|
|
+ fps Delay between frame updates
|
|
+
|
|
+ debug Debug output level {0-7}
|
|
+
|
|
+ xohms Touchpanel sensitivity (X-plate resistance)
|
|
+
|
|
+ resetgpio GPIO used to reset controller
|
|
+
|
|
+ ledgpio GPIO used to control backlight
|
|
+
|
|
+
|
|
+Name: hy28b-2017
|
|
+Info: HY28B 2017 version - 2.8" TFT LCD Display Module by HAOYU Electronics
|
|
+ Default values match Texy's display shield
|
|
+Load: dtoverlay=hy28b-2017,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+
|
|
+ fps Delay between frame updates
|
|
+
|
|
+ debug Debug output level {0-7}
|
|
+
|
|
+ xohms Touchpanel sensitivity (X-plate resistance)
|
|
+
|
|
+ resetgpio GPIO used to reset controller
|
|
+
|
|
+ ledgpio GPIO used to control backlight
|
|
+
|
|
+
|
|
+Name: i-sabre-q2m
|
|
+Info: Configures the Audiophonics I-SABRE Q2M DAC
|
|
+Load: dtoverlay=i-sabre-q2m
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: i2c-bcm2708
|
|
+Info: Fall back to the i2c_bcm2708 driver for the i2c_arm bus.
|
|
+Load: dtoverlay=i2c-bcm2708
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: i2c-gpio
|
|
+Info: Adds support for software i2c controller on gpio pins
|
|
+Load: dtoverlay=i2c-gpio,<param>=<val>
|
|
+Params: i2c_gpio_sda GPIO used for I2C data (default "23")
|
|
+
|
|
+ i2c_gpio_scl GPIO used for I2C clock (default "24")
|
|
+
|
|
+ i2c_gpio_delay_us Clock delay in microseconds
|
|
+ (default "2" = ~100kHz)
|
|
+
|
|
+ bus Set to a unique, non-zero value if wanting
|
|
+ multiple i2c-gpio busses. If set, will be used
|
|
+ as the preferred bus number (/dev/i2c-<n>). If
|
|
+ not set, the default value is 0, but the bus
|
|
+ number will be dynamically assigned - probably
|
|
+ 3.
|
|
+
|
|
+
|
|
+Name: i2c-mux
|
|
+Info: Adds support for a number of I2C bus multiplexers on i2c_arm
|
|
+Load: dtoverlay=i2c-mux,<param>=<val>
|
|
+Params: pca9542 Select the NXP PCA9542 device
|
|
+
|
|
+ pca9545 Select the NXP PCA9545 device
|
|
+
|
|
+ pca9548 Select the NXP PCA9548 device
|
|
+
|
|
+ addr Change I2C address of the device (default 0x70)
|
|
+
|
|
+
|
|
+[ The i2c-mux-pca9548a overlay has been deleted. See i2c-mux. ]
|
|
+
|
|
+
|
|
+Name: i2c-pwm-pca9685a
|
|
+Info: Adds support for an NXP PCA9685A I2C PWM controller on i2c_arm
|
|
+Load: dtoverlay=i2c-pwm-pca9685a,<param>=<val>
|
|
+Params: addr I2C address of PCA9685A (default 0x40)
|
|
+
|
|
+
|
|
+Name: i2c-rtc
|
|
+Info: Adds support for a number of I2C Real Time Clock devices
|
|
+Load: dtoverlay=i2c-rtc,<param>=<val>
|
|
+Params: abx80x Select one of the ABx80x family:
|
|
+ AB0801, AB0803, AB0804, AB0805,
|
|
+ AB1801, AB1803, AB1804, AB1805
|
|
+
|
|
+ bq32000 Select the TI BQ32000 device
|
|
+
|
|
+ ds1307 Select the DS1307 device
|
|
+
|
|
+ ds1339 Select the DS1339 device
|
|
+
|
|
+ ds1340 Select the DS1340 device
|
|
+
|
|
+ ds3231 Select the DS3231 device
|
|
+
|
|
+ m41t62 Select the M41T62 device
|
|
+
|
|
+ mcp7940x Select the MCP7940x device
|
|
+
|
|
+ mcp7941x Select the MCP7941x device
|
|
+
|
|
+ pcf2127 Select the PCF2127 device
|
|
+
|
|
+ pcf2129 Select the PCF2129 device
|
|
+
|
|
+ pcf85063 Select the PCF85063 device
|
|
+
|
|
+ pcf85063a Select the PCF85063A device
|
|
+
|
|
+ pcf8523 Select the PCF8523 device
|
|
+
|
|
+ pcf85363 Select the PCF85363 device
|
|
+
|
|
+ pcf8563 Select the PCF8563 device
|
|
+
|
|
+ rv1805 Select the Micro Crystal RV1805 device
|
|
+
|
|
+ rv3028 Select the Micro Crystal RV3028 device
|
|
+
|
|
+ sd3078 Select the ZXW Shenzhen whwave SD3078 device
|
|
+
|
|
+ s35390a Select the ABLIC S35390A device
|
|
+
|
|
+ i2c0 Choose the I2C0 bus on GPIOs 0&1
|
|
+
|
|
+ i2c_csi_dsi Choose the I2C0 bus on GPIOs 44&45
|
|
+
|
|
+ addr Sets the address for the RTC. Note that the
|
|
+ device must be configured to use the specified
|
|
+ address.
|
|
+
|
|
+ trickle-diode-disable Do not use the internal trickle charger diode
|
|
+ (BQ32000 only)
|
|
+
|
|
+ trickle-diode-type Diode type for trickle charge - "standard" or
|
|
+ "schottky" (ABx80x and RV1805 only)
|
|
+
|
|
+ trickle-resistor-ohms Resistor value for trickle charge (DS1339,
|
|
+ ABx80x, RV1805, RV3028)
|
|
+
|
|
+ wakeup-source Specify that the RTC can be used as a wakeup
|
|
+ source
|
|
+
|
|
+ backup-switchover-mode Backup power supply switch mode. Must be 0 for
|
|
+ off or 1 for Vdd < VBackup (RV3028 only)
|
|
+
|
|
+
|
|
+Name: i2c-rtc-gpio
|
|
+Info: Adds support for a number of I2C Real Time Clock devices
|
|
+ using the software i2c controller
|
|
+Load: dtoverlay=i2c-rtc-gpio,<param>=<val>
|
|
+Params: abx80x Select one of the ABx80x family:
|
|
+ AB0801, AB0803, AB0804, AB0805,
|
|
+ AB1801, AB1803, AB1804, AB1805
|
|
+
|
|
+ bq32000 Select the TI BQ32000 device
|
|
+
|
|
+ ds1307 Select the DS1307 device
|
|
+
|
|
+ ds1339 Select the DS1339 device
|
|
+
|
|
+ ds1340 Select the DS1340 device
|
|
+
|
|
+ ds3231 Select the DS3231 device
|
|
+
|
|
+ m41t62 Select the M41T62 device
|
|
+
|
|
+ mcp7940x Select the MCP7940x device
|
|
+
|
|
+ mcp7941x Select the MCP7941x device
|
|
+
|
|
+ pcf2127 Select the PCF2127 device
|
|
+
|
|
+ pcf2129 Select the PCF2129 device
|
|
+
|
|
+ pcf85063 Select the PCF85063 device
|
|
+
|
|
+ pcf85063a Select the PCF85063A device
|
|
+
|
|
+ pcf8523 Select the PCF8523 device
|
|
+
|
|
+ pcf85363 Select the PCF85363 device
|
|
+
|
|
+ pcf8563 Select the PCF8563 device
|
|
+
|
|
+ rv1805 Select the Micro Crystal RV1805 device
|
|
+
|
|
+ rv3028 Select the Micro Crystal RV3028 device
|
|
+
|
|
+ sd3078 Select the ZXW Shenzhen whwave SD3078 device
|
|
+
|
|
+ s35390a Select the ABLIC S35390A device
|
|
+
|
|
+ addr Sets the address for the RTC. Note that the
|
|
+ device must be configured to use the specified
|
|
+ address.
|
|
+
|
|
+ trickle-diode-disable Do not use the internal trickle charger diode
|
|
+ (BQ32000 only)
|
|
+
|
|
+ trickle-diode-type Diode type for trickle charge - "standard" or
|
|
+ "schottky" (ABx80x and RV1805 only)
|
|
+
|
|
+ trickle-resistor-ohms Resistor value for trickle charge (DS1339,
|
|
+ ABx80x, RV1805, RV3028)
|
|
+
|
|
+ wakeup-source Specify that the RTC can be used as a wakeup
|
|
+ source
|
|
+
|
|
+ backup-switchover-mode Backup power supply switch mode. Must be 0 for
|
|
+ off or 1 for Vdd < VBackup (RV3028 only)
|
|
+
|
|
+ i2c_gpio_sda GPIO used for I2C data (default "23")
|
|
+
|
|
+ i2c_gpio_scl GPIO used for I2C clock (default "24")
|
|
+
|
|
+ i2c_gpio_delay_us Clock delay in microseconds
|
|
+ (default "2" = ~100kHz)
|
|
+
|
|
+
|
|
+Name: i2c-sensor
|
|
+Info: Adds support for a number of I2C barometric pressure, temperature,
|
|
+ light level and chemical sensors on i2c_arm
|
|
+Load: dtoverlay=i2c-sensor,<param>=<val>
|
|
+Params: addr Set the address for the BH1750, BME280, BME680,
|
|
+ BMP280, CCS811, DS1621, HDC100X, LM75, SHT3x or
|
|
+ TMP102
|
|
+
|
|
+ bh1750 Select the Rohm BH1750 ambient light sensor
|
|
+ Valid addresses 0x23 or 0x5c, default 0x23
|
|
+
|
|
+ bme280 Select the Bosch Sensortronic BME280
|
|
+ Valid addresses 0x76-0x77, default 0x76
|
|
+
|
|
+ bme680 Select the Bosch Sensortronic BME680
|
|
+ Valid addresses 0x76-0x77, default 0x76
|
|
+
|
|
+ bmp085 Select the Bosch Sensortronic BMP085
|
|
+
|
|
+ bmp180 Select the Bosch Sensortronic BMP180
|
|
+
|
|
+ bmp280 Select the Bosch Sensortronic BMP280
|
|
+ Valid addresses 0x76-0x77, default 0x76
|
|
+
|
|
+ ccs811 Select the AMS CCS811 digital gas sensor
|
|
+ Valid addresses 0x5a-0x5b, default 0x5b
|
|
+
|
|
+ ds1621 Select the Dallas Semiconductors DS1621 temp
|
|
+ sensor. Valid addresses 0x48-0x4f, default 0x48
|
|
+
|
|
+ hdc100x Select the Texas Instruments HDC100x temp sensor
|
|
+ Valid addresses 0x40-0x43, default 0x40
|
|
+
|
|
+ htu21 Select the HTU21 temperature and humidity sensor
|
|
+
|
|
+ lm75 Select the Maxim LM75 temperature sensor
|
|
+ Valid addresses 0x48-0x4f, default 0x4f
|
|
+
|
|
+ lm75addr Deprecated - use addr parameter instead
|
|
+
|
|
+ max17040 Select the Maxim Integrated MAX17040 battery
|
|
+ monitor
|
|
+
|
|
+ sht3x Select the Sensiron SHT3x temperature and
|
|
+ humidity sensor. Valid addresses 0x44-0x45,
|
|
+ default 0x44
|
|
+
|
|
+ si7020 Select the Silicon Labs Si7013/20/21 humidity/
|
|
+ temperature sensor
|
|
+
|
|
+ sps30 Select the Sensirion SPS30 particulate matter
|
|
+ sensor. Fixed address 0x69.
|
|
+
|
|
+ sgp30 Select the Sensirion SGP30 VOC sensor.
|
|
+ Fixed address 0x58.
|
|
+
|
|
+ tmp102 Select the Texas Instruments TMP102 temp sensor
|
|
+ Valid addresses 0x48-0x4b, default 0x48
|
|
+
|
|
+ tsl4531 Select the AMS TSL4531 digital ambient light
|
|
+ sensor
|
|
+
|
|
+ veml6070 Select the Vishay VEML6070 ultraviolet light
|
|
+ sensor
|
|
+
|
|
+
|
|
+Name: i2c0
|
|
+Info: Change i2c0 pin usage. Not all pin combinations are usable on all
|
|
+ platforms - platforms other then Compute Modules can only use this
|
|
+ to disable transaction combining.
|
|
+ Do NOT use in conjunction with dtparam=i2c_vc=on. From the 5.4 kernel
|
|
+ onwards the base DT includes the use of i2c_mux_pinctrl to expose two
|
|
+ muxings of BSC0 - GPIOs 0&1, and whichever combination is used for the
|
|
+ camera and display connectors. This overlay disables that mux and
|
|
+ configures /dev/i2c0 to point at whichever set of pins is requested.
|
|
+ dtparam=i2c_vc=on will try and enable the mux, so combining the two
|
|
+ will cause conflicts.
|
|
+Load: dtoverlay=i2c0,<param>=<val>
|
|
+Params: pins_0_1 Use pins 0 and 1 (default)
|
|
+ pins_28_29 Use pins 28 and 29
|
|
+ pins_44_45 Use pins 44 and 45
|
|
+ pins_46_47 Use pins 46 and 47
|
|
+ combine Allow transactions to be combined (default
|
|
+ "yes")
|
|
+
|
|
+
|
|
+Name: i2c0-bcm2708
|
|
+Info: Deprecated, legacy version of i2c0.
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: i2c1
|
|
+Info: Change i2c1 pin usage. Not all pin combinations are usable on all
|
|
+ platforms - platforms other then Compute Modules can only use this
|
|
+ to disable transaction combining.
|
|
+Load: dtoverlay=i2c1,<param>=<val>
|
|
+Params: pins_2_3 Use pins 2 and 3 (default)
|
|
+ pins_44_45 Use pins 44 and 45
|
|
+ combine Allow transactions to be combined (default
|
|
+ "yes")
|
|
+
|
|
+
|
|
+Name: i2c1-bcm2708
|
|
+Info: Deprecated, legacy version of i2c1.
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: i2c3
|
|
+Info: Enable the i2c3 bus. BCM2711 only.
|
|
+Load: dtoverlay=i2c3,<param>
|
|
+Params: pins_2_3 Use GPIOs 2 and 3
|
|
+ pins_4_5 Use GPIOs 4 and 5 (default)
|
|
+ baudrate Set the baudrate for the interface (default
|
|
+ "100000")
|
|
+
|
|
+
|
|
+Name: i2c4
|
|
+Info: Enable the i2c4 bus. BCM2711 only.
|
|
+Load: dtoverlay=i2c4,<param>
|
|
+Params: pins_6_7 Use GPIOs 6 and 7
|
|
+ pins_8_9 Use GPIOs 8 and 9 (default)
|
|
+ baudrate Set the baudrate for the interface (default
|
|
+ "100000")
|
|
+
|
|
+
|
|
+Name: i2c5
|
|
+Info: Enable the i2c5 bus. BCM2711 only.
|
|
+Load: dtoverlay=i2c5,<param>
|
|
+Params: pins_10_11 Use GPIOs 10 and 11
|
|
+ pins_12_13 Use GPIOs 12 and 13 (default)
|
|
+ baudrate Set the baudrate for the interface (default
|
|
+ "100000")
|
|
+
|
|
+
|
|
+Name: i2c6
|
|
+Info: Enable the i2c6 bus. BCM2711 only.
|
|
+Load: dtoverlay=i2c6,<param>
|
|
+Params: pins_0_1 Use GPIOs 0 and 1
|
|
+ pins_22_23 Use GPIOs 22 and 23 (default)
|
|
+ baudrate Set the baudrate for the interface (default
|
|
+ "100000")
|
|
+
|
|
+
|
|
+Name: i2s-gpio28-31
|
|
+Info: move I2S function block to GPIO 28 to 31
|
|
+Load: dtoverlay=i2s-gpio28-31
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: ilitek251x
|
|
+Info: Enables I2C connected Ilitek 251x multiple touch controller using
|
|
+ GPIO 4 (pin 7 on GPIO header) for interrupt.
|
|
+Load: dtoverlay=ilitek251x,<param>=<val>
|
|
+Params: interrupt GPIO used for interrupt (default 4)
|
|
+ sizex Touchscreen size x, horizontal resolution of
|
|
+ touchscreen (in pixels)
|
|
+ sizey Touchscreen size y, vertical resolution of
|
|
+ touchscreen (in pixels)
|
|
+
|
|
+
|
|
+Name: imx219
|
|
+Info: Sony IMX219 camera module.
|
|
+ Uses Unicam 1, which is the standard camera connector on most Pi
|
|
+ variants.
|
|
+Load: dtoverlay=imx219,<param>=<val>
|
|
+Params: rotation Mounting rotation of the camera sensor (0 or
|
|
+ 180, default 180)
|
|
+ orientation Sensor orientation (0 = front, 1 = rear,
|
|
+ 2 = external, default external)
|
|
+
|
|
+
|
|
+Name: imx290
|
|
+Info: Sony IMX290 camera module.
|
|
+ Uses Unicam 1, which is the standard camera connector on most Pi
|
|
+ variants. NB This currently uses 4 CSI2 data lanes and therefore will
|
|
+ only work on a CM.
|
|
+Load: dtoverlay=imx290,<param>
|
|
+Params: 4lane Enable 4 CSI2 lanes. This requires a Compute
|
|
+ Module (1, 3, or 4).
|
|
+ clock-frequency Sets the clock frequency to match that used on
|
|
+ the board.
|
|
+ Modules from Vision Components use 37.125MHz
|
|
+ (the default), whilst those from Innomaker use
|
|
+ 74.25MHz.
|
|
+ mono Denote that the module is a mono sensor.
|
|
+ orientation Sensor orientation (0 = front, 1 = rear,
|
|
+ 2 = external, default external)
|
|
+ rotation Mounting rotation of the camera sensor (0 or
|
|
+ 180, default 0)
|
|
+
|
|
+
|
|
+Name: imx378
|
|
+Info: Sony IMX378 camera module.
|
|
+ Uses Unicam 1, which is the standard camera connector on most Pi
|
|
+ variants.
|
|
+Load: dtoverlay=imx378,<param>=<val>
|
|
+Params: rotation Mounting rotation of the camera sensor (0 or
|
|
+ 180, default 180)
|
|
+ orientation Sensor orientation (0 = front, 1 = rear,
|
|
+ 2 = external, default external)
|
|
+
|
|
+
|
|
+Name: imx477
|
|
+Info: Sony IMX477 camera module.
|
|
+ Uses Unicam 1, which is the standard camera connector on most Pi
|
|
+ variants.
|
|
+Load: dtoverlay=imx477,<param>=<val>
|
|
+Params: rotation Mounting rotation of the camera sensor (0 or
|
|
+ 180, default 180)
|
|
+ orientation Sensor orientation (0 = front, 1 = rear,
|
|
+ 2 = external, default external)
|
|
+
|
|
+
|
|
+Name: iqaudio-codec
|
|
+Info: Configures the IQaudio Codec audio card
|
|
+Load: dtoverlay=iqaudio-codec
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: iqaudio-dac
|
|
+Info: Configures the IQaudio DAC audio card
|
|
+Load: dtoverlay=iqaudio-dac,<param>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control. Enable with
|
|
+ "dtoverlay=iqaudio-dac,24db_digital_gain"
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24db_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+
|
|
+
|
|
+Name: iqaudio-dacplus
|
|
+Info: Configures the IQaudio DAC+ audio card
|
|
+Load: dtoverlay=iqaudio-dacplus,<param>=<val>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control. Enable with
|
|
+ "dtoverlay=iqaudio-dacplus,24db_digital_gain"
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24db_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+ auto_mute_amp If specified, unmute/mute the IQaudIO amp when
|
|
+ starting/stopping audio playback.
|
|
+ unmute_amp If specified, unmute the IQaudIO amp once when
|
|
+ the DAC driver module loads.
|
|
+
|
|
+
|
|
+Name: iqaudio-digi-wm8804-audio
|
|
+Info: Configures the IQAudIO Digi WM8804 audio card
|
|
+Load: dtoverlay=iqaudio-digi-wm8804-audio,<param>=<val>
|
|
+Params: card_name Override the default, "IQAudIODigi", card name.
|
|
+ dai_name Override the default, "IQAudIO Digi", dai name.
|
|
+ dai_stream_name Override the default, "IQAudIO Digi HiFi",
|
|
+ dai stream name.
|
|
+
|
|
+
|
|
+Name: irs1125
|
|
+Info: Infineon irs1125 TOF camera module.
|
|
+ Uses Unicam 1, which is the standard camera connector on most Pi
|
|
+ variants.
|
|
+Load: dtoverlay=irs1125
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: jedec-spi-nor
|
|
+Info: Adds support for JEDEC-compliant SPI NOR flash devices. (Note: The
|
|
+ "jedec,spi-nor" kernel driver was formerly known as "m25p80".)
|
|
+Load: dtoverlay=jedec-spi-nor,<param>=<val>
|
|
+Params: flash-spi<n>-<m> Enables flash device on SPI<n>, CS#<m>.
|
|
+ flash-fastr-spi<n>-<m> Enables flash device with fast read capability
|
|
+ on SPI<n>, CS#<m>.
|
|
+
|
|
+
|
|
+Name: justboom-both
|
|
+Info: Simultaneous usage of an justboom-dac and justboom-digi based
|
|
+ card
|
|
+Load: dtoverlay=justboom-both,<param>=<val>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control. Enable with
|
|
+ "dtoverlay=justboom-dac,24db_digital_gain"
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24dB_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+
|
|
+
|
|
+Name: justboom-dac
|
|
+Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio
|
|
+ cards
|
|
+Load: dtoverlay=justboom-dac,<param>=<val>
|
|
+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec
|
|
+ Digital volume control. Enable with
|
|
+ "dtoverlay=justboom-dac,24db_digital_gain"
|
|
+ (The default behaviour is that the Digital
|
|
+ volume control is limited to a maximum of
|
|
+ 0dB. ie. it can attenuate but not provide
|
|
+ gain. For most users, this will be desired
|
|
+ as it will prevent clipping. By appending
|
|
+ the 24dB_digital_gain parameter, the Digital
|
|
+ volume control will allow up to 24dB of
|
|
+ gain. If this parameter is enabled, it is the
|
|
+ responsibility of the user to ensure that
|
|
+ the Digital volume control is set to a value
|
|
+ that does not result in clipping/distortion!)
|
|
+
|
|
+
|
|
+Name: justboom-digi
|
|
+Info: Configures the JustBoom Digi HAT and Digi Zero audio cards
|
|
+Load: dtoverlay=justboom-digi
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: lirc-rpi
|
|
+Info: This overlay has been deprecated and removed - see gpio-ir
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: ltc294x
|
|
+Info: Adds support for the ltc294x family of battery gauges
|
|
+Load: dtoverlay=ltc294x,<param>=<val>
|
|
+Params: ltc2941 Select the ltc2941 device
|
|
+
|
|
+ ltc2942 Select the ltc2942 device
|
|
+
|
|
+ ltc2943 Select the ltc2943 device
|
|
+
|
|
+ ltc2944 Select the ltc2944 device
|
|
+
|
|
+ resistor-sense The sense resistor value in milli-ohms.
|
|
+ Can be a 32-bit negative value when the battery
|
|
+ has been connected to the wrong end of the
|
|
+ resistor.
|
|
+
|
|
+ prescaler-exponent Range and accuracy of the gauge. The value is
|
|
+ programmed into the chip only if it differs
|
|
+ from the current setting.
|
|
+ For LTC2941 only:
|
|
+ - Default value is 128
|
|
+ - the exponent is in the range 0-7 (default 7)
|
|
+ See the datasheet for more information.
|
|
+
|
|
+
|
|
+Name: max98357a
|
|
+Info: Configures the Maxim MAX98357A I2S DAC
|
|
+Load: dtoverlay=max98357a,<param>=<val>
|
|
+Params: no-sdmode Driver does not manage the state of the DAC's
|
|
+ SD_MODE pin (i.e. chip is always on).
|
|
+ sdmode-pin integer, GPIO pin connected to the SD_MODE input
|
|
+ of the DAC (default GPIO4 if parameter omitted).
|
|
+
|
|
+
|
|
+Name: maxtherm
|
|
+Info: Configure a MAX6675, MAX31855 or MAX31856 thermocouple as an IIO device.
|
|
+
|
|
+ For devices on spi1 or spi2, the interfaces should be enabled
|
|
+ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
|
|
+ The overlay expects to disable the relevant spidev node, so also using
|
|
+ e.g. cs0_spidev=off is unnecessary.
|
|
+
|
|
+ Example:
|
|
+ MAX31855 on /dev/spidev0.0
|
|
+ dtoverlay=maxtherm,spi0-0,max31855
|
|
+ MAX31856 using a type J thermocouple on /dev/spidev2.1
|
|
+ dtoverlay=spi2-2cs
|
|
+ dtoverlay=maxtherm,spi2-1,max31856,type_j
|
|
+
|
|
+Load: dtoverlay=maxtherm,<param>=<val>
|
|
+Params: spi<n>-<m> Configure device at spi<n>, cs<m>
|
|
+ (boolean, required)
|
|
+ max6675 Enable support for the MAX6675 (default)
|
|
+ max31855 Enable support for the MAX31855
|
|
+ max31855e Enable support for the MAX31855E
|
|
+ max31855j Enable support for the MAX31855J
|
|
+ max31855k Enable support for the MAX31855K
|
|
+ max31855n Enable support for the MAX31855N
|
|
+ max31855r Enable support for the MAX31855R
|
|
+ max31855s Enable support for the MAX31855S
|
|
+ max31855t Enable support for the MAX31855T
|
|
+ max31856 Enable support for the MAX31856 (with type K)
|
|
+ type_b Select a type B sensor for max31856
|
|
+ type_e Select a type E sensor for max31856
|
|
+ type_j Select a type J sensor for max31856
|
|
+ type_k Select a type K sensor for max31856
|
|
+ type_n Select a type N sensor for max31856
|
|
+ type_r Select a type R sensor for max31856
|
|
+ type_s Select a type S sensor for max31856
|
|
+ type_t Select a type T sensor for max31856
|
|
+
|
|
+
|
|
+Name: mbed-dac
|
|
+Info: Configures the mbed AudioCODEC (TLV320AIC23B)
|
|
+Load: dtoverlay=mbed-dac
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: mcp23017
|
|
+Info: Configures the MCP23017 I2C GPIO expander
|
|
+Load: dtoverlay=mcp23017,<param>=<val>
|
|
+Params: gpiopin Gpio pin connected to the INTA output of the
|
|
+ MCP23017 (default: 4)
|
|
+
|
|
+ addr I2C address of the MCP23017 (default: 0x20)
|
|
+
|
|
+ mcp23008 Configure an MCP23008 instead.
|
|
+ noints Disable the interrupt GPIO line.
|
|
+
|
|
+
|
|
+Name: mcp23s17
|
|
+Info: Configures the MCP23S08/17 SPI GPIO expanders.
|
|
+ If devices are present on SPI1 or SPI2, those interfaces must be enabled
|
|
+ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
|
|
+ If interrupts are enabled for a device on a given CS# on a SPI bus, that
|
|
+ device must be the only one present on that SPI bus/CS#.
|
|
+Load: dtoverlay=mcp23s17,<param>=<val>
|
|
+Params: s08-spi<n>-<m>-present 4-bit integer, bitmap indicating MCP23S08
|
|
+ devices present on SPI<n>, CS#<m>
|
|
+
|
|
+ s17-spi<n>-<m>-present 8-bit integer, bitmap indicating MCP23S17
|
|
+ devices present on SPI<n>, CS#<m>
|
|
+
|
|
+ s08-spi<n>-<m>-int-gpio integer, enables interrupts on a single
|
|
+ MCP23S08 device on SPI<n>, CS#<m>, specifies
|
|
+ the GPIO pin to which INT output of MCP23S08
|
|
+ is connected.
|
|
+
|
|
+ s17-spi<n>-<m>-int-gpio integer, enables mirrored interrupts on a
|
|
+ single MCP23S17 device on SPI<n>, CS#<m>,
|
|
+ specifies the GPIO pin to which either INTA
|
|
+ or INTB output of MCP23S17 is connected.
|
|
+
|
|
+
|
|
+Name: mcp2515-can0
|
|
+Info: Configures the MCP2515 CAN controller on spi0.0
|
|
+Load: dtoverlay=mcp2515-can0,<param>=<val>
|
|
+Params: oscillator Clock frequency for the CAN controller (Hz)
|
|
+
|
|
+ spimaxfrequency Maximum SPI frequence (Hz)
|
|
+
|
|
+ interrupt GPIO for interrupt signal
|
|
+
|
|
+
|
|
+Name: mcp2515-can1
|
|
+Info: Configures the MCP2515 CAN controller on spi0.1
|
|
+Load: dtoverlay=mcp2515-can1,<param>=<val>
|
|
+Params: oscillator Clock frequency for the CAN controller (Hz)
|
|
+
|
|
+ spimaxfrequency Maximum SPI frequence (Hz)
|
|
+
|
|
+ interrupt GPIO for interrupt signal
|
|
+
|
|
+
|
|
+Name: mcp251xfd
|
|
+Info: Configures the MCP251XFD CAN controller family
|
|
+ For devices on spi1 or spi2, the interfaces should be enabled
|
|
+ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
|
|
+Load: dtoverlay=mcp251xfd,<param>=<val>
|
|
+Params: spi<n>-<m> Configure device at spi<n>, cs<m>
|
|
+ (boolean, required)
|
|
+
|
|
+ oscillator Clock frequency for the CAN controller (Hz)
|
|
+
|
|
+ speed Maximum SPI frequence (Hz)
|
|
+
|
|
+ interrupt GPIO for interrupt signal
|
|
+
|
|
+ rx_interrupt GPIO for RX interrupt signal (nINT1) (optional)
|
|
+
|
|
+ xceiver_enable GPIO for CAN transceiver enable (optional)
|
|
+
|
|
+ xceiver_active_high specifiy if CAN transceiver enable pin is
|
|
+ active high (optional, default: active low)
|
|
+
|
|
+
|
|
+Name: mcp3008
|
|
+Info: Configures MCP3008 A/D converters
|
|
+ For devices on spi1 or spi2, the interfaces should be enabled
|
|
+ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
|
|
+Load: dtoverlay=mcp3008,<param>[=<val>]
|
|
+Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
|
|
+ spi<n>-<m>-speed integer, set the spi bus speed for this device
|
|
+
|
|
+
|
|
+Name: mcp3202
|
|
+Info: Configures MCP3202 A/D converters
|
|
+ For devices on spi1 or spi2, the interfaces should be enabled
|
|
+ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
|
|
+Load: dtoverlay=mcp3202,<param>[=<val>]
|
|
+Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
|
|
+ spi<n>-<m>-speed integer, set the spi bus speed for this device
|
|
+
|
|
+
|
|
+Name: mcp342x
|
|
+Info: Overlay for activation of Microchip MCP3421-3428 ADCs over I2C
|
|
+Load: dtoverlay=mcp342x,<param>=<val>
|
|
+Params: addr I2C bus address of device, for devices with
|
|
+ addresses that are configurable, e.g. by
|
|
+ hardware links (default=0x68)
|
|
+ mcp3421 The device is an MCP3421
|
|
+ mcp3422 The device is an MCP3422
|
|
+ mcp3423 The device is an MCP3423
|
|
+ mcp3424 The device is an MCP3424
|
|
+ mcp3425 The device is an MCP3425
|
|
+ mcp3426 The device is an MCP3426
|
|
+ mcp3427 The device is an MCP3427
|
|
+ mcp3428 The device is an MCP3428
|
|
+
|
|
+
|
|
+Name: media-center
|
|
+Info: Media Center HAT - 2.83" Touch Display + extras by Pi Supply
|
|
+Load: dtoverlay=media-center,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+ fps Delay between frame updates
|
|
+ xohms Touchpanel sensitivity (X-plate resistance)
|
|
+ swapxy Swap x and y axis
|
|
+ backlight Change backlight GPIO pin {e.g. 12, 18}
|
|
+ gpio_out_pin GPIO for output (default "17")
|
|
+ gpio_in_pin GPIO for input (default "18")
|
|
+ gpio_in_pull Pull up/down/off on the input pin
|
|
+ (default "down")
|
|
+ sense Override the IR receive auto-detection logic:
|
|
+ "0" = force active-high
|
|
+ "1" = force active-low
|
|
+ "-1" = use auto-detection
|
|
+ (default "-1")
|
|
+ softcarrier Turn the software carrier "on" or "off"
|
|
+ (default "on")
|
|
+ invert "on" = invert the output pin (default "off")
|
|
+ debug "on" = enable additional debug messages
|
|
+ (default "off")
|
|
+
|
|
+
|
|
+Name: merus-amp
|
|
+Info: Configures the merus-amp audio card
|
|
+Load: dtoverlay=merus-amp
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: midi-uart0
|
|
+Info: Configures UART0 (ttyAMA0) so that a requested 38.4kbaud actually gets
|
|
+ 31.25kbaud, the frequency required for MIDI
|
|
+Load: dtoverlay=midi-uart0
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: midi-uart1
|
|
+Info: Configures UART1 (ttyS0) so that a requested 38.4kbaud actually gets
|
|
+ 31.25kbaud, the frequency required for MIDI
|
|
+Load: dtoverlay=midi-uart1
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: midi-uart2
|
|
+Info: Configures UART2 (ttyAMA1) so that a requested 38.4kbaud actually gets
|
|
+ 31.25kbaud, the frequency required for MIDI
|
|
+Load: dtoverlay=midi-uart2
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: midi-uart3
|
|
+Info: Configures UART3 (ttyAMA2) so that a requested 38.4kbaud actually gets
|
|
+ 31.25kbaud, the frequency required for MIDI
|
|
+Load: dtoverlay=midi-uart3
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: midi-uart4
|
|
+Info: Configures UART4 (ttyAMA3) so that a requested 38.4kbaud actually gets
|
|
+ 31.25kbaud, the frequency required for MIDI
|
|
+Load: dtoverlay=midi-uart4
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: midi-uart5
|
|
+Info: Configures UART5 (ttyAMA4) so that a requested 38.4kbaud actually gets
|
|
+ 31.25kbaud, the frequency required for MIDI
|
|
+Load: dtoverlay=midi-uart5
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: minipitft13
|
|
+Info: Overlay for AdaFruit Mini Pi 1.3" TFT via SPI using fbtft driver.
|
|
+Load: dtoverlay=minipitft13,<param>=<val>
|
|
+Params: speed SPI bus speed (default 32000000)
|
|
+ rotate Display rotation (0, 90, 180 or 270; default 0)
|
|
+ width Display width (default 240)
|
|
+ height Display height (default 240)
|
|
+ fps Delay between frame updates (default 25)
|
|
+ debug Debug output level (0-7; default 0)
|
|
+
|
|
+
|
|
+Name: miniuart-bt
|
|
+Info: Switch the onboard Bluetooth function on Pi 3B, 3B+, 3A+, 4B and Zero W
|
|
+ to use the mini-UART (ttyS0) and restore UART0/ttyAMA0 over GPIOs 14 &
|
|
+ 15. Note that this may reduce the maximum usable baudrate.
|
|
+ N.B. It is also necessary to edit /lib/systemd/system/hciuart.service
|
|
+ and replace ttyAMA0 with ttyS0, unless using Raspbian or another
|
|
+ distribution with udev rules that create /dev/serial0 and /dev/serial1,
|
|
+ in which case use /dev/serial1 instead because it will always be
|
|
+ correct. Furthermore, you must also set core_freq and core_freq_min to
|
|
+ the same value in config.txt or the miniuart will not work.
|
|
+Load: dtoverlay=miniuart-bt,<param>=<val>
|
|
+Params: krnbt Set to "on" to enable autoprobing of Bluetooth
|
|
+ driver without need of hciattach/btattach
|
|
+
|
|
+
|
|
+Name: mmc
|
|
+Info: Selects the bcm2835-mmc SD/MMC driver, optionally with overclock
|
|
+Load: dtoverlay=mmc,<param>=<val>
|
|
+Params: overclock_50 Clock (in MHz) to use when the MMC framework
|
|
+ requests 50MHz
|
|
+
|
|
+
|
|
+Name: mpu6050
|
|
+Info: Overlay for i2c connected mpu6050 imu
|
|
+Load: dtoverlay=mpu6050,<param>=<val>
|
|
+Params: interrupt GPIO pin for interrupt (default 4)
|
|
+ addr I2C address of the device (default 0x68)
|
|
+
|
|
+
|
|
+Name: mz61581
|
|
+Info: MZ61581 display by Tontec
|
|
+Load: dtoverlay=mz61581,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+
|
|
+ fps Delay between frame updates
|
|
+
|
|
+ txbuflen Transmit buffer length (default 32768)
|
|
+
|
|
+ debug Debug output level {0-7}
|
|
+
|
|
+ xohms Touchpanel sensitivity (X-plate resistance)
|
|
+
|
|
+
|
|
+Name: ov5647
|
|
+Info: Omnivision OV5647 camera module.
|
|
+ Uses Unicam 1, which is the standard camera connector on most Pi
|
|
+ variants.
|
|
+Load: dtoverlay=ov5647,<param>=<val>
|
|
+Params: rotation Mounting rotation of the camera sensor (0 or
|
|
+ 180, default 0)
|
|
+ orientation Sensor orientation (0 = front, 1 = rear,
|
|
+ 2 = external, default external)
|
|
+
|
|
+
|
|
+Name: ov7251
|
|
+Info: Omnivision OV7251 camera module.
|
|
+ Uses Unicam 1, which is the standard camera connector on most Pi
|
|
+ variants.
|
|
+Load: dtoverlay=ov7251,<param>=<val>
|
|
+Params: rotation Mounting rotation of the camera sensor (0 or
|
|
+ 180, default 0)
|
|
+ orientation Sensor orientation (0 = front, 1 = rear,
|
|
+ 2 = external, default external)
|
|
+
|
|
+
|
|
+Name: ov9281
|
|
+Info: Omnivision OV9281 camera module.
|
|
+ Uses Unicam 1, which is the standard camera connector on most Pi
|
|
+ variants.
|
|
+Load: dtoverlay=ov9281,<param>=<val>
|
|
+Params: rotation Mounting rotation of the camera sensor (0 or
|
|
+ 180, default 0)
|
|
+ orientation Sensor orientation (0 = front, 1 = rear,
|
|
+ 2 = external, default external)
|
|
+
|
|
+
|
|
+Name: papirus
|
|
+Info: PaPiRus ePaper Screen by Pi Supply (both HAT and pHAT)
|
|
+Load: dtoverlay=papirus,<param>=<val>
|
|
+Params: panel Display panel (required):
|
|
+ 1.44": e1144cs021
|
|
+ 2.0": e2200cs021
|
|
+ 2.7": e2271cs021
|
|
+
|
|
+ speed Display SPI bus speed
|
|
+
|
|
+
|
|
+Name: pca953x
|
|
+Info: TI PCA953x family of I2C GPIO expanders. Default is for NXP PCA9534.
|
|
+Load: dtoverlay=pca953x,<param>=<val>
|
|
+Params: addr I2C address of expander. Default 0x20.
|
|
+ pca6416 Select the NXP PCA6416 (16 bit)
|
|
+ pca9505 Select the NXP PCA9505 (40 bit)
|
|
+ pca9535 Select the NXP PCA9535 (16 bit)
|
|
+ pca9536 Select the NXP PCA9536 or TI PCA9536 (4 bit)
|
|
+ pca9537 Select the NXP PCA9537 (4 bit)
|
|
+ pca9538 Select the NXP PCA9538 (8 bit)
|
|
+ pca9539 Select the NXP PCA9539 (16 bit)
|
|
+ pca9554 Select the NXP PCA9554 (8 bit)
|
|
+ pca9555 Select the NXP PCA9555 (16 bit)
|
|
+ pca9556 Select the NXP PCA9556 (8 bit)
|
|
+ pca9557 Select the NXP PCA9557 (8 bit)
|
|
+ pca9574 Select the NXP PCA9574 (8 bit)
|
|
+ pca9575 Select the NXP PCA9575 (16 bit)
|
|
+ pca9698 Select the NXP PCA9698 (40 bit)
|
|
+ pca16416 Select the NXP PCA16416 (16 bit)
|
|
+ pca16524 Select the NXP PCA16524 (24 bit)
|
|
+ pca19555a Select the NXP PCA19555A (16 bit)
|
|
+ max7310 Select the Maxim MAX7310 (8 bit)
|
|
+ max7312 Select the Maxim MAX7312 (16 bit)
|
|
+ max7313 Select the Maxim MAX7313 (16 bit)
|
|
+ max7315 Select the Maxim MAX7315 (8 bit)
|
|
+ pca6107 Select the TI PCA6107 (8 bit)
|
|
+ tca6408 Select the TI TCA6408 (8 bit)
|
|
+ tca6416 Select the TI TCA6416 (16 bit)
|
|
+ tca6424 Select the TI TCA6424 (24 bit)
|
|
+ tca9539 Select the TI TCA9539 (16 bit)
|
|
+ tca9554 Select the TI TCA9554 (8 bit)
|
|
+ cat9554 Select the Onnn CAT9554 (8 bit)
|
|
+ pca9654 Select the Onnn PCA9654 (8 bit)
|
|
+ xra1202 Select the Exar XRA1202 (8 bit)
|
|
+
|
|
+
|
|
+Name: pcie-32bit-dma
|
|
+Info: Force PCIe config to support 32bit DMA addresses at the expense of
|
|
+ having to bounce buffers.
|
|
+Load: dtoverlay=pcie-32bit-dma
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+[ The pcf2127-rtc overlay has been deleted. See i2c-rtc. ]
|
|
+
|
|
+
|
|
+[ The pcf8523-rtc overlay has been deleted. See i2c-rtc. ]
|
|
+
|
|
+
|
|
+[ The pcf8563-rtc overlay has been deleted. See i2c-rtc. ]
|
|
+
|
|
+
|
|
+Name: pi3-act-led
|
|
+Info: This overlay has been renamed act-led, keeping pi3-act-led as an alias
|
|
+ for backwards compatibility.
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: pi3-disable-bt
|
|
+Info: This overlay has been renamed disable-bt, keeping pi3-disable-bt as an
|
|
+ alias for backwards compatibility.
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: pi3-disable-wifi
|
|
+Info: This overlay has been renamed disable-wifi, keeping pi3-disable-wifi as
|
|
+ an alias for backwards compatibility.
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: pi3-miniuart-bt
|
|
+Info: This overlay has been renamed miniuart-bt, keeping pi3-miniuart-bt as
|
|
+ an alias for backwards compatibility.
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: pibell
|
|
+Info: Configures the pibell audio card.
|
|
+Load: dtoverlay=pibell,<param>=<val>
|
|
+Params: alsaname Set the name as it appears in ALSA (default
|
|
+ "PiBell")
|
|
+
|
|
+
|
|
+Name: pifacedigital
|
|
+Info: Configures the PiFace Digital mcp23s17 GPIO port expander.
|
|
+Load: dtoverlay=pifacedigital,<param>=<val>
|
|
+Params: spi-present-mask 8-bit integer, bitmap indicating MCP23S17 SPI0
|
|
+ CS0 address. PiFace Digital supports addresses
|
|
+ 0-3, which can be configured with JP1 and JP2.
|
|
+
|
|
+
|
|
+Name: pifi-40
|
|
+Info: Configures the PiFi 40W stereo amplifier
|
|
+Load: dtoverlay=pifi-40
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: pifi-dac-hd
|
|
+Info: Configures the PiFi DAC HD
|
|
+Load: dtoverlay=pifi-dac-hd
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: pifi-dac-zero
|
|
+Info: Configures the PiFi DAC Zero
|
|
+Load: dtoverlay=pifi-dac-zero
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: pifi-mini-210
|
|
+Info: Configures the PiFi Mini stereo amplifier
|
|
+Load: dtoverlay=pifi-mini-210
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: piglow
|
|
+Info: Configures the PiGlow by pimoroni.com
|
|
+Load: dtoverlay=piglow
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: piscreen
|
|
+Info: PiScreen display by OzzMaker.com
|
|
+Load: dtoverlay=piscreen,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+
|
|
+ fps Delay between frame updates
|
|
+
|
|
+ debug Debug output level {0-7}
|
|
+
|
|
+ xohms Touchpanel sensitivity (X-plate resistance)
|
|
+
|
|
+
|
|
+Name: piscreen2r
|
|
+Info: PiScreen 2 with resistive TP display by OzzMaker.com
|
|
+Load: dtoverlay=piscreen2r,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+
|
|
+ fps Delay between frame updates
|
|
+
|
|
+ debug Debug output level {0-7}
|
|
+
|
|
+ xohms Touchpanel sensitivity (X-plate resistance)
|
|
+
|
|
+
|
|
+Name: pisound
|
|
+Info: Configures the Blokas Labs pisound card
|
|
+Load: dtoverlay=pisound
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: pitft22
|
|
+Info: Adafruit PiTFT 2.2" screen
|
|
+Load: dtoverlay=pitft22,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+
|
|
+ fps Delay between frame updates
|
|
+
|
|
+ debug Debug output level {0-7}
|
|
+
|
|
+
|
|
+Name: pitft28-capacitive
|
|
+Info: Adafruit PiTFT 2.8" capacitive touch screen
|
|
+Load: dtoverlay=pitft28-capacitive,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+
|
|
+ fps Delay between frame updates
|
|
+
|
|
+ debug Debug output level {0-7}
|
|
+
|
|
+ touch-sizex Touchscreen size x (default 240)
|
|
+
|
|
+ touch-sizey Touchscreen size y (default 320)
|
|
+
|
|
+ touch-invx Touchscreen inverted x axis
|
|
+
|
|
+ touch-invy Touchscreen inverted y axis
|
|
+
|
|
+ touch-swapxy Touchscreen swapped x y axis
|
|
+
|
|
+
|
|
+Name: pitft28-resistive
|
|
+Info: Adafruit PiTFT 2.8" resistive touch screen
|
|
+Load: dtoverlay=pitft28-resistive,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+
|
|
+ fps Delay between frame updates
|
|
+
|
|
+ debug Debug output level {0-7}
|
|
+
|
|
+
|
|
+Name: pitft35-resistive
|
|
+Info: Adafruit PiTFT 3.5" resistive touch screen
|
|
+Load: dtoverlay=pitft35-resistive,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+
|
|
+ fps Delay between frame updates
|
|
+
|
|
+ debug Debug output level {0-7}
|
|
+
|
|
+
|
|
+Name: pps-gpio
|
|
+Info: Configures the pps-gpio (pulse-per-second time signal via GPIO).
|
|
+Load: dtoverlay=pps-gpio,<param>=<val>
|
|
+Params: gpiopin Input GPIO (default "18")
|
|
+ assert_falling_edge When present, assert is indicated by a falling
|
|
+ edge, rather than by a rising edge (default
|
|
+ off)
|
|
+ capture_clear Generate clear events on the trailing edge
|
|
+ (default off)
|
|
+
|
|
+
|
|
+Name: pwm
|
|
+Info: Configures a single PWM channel
|
|
+ Legal pin,function combinations for each channel:
|
|
+ PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
|
|
+ PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
|
|
+ N.B.:
|
|
+ 1) Pin 18 is the only one available on all platforms, and
|
|
+ it is the one used by the I2S audio interface.
|
|
+ Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
|
|
+ 2) The onboard analogue audio output uses both PWM channels.
|
|
+ 3) So be careful mixing audio and PWM.
|
|
+ 4) Currently the clock must have been enabled and configured
|
|
+ by other means.
|
|
+Load: dtoverlay=pwm,<param>=<val>
|
|
+Params: pin Output pin (default 18) - see table
|
|
+ func Pin function (default 2 = Alt5) - see above
|
|
+ clock PWM clock frequency (informational)
|
|
+
|
|
+
|
|
+Name: pwm-2chan
|
|
+Info: Configures both PWM channels
|
|
+ Legal pin,function combinations for each channel:
|
|
+ PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
|
|
+ PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
|
|
+ N.B.:
|
|
+ 1) Pin 18 is the only one available on all platforms, and
|
|
+ it is the one used by the I2S audio interface.
|
|
+ Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
|
|
+ 2) The onboard analogue audio output uses both PWM channels.
|
|
+ 3) So be careful mixing audio and PWM.
|
|
+ 4) Currently the clock must have been enabled and configured
|
|
+ by other means.
|
|
+Load: dtoverlay=pwm-2chan,<param>=<val>
|
|
+Params: pin Output pin (default 18) - see table
|
|
+ pin2 Output pin for other channel (default 19)
|
|
+ func Pin function (default 2 = Alt5) - see above
|
|
+ func2 Function for pin2 (default 2 = Alt5)
|
|
+ clock PWM clock frequency (informational)
|
|
+
|
|
+
|
|
+Name: pwm-ir-tx
|
|
+Info: Use GPIO pin as pwm-assisted infrared transmitter output.
|
|
+ This is an alternative to "gpio-ir-tx". pwm-ir-tx makes use
|
|
+ of PWM0 to reduce the CPU load during transmission compared to
|
|
+ gpio-ir-tx which uses bit-banging.
|
|
+ Legal pin,function combinations are:
|
|
+ 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
|
|
+Load: dtoverlay=pwm-ir-tx,<param>=<val>
|
|
+Params: gpio_pin Output GPIO (default 18)
|
|
+
|
|
+ func Pin function (default 2 = Alt5)
|
|
+
|
|
+
|
|
+Name: qca7000
|
|
+Info: in-tech's Evaluation Board for PLC Stamp micro
|
|
+ This uses spi0 and a separate GPIO interrupt to connect the QCA7000.
|
|
+Load: dtoverlay=qca7000,<param>=<val>
|
|
+Params: int_pin GPIO pin for interrupt signal (default 23)
|
|
+
|
|
+ speed SPI bus speed (default 12 MHz)
|
|
+
|
|
+
|
|
+Name: qca7000-uart0
|
|
+Info: in-tech's Evaluation Board for PLC Stamp micro (UART)
|
|
+ This uses uart0/ttyAMA0 over GPIOs 14 & 15 to connect the QCA7000.
|
|
+ But it requires disabling of onboard Bluetooth on
|
|
+ Pi 3B, 3B+, 3A+, 4B and Zero W.
|
|
+Load: dtoverlay=qca7000-uart0,<param>=<val>
|
|
+Params: baudrate Set the baudrate for the UART (default
|
|
+ "115200")
|
|
+
|
|
+
|
|
+Name: rotary-encoder
|
|
+Info: Overlay for GPIO connected rotary encoder.
|
|
+Load: dtoverlay=rotary-encoder,<param>=<val>
|
|
+Params: pin_a GPIO connected to rotary encoder channel A
|
|
+ (default 4).
|
|
+ pin_b GPIO connected to rotary encoder channel B
|
|
+ (default 17).
|
|
+ relative_axis register a relative axis rather than an
|
|
+ absolute one. Relative axis will only
|
|
+ generate +1/-1 events on the input device,
|
|
+ hence no steps need to be passed.
|
|
+ linux_axis the input subsystem axis to map to this
|
|
+ rotary encoder. Defaults to 0 (ABS_X / REL_X)
|
|
+ rollover Automatic rollover when the rotary value
|
|
+ becomes greater than the specified steps or
|
|
+ smaller than 0. For absolute axis only.
|
|
+ steps-per-period Number of steps (stable states) per period.
|
|
+ The values have the following meaning:
|
|
+ 1: Full-period mode (default)
|
|
+ 2: Half-period mode
|
|
+ 4: Quarter-period mode
|
|
+ steps Number of steps in a full turnaround of the
|
|
+ encoder. Only relevant for absolute axis.
|
|
+ Defaults to 24 which is a typical value for
|
|
+ such devices.
|
|
+ wakeup Boolean, rotary encoder can wake up the
|
|
+ system.
|
|
+ encoding String, the method used to encode steps.
|
|
+ Supported are "gray" (the default and more
|
|
+ common) and "binary".
|
|
+
|
|
+
|
|
+Name: rpi-backlight
|
|
+Info: Raspberry Pi official display backlight driver
|
|
+Load: dtoverlay=rpi-backlight
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: rpi-cirrus-wm5102
|
|
+Info: Configures the Cirrus Logic Audio Card
|
|
+Load: dtoverlay=rpi-cirrus-wm5102
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: rpi-dac
|
|
+Info: Configures the RPi DAC audio card
|
|
+Load: dtoverlay=rpi-dac
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: rpi-display
|
|
+Info: RPi-Display - 2.8" Touch Display by Watterott
|
|
+Load: dtoverlay=rpi-display,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+ fps Delay between frame updates
|
|
+ debug Debug output level {0-7}
|
|
+ xohms Touchpanel sensitivity (X-plate resistance)
|
|
+ swapxy Swap x and y axis
|
|
+ backlight Change backlight GPIO pin {e.g. 12, 18}
|
|
+
|
|
+
|
|
+Name: rpi-ft5406
|
|
+Info: Official Raspberry Pi display touchscreen
|
|
+Load: dtoverlay=rpi-ft5406,<param>=<val>
|
|
+Params: touchscreen-size-x Touchscreen X resolution (default 800)
|
|
+ touchscreen-size-y Touchscreen Y resolution (default 600);
|
|
+ touchscreen-inverted-x Invert touchscreen X coordinates (default 0);
|
|
+ touchscreen-inverted-y Invert touchscreen Y coordinates (default 0);
|
|
+ touchscreen-swapped-x-y Swap X and Y cordinates (default 0);
|
|
+
|
|
+
|
|
+Name: rpi-poe
|
|
+Info: Raspberry Pi PoE HAT fan
|
|
+Load: dtoverlay=rpi-poe,<param>[=<val>]
|
|
+Params: poe_fan_temp0 Temperature (in millicelcius) at which the fan
|
|
+ turns on (default 40000)
|
|
+ poe_fan_temp0_hyst Temperature delta (in millicelcius) at which
|
|
+ the fan turns off (default 2000)
|
|
+ poe_fan_temp1 Temperature (in millicelcius) at which the fan
|
|
+ speeds up (default 45000)
|
|
+ poe_fan_temp1_hyst Temperature delta (in millicelcius) at which
|
|
+ the fan slows down (default 2000)
|
|
+ poe_fan_temp2 Temperature (in millicelcius) at which the fan
|
|
+ speeds up (default 50000)
|
|
+ poe_fan_temp2_hyst Temperature delta (in millicelcius) at which
|
|
+ the fan slows down (default 2000)
|
|
+ poe_fan_temp3 Temperature (in millicelcius) at which the fan
|
|
+ speeds up (default 55000)
|
|
+ poe_fan_temp3_hyst Temperature delta (in millicelcius) at which
|
|
+ the fan slows down (default 5000)
|
|
+
|
|
+
|
|
+Name: rpi-poe-plus
|
|
+Info: Raspberry Pi PoE+ HAT fan
|
|
+Load: dtoverlay=rpi-poe-plus,<param>[=<val>]
|
|
+Params: poe_fan_temp0 Temperature (in millicelcius) at which the fan
|
|
+ turns on (default 40000)
|
|
+ poe_fan_temp0_hyst Temperature delta (in millicelcius) at which
|
|
+ the fan turns off (default 2000)
|
|
+ poe_fan_temp1 Temperature (in millicelcius) at which the fan
|
|
+ speeds up (default 45000)
|
|
+ poe_fan_temp1_hyst Temperature delta (in millicelcius) at which
|
|
+ the fan slows down (default 2000)
|
|
+ poe_fan_temp2 Temperature (in millicelcius) at which the fan
|
|
+ speeds up (default 50000)
|
|
+ poe_fan_temp2_hyst Temperature delta (in millicelcius) at which
|
|
+ the fan slows down (default 2000)
|
|
+ poe_fan_temp3 Temperature (in millicelcius) at which the fan
|
|
+ speeds up (default 55000)
|
|
+ poe_fan_temp3_hyst Temperature delta (in millicelcius) at which
|
|
+ the fan slows down (default 5000)
|
|
+
|
|
+
|
|
+Name: rpi-proto
|
|
+Info: Configures the RPi Proto audio card
|
|
+Load: dtoverlay=rpi-proto
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: rpi-sense
|
|
+Info: Raspberry Pi Sense HAT
|
|
+Load: dtoverlay=rpi-sense
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: rpi-tv
|
|
+Info: Raspberry Pi TV HAT
|
|
+Load: dtoverlay=rpi-tv
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: rpivid-v4l2
|
|
+Info: Load the V4L2 stateless video decoder driver for the HEVC block,
|
|
+ disabling the memory mapped devices in the process.
|
|
+Load: dtoverlay=rpivid-v4l2
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: rra-digidac1-wm8741-audio
|
|
+Info: Configures the Red Rocks Audio DigiDAC1 soundcard
|
|
+Load: dtoverlay=rra-digidac1-wm8741-audio
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: sainsmart18
|
|
+Info: Overlay for the SPI-connected Sainsmart 1.8" display (based on the
|
|
+ ST7735R chip).
|
|
+Load: dtoverlay=sainsmart18,<param>=<val>
|
|
+Params: rotate Display rotation {0,90,180,270}
|
|
+ speed SPI bus speed in Hz (default 4000000)
|
|
+ fps Display frame rate in Hz
|
|
+ bgr Enable BGR mode (default off)
|
|
+ debug Debug output level {0-7}
|
|
+ dc_pin GPIO pin for D/C (default 24)
|
|
+ reset_pin GPIO pin for RESET (default 25)
|
|
+
|
|
+
|
|
+Name: sc16is750-i2c
|
|
+Info: Overlay for the NXP SC16IS750 UART with I2C Interface
|
|
+ Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
|
|
+ select another address, please refer to table 10 in reference manual.
|
|
+Load: dtoverlay=sc16is750-i2c,<param>=<val>
|
|
+Params: int_pin GPIO used for IRQ (default 24)
|
|
+ addr Address (default 0x48)
|
|
+ xtal On-board crystal frequency (default 14745600)
|
|
+
|
|
+
|
|
+Name: sc16is752-i2c
|
|
+Info: Overlay for the NXP SC16IS752 dual UART with I2C Interface
|
|
+ Enables the chip on I2C1 at 0x48 (or the "addr" parameter value). To
|
|
+ select another address, please refer to table 10 in reference manual.
|
|
+Load: dtoverlay=sc16is752-i2c,<param>=<val>
|
|
+Params: int_pin GPIO used for IRQ (default 24)
|
|
+ addr Address (default 0x48)
|
|
+ xtal On-board crystal frequency (default 14745600)
|
|
+
|
|
+
|
|
+Name: sc16is752-spi0
|
|
+Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
|
|
+ Enables the chip on SPI0.
|
|
+Load: dtoverlay=sc16is752-spi0,<param>=<val>
|
|
+Params: int_pin GPIO used for IRQ (default 24)
|
|
+ xtal On-board crystal frequency (default 14745600)
|
|
+
|
|
+
|
|
+Name: sc16is752-spi1
|
|
+Info: Overlay for the NXP SC16IS752 Dual UART with SPI Interface
|
|
+ Enables the chip on SPI1.
|
|
+ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
|
|
+ A+, B+, Zero and PI2 B; as well as the Compute Module.
|
|
+
|
|
+Load: dtoverlay=sc16is752-spi1,<param>=<val>
|
|
+Params: int_pin GPIO used for IRQ (default 24)
|
|
+ xtal On-board crystal frequency (default 14745600)
|
|
+
|
|
+
|
|
+Name: sdhost
|
|
+Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock.
|
|
+ N.B. This overlay is designed for situations where the mmc driver is
|
|
+ the default, so it disables the other (mmc) interface - this will kill
|
|
+ WLAN on a Pi3. If this isn't what you want, either use the sdtweak
|
|
+ overlay or the new sd_* dtparams of the base DTBs.
|
|
+Load: dtoverlay=sdhost,<param>=<val>
|
|
+Params: overclock_50 Clock (in MHz) to use when the MMC framework
|
|
+ requests 50MHz
|
|
+
|
|
+ force_pio Disable DMA support (default off)
|
|
+
|
|
+ pio_limit Number of blocks above which to use DMA
|
|
+ (default 1)
|
|
+
|
|
+ debug Enable debug output (default off)
|
|
+
|
|
+
|
|
+Name: sdio
|
|
+Info: Selects the bcm2835-sdhost SD/MMC driver, optionally with overclock,
|
|
+ and enables SDIO via GPIOs 22-27. An example of use in 1-bit mode is
|
|
+ "dtoverlay=sdio,bus_width=1,gpios_22_25"
|
|
+Load: dtoverlay=sdio,<param>=<val>
|
|
+Params: sdio_overclock SDIO Clock (in MHz) to use when the MMC
|
|
+ framework requests 50MHz
|
|
+
|
|
+ poll_once Disable SDIO-device polling every second
|
|
+ (default on: polling once at boot-time)
|
|
+
|
|
+ bus_width Set the SDIO host bus width (default 4 bits)
|
|
+
|
|
+ gpios_22_25 Select GPIOs 22-25 for 1-bit mode. Must be used
|
|
+ with bus_width=1. This replaces the sdio-1bit
|
|
+ overlay, which is now deprecated.
|
|
+
|
|
+ gpios_34_37 Select GPIOs 34-37 for 1-bit mode. Must be used
|
|
+ with bus_width=1.
|
|
+
|
|
+ gpios_34_39 Select GPIOs 34-39 for 4-bit mode. Must be used
|
|
+ with bus_width=4 (the default).
|
|
+
|
|
+
|
|
+Name: sdio-1bit
|
|
+Info: This overlay is now deprecated. Use
|
|
+ "dtoverlay=sdio,bus_width=1,gpios_22_25" instead.
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: sdtweak
|
|
+Info: This overlay is now deprecated. Use the sd_* dtparams in the
|
|
+ base DTB, e.g. "dtoverlay=sdtweak,poll_once" becomes
|
|
+ "dtparam=sd_poll_once".
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: seeed-can-fd-hat-v1
|
|
+Info: Overlay for Seeed Studio CAN BUS FD HAT with two CAN FD
|
|
+ channels without RTC. Use this overlay if your HAT has no
|
|
+ battery holder.
|
|
+ https://www.seeedstudio.com/2-Channel-CAN-BUS-FD-Shield-for-Raspberry-Pi-p-4072.html
|
|
+Load: dtoverlay=seeed-can-fd-hat-v1
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: seeed-can-fd-hat-v2
|
|
+Info: Overlay for Seeed Studio CAN BUS FD HAT with two CAN FD
|
|
+ channels and an RTC. Use this overlay if your HAT has a
|
|
+ battery holder.
|
|
+ https://www.seeedstudio.com/CAN-BUS-FD-HAT-for-Raspberry-Pi-p-4742.html
|
|
+Load: dtoverlay=seeed-can-fd-hat-v2
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: sh1106-spi
|
|
+Info: Overlay for SH1106 OLED via SPI using fbtft staging driver.
|
|
+Load: dtoverlay=sh1106-spi,<param>=<val>
|
|
+Params: speed SPI bus speed (default 4000000)
|
|
+ rotate Display rotation (0, 90, 180 or 270; default 0)
|
|
+ fps Delay between frame updates (default 25)
|
|
+ debug Debug output level (0-7; default 0)
|
|
+ dc_pin GPIO pin for D/C (default 24)
|
|
+ reset_pin GPIO pin for RESET (default 25)
|
|
+ height Display height (32 or 64; default 64)
|
|
+
|
|
+
|
|
+Name: si446x-spi0
|
|
+Info: Overlay for Si446x UHF Transceiver via SPI using si446x driver.
|
|
+ The driver is currently out-of-tree at
|
|
+ https://github.com/sunipkmukherjee/silabs.git
|
|
+Load: dtoverlay=si446x-spi0,<param>=<val>
|
|
+Params: speed SPI bus speed (default 4000000)
|
|
+ int_pin GPIO pin for interrupts (default 17)
|
|
+ reset_pin GPIO pin for RESET (default 27)
|
|
+
|
|
+
|
|
+Name: smi
|
|
+Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25!
|
|
+Load: dtoverlay=smi
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: smi-dev
|
|
+Info: Enables the userspace interface for the SMI driver
|
|
+Load: dtoverlay=smi-dev
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: smi-nand
|
|
+Info: Enables access to NAND flash via the SMI interface
|
|
+Load: dtoverlay=smi-nand
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: spi-gpio35-39
|
|
+Info: Move SPI function block to GPIO 35 to 39
|
|
+Load: dtoverlay=spi-gpio35-39
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: spi-gpio40-45
|
|
+Info: Move SPI function block to GPIOs 40 to 45
|
|
+Load: dtoverlay=spi-gpio40-45
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: spi-rtc
|
|
+Info: Adds support for a number of SPI Real Time Clock devices
|
|
+Load: dtoverlay=spi-rtc,<param>=<val>
|
|
+Params: ds3232 Select the DS3232 device
|
|
+ ds3234 Select the DS3234 device
|
|
+ pcf2123 Select the PCF2123 device
|
|
+
|
|
+ spi0_0 Use spi0.0 (default)
|
|
+ spi0_1 Use spi0.1
|
|
+ spi1_0 Use spi1.0
|
|
+ spi1_1 Use spi1.1
|
|
+ spi2_0 Use spi2.0
|
|
+ spi2_1 Use spi2.1
|
|
+ cs_high This device requires an active-high CS
|
|
+
|
|
+
|
|
+Name: spi0-1cs
|
|
+Info: Only use one CS pin for SPI0
|
|
+Load: dtoverlay=spi0-1cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 8)
|
|
+ no_miso Don't claim and use the MISO pin (9), freeing
|
|
+ it for other uses.
|
|
+
|
|
+
|
|
+Name: spi0-2cs
|
|
+Info: Change the CS pins for SPI0
|
|
+Load: dtoverlay=spi0-2cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 8)
|
|
+ cs1_pin GPIO pin for CS1 (default 7)
|
|
+ no_miso Don't claim and use the MISO pin (9), freeing
|
|
+ it for other uses.
|
|
+
|
|
+
|
|
+Name: spi0-cs
|
|
+Info: This overlay has been renamed spi0-2cs, keeping spi0-cs as an
|
|
+ alias for backwards compatibility.
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: spi0-hw-cs
|
|
+Info: This overlay has been deprecated and removed because it is no longer
|
|
+ necessary and has been seen to prevent spi0 from working.
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: spi1-1cs
|
|
+Info: Enables spi1 with a single chip select (CS) line and associated spidev
|
|
+ dev node. The gpio pin number for the CS line and spidev device node
|
|
+ creation are configurable.
|
|
+ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
|
|
+ A+, B+, Zero and PI2 B; as well as the Compute Module.
|
|
+Load: dtoverlay=spi1-1cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
|
|
+ cs0_spidev Set to 'disabled' to stop the creation of a
|
|
+ userspace device node /dev/spidev1.0 (default
|
|
+ is 'okay' or enabled).
|
|
+
|
|
+
|
|
+Name: spi1-2cs
|
|
+Info: Enables spi1 with two chip select (CS) lines and associated spidev
|
|
+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
+ creation are configurable.
|
|
+ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
|
|
+ A+, B+, Zero and PI2 B; as well as the Compute Module.
|
|
+Load: dtoverlay=spi1-2cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
|
|
+ cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
|
|
+ cs0_spidev Set to 'disabled' to stop the creation of a
|
|
+ userspace device node /dev/spidev1.0 (default
|
|
+ is 'okay' or enabled).
|
|
+ cs1_spidev Set to 'disabled' to stop the creation of a
|
|
+ userspace device node /dev/spidev1.1 (default
|
|
+ is 'okay' or enabled).
|
|
+
|
|
+
|
|
+Name: spi1-3cs
|
|
+Info: Enables spi1 with three chip select (CS) lines and associated spidev
|
|
+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
+ creation are configurable.
|
|
+ N.B.: spi1 is only accessible on devices with a 40pin header, eg:
|
|
+ A+, B+, Zero and PI2 B; as well as the Compute Module.
|
|
+Load: dtoverlay=spi1-3cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI1_CE0).
|
|
+ cs1_pin GPIO pin for CS1 (default 17 - BCM SPI1_CE1).
|
|
+ cs2_pin GPIO pin for CS2 (default 16 - BCM SPI1_CE2).
|
|
+ cs0_spidev Set to 'disabled' to stop the creation of a
|
|
+ userspace device node /dev/spidev1.0 (default
|
|
+ is 'okay' or enabled).
|
|
+ cs1_spidev Set to 'disabled' to stop the creation of a
|
|
+ userspace device node /dev/spidev1.1 (default
|
|
+ is 'okay' or enabled).
|
|
+ cs2_spidev Set to 'disabled' to stop the creation of a
|
|
+ userspace device node /dev/spidev1.2 (default
|
|
+ is 'okay' or enabled).
|
|
+
|
|
+
|
|
+Name: spi2-1cs
|
|
+Info: Enables spi2 with a single chip select (CS) line and associated spidev
|
|
+ dev node. The gpio pin number for the CS line and spidev device node
|
|
+ creation are configurable.
|
|
+ N.B.: spi2 is only accessible with the Compute Module.
|
|
+Load: dtoverlay=spi2-1cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
|
|
+ cs0_spidev Set to 'disabled' to stop the creation of a
|
|
+ userspace device node /dev/spidev2.0 (default
|
|
+ is 'okay' or enabled).
|
|
+
|
|
+
|
|
+Name: spi2-2cs
|
|
+Info: Enables spi2 with two chip select (CS) lines and associated spidev
|
|
+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
+ creation are configurable.
|
|
+ N.B.: spi2 is only accessible with the Compute Module.
|
|
+Load: dtoverlay=spi2-2cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
|
|
+ cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
|
|
+ cs0_spidev Set to 'disabled' to stop the creation of a
|
|
+ userspace device node /dev/spidev2.0 (default
|
|
+ is 'okay' or enabled).
|
|
+ cs1_spidev Set to 'disabled' to stop the creation of a
|
|
+ userspace device node /dev/spidev2.1 (default
|
|
+ is 'okay' or enabled).
|
|
+
|
|
+
|
|
+Name: spi2-3cs
|
|
+Info: Enables spi2 with three chip select (CS) lines and associated spidev
|
|
+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
+ creation are configurable.
|
|
+ N.B.: spi2 is only accessible with the Compute Module.
|
|
+Load: dtoverlay=spi2-3cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 43 - BCM SPI2_CE0).
|
|
+ cs1_pin GPIO pin for CS1 (default 44 - BCM SPI2_CE1).
|
|
+ cs2_pin GPIO pin for CS2 (default 45 - BCM SPI2_CE2).
|
|
+ cs0_spidev Set to 'disabled' to stop the creation of a
|
|
+ userspace device node /dev/spidev2.0 (default
|
|
+ is 'okay' or enabled).
|
|
+ cs1_spidev Set to 'disabled' to stop the creation of a
|
|
+ userspace device node /dev/spidev2.1 (default
|
|
+ is 'okay' or enabled).
|
|
+ cs2_spidev Set to 'disabled' to stop the creation of a
|
|
+ userspace device node /dev/spidev2.2 (default
|
|
+ is 'okay' or enabled).
|
|
+
|
|
+
|
|
+Name: spi3-1cs
|
|
+Info: Enables spi3 with a single chip select (CS) line and associated spidev
|
|
+ dev node. The gpio pin number for the CS line and spidev device node
|
|
+ creation are configurable. BCM2711 only.
|
|
+Load: dtoverlay=spi3-1cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
|
|
+ cs0_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev3.0 (default
|
|
+ is 'on' or enabled).
|
|
+
|
|
+
|
|
+Name: spi3-2cs
|
|
+Info: Enables spi3 with two chip select (CS) lines and associated spidev
|
|
+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
+ creation are configurable. BCM2711 only.
|
|
+Load: dtoverlay=spi3-2cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 0 - BCM SPI3_CE0).
|
|
+ cs1_pin GPIO pin for CS1 (default 24 - BCM SPI3_CE1).
|
|
+ cs0_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev3.0 (default
|
|
+ is 'on' or enabled).
|
|
+ cs1_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev3.1 (default
|
|
+ is 'on' or enabled).
|
|
+
|
|
+
|
|
+Name: spi4-1cs
|
|
+Info: Enables spi4 with a single chip select (CS) line and associated spidev
|
|
+ dev node. The gpio pin number for the CS line and spidev device node
|
|
+ creation are configurable. BCM2711 only.
|
|
+Load: dtoverlay=spi4-1cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
|
|
+ cs0_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev4.0 (default
|
|
+ is 'on' or enabled).
|
|
+
|
|
+
|
|
+Name: spi4-2cs
|
|
+Info: Enables spi4 with two chip select (CS) lines and associated spidev
|
|
+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
+ creation are configurable. BCM2711 only.
|
|
+Load: dtoverlay=spi4-2cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 4 - BCM SPI4_CE0).
|
|
+ cs1_pin GPIO pin for CS1 (default 25 - BCM SPI4_CE1).
|
|
+ cs0_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev4.0 (default
|
|
+ is 'on' or enabled).
|
|
+ cs1_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev4.1 (default
|
|
+ is 'on' or enabled).
|
|
+
|
|
+
|
|
+Name: spi5-1cs
|
|
+Info: Enables spi5 with a single chip select (CS) line and associated spidev
|
|
+ dev node. The gpio pin numbers for the CS lines and spidev device node
|
|
+ creation are configurable. BCM2711 only.
|
|
+Load: dtoverlay=spi5-1cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
|
|
+ cs0_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev5.0 (default
|
|
+ is 'on' or enabled).
|
|
+
|
|
+
|
|
+Name: spi5-2cs
|
|
+Info: Enables spi5 with two chip select (CS) lines and associated spidev
|
|
+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
+ creation are configurable. BCM2711 only.
|
|
+Load: dtoverlay=spi5-2cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 12 - BCM SPI5_CE0).
|
|
+ cs1_pin GPIO pin for CS1 (default 26 - BCM SPI5_CE1).
|
|
+ cs0_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev5.0 (default
|
|
+ is 'on' or enabled).
|
|
+ cs1_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev5.1 (default
|
|
+ is 'on' or enabled).
|
|
+
|
|
+
|
|
+Name: spi6-1cs
|
|
+Info: Enables spi6 with a single chip select (CS) line and associated spidev
|
|
+ dev node. The gpio pin number for the CS line and spidev device node
|
|
+ creation are configurable. BCM2711 only.
|
|
+Load: dtoverlay=spi6-1cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
|
|
+ cs0_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev6.0 (default
|
|
+ is 'on' or enabled).
|
|
+
|
|
+
|
|
+Name: spi6-2cs
|
|
+Info: Enables spi6 with two chip select (CS) lines and associated spidev
|
|
+ dev nodes. The gpio pin numbers for the CS lines and spidev device node
|
|
+ creation are configurable. BCM2711 only.
|
|
+Load: dtoverlay=spi6-2cs,<param>=<val>
|
|
+Params: cs0_pin GPIO pin for CS0 (default 18 - BCM SPI6_CE0).
|
|
+ cs1_pin GPIO pin for CS1 (default 27 - BCM SPI6_CE1).
|
|
+ cs0_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev6.0 (default
|
|
+ is 'on' or enabled).
|
|
+ cs1_spidev Set to 'off' to prevent the creation of a
|
|
+ userspace device node /dev/spidev6.1 (default
|
|
+ is 'on' or enabled).
|
|
+
|
|
+
|
|
+Name: ssd1306
|
|
+Info: Overlay for activation of SSD1306 over I2C OLED display framebuffer.
|
|
+Load: dtoverlay=ssd1306,<param>=<val>
|
|
+Params: address Location in display memory of first character.
|
|
+ (default=0)
|
|
+ width Width of display. (default=128)
|
|
+ height Height of display. (default=64)
|
|
+ offset virtual channel a. (default=0)
|
|
+ normal Has no effect on displays tested. (default=not
|
|
+ set)
|
|
+ sequential Set this if every other scan line is missing.
|
|
+ (default=not set)
|
|
+ remapped Set this if display is garbled. (default=not
|
|
+ set)
|
|
+ inverted Set this if display is inverted and mirrored.
|
|
+ (default=not set)
|
|
+
|
|
+ Examples:
|
|
+ Typical usage for 128x64 display: dtoverlay=ssd1306,inverted
|
|
+
|
|
+ Typical usage for 128x32 display: dtoverlay=ssd1306,inverted,sequential
|
|
+
|
|
+ i2c_baudrate=400000 will speed up the display.
|
|
+
|
|
+ i2c_baudrate=1000000 seems to work even though it's not officially
|
|
+ supported by the hardware, and is faster still.
|
|
+
|
|
+ For more information refer to the device datasheet at:
|
|
+ https://cdn-shop.adafruit.com/datasheets/SSD1306.pdf
|
|
+
|
|
+
|
|
+Name: ssd1306-spi
|
|
+Info: Overlay for SSD1306 OLED via SPI using fbtft staging driver.
|
|
+Load: dtoverlay=ssd1306-spi,<param>=<val>
|
|
+Params: speed SPI bus speed (default 10000000)
|
|
+ rotate Display rotation (0, 90, 180 or 270; default 0)
|
|
+ fps Delay between frame updates (default 25)
|
|
+ debug Debug output level (0-7; default 0)
|
|
+ dc_pin GPIO pin for D/C (default 24)
|
|
+ reset_pin GPIO pin for RESET (default 25)
|
|
+ height Display height (32 or 64; default 64)
|
|
+
|
|
+
|
|
+Name: ssd1331-spi
|
|
+Info: Overlay for SSD1331 OLED via SPI using fbtft staging driver.
|
|
+Load: dtoverlay=ssd1331-spi,<param>=<val>
|
|
+Params: speed SPI bus speed (default 4500000)
|
|
+ rotate Display rotation (0, 90, 180 or 270; default 0)
|
|
+ fps Delay between frame updates (default 25)
|
|
+ debug Debug output level (0-7; default 0)
|
|
+ dc_pin GPIO pin for D/C (default 24)
|
|
+ reset_pin GPIO pin for RESET (default 25)
|
|
+
|
|
+
|
|
+Name: ssd1351-spi
|
|
+Info: Overlay for SSD1351 OLED via SPI using fbtft staging driver.
|
|
+Load: dtoverlay=ssd1351-spi,<param>=<val>
|
|
+Params: speed SPI bus speed (default 4500000)
|
|
+ rotate Display rotation (0, 90, 180 or 270; default 0)
|
|
+ fps Delay between frame updates (default 25)
|
|
+ debug Debug output level (0-7; default 0)
|
|
+ dc_pin GPIO pin for D/C (default 24)
|
|
+ reset_pin GPIO pin for RESET (default 25)
|
|
+
|
|
+
|
|
+Name: superaudioboard
|
|
+Info: Configures the SuperAudioBoard sound card
|
|
+Load: dtoverlay=superaudioboard,<param>=<val>
|
|
+Params: gpiopin GPIO pin for codec reset
|
|
+
|
|
+
|
|
+Name: sx150x
|
|
+Info: Configures the Semtech SX150X I2C GPIO expanders.
|
|
+Load: dtoverlay=sx150x,<param>=<val>
|
|
+Params: sx150<x>-<n>-<m> Enables SX150X device on I2C#<n> with slave
|
|
+ address <m>. <x> may be 1-9. <n> may be 0 or 1.
|
|
+ Permissible values of <m> (which is denoted in
|
|
+ hex) depend on the device variant. For SX1501,
|
|
+ SX1502, SX1504 and SX1505, <m> may be 20 or 21.
|
|
+ For SX1503 and SX1506, <m> may be 20. For
|
|
+ SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
|
|
+ For SX1508, <m> may be 20, 21, 22 or 23.
|
|
+
|
|
+ sx150<x>-<n>-<m>-int-gpio
|
|
+ Integer, enables interrupts on SX150X device on
|
|
+ I2C#<n> with slave address <m>, specifies
|
|
+ the GPIO pin to which NINT output of SX150X is
|
|
+ connected.
|
|
+
|
|
+
|
|
+Name: tc358743
|
|
+Info: Toshiba TC358743 HDMI to CSI-2 bridge chip.
|
|
+ Uses Unicam 1, which is the standard camera connector on most Pi
|
|
+ variants.
|
|
+Load: dtoverlay=tc358743,<param>=<val>
|
|
+Params: 4lane Use 4 lanes (only applicable to Compute Modules
|
|
+ CAM1 connector).
|
|
+
|
|
+ link-frequency Set the link frequency. Only values of 297000000
|
|
+ (574Mbit/s) and 486000000 (972Mbit/s - default)
|
|
+ are supported by the driver.
|
|
+
|
|
+
|
|
+Name: tc358743-audio
|
|
+Info: Used in combination with the tc358743-fast overlay to route the audio
|
|
+ from the TC358743 over I2S to the Pi.
|
|
+ Wiring is LRCK/WFS to GPIO 19, BCK/SCK to GPIO 18, and DATA/SD to GPIO
|
|
+ 20.
|
|
+Load: dtoverlay=tc358743-audio,<param>=<val>
|
|
+Params: card-name Override the default, "tc358743", card name.
|
|
+
|
|
+
|
|
+Name: tinylcd35
|
|
+Info: 3.5" Color TFT Display by www.tinylcd.com
|
|
+ Options: Touch, RTC, keypad
|
|
+Load: dtoverlay=tinylcd35,<param>=<val>
|
|
+Params: speed Display SPI bus speed
|
|
+
|
|
+ rotate Display rotation {0,90,180,270}
|
|
+
|
|
+ fps Delay between frame updates
|
|
+
|
|
+ debug Debug output level {0-7}
|
|
+
|
|
+ touch Enable touch panel
|
|
+
|
|
+ touchgpio Touch controller IRQ GPIO
|
|
+
|
|
+ xohms Touchpanel: Resistance of X-plate in ohms
|
|
+
|
|
+ rtc-pcf PCF8563 Real Time Clock
|
|
+
|
|
+ rtc-ds DS1307 Real Time Clock
|
|
+
|
|
+ keypad Enable keypad
|
|
+
|
|
+ Examples:
|
|
+ Display with touchpanel, PCF8563 RTC and keypad:
|
|
+ dtoverlay=tinylcd35,touch,rtc-pcf,keypad
|
|
+ Old touch display:
|
|
+ dtoverlay=tinylcd35,touch,touchgpio=3
|
|
+
|
|
+
|
|
+Name: tpm-slb9670
|
|
+Info: Enables support for Infineon SLB9670 Trusted Platform Module add-on
|
|
+ boards, which can be used as a secure key storage and hwrng,
|
|
+ available as "Iridium SLB9670" by Infineon and "LetsTrust TPM" by pi3g.
|
|
+Load: dtoverlay=tpm-slb9670
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: uart0
|
|
+Info: Change the pin usage of uart0
|
|
+Load: dtoverlay=uart0,<param>=<val>
|
|
+Params: txd0_pin GPIO pin for TXD0 (14, 32 or 36 - default 14)
|
|
+
|
|
+ rxd0_pin GPIO pin for RXD0 (15, 33 or 37 - default 15)
|
|
+
|
|
+ pin_func Alternative pin function - 4(Alt0) for 14&15,
|
|
+ 7(Alt3) for 32&33, 6(Alt2) for 36&37
|
|
+
|
|
+
|
|
+Name: uart1
|
|
+Info: Change the pin usage of uart1
|
|
+Load: dtoverlay=uart1,<param>=<val>
|
|
+Params: txd1_pin GPIO pin for TXD1 (14, 32 or 40 - default 14)
|
|
+
|
|
+ rxd1_pin GPIO pin for RXD1 (15, 33 or 41 - default 15)
|
|
+
|
|
+
|
|
+Name: uart2
|
|
+Info: Enable uart 2 on GPIOs 0-3. BCM2711 only.
|
|
+Load: dtoverlay=uart2,<param>
|
|
+Params: ctsrts Enable CTS/RTS on GPIOs 2-3 (default off)
|
|
+
|
|
+
|
|
+Name: uart3
|
|
+Info: Enable uart 3 on GPIOs 4-7. BCM2711 only.
|
|
+Load: dtoverlay=uart3,<param>
|
|
+Params: ctsrts Enable CTS/RTS on GPIOs 6-7 (default off)
|
|
+
|
|
+
|
|
+Name: uart4
|
|
+Info: Enable uart 4 on GPIOs 8-11. BCM2711 only.
|
|
+Load: dtoverlay=uart4,<param>
|
|
+Params: ctsrts Enable CTS/RTS on GPIOs 10-11 (default off)
|
|
+
|
|
+
|
|
+Name: uart5
|
|
+Info: Enable uart 5 on GPIOs 12-15. BCM2711 only.
|
|
+Load: dtoverlay=uart5,<param>
|
|
+Params: ctsrts Enable CTS/RTS on GPIOs 14-15 (default off)
|
|
+
|
|
+
|
|
+Name: udrc
|
|
+Info: Configures the NW Digital Radio UDRC Hat
|
|
+Load: dtoverlay=udrc,<param>=<val>
|
|
+Params: alsaname Name of the ALSA audio device (default "udrc")
|
|
+
|
|
+
|
|
+Name: ugreen-dabboard
|
|
+Info: Configures the ugreen-dabboard I2S overlay
|
|
+ This is a simple overlay based on the simple-audio-card and the dmic
|
|
+ codec. It has the speciality that it is configured to use the codec
|
|
+ as a master I2S device. It works for example with the Si468x DAB
|
|
+ receiver on the uGreen DABBoard.
|
|
+Load: dtoverlay=ugreen-dabboard,<param>=<val>
|
|
+Params: card-name Override the default, "dabboard", card name.
|
|
+
|
|
+
|
|
+Name: upstream
|
|
+Info: Allow usage of downstream .dtb with upstream kernel. Comprises the
|
|
+ vc4-kms-v3d and dwc2 overlays.
|
|
+Load: dtoverlay=upstream
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: upstream-aux-interrupt
|
|
+Info: This overlay has been deprecated and removed because it is no longer
|
|
+ necessary.
|
|
+Load: <Deprecated>
|
|
+
|
|
+
|
|
+Name: upstream-pi4
|
|
+Info: Allow usage of downstream .dtb with upstream kernel on Pi 4. Comprises
|
|
+ the vc4-kms-v3d-pi4 and dwc2 overlays.
|
|
+Load: dtoverlay=upstream-pi4
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: vc4-fkms-v3d
|
|
+Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx
|
|
+ display stack.
|
|
+Load: dtoverlay=vc4-fkms-v3d,<param>
|
|
+Params: cma-512 CMA is 512MB (needs 1GB)
|
|
+ cma-448 CMA is 448MB (needs 1GB)
|
|
+ cma-384 CMA is 384MB (needs 1GB)
|
|
+ cma-320 CMA is 320MB (needs 1GB)
|
|
+ cma-256 CMA is 256MB (needs 1GB)
|
|
+ cma-192 CMA is 192MB (needs 1GB)
|
|
+ cma-128 CMA is 128MB
|
|
+ cma-96 CMA is 96MB
|
|
+ cma-64 CMA is 64MB
|
|
+ cma-size CMA size in bytes, 4MB aligned
|
|
+ cma-default Use upstream's default value
|
|
+
|
|
+
|
|
+Name: vc4-fkms-v3d-pi4
|
|
+Info: Enable Eric Anholt's DRM VC4 V3D driver on top of the dispmanx
|
|
+ display stack.
|
|
+Load: dtoverlay=vc4-fkms-v3d-pi4,<param>
|
|
+Params: cma-512 CMA is 512MB (needs 1GB)
|
|
+ cma-448 CMA is 448MB (needs 1GB)
|
|
+ cma-384 CMA is 384MB (needs 1GB)
|
|
+ cma-320 CMA is 320MB (needs 1GB)
|
|
+ cma-256 CMA is 256MB (needs 1GB)
|
|
+ cma-192 CMA is 192MB (needs 1GB)
|
|
+ cma-128 CMA is 128MB
|
|
+ cma-96 CMA is 96MB
|
|
+ cma-64 CMA is 64MB
|
|
+ cma-size CMA size in bytes, 4MB aligned
|
|
+ cma-default Use upstream's default value
|
|
+
|
|
+
|
|
+Name: vc4-kms-dpi-at056tn53v1
|
|
+Info: Enable an Innolux 5.6in VGA TFT connected to DPI interface under KMS.
|
|
+ Requires vc4-kms-v3d to be loaded.
|
|
+Load: dtoverlay=vc4-kms-dpi-at056tn53v1
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: vc4-kms-dsi-7inch
|
|
+Info: Enable the Raspberry Pi DSI 7" screen.
|
|
+ Includes the edt-ft5406 for the touchscreen element.
|
|
+ Requires vc4-kms-v3d to be loaded.
|
|
+Load: dtoverlay=vc4-kms-dsi-7inch,<param>=<val>
|
|
+Params: sizex Touchscreen size x (default 800)
|
|
+ sizey Touchscreen size y (default 480)
|
|
+ invx Touchscreen inverted x axis
|
|
+ invy Touchscreen inverted y axis
|
|
+ swapxy Touchscreen swapped x y axis
|
|
+ disable_touch Disables the touch screen overlay driver
|
|
+
|
|
+
|
|
+Name: vc4-kms-dsi-lt070me05000
|
|
+Info: Enable a JDI LT070ME05000 DSI display on DSI1.
|
|
+ Note that this is a 4 lane DSI device, so it will only work on a Compute
|
|
+ Module.
|
|
+ Requires vc4-kms-v3d to be loaded.
|
|
+Load: dtoverlay=vc4-kms-dsi-lt070me05000,<param>
|
|
+Params: reset GPIO for the reset signal (default 17)
|
|
+ enable GPIO for the enable signal (default 4)
|
|
+ dcdc-en GPIO for the DC-DC converter enable (default 5)
|
|
+
|
|
+
|
|
+Name: vc4-kms-dsi-lt070me05000-v2
|
|
+Info: Enable a JDI LT070ME05000 DSI display on DSI1 using Harlab's V2
|
|
+ interface board.
|
|
+ Note that this is a 4 lane DSI device, so it will only work on a Compute
|
|
+ Module.
|
|
+ Requires vc4-kms-v3d to be loaded.
|
|
+Load: dtoverlay=vc4-kms-dsi-lt070me05000-v2
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: vc4-kms-kippah-7inch
|
|
+Info: Enable the Adafruit DPI Kippah with the 7" Ontat panel attached.
|
|
+ Requires vc4-kms-v3d to be loaded.
|
|
+Load: dtoverlay=vc4-kms-kippah-7inch
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: vc4-kms-v3d
|
|
+Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver.
|
|
+Load: dtoverlay=vc4-kms-v3d,<param>
|
|
+Params: cma-512 CMA is 512MB (needs 1GB)
|
|
+ cma-448 CMA is 448MB (needs 1GB)
|
|
+ cma-384 CMA is 384MB (needs 1GB)
|
|
+ cma-320 CMA is 320MB (needs 1GB)
|
|
+ cma-256 CMA is 256MB (needs 1GB)
|
|
+ cma-192 CMA is 192MB (needs 1GB)
|
|
+ cma-128 CMA is 128MB
|
|
+ cma-96 CMA is 96MB
|
|
+ cma-64 CMA is 64MB
|
|
+ cma-size CMA size in bytes, 4MB aligned
|
|
+ cma-default Use upstream's default value
|
|
+ audio Enable or disable audio over HDMI (default "on")
|
|
+ noaudio Disable all HDMI audio (default "off")
|
|
+ nocomposite Disable the composite video output (default
|
|
+ "off")
|
|
+
|
|
+
|
|
+Name: vc4-kms-v3d-pi4
|
|
+Info: Enable Eric Anholt's DRM VC4 HDMI/HVS/V3D driver for Pi4.
|
|
+Load: dtoverlay=vc4-kms-v3d-pi4,<param>
|
|
+Params: cma-512 CMA is 512MB
|
|
+ cma-448 CMA is 448MB
|
|
+ cma-384 CMA is 384MB
|
|
+ cma-320 CMA is 320MB
|
|
+ cma-256 CMA is 256MB
|
|
+ cma-192 CMA is 192MB
|
|
+ cma-128 CMA is 128MB
|
|
+ cma-96 CMA is 96MB
|
|
+ cma-64 CMA is 64MB
|
|
+ cma-size CMA size in bytes, 4MB aligned
|
|
+ cma-default Use upstream's default value
|
|
+ audio Enable or disable audio over HDMI0 (default
|
|
+ "on")
|
|
+ audio1 Enable or disable audio over HDMI1 (default
|
|
+ "on")
|
|
+ noaudio Disable all HDMI audio (default "off")
|
|
+ composite Enable the composite output (disables all other
|
|
+ outputs)
|
|
+
|
|
+
|
|
+Name: vc4-kms-vga666
|
|
+Info: Enable the VGA666 (resistor ladder ADC) for the vc4-kms-v3d driver.
|
|
+ Requires vc4-kms-v3d to be loaded.
|
|
+Load: dtoverlay=vc4-kms-vga666,<param>
|
|
+Params: ddc Enables GPIOs 0&1 as the I2C to read the EDID
|
|
+ from the display. NB These are NOT 5V tolerant
|
|
+ GPIOs, therefore level shifters are required.
|
|
+
|
|
+
|
|
+Name: vga666
|
|
+Info: Overlay for the Fen Logic VGA666 board
|
|
+ This uses GPIOs 2-21 (so no I2C), and activates the output 2-3 seconds
|
|
+ after the kernel has started.
|
|
+ NOT for use with vc4-kms-v3d.
|
|
+Load: dtoverlay=vga666
|
|
+Params: <None>
|
|
+
|
|
+
|
|
+Name: w1-gpio
|
|
+Info: Configures the w1-gpio Onewire interface module.
|
|
+ Use this overlay if you *don't* need a GPIO to drive an external pullup.
|
|
+Load: dtoverlay=w1-gpio,<param>=<val>
|
|
+Params: gpiopin GPIO for I/O (default "4")
|
|
+ pullup Now enabled by default (ignored)
|
|
+
|
|
+
|
|
+Name: w1-gpio-pullup
|
|
+Info: Configures the w1-gpio Onewire interface module.
|
|
+ Use this overlay if you *do* need a GPIO to drive an external pullup.
|
|
+Load: dtoverlay=w1-gpio-pullup,<param>=<val>
|
|
+Params: gpiopin GPIO for I/O (default "4")
|
|
+ extpullup GPIO for external pullup (default "5")
|
|
+ pullup Now enabled by default (ignored)
|
|
+
|
|
+
|
|
+Name: w5500
|
|
+Info: Overlay for the Wiznet W5500 Ethernet Controller on SPI0
|
|
+Load: dtoverlay=w5500,<param>=<val>
|
|
+Params: int_pin GPIO used for INT (default 25)
|
|
+
|
|
+ speed SPI bus speed (default 30000000)
|
|
+
|
|
+ cs SPI bus Chip Select (default 0)
|
|
+
|
|
+
|
|
+Name: wittypi
|
|
+Info: Configures the wittypi RTC module.
|
|
+Load: dtoverlay=wittypi,<param>=<val>
|
|
+Params: led_gpio GPIO for LED (default "17")
|
|
+ led_trigger Choose which activity the LED tracks (default
|
|
+ "default-on")
|
|
+
|
|
+
|
|
+Name: wm8960-soundcard
|
|
+Info: Overlay for the Waveshare wm8960 soundcard
|
|
+Load: dtoverlay=wm8960-soundcard,<param>=<val>
|
|
+Params: alsaname Changes the card name in ALSA
|
|
+ compatible Changes the codec compatibility
|
|
+
|
|
+
|
|
+Troubleshooting
|
|
+===============
|
|
+
|
|
+If you are experiencing problems that you think are DT-related, enable DT
|
|
+diagnostic output by adding this to /boot/config.txt:
|
|
+
|
|
+ dtdebug=on
|
|
+
|
|
+and rebooting. Then run:
|
|
+
|
|
+ sudo vcdbg log msg
|
|
+
|
|
+and look for relevant messages.
|
|
+
|
|
+Further reading
|
|
+===============
|
|
+
|
|
+This is only meant to be a quick introduction to the subject of Device Tree on
|
|
+Raspberry Pi. There is a more complete explanation here:
|
|
+
|
|
+http://www.raspberrypi.org/documentation/configuration/device-tree.md
|
|
diff --git a/arch/arm/boot/dts/overlays/act-led-overlay.dts b/arch/arm/boot/dts/overlays/act-led-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..2f4bbb407f89
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/act-led-overlay.dts
|
|
@@ -0,0 +1,27 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/* Pi3 uses a GPIO expander to drive the LEDs which can only be accessed
|
|
+ from the VPU. There is a special driver for this with a separate DT node,
|
|
+ which has the unfortunate consequence of breaking the act_led_gpio and
|
|
+ act_led_activelow dtparams.
|
|
+
|
|
+ This overlay changes the GPIO controller back to the standard one and
|
|
+ restores the dtparams.
|
|
+*/
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&act_led>;
|
|
+ frag0: __overlay__ {
|
|
+ gpios = <&gpio 0 0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpio = <&frag0>,"gpios:4";
|
|
+ activelow = <&frag0>,"gpios:8";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/adafruit18-overlay.dts b/arch/arm/boot/dts/overlays/adafruit18-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e1ce94a8cd3e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/adafruit18-overlay.dts
|
|
@@ -0,0 +1,55 @@
|
|
+/*
|
|
+ * Device Tree overlay for Adafruit 1.8" TFT LCD with ST7735R chip 160x128
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ af18: adafruit18@0 {
|
|
+ compatible = "fbtft,adafruit18";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ spi-max-frequency = <40000000>;
|
|
+ rotate = <90>;
|
|
+ buswidth = <8>;
|
|
+ fps = <50>;
|
|
+ height = <160>;
|
|
+ width = <128>;
|
|
+ reset-gpios = <&gpio 25 1>;
|
|
+ dc-gpios = <&gpio 24 0>;
|
|
+ led-gpios = <&gpio 18 0>;
|
|
+ debug = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ green = <&af18>, "compatible=fbtft,adafruit18_green";
|
|
+ speed = <&af18>,"spi-max-frequency:0";
|
|
+ rotate = <&af18>,"rotate:0";
|
|
+ fps = <&af18>,"fps:0";
|
|
+ bgr = <&af18>,"bgr?";
|
|
+ debug = <&af18>,"debug:0";
|
|
+ dc_pin = <&af18>,"dc-gpios:4";
|
|
+ reset_pin = <&af18>,"reset-gpios:4";
|
|
+ led_pin = <&af18>,"led-gpios:4";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..298488e19156
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/adau1977-adc-overlay.dts
|
|
@@ -0,0 +1,40 @@
|
|
+// Definitions for ADAU1977 ADC
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c>;
|
|
+
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ adau1977: codec@11 {
|
|
+ compatible = "adi,adau1977";
|
|
+ reg = <0x11>;
|
|
+ reset-gpios = <&gpio 5 0>;
|
|
+ AVDD-supply = <&vdd_3v3_reg>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "adi,adau1977-adc";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..5fed769d2526
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/adau7002-simple-overlay.dts
|
|
@@ -0,0 +1,52 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ adau7002_codec: adau7002-codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "adi,adau7002";
|
|
+/* IOVDD-supply = <&supply>;*/
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ sound_overlay: __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ simple-audio-card,format = "i2s";
|
|
+ simple-audio-card,name = "adau7002";
|
|
+ simple-audio-card,bitclock-slave = <&dailink0_slave>;
|
|
+ simple-audio-card,frame-slave = <&dailink0_slave>;
|
|
+ simple-audio-card,widgets =
|
|
+ "Microphone", "Microphone Jack";
|
|
+ simple-audio-card,routing =
|
|
+ "PDM_DAT", "Microphone Jack";
|
|
+ status = "okay";
|
|
+ simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ };
|
|
+ dailink0_slave: simple-audio-card,codec {
|
|
+ sound-dai = <&adau7002_codec>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+
|
|
+ __overrides__ {
|
|
+ card-name = <&sound_overlay>,"simple-audio-card,name";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ads1015-overlay.dts b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..dc1764613a8b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ads1015-overlay.dts
|
|
@@ -0,0 +1,98 @@
|
|
+/*
|
|
+ * 2016 - Erik Sejr
|
|
+ */
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+ /* ----------- ADS1015 ------------ */
|
|
+ fragment@0 {
|
|
+ target = <&i2c_arm>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+ ads1015: ads1015@48 {
|
|
+ compatible = "ti,ads1015";
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <0x48>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&ads1015>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ channel_a: channel_a {
|
|
+ reg = <4>;
|
|
+ ti,gain = <2>;
|
|
+ ti,datarate = <4>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&ads1015>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ channel_b: channel_b {
|
|
+ reg = <5>;
|
|
+ ti,gain = <2>;
|
|
+ ti,datarate = <4>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&ads1015>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ channel_c: channel_c {
|
|
+ reg = <6>;
|
|
+ ti,gain = <2>;
|
|
+ ti,datarate = <4>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&ads1015>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ channel_d: channel_d {
|
|
+ reg = <7>;
|
|
+ ti,gain = <2>;
|
|
+ ti,datarate = <4>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ addr = <&ads1015>,"reg:0";
|
|
+ cha_enable = <0>,"=1";
|
|
+ cha_cfg = <&channel_a>,"reg:0";
|
|
+ cha_gain = <&channel_a>,"ti,gain:0";
|
|
+ cha_datarate = <&channel_a>,"ti,datarate:0";
|
|
+ chb_enable = <0>,"=2";
|
|
+ chb_cfg = <&channel_b>,"reg:0";
|
|
+ chb_gain = <&channel_b>,"ti,gain:0";
|
|
+ chb_datarate = <&channel_b>,"ti,datarate:0";
|
|
+ chc_enable = <0>,"=3";
|
|
+ chc_cfg = <&channel_c>,"reg:0";
|
|
+ chc_gain = <&channel_c>,"ti,gain:0";
|
|
+ chc_datarate = <&channel_c>,"ti,datarate:0";
|
|
+ chd_enable = <0>,"=4";
|
|
+ chd_cfg = <&channel_d>,"reg:0";
|
|
+ chd_gain = <&channel_d>,"ti,gain:0";
|
|
+ chd_datarate = <&channel_d>,"ti,datarate:0";
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ads1115-overlay.dts b/arch/arm/boot/dts/overlays/ads1115-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e44ced704ee2
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ads1115-overlay.dts
|
|
@@ -0,0 +1,103 @@
|
|
+/*
|
|
+ * TI ADS1115 multi-channel ADC overlay
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_arm>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ads1115: ads1115@48 {
|
|
+ compatible = "ti,ads1115";
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <0x48>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&ads1115>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ channel_a: channel_a {
|
|
+ reg = <4>;
|
|
+ ti,gain = <1>;
|
|
+ ti,datarate = <7>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&ads1115>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ channel_b: channel_b {
|
|
+ reg = <5>;
|
|
+ ti,gain = <1>;
|
|
+ ti,datarate = <7>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&ads1115>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ channel_c: channel_c {
|
|
+ reg = <6>;
|
|
+ ti,gain = <1>;
|
|
+ ti,datarate = <7>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&ads1115>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ channel_d: channel_d {
|
|
+ reg = <7>;
|
|
+ ti,gain = <1>;
|
|
+ ti,datarate = <7>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ addr = <&ads1115>,"reg:0";
|
|
+ cha_enable = <0>,"=1";
|
|
+ cha_cfg = <&channel_a>,"reg:0";
|
|
+ cha_gain = <&channel_a>,"ti,gain:0";
|
|
+ cha_datarate = <&channel_a>,"ti,datarate:0";
|
|
+ chb_enable = <0>,"=2";
|
|
+ chb_cfg = <&channel_b>,"reg:0";
|
|
+ chb_gain = <&channel_b>,"ti,gain:0";
|
|
+ chb_datarate = <&channel_b>,"ti,datarate:0";
|
|
+ chc_enable = <0>,"=3";
|
|
+ chc_cfg = <&channel_c>,"reg:0";
|
|
+ chc_gain = <&channel_c>,"ti,gain:0";
|
|
+ chc_datarate = <&channel_c>,"ti,datarate:0";
|
|
+ chd_enable = <0>,"=4";
|
|
+ chd_cfg = <&channel_d>,"reg:0";
|
|
+ chd_gain = <&channel_d>,"ti,gain:0";
|
|
+ chd_datarate = <&channel_d>,"ti,datarate:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ads7846-overlay.dts b/arch/arm/boot/dts/overlays/ads7846-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..1c5c9b6bb6ff
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ads7846-overlay.dts
|
|
@@ -0,0 +1,89 @@
|
|
+/*
|
|
+ * Generic Device Tree overlay for the ADS7846 touch controller
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ ads7846_pins: ads7846_pins {
|
|
+ brcm,pins = <255>; /* illegal default value */
|
|
+ brcm,function = <0>; /* in */
|
|
+ brcm,pull = <0>; /* none */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ads7846: ads7846@1 {
|
|
+ compatible = "ti,ads7846";
|
|
+ reg = <1>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&ads7846_pins>;
|
|
+
|
|
+ spi-max-frequency = <2000000>;
|
|
+ interrupts = <255 2>; /* high-to-low edge triggered */
|
|
+ interrupt-parent = <&gpio>;
|
|
+ pendown-gpio = <&gpio 255 0>;
|
|
+
|
|
+ /* driver defaults */
|
|
+ ti,x-min = /bits/ 16 <0>;
|
|
+ ti,y-min = /bits/ 16 <0>;
|
|
+ ti,x-max = /bits/ 16 <0x0FFF>;
|
|
+ ti,y-max = /bits/ 16 <0x0FFF>;
|
|
+ ti,pressure-min = /bits/ 16 <0>;
|
|
+ ti,pressure-max = /bits/ 16 <0xFFFF>;
|
|
+ ti,x-plate-ohms = /bits/ 16 <400>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ cs = <&ads7846>,"reg:0";
|
|
+ speed = <&ads7846>,"spi-max-frequency:0";
|
|
+ penirq = <&ads7846_pins>,"brcm,pins:0", /* REQUIRED */
|
|
+ <&ads7846>,"interrupts:0",
|
|
+ <&ads7846>,"pendown-gpio:4";
|
|
+ penirq_pull = <&ads7846_pins>,"brcm,pull:0";
|
|
+ swapxy = <&ads7846>,"ti,swap-xy?";
|
|
+ xmin = <&ads7846>,"ti,x-min;0";
|
|
+ ymin = <&ads7846>,"ti,y-min;0";
|
|
+ xmax = <&ads7846>,"ti,x-max;0";
|
|
+ ymax = <&ads7846>,"ti,y-max;0";
|
|
+ pmin = <&ads7846>,"ti,pressure-min;0";
|
|
+ pmax = <&ads7846>,"ti,pressure-max;0";
|
|
+ xohms = <&ads7846>,"ti,x-plate-ohms;0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/adv7282m-overlay.dts b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..5d85dfd0595c
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/adv7282m-overlay.dts
|
|
@@ -0,0 +1,65 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for Analog Devices ADV7282-M video to CSI2 bridge on VC I2C bus
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ adv728x: adv728x@21 {
|
|
+ compatible = "adi,adv7282-m";
|
|
+ reg = <0x21>;
|
|
+ status = "okay";
|
|
+ clock-frequency = <24000000>;
|
|
+ port {
|
|
+ adv728x_0: endpoint {
|
|
+ remote-endpoint = <&csi1_ep>;
|
|
+ clock-lanes = <0>;
|
|
+ data-lanes = <1>;
|
|
+ link-frequencies =
|
|
+ /bits/ 64 <297000000>;
|
|
+
|
|
+ mclk-frequency = <12000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@1 {
|
|
+ target = <&csi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ csi1_ep: endpoint {
|
|
+ remote-endpoint = <&adv728x_0>;
|
|
+ data-lanes = <1>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@2 {
|
|
+ target = <&i2c0if>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c0mux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ addr = <&adv728x>,"reg:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts b/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ea392e886984
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/adv728x-m-overlay.dts
|
|
@@ -0,0 +1,37 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for Analog Devices ADV728[0|1|2]-M video to CSI2 bridges on VC
|
|
+// I2C bus
|
|
+
|
|
+#include "adv7282m-overlay.dts"
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ // Fragment numbers deliberately high to avoid conflicts with the
|
|
+ // included adv7282m overlay file.
|
|
+
|
|
+ fragment@101 {
|
|
+ target = <&adv728x>;
|
|
+ __dormant__ {
|
|
+ compatible = "adi,adv7280-m";
|
|
+ };
|
|
+ };
|
|
+ fragment@102 {
|
|
+ target = <&adv728x>;
|
|
+ __dormant__ {
|
|
+ compatible = "adi,adv7281-m";
|
|
+ };
|
|
+ };
|
|
+ fragment@103 {
|
|
+ target = <&adv728x>;
|
|
+ __dormant__ {
|
|
+ compatible = "adi,adv7281-ma";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ adv7280m = <0>, "+101";
|
|
+ adv7281m = <0>, "+102";
|
|
+ adv7281ma = <0>, "+103";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..82f9b3734fb1
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/akkordion-iqdacplus-overlay.dts
|
|
@@ -0,0 +1,49 @@
|
|
+// Definitions for Digital Dreamtime Akkordion using IQaudIO DAC+ or DACZero
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm5122@4c {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4c>;
|
|
+ AVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ CPVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ frag2: __overlay__ {
|
|
+ compatible = "iqaudio,iqaudio-dac";
|
|
+ card_name = "Akkordion";
|
|
+ dai_name = "IQaudIO DAC";
|
|
+ dai_stream_name = "IQaudIO DAC HiFi";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..873cb2fab52b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts
|
|
@@ -0,0 +1,59 @@
|
|
+/*
|
|
+ * Definitions for Allo Boss DAC board
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ boss_osc: boss_osc {
|
|
+ compatible = "allo,dac-clk";
|
|
+ #clock-cells = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm5122@4d {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ clocks = <&boss_osc>;
|
|
+ reg = <0x4d>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ boss_dac: __overlay__ {
|
|
+ compatible = "allo,boss-dac";
|
|
+ i2s-controller = <&i2s>;
|
|
+ mute-gpios = <&gpio 6 1>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain = <&boss_dac>,"allo,24db_digital_gain?";
|
|
+ slave = <&boss_dac>,"allo,slave?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..a6adfb495eb9
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/allo-boss2-dac-audio-overlay.dts
|
|
@@ -0,0 +1,57 @@
|
|
+/* * Definitions for Allo Boss2 DAC boards
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+ cpu_port: port {
|
|
+ cpu_endpoint: endpoint {
|
|
+ remote-endpoint = <&codec_endpoint>;
|
|
+ bitclock-master = <&codec_endpoint>;
|
|
+ frame-master = <&codec_endpoint>;
|
|
+ dai-format = "i2s";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+ allo-cs43130@30 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "allo,allo-cs43198";
|
|
+ clock44-gpio = <&gpio 5 0>;
|
|
+ clock48-gpio = <&gpio 6 0>;
|
|
+ reg = <0x30>;
|
|
+ port {
|
|
+ codec_endpoint: endpoint {
|
|
+ remote-endpoint = <&cpu_endpoint>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ boss2_dac: __overlay__ {
|
|
+ compatible = "audio-graph-card";
|
|
+ label = "Allo Boss2";
|
|
+ dais = <&cpu_port>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/allo-digione-overlay.dts b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ea018ace34d4
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/allo-digione-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+// Definitions for Allo DigiOne
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ wm8804@3b {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "wlf,wm8804";
|
|
+ reg = <0x3b>;
|
|
+ PVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ wlf,reset-gpio = <&gpio 17 0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "allo,allo-digione";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ clock44-gpio = <&gpio 5 0>;
|
|
+ clock48-gpio = <&gpio 6 0>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..b25fd681f09f
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/allo-katana-dac-audio-overlay.dts
|
|
@@ -0,0 +1,57 @@
|
|
+/*
|
|
+ * Definitions for Allo Katana DAC boards
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+ cpu_port: port {
|
|
+ cpu_endpoint: endpoint {
|
|
+ remote-endpoint = <&codec_endpoint>;
|
|
+ bitclock-master = <&codec_endpoint>;
|
|
+ frame-master = <&codec_endpoint>;
|
|
+ dai-format = "i2s";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ allo-katana-codec@30 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "allo,allo-katana-codec";
|
|
+ reg = <0x30>;
|
|
+ port {
|
|
+ codec_endpoint: endpoint {
|
|
+ remote-endpoint = <&cpu_endpoint>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ katana_dac: __overlay__ {
|
|
+ compatible = "audio-graph-card";
|
|
+ label = "Allo Katana";
|
|
+ dais = <&cpu_port>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..bfc66da6295a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/allo-piano-dac-pcm512x-audio-overlay.dts
|
|
@@ -0,0 +1,54 @@
|
|
+/*
|
|
+ * Definitions for Allo Piano DAC (2.0/2.1) boards
|
|
+ *
|
|
+ * NB. The Piano DAC 2.1 board contains 2x TI PCM5142 DAC's. One DAC is stereo
|
|
+ * (left/right) and the other provides a subwoofer output, using DSP on the
|
|
+ * chip for digital high/low pass crossover.
|
|
+ * The initial support for this hardware, that doesn't require any codec driver
|
|
+ * modifications, uses only one DAC chip for stereo (left/right) output, the
|
|
+ * chip with 0x4c slave address. The other chip at 0x4d is currently ignored!
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm5142@4c {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5142";
|
|
+ reg = <0x4c>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ piano_dac: __overlay__ {
|
|
+ compatible = "allo,piano-dac";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain =
|
|
+ <&piano_dac>,"allo,24db_digital_gain?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..d47a35def4f7
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/allo-piano-dac-plus-pcm512x-audio-overlay.dts
|
|
@@ -0,0 +1,57 @@
|
|
+// Definitions for Piano DAC
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ allo_pcm5122_4c: pcm5122@4c {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4c>;
|
|
+ sound-name-prefix = "Main";
|
|
+ status = "okay";
|
|
+ };
|
|
+ allo_pcm5122_4d: pcm5122@4d {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4d>;
|
|
+ sound-name-prefix = "Sub";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ piano_dac: __overlay__ {
|
|
+ compatible = "allo,piano-dac-plus";
|
|
+ audio-codec = <&allo_pcm5122_4c &allo_pcm5122_4d>;
|
|
+ i2s-controller = <&i2s>;
|
|
+ mute1-gpios = <&gpio 6 1>;
|
|
+ mute2-gpios = <&gpio 25 1>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain =
|
|
+ <&piano_dac>,"allo,24db_digital_gain?";
|
|
+ glb_mclk =
|
|
+ <&piano_dac>,"allo,glb_mclk?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/anyspi-overlay.dts b/arch/arm/boot/dts/overlays/anyspi-overlay.dts
|
|
new file mode 100755
|
|
index 000000000000..87523dcca318
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/anyspi-overlay.dts
|
|
@@ -0,0 +1,205 @@
|
|
+/*
|
|
+ * Universal device tree overlay for SPI devices
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev1>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "spi1/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path = "spi1/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target-path = "spi1/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target-path = "spi2/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target-path = "spi2/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target-path = "spi2/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target = <&spi0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ anyspi_00: anyspi@0 {
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@9 {
|
|
+ target = <&spi0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ anyspi_01: anyspi@1 {
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@10 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ anyspi_10: anyspi@0 {
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@11 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ anyspi_11: anyspi@1 {
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@12 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ anyspi_12: anyspi@2 {
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@13 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ anyspi_20: anyspi@0 {
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@14 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ anyspi_21: anyspi@1 {
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@15 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ anyspi_22: anyspi@2 {
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ spi0-0 = <0>, "+0+8";
|
|
+ spi0-1 = <0>, "+1+9";
|
|
+ spi1-0 = <0>, "+2+10";
|
|
+ spi1-1 = <0>, "+3+11";
|
|
+ spi1-2 = <0>, "+4+12";
|
|
+ spi2-0 = <0>, "+5+13";
|
|
+ spi2-1 = <0>, "+6+14";
|
|
+ spi2-2 = <0>, "+7+15";
|
|
+ dev = <&anyspi_00>,"compatible",
|
|
+ <&anyspi_01>,"compatible",
|
|
+ <&anyspi_10>,"compatible",
|
|
+ <&anyspi_11>,"compatible",
|
|
+ <&anyspi_12>,"compatible",
|
|
+ <&anyspi_20>,"compatible",
|
|
+ <&anyspi_21>,"compatible",
|
|
+ <&anyspi_22>,"compatible";
|
|
+ speed = <&anyspi_00>, "spi-max-frequency:0",
|
|
+ <&anyspi_01>, "spi-max-frequency:0",
|
|
+ <&anyspi_10>, "spi-max-frequency:0",
|
|
+ <&anyspi_11>, "spi-max-frequency:0",
|
|
+ <&anyspi_12>, "spi-max-frequency:0",
|
|
+ <&anyspi_20>, "spi-max-frequency:0",
|
|
+ <&anyspi_21>, "spi-max-frequency:0",
|
|
+ <&anyspi_22>, "spi-max-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/apds9960-overlay.dts b/arch/arm/boot/dts/overlays/apds9960-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..c216932278ab
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/apds9960-overlay.dts
|
|
@@ -0,0 +1,57 @@
|
|
+// Definitions for APDS-9960 ambient light and gesture sensor
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ apds9960_pins: apds9960_pins@39 {
|
|
+ brcm,pins = <4>;
|
|
+ brcm,function = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ apds9960: apds@39 {
|
|
+ compatible = "avago,apds9960";
|
|
+ reg = <0x39>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ apds9960_irq: apds@39 {
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <4 1>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpiopin = <&apds9960_pins>,"brcm,pins:0",
|
|
+ <&apds9960_irq>,"interrupts:0";
|
|
+ noints = <0>,"!1!3";
|
|
+ };
|
|
+};
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..4769296ec9d6
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/applepi-dac-overlay.dts
|
|
@@ -0,0 +1,57 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ simple-audio-card,name = "ApplePi-DAC";
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ playback_link: simple-audio-card,dai-link@1 {
|
|
+ format = "i2s";
|
|
+
|
|
+ p_cpu_dai: cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ dai-tdm-slot-num = <2>;
|
|
+ dai-tdm-slot-width = <32>;
|
|
+ };
|
|
+
|
|
+ p_codec_dai: codec {
|
|
+ sound-dai = <&codec_out>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ codec_out: pcm1794a-codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm1794a";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+/*
|
|
+ Written by: Leonid Ayzenshtat
|
|
+ Company: Orchard Audio (www.orchardaudio.com)
|
|
+
|
|
+ compile with:
|
|
+ dtc -@ -H epapr -O dtb -o ApplePi-DAC.dtbo -W no-unit_address_vs_reg ApplePi-DAC.dts
|
|
+*/
|
|
diff --git a/arch/arm/boot/dts/overlays/at86rf233-overlay.dts b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..5a3f4571ee78
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/at86rf233-overlay.dts
|
|
@@ -0,0 +1,57 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/* Overlay for Atmel AT86RF233 IEEE 802.15.4 WPAN transceiver on spi0.0 */
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ lowpan0: at86rf233@0 {
|
|
+ compatible = "atmel,at86rf233";
|
|
+ reg = <0>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <23 4>; /* active high */
|
|
+ reset-gpio = <&gpio 24 1>;
|
|
+ sleep-gpio = <&gpio 25 1>;
|
|
+ spi-max-frequency = <3000000>;
|
|
+ xtal-trim = /bits/ 8 <0xf>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ lowpan0_pins: lowpan0_pins {
|
|
+ brcm,pins = <23 24 25>;
|
|
+ brcm,function = <0 1 1>; /* in out out */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ interrupt = <&lowpan0>, "interrupts:0",
|
|
+ <&lowpan0_pins>, "brcm,pins:0";
|
|
+ reset = <&lowpan0>, "reset-gpio:4",
|
|
+ <&lowpan0_pins>, "brcm,pins:4";
|
|
+ sleep = <&lowpan0>, "sleep-gpio:4",
|
|
+ <&lowpan0_pins>, "brcm,pins:8";
|
|
+ speed = <&lowpan0>, "spi-max-frequency:0";
|
|
+ trim = <&lowpan0>, "xtal-trim.0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..57a66eac8e9b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/audioinjector-addons-overlay.dts
|
|
@@ -0,0 +1,60 @@
|
|
+// Definitions for audioinjector.net audio add on soundcard
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ cs42448_mclk: codec-mclk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <49152000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ cs42448: cs42448@48 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "cirrus,cs42448";
|
|
+ reg = <0x48>;
|
|
+ clocks = <&cs42448_mclk>;
|
|
+ clock-names = "mclk";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ snd: __overlay__ {
|
|
+ compatible = "ai,audioinjector-octo-soundcard";
|
|
+ mult-gpios = <&gpio 27 0>, <&gpio 22 0>, <&gpio 23 0>,
|
|
+ <&gpio 24 0>;
|
|
+ reset-gpios = <&gpio 5 0>;
|
|
+ i2s-controller = <&i2s>;
|
|
+ codec = <&cs42448>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ non-stop-clocks = <&snd>, "non-stop-clocks?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..63e05cf9665d
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/audioinjector-isolated-soundcard-overlay.dts
|
|
@@ -0,0 +1,55 @@
|
|
+// Definitions for audioinjector.net audio isolated soundcard
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ cs4272_mclk: codec-mclk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <24576000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ cs4272: cs4271@10 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "cirrus,cs4271";
|
|
+ reg = <0x10>;
|
|
+ reset-gpio = <&gpio 5 0>;
|
|
+ clocks = <&cs4272_mclk>;
|
|
+ clock-names = "mclk";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ snd: __overlay__ {
|
|
+ compatible = "ai,audioinjector-isolated-soundcard";
|
|
+ mute-gpios = <&gpio 17 0>;
|
|
+ i2s-controller = <&i2s>;
|
|
+ codec = <&cs4272>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..fb4a4678a17a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/audioinjector-ultra-overlay.dts
|
|
@@ -0,0 +1,71 @@
|
|
+// Definitions for audioinjector.net audio add on soundcard
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ cs4265: cs4265@4e {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "cirrus,cs4265";
|
|
+ reg = <0x4e>;
|
|
+ reset-gpios = <&gpio 5 0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+
|
|
+ simple-audio-card,name = "audioinjector-ultra";
|
|
+
|
|
+ simple-audio-card,widgets =
|
|
+ "Line", "OUTPUTS",
|
|
+ "Line", "INPUTS";
|
|
+
|
|
+ simple-audio-card,routing =
|
|
+ "OUTPUTS","LINEOUTL",
|
|
+ "OUTPUTS","LINEOUTR",
|
|
+ "OUTPUTS","SPDIFOUT",
|
|
+ "LINEINL","INPUTS",
|
|
+ "LINEINR","INPUTS",
|
|
+ "MICL","INPUTS",
|
|
+ "MICR","INPUTS";
|
|
+
|
|
+ simple-audio-card,format = "i2s";
|
|
+
|
|
+ simple-audio-card,bitclock-master = <&sound_master>;
|
|
+ simple-audio-card,frame-master = <&sound_master>;
|
|
+
|
|
+ simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ dai-tdm-slot-num = <2>;
|
|
+ dai-tdm-slot-width = <32>;
|
|
+ };
|
|
+
|
|
+ sound_master: simple-audio-card,codec {
|
|
+ sound-dai = <&cs4265>;
|
|
+ system-clock-frequency = <12288000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..68f4427d86c3
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/audioinjector-wm8731-audio-overlay.dts
|
|
@@ -0,0 +1,39 @@
|
|
+// Definitions for audioinjector.net audio add on soundcard
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ wm8731@1a {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "wlf,wm8731";
|
|
+ reg = <0x1a>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "ai,audioinjector-pi-soundcard";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts b/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..81af26374d92
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/audiosense-pi-overlay.dts
|
|
@@ -0,0 +1,82 @@
|
|
+// Definitions for audiosense add on soundcard
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+#include <dt-bindings/pinctrl/bcm2835.h>
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ codec_reg_1v8: codec-reg-1v8 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "tlv320aic3204_1v8";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ /* audio external oscillator */
|
|
+ codec_osc: codec_osc {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <12000000>; /* 12 MHz */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ codec_rst: codec-rst {
|
|
+ brcm,pins = <26>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ codec: tlv320aic32x4@18 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,tlv320aic32x4";
|
|
+ reg = <0x18>;
|
|
+
|
|
+ clocks = <&codec_osc>;
|
|
+ clock-names = "mclk";
|
|
+
|
|
+ iov-supply = <&vdd_3v3_reg>;
|
|
+ ldoin-supply = <&vdd_3v3_reg>;
|
|
+
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ reset-gpios = <&gpio 26 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "as,audiosense-pi";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/audremap-overlay.dts b/arch/arm/boot/dts/overlays/audremap-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..7324890ead86
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/audremap-overlay.dts
|
|
@@ -0,0 +1,42 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&audio_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&audio_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins = < 12 13 >;
|
|
+ brcm,function = < 4 >; /* alt0 alt0 */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&audio_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = < 18 19 >;
|
|
+ brcm,function = < 2 >; /* alt5 alt5 */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&audio>;
|
|
+ __overlay__ {
|
|
+ brcm,disable-headphones = <0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ swap_lr = <&frag0>, "swap_lr?";
|
|
+ enable_jack = <&frag0>, "enable_jack?";
|
|
+ pins_12_13 = <0>,"+1-2";
|
|
+ pins_18_19 = <0>,"-1+2";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/balena-fin-overlay.dts b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e7ead7cdf5f5
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/balena-fin-overlay.dts
|
|
@@ -0,0 +1,125 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&mmcnr>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdio_pins>;
|
|
+ bus-width = <4>;
|
|
+ brcm,overclock-50 = <35>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ sdio_pins: sdio_pins {
|
|
+ brcm,pins = <34 35 36 37 38 39>;
|
|
+ brcm,function = <7>; /* ALT3 = SD1 */
|
|
+ brcm,pull = <0 2 2 2 2 2>;
|
|
+ };
|
|
+
|
|
+ power_ctrl_pins: power_ctrl_pins {
|
|
+ brcm,pins = <40>;
|
|
+ brcm,function = <1>; // out
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ // We should switch to mmc-pwrseq-sd8787 after making it
|
|
+ // compatible with sd8887
|
|
+ // Currently that module requires two GPIOs to function since it
|
|
+ // targets a slightly different chip
|
|
+ power_ctrl: power_ctrl {
|
|
+ compatible = "gpio-poweroff";
|
|
+ gpios = <&gpio 40 1>;
|
|
+ force;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&power_ctrl_pins>;
|
|
+ };
|
|
+
|
|
+ i2c_soft: i2c@0 {
|
|
+ compatible = "i2c-gpio";
|
|
+ gpios = <&gpio 43 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* sda */
|
|
+ &gpio 42 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* scl */>;
|
|
+ i2c-gpio,delay-us = <5>;
|
|
+ i2c-gpio,scl-open-drain;
|
|
+ i2c-gpio,sda-open-drain;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ };
|
|
+
|
|
+ sd8xxx-wlan {
|
|
+ drvdbg = <0x6>;
|
|
+ drv_mode = <0x1>;
|
|
+ cfg80211_wext = <0xf>;
|
|
+ sta_name = "wlan";
|
|
+ wfd_name = "p2p";
|
|
+ cal_data_cfg = "none";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c_soft>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ gpio_expander: gpio_expander@20 {
|
|
+ compatible = "nxp,pca9554";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ reg = <0x20>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ // rtc clock
|
|
+ ds1307: ds1307@68 {
|
|
+ compatible = "dallas,ds1307";
|
|
+ reg = <0x68>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ // RGB LEDs (>= v1.1.0)
|
|
+ pca9633: pca9633@62 {
|
|
+ compatible = "nxp,pca9633";
|
|
+ reg = <0x62>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ red@0 {
|
|
+ label = "red";
|
|
+ reg = <0>;
|
|
+ linux,default-trigger = "none";
|
|
+ };
|
|
+ green@1 {
|
|
+ label = "green";
|
|
+ reg = <1>;
|
|
+ linux,default-trigger = "none";
|
|
+ };
|
|
+ blue@2 {
|
|
+ label = "blue";
|
|
+ reg = <2>;
|
|
+ linux,default-trigger = "none";
|
|
+ };
|
|
+ unused@3 {
|
|
+ label = "unused";
|
|
+ reg = <3>;
|
|
+ linux,default-trigger = "none";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/cap1106-overlay.dts b/arch/arm/boot/dts/overlays/cap1106-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..0a585e725f84
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/cap1106-overlay.dts
|
|
@@ -0,0 +1,52 @@
|
|
+// Overlay for cap1106 from Microchip Semiconductor
|
|
+// add CONFIG_KEYBOARD_CAP11XX=y
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+ fragment@0 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__{
|
|
+ status = "okay";
|
|
+ cap1106: cap1106@28 {
|
|
+ compatible = "microchip,cap1106";
|
|
+ pinctrl-0 = <&cap1106_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <4 2>;
|
|
+ reg = <0x28>;
|
|
+ autorepeat;
|
|
+ microchip,sensor-gain = <2>;
|
|
+
|
|
+ linux,keycodes = <2>, /* KEY_1 */
|
|
+ <3>, /* KEY_2 */
|
|
+ <4>, /* KEY_3 */
|
|
+ <5>, /* KEY_4 */
|
|
+ <6>, /* KEY_5 */
|
|
+ <7>; /* KEY_6 */
|
|
+
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ cap1106_pins: cap1106_pins {
|
|
+ brcm,pins = <4>;
|
|
+ brcm,function = <0>; /* in */
|
|
+ brcm,pull = <0>; /* none */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ int_pin = <&cap1106>, "interrupts:0",
|
|
+ <&cap1106_pins>, "brcm,pins:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts b/arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..09c7417b4707
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/chipdip-dac-overlay.dts
|
|
@@ -0,0 +1,46 @@
|
|
+/*
|
|
+ * Device Tree overlay for ChipDip DAC
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ spdif-transmitter {
|
|
+ #address-cells = <0>;
|
|
+ #size-cells = <0>;
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "linux,spdif-dit";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "chipdip,chipdip-dac";
|
|
+ i2s-controller = <&i2s>;
|
|
+ sr0-gpios = <&gpio 5 0>;
|
|
+ sr1-gpios = <&gpio 6 0>;
|
|
+ sr2-gpios = <&gpio 12 0>;
|
|
+ res0-gpios = <&gpio 24 0>;
|
|
+ res1-gpios = <&gpio 27 0>;
|
|
+ mute-gpios = <&gpio 4 0>;
|
|
+ sdwn-gpios = <&gpio 13 0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/cma-overlay.dts b/arch/arm/boot/dts/overlays/cma-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..1d87c599f909
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/cma-overlay.dts
|
|
@@ -0,0 +1,36 @@
|
|
+/*
|
|
+ * cma.dts
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&cma>;
|
|
+ frag0: __overlay__ {
|
|
+ /*
|
|
+ * The default size when using this overlay is 256 MB
|
|
+ * and should be kept as is for backwards
|
|
+ * compatibility.
|
|
+ */
|
|
+ size = <0x10000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cma-512 = <&frag0>,"size:0=",<0x20000000>;
|
|
+ cma-448 = <&frag0>,"size:0=",<0x1c000000>;
|
|
+ cma-384 = <&frag0>,"size:0=",<0x18000000>;
|
|
+ cma-320 = <&frag0>,"size:0=",<0x14000000>;
|
|
+ cma-256 = <&frag0>,"size:0=",<0x10000000>;
|
|
+ cma-192 = <&frag0>,"size:0=",<0xC000000>;
|
|
+ cma-128 = <&frag0>,"size:0=",<0x8000000>;
|
|
+ cma-96 = <&frag0>,"size:0=",<0x6000000>;
|
|
+ cma-64 = <&frag0>,"size:0=",<0x4000000>;
|
|
+ cma-size = <&frag0>,"size:0"; /* in bytes, 4MB aligned */
|
|
+ cma-default = <0>,"-0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/dht11-overlay.dts b/arch/arm/boot/dts/overlays/dht11-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..6feeeb402493
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/dht11-overlay.dts
|
|
@@ -0,0 +1,41 @@
|
|
+/*
|
|
+ * Overlay for the DHT11/21/22 humidity/temperature sensor modules.
|
|
+ */
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+
|
|
+ dht11: dht11@0 {
|
|
+ compatible = "dht11";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&dht11_pins>;
|
|
+ gpios = <&gpio 4 0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ dht11_pins: dht11_pins@0 {
|
|
+ brcm,pins = <4>;
|
|
+ brcm,function = <0>; // in
|
|
+ brcm,pull = <0>; // off
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpiopin = <&dht11_pins>,"brcm,pins:0",
|
|
+ <&dht11_pins>, "reg:0",
|
|
+ <&dht11>,"gpios:4",
|
|
+ <&dht11>,"reg:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..d863e5c167cc
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/dionaudio-loco-overlay.dts
|
|
@@ -0,0 +1,39 @@
|
|
+// Definitions for Dion Audio LOCO DAC-AMP
|
|
+
|
|
+/*
|
|
+ * PCM5242 DAC (in hardware mode) and TPA3118 AMP.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ pcm5102a-codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5102a";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "dionaudio,loco-pcm5242-tpa3118";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..dfb8922a654b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/dionaudio-loco-v2-overlay.dts
|
|
@@ -0,0 +1,49 @@
|
|
+/*
|
|
+ * Definitions for Dion Audio LOCO-V2 DAC-AMP
|
|
+ * eg. dtoverlay=dionaudio-loco-v2
|
|
+ *
|
|
+ * PCM5242 DAC (in software mode) and TPA3255 AMP.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&sound>;
|
|
+ frag0: __overlay__ {
|
|
+ compatible = "dionaudio,dionaudio-loco-v2";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm5122@4c {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4d>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain = <&frag0>,"dionaudio,24db_digital_gain?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/disable-bt-overlay.dts b/arch/arm/boot/dts/overlays/disable-bt-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..d5a66e5d76a9
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/disable-bt-overlay.dts
|
|
@@ -0,0 +1,64 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/* Disable Bluetooth and restore UART0/ttyAMA0 over GPIOs 14 & 15.
|
|
+ To disable the systemd service that initialises the modem so it doesn't use
|
|
+ the UART:
|
|
+
|
|
+ sudo systemctl disable hciuart
|
|
+*/
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart0>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&bt>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&uart0_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins;
|
|
+ brcm,function;
|
|
+ brcm,pull;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&bt_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins;
|
|
+ brcm,function;
|
|
+ brcm,pull;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target-path = "/aliases";
|
|
+ __overlay__ {
|
|
+ serial0 = "/soc/serial@7e201000";
|
|
+ serial1 = "/soc/serial@7e215040";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts b/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..75e046463900
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/disable-wifi-overlay.dts
|
|
@@ -0,0 +1,20 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&mmc>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&mmcnr>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/dpi18-overlay.dts b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..4abe5be744db
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/dpi18-overlay.dts
|
|
@@ -0,0 +1,39 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ // There is no DPI driver module, but we need a platform device
|
|
+ // node (that doesn't already use pinctrl) to hang the pinctrl
|
|
+ // reference on - leds will do
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&fb>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&dpi18_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&vc4>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&dpi18_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ dpi18_pins: dpi18_pins {
|
|
+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
|
|
+ 12 13 14 15 16 17 18 19 20
|
|
+ 21>;
|
|
+ brcm,function = <6>; /* alt2 */
|
|
+ brcm,pull = <0>; /* no pull */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/dpi18cpadhi-overlay.dts b/arch/arm/boot/dts/overlays/dpi18cpadhi-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..50c88a1ed299
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/dpi18cpadhi-overlay.dts
|
|
@@ -0,0 +1,26 @@
|
|
+/*
|
|
+ * dpi18cpadhi-overlay.dts
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&fb>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&dpi_18bit_cpadhi_gpio0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&vc4>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&dpi_18bit_cpadhi_gpio0>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/dpi24-overlay.dts b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..44335cc81277
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/dpi24-overlay.dts
|
|
@@ -0,0 +1,39 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ // There is no DPI driver module, but we need a platform device
|
|
+ // node (that doesn't already use pinctrl) to hang the pinctrl
|
|
+ // reference on - leds will do
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&fb>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&dpi24_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&vc4>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&dpi24_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ dpi24_pins: dpi24_pins {
|
|
+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
|
|
+ 12 13 14 15 16 17 18 19 20
|
|
+ 21 22 23 24 25 26 27>;
|
|
+ brcm,function = <6>; /* alt2 */
|
|
+ brcm,pull = <0>; /* no pull */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/draws-overlay.dts b/arch/arm/boot/dts/overlays/draws-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..d18187d7f343
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/draws-overlay.dts
|
|
@@ -0,0 +1,208 @@
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+/*
|
|
+ * Device tree overlay for the DRAWS Hardware
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ regulators {
|
|
+ compatible = "simple-bus";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ udrc0_ldoin: udrc0_ldoin {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "ldoin";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ sc16is752_clk: sc16is752_draws_clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <1843200>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pps: pps {
|
|
+ compatible = "pps-gpio";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pps_pins>;
|
|
+ gpios = <&gpio 7 0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ iio-hwmon {
|
|
+ compatible = "iio-hwmon";
|
|
+ status = "okay";
|
|
+ io-channels = <&tla2024 4>, <&tla2024 5>, <&tla2024 6>,
|
|
+ <&tla2024 7>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c_arm>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ tlv320aic32x4: tlv320aic32x4@18 {
|
|
+ compatible = "ti,tlv320aic32x4";
|
|
+ reg = <0x18>;
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ clocks = <&clocks BCM2835_CLOCK_GP0>;
|
|
+ clock-names = "mclk";
|
|
+ assigned-clocks = <&clocks BCM2835_CLOCK_GP0>;
|
|
+ assigned-clock-rates = <25000000>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gpclk0_pin &aic3204_reset>;
|
|
+
|
|
+ reset-gpios = <&gpio 13 0>;
|
|
+
|
|
+ iov-supply = <&udrc0_ldoin>;
|
|
+ ldoin-supply = <&udrc0_ldoin>;
|
|
+ };
|
|
+
|
|
+ sc16is752: sc16is752@50 {
|
|
+ compatible = "nxp,sc16is752";
|
|
+ reg = <0x50>;
|
|
+ clocks = <&sc16is752_clk>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <17 2>; /* IRQ_TYPE_EDGE_FALLING */
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sc16is752_irq>;
|
|
+ };
|
|
+
|
|
+ tla2024: tla2024@48 {
|
|
+ compatible = "ti,ads1015";
|
|
+ reg = <0x48>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ #io-channel-cells = <1>;
|
|
+
|
|
+ adc_ch4: channel@4 {
|
|
+ reg = <4>;
|
|
+ ti,gain = <1>;
|
|
+ ti,datarate = <4>;
|
|
+ };
|
|
+
|
|
+ adc_ch5: channel@5 {
|
|
+ reg = <5>;
|
|
+ ti,gain = <1>;
|
|
+ ti,datarate = <4>;
|
|
+ };
|
|
+
|
|
+ adc_ch6: channel@6 {
|
|
+ reg = <6>;
|
|
+ ti,gain = <2>;
|
|
+ ti,datarate = <4>;
|
|
+ };
|
|
+
|
|
+ adc_ch7: channel@7 {
|
|
+ reg = <7>;
|
|
+ ti,gain = <2>;
|
|
+ ti,datarate = <4>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ snd: __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+
|
|
+ simple-audio-card,name = "draws";
|
|
+ simple-audio-card,format = "i2s";
|
|
+
|
|
+ simple-audio-card,bitclock-master = <&dailink0_master>;
|
|
+ simple-audio-card,frame-master = <&dailink0_master>;
|
|
+
|
|
+ simple-audio-card,widgets =
|
|
+ "Line", "Line In",
|
|
+ "Line", "Line Out";
|
|
+
|
|
+ simple-audio-card,routing =
|
|
+ "IN1_R", "Line In",
|
|
+ "IN1_L", "Line In",
|
|
+ "CM_L", "Line In",
|
|
+ "CM_R", "Line In",
|
|
+ "Line Out", "LOR",
|
|
+ "Line Out", "LOL";
|
|
+
|
|
+ dailink0_master: simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ };
|
|
+
|
|
+ simple-audio-card,codec {
|
|
+ sound-dai = <&tlv320aic32x4>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ gpclk0_pin: gpclk0_pin {
|
|
+ brcm,pins = <4>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ aic3204_reset: aic3204_reset {
|
|
+ brcm,pins = <13>;
|
|
+ brcm,function = <1>;
|
|
+ brcm,pull = <1>;
|
|
+ };
|
|
+
|
|
+ aic3204_gpio: aic3204_gpio {
|
|
+ brcm,pins = <26>;
|
|
+ };
|
|
+
|
|
+ sc16is752_irq: sc16is752_irq {
|
|
+ brcm,pins = <17>;
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <2>;
|
|
+ };
|
|
+
|
|
+ pps_pins: pps_pins {
|
|
+ brcm,pins = <7>;
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ draws_adc_ch4_gain = <&adc_ch4>,"ti,gain:0";
|
|
+ draws_adc_ch4_datarate = <&adc_ch4>,"ti,datarate:0";
|
|
+ draws_adc_ch5_gain = <&adc_ch5>,"ti,gain:0";
|
|
+ draws_adc_ch5_datarate = <&adc_ch5>,"ti,datarate:0";
|
|
+ draws_adc_ch6_gain = <&adc_ch6>,"ti,gain:0";
|
|
+ draws_adc_ch6_datarate = <&adc_ch6>,"ti,datarate:0";
|
|
+ draws_adc_ch7_gain = <&adc_ch7>,"ti,gain:0";
|
|
+ draws_adc_ch7_datarate = <&adc_ch7>,"ti,datarate:0";
|
|
+ alsaname = <&snd>, "simple-audio-card,name";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..78c5e9f85048
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/dwc-otg-overlay.dts
|
|
@@ -0,0 +1,14 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&usb>;
|
|
+ __overlay__ {
|
|
+ compatible = "brcm,bcm2708-usb";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/dwc2-overlay.dts b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..0d83e344ad97
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts
|
|
@@ -0,0 +1,26 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&usb>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ dwc2_usb: __overlay__ {
|
|
+ compatible = "brcm,bcm2835-usb";
|
|
+ dr_mode = "otg";
|
|
+ g-np-tx-fifo-size = <32>;
|
|
+ g-rx-fifo-size = <558>;
|
|
+ g-tx-fifo-size = <512 512 512 512 512 256 256>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ dr_mode = <&dwc2_usb>, "dr_mode";
|
|
+ g-np-tx-fifo-size = <&dwc2_usb>,"g-np-tx-fifo-size:0";
|
|
+ g-rx-fifo-size = <&dwc2_usb>,"g-rx-fifo-size:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts b/arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..f82b4d0e5047
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/edt-ft5406-overlay.dts
|
|
@@ -0,0 +1,10 @@
|
|
+/*
|
|
+ * Device Tree overlay for EDT 5406 touchscreen controller, as used on the
|
|
+ * Raspberry Pi 7" panel
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include "edt-ft5406.dtsi"
|
|
diff --git a/arch/arm/boot/dts/overlays/edt-ft5406.dtsi b/arch/arm/boot/dts/overlays/edt-ft5406.dtsi
|
|
new file mode 100644
|
|
index 000000000000..0473ff17f19f
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/edt-ft5406.dtsi
|
|
@@ -0,0 +1,55 @@
|
|
+/*
|
|
+ * Device Tree overlay for an EDT FT5406 touchscreen
|
|
+ *
|
|
+ * Note that this is included from vc4-kms-dsi-7inch, hence the
|
|
+ * fragment numbers not starting at 0.
|
|
+ */
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@10 {
|
|
+ target = <&ft5406>;
|
|
+ __overlay__ {
|
|
+ touchscreen-inverted-x;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@11 {
|
|
+ target = <&ft5406>;
|
|
+ __overlay__ {
|
|
+ touchscreen-inverted-y;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@12 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+ ft5406: ts@38 {
|
|
+ compatible = "edt,edt-ft5406";
|
|
+ reg = <0x38>;
|
|
+
|
|
+ touchscreen-size-x = < 800 >;
|
|
+ touchscreen-size-y = < 480 >;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@13 {
|
|
+ target = <&i2c0if>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ sizex = <&ft5406>,"touchscreen-size-x:0";
|
|
+ sizey = <&ft5406>,"touchscreen-size-y:0";
|
|
+ invx = <0>, "-10";
|
|
+ invy = <0>, "-11";
|
|
+ swapxy = <&ft5406>,"touchscreen-swapped-x-y?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/enc28j60-overlay.dts b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..7af5c2e607ea
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/enc28j60-overlay.dts
|
|
@@ -0,0 +1,53 @@
|
|
+// Overlay for the Microchip ENC28J60 Ethernet Controller
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ eth1: enc28j60@0{
|
|
+ compatible = "microchip,enc28j60";
|
|
+ reg = <0>; /* CE0 */
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <ð1_pins>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <25 0x2>; /* falling edge */
|
|
+ spi-max-frequency = <12000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ eth1_pins: eth1_pins {
|
|
+ brcm,pins = <25>;
|
|
+ brcm,function = <0>; /* in */
|
|
+ brcm,pull = <0>; /* none */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ int_pin = <ð1>, "interrupts:0",
|
|
+ <ð1_pins>, "brcm,pins:0";
|
|
+ speed = <ð1>, "spi-max-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..17cb5b8fa485
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
|
|
@@ -0,0 +1,47 @@
|
|
+// Overlay for the Microchip ENC28J60 Ethernet Controller - SPI2 Compute Module
|
|
+// Interrupt pin: 39
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi2>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ eth1: enc28j60@0{
|
|
+ compatible = "microchip,enc28j60";
|
|
+ reg = <0>; /* CE0 */
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <ð1_pins>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <39 0x2>; /* falling edge */
|
|
+ spi-max-frequency = <12000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ eth1_pins: eth1_pins {
|
|
+ brcm,pins = <39>;
|
|
+ brcm,function = <0>; /* in */
|
|
+ brcm,pull = <0>; /* none */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ int_pin = <ð1>, "interrupts:0",
|
|
+ <ð1_pins>, "brcm,pins:0";
|
|
+ speed = <ð1>, "spi-max-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/exc3000-overlay.dts b/arch/arm/boot/dts/overlays/exc3000-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..6f087fb20661
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/exc3000-overlay.dts
|
|
@@ -0,0 +1,48 @@
|
|
+// Device tree overlay for I2C connected EETI EXC3000 multiple touch controller
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ exc3000_pins: exc3000_pins {
|
|
+ brcm,pins = <4>; // interrupt
|
|
+ brcm,function = <0>; // in
|
|
+ brcm,pull = <2>; // pull-up
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ exc3000: exc3000@2a {
|
|
+ compatible = "eeti,exc3000";
|
|
+ reg = <0x2a>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&exc3000_pins>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <4 8>; // active low level-sensitive
|
|
+ touchscreen-size-x = <4096>;
|
|
+ touchscreen-size-y = <4096>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ interrupt = <&exc3000_pins>,"brcm,pins:0",
|
|
+ <&exc3000>,"interrupts:0";
|
|
+ sizex = <&exc3000>,"touchscreen-size-x:0";
|
|
+ sizey = <&exc3000>,"touchscreen-size-y:0";
|
|
+ invx = <&exc3000>,"touchscreen-inverted-x?";
|
|
+ invy = <&exc3000>,"touchscreen-inverted-y?";
|
|
+ swapxy = <&exc3000>,"touchscreen-swapped-x-y?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..743f14ae5768
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/fe-pi-audio-overlay.dts
|
|
@@ -0,0 +1,70 @@
|
|
+// Definitions for Fe-Pi Audio
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ sgtl5000_mclk: sgtl5000_mclk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <12288000>;
|
|
+ clock-output-names = "sgtl5000-mclk";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&soc>;
|
|
+ __overlay__ {
|
|
+ reg_1v8: reg_1v8@0 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "1V8";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ sgtl5000@0a {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "fsl,sgtl5000";
|
|
+ reg = <0x0a>;
|
|
+ clocks = <&sgtl5000_mclk>;
|
|
+ micbias-resistor-k-ohms = <2>;
|
|
+ micbias-voltage-m-volts = <3000>;
|
|
+ VDDA-supply = <&vdd_3v3_reg>;
|
|
+ VDDIO-supply = <&vdd_3v3_reg>;
|
|
+ VDDD-supply = <®_1v8>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "fe-pi,fe-pi-audio";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/fsm-demo-overlay.dts b/arch/arm/boot/dts/overlays/fsm-demo-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e9944f5cd258
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/fsm-demo-overlay.dts
|
|
@@ -0,0 +1,104 @@
|
|
+// Demo overlay for the gpio-fsm driver
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio-fsm.h>
|
|
+
|
|
+#define BUTTON1 GF_IP(0)
|
|
+#define BUTTON2 GF_SW(0)
|
|
+#define RED GF_OP(0) // GPIO7
|
|
+#define AMBER GF_OP(1) // GPIO8
|
|
+#define GREEN GF_OP(2) // GPIO25
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ fsm_demo: fsm-demo {
|
|
+ compatible = "rpi,gpio-fsm";
|
|
+
|
|
+ debug = <0>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ num-swgpios = <1>;
|
|
+ gpio-line-names = "button2";
|
|
+ input-gpios = <&gpio 6 1>; // BUTTON1 (active-low)
|
|
+ output-gpios = <&gpio 7 0>, // RED
|
|
+ <&gpio 8 0>, // AMBER
|
|
+ <&gpio 25 0>; // GREEN
|
|
+ shutdown-timeout-ms = <2000>;
|
|
+
|
|
+ start {
|
|
+ start_state;
|
|
+ set = <RED 1>, <AMBER 0>, <GREEN 0>;
|
|
+ start2 = <GF_DELAY 250>;
|
|
+ };
|
|
+
|
|
+ start2 {
|
|
+ set = <RED 0>, <AMBER 1>;
|
|
+ go = <GF_DELAY 250>;
|
|
+ };
|
|
+
|
|
+ go {
|
|
+ set = <RED 0>, <AMBER 0>, <GREEN 1>;
|
|
+ ready_wait = <BUTTON1 0>;
|
|
+ shutdown1 = <GF_SHUTDOWN 0>;
|
|
+ };
|
|
+
|
|
+ ready_wait {
|
|
+ // Clear the soft GPIO
|
|
+ set = <BUTTON2 0>;
|
|
+ ready = <GF_DELAY 1000>;
|
|
+ shutdown1 = <GF_SHUTDOWN 0>;
|
|
+ };
|
|
+
|
|
+ ready {
|
|
+ stopping = <BUTTON1 1>, <BUTTON2 1>;
|
|
+ shutdown1 = <GF_SHUTDOWN 0>;
|
|
+ };
|
|
+
|
|
+ stopping {
|
|
+ set = <GREEN 0>, <AMBER 1>;
|
|
+ stopped = <GF_DELAY 1000>;
|
|
+ };
|
|
+
|
|
+ stopped {
|
|
+ set = <AMBER 0>, <RED 1>;
|
|
+ get_set = <GF_DELAY 3000>;
|
|
+ shutdown1 = <GF_SHUTDOWN 0>;
|
|
+ };
|
|
+
|
|
+ get_set {
|
|
+ set = <AMBER 1>;
|
|
+ go = <GF_DELAY 1000>;
|
|
+ };
|
|
+
|
|
+ shutdown1 {
|
|
+ set = <RED 0>, <AMBER 0>, <GREEN 1>;
|
|
+ shutdown2 = <GF_SHUTDOWN 250>;
|
|
+ };
|
|
+
|
|
+ shutdown2 {
|
|
+ set = <AMBER 1>, <GREEN 0>;
|
|
+ shutdown3 = <GF_SHUTDOWN 250>;
|
|
+ };
|
|
+
|
|
+ shutdown3 {
|
|
+ set = <RED 1>, <AMBER 0>;
|
|
+ shutdown4 = <GF_SHUTDOWN 250>;
|
|
+ };
|
|
+
|
|
+ shutdown4 {
|
|
+ shutdown_state;
|
|
+ set = <RED 0>, <AMBER 0>, <GREEN 0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ fsm_debug = <&fsm_demo>,"debug:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts b/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..7509e00679c8
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ghost-amp-overlay.dts
|
|
@@ -0,0 +1,145 @@
|
|
+// Overlay for the PCM5122-based Ghost amplifier using gpio-fsm
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio-fsm.h>
|
|
+
|
|
+#define ENABLE GF_SW(0)
|
|
+#define FAULT GF_IP(0) // GPIO5
|
|
+#define RELAY1 GF_OP(0) // GPIO22
|
|
+#define RELAY2 GF_OP(1) // GPIO23
|
|
+#define RELAYSSR GF_OP(2) // GPIO24
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm5122@4c {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4c>;
|
|
+ AVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ CPVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ iqaudio_dac: __overlay__ {
|
|
+ compatible = "iqaudio,iqaudio-dac";
|
|
+ i2s-controller = <&i2s>;
|
|
+ mute-gpios = <& 0 0>;
|
|
+ iqaudio-dac,auto-mute-amp;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ amp: ghost-amp {
|
|
+ compatible = "rpi,gpio-fsm";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&ghost_amp_pins>;
|
|
+
|
|
+ debug = <0>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ num-swgpios = <1>;
|
|
+ gpio-line-names = "enable";
|
|
+ input-gpios = <&gpio 5 1>; // FAULT (active low)
|
|
+ output-gpios = <&gpio 22 0>, // RELAY1
|
|
+ <&gpio 23 0>, // RELAY2
|
|
+ <&gpio 24 0>; // RELAYSSR
|
|
+ shutdown-timeout-ms = <1000>;
|
|
+
|
|
+ amp_off {
|
|
+ start_state;
|
|
+ shutdown_state;
|
|
+
|
|
+ set = <RELAYSSR 0>,
|
|
+ <RELAY2 0>,
|
|
+ <RELAY1 0>;
|
|
+ amp_on_1 = <ENABLE 1>;
|
|
+ fault = <FAULT 1>;
|
|
+ };
|
|
+
|
|
+ amp_on_1 {
|
|
+ set = <RELAY1 1>;
|
|
+ amp_on_2 = <GF_DELAY 1000>;
|
|
+ amp_off = <GF_SHUTDOWN 0>;
|
|
+ fault = <FAULT 1>;
|
|
+ };
|
|
+
|
|
+ amp_on_2 {
|
|
+ set = <RELAY2 1>;
|
|
+ amp_on_wait = <ENABLE 0>;
|
|
+ amp_on = <GF_DELAY 1>;
|
|
+ fault = <FAULT 1>;
|
|
+ };
|
|
+
|
|
+ amp_on {
|
|
+ set = <RELAYSSR 1>;
|
|
+ amp_on_wait = <ENABLE 0>;
|
|
+ fault = <FAULT 1>;
|
|
+ };
|
|
+
|
|
+ amp_on_wait {
|
|
+ set = <RELAYSSR 0>;
|
|
+ amp_off_1 = <GF_DELAY (30*60*1000)>,
|
|
+ <GF_SHUTDOWN 0>;
|
|
+ amp_on = <ENABLE 1>;
|
|
+ fault = <FAULT 1>;
|
|
+ };
|
|
+
|
|
+ amp_off_1 {
|
|
+ set = <RELAY2 0>;
|
|
+ amp_on = <ENABLE 1>;
|
|
+ amp_off = <GF_DELAY 100>;
|
|
+ fault = <FAULT 1>;
|
|
+ };
|
|
+
|
|
+ // Keep this a distinct state to prevent
|
|
+ // changes and for the diagnostic output
|
|
+ fault {
|
|
+ set = <RELAYSSR 0>,
|
|
+ <RELAY2 0>,
|
|
+ <RELAY1 0>;
|
|
+ amp_off = <FAULT 0>;
|
|
+ shutdown_state;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ ghost_amp_pins: ghost_amp_pins {
|
|
+ brcm,pins = <5 22 23 24>;
|
|
+ brcm,function = <0 1 1 1>; /* in out out out */
|
|
+ brcm,pull = <2 0 0 0>; /* up none none none */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ fsm_debug = <&>,"debug:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/goodix-overlay.dts b/arch/arm/boot/dts/overlays/goodix-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..8571527de49a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/goodix-overlay.dts
|
|
@@ -0,0 +1,46 @@
|
|
+// Device tree overlay for I2C connected Goodix gt9271 multiple touch controller
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ goodix_pins: goodix_pins {
|
|
+ brcm,pins = <4 17>; // interrupt and reset
|
|
+ brcm,function = <0 0>; // in
|
|
+ brcm,pull = <2 2>; // pull-up
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ gt9271: gt9271@14 {
|
|
+ compatible = "goodix,gt9271";
|
|
+ reg = <0x14>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&goodix_pins>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <4 2>; // high-to-low edge triggered
|
|
+ irq-gpios = <&gpio 4 0>; // Pin7 on GPIO header
|
|
+ reset-gpios = <&gpio 17 0>; // Pin11 on GPIO header
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ interrupt = <&goodix_pins>,"brcm,pins:0",
|
|
+ <>9271>,"interrupts:0",
|
|
+ <>9271>,"irq-gpios:4";
|
|
+ reset = <&goodix_pins>,"brcm,pins:4",
|
|
+ <>9271>,"reset-gpios:4";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e443be1f9a0e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/googlevoicehat-soundcard-overlay.dts
|
|
@@ -0,0 +1,49 @@
|
|
+// Definitions for Google voiceHAT v1 soundcard overlay
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ googlevoicehat_pins: googlevoicehat_pins {
|
|
+ brcm,pins = <16>;
|
|
+ brcm,function = <1>; /* out */
|
|
+ brcm,pull = <0>; /* up */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ voicehat-codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "google,voicehat";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&googlevoicehat_pins>;
|
|
+ sdmode-gpios= <&gpio 16 0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "googlevoicehat,googlevoicehat-soundcard";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts b/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..77a7bbb41e3b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/gpio-fan-overlay.dts
|
|
@@ -0,0 +1,79 @@
|
|
+/*
|
|
+ * Overlay for the Raspberry Pi GPIO Fan @ BCM GPIO12.
|
|
+ * References:
|
|
+ * - https://www.raspberrypi.org/forums/viewtopic.php?f=107&p=1367135#p1365084
|
|
+ *
|
|
+ * Optional parameters:
|
|
+ * - "gpiopin" - BCM number of the pin driving the fan, default 12 (GPIO12);
|
|
+ * - "temp" - CPU temperature at which fan is started in millicelsius, default 55000;
|
|
+ *
|
|
+ * Requires:
|
|
+ * - kernel configurations: CONFIG_SENSORS_GPIO_FAN=m;
|
|
+ * - kernel rebuild;
|
|
+ * - N-MOSFET connected to gpiopin, 2N7002-[https://en.wikipedia.org/wiki/2N7000];
|
|
+ * - DC Fan connected to N-MOSFET Drain terminal, a 12V fan is working fine and quite silently;
|
|
+ * [https://www.tme.eu/en/details/ee40101s1-999-a/dc12v-fans/sunon/ee40101s1-1000u-999/]
|
|
+ *
|
|
+ * ┌─────────────────────┐
|
|
+ * │Fan negative terminal│
|
|
+ * └┬────────────────────┘
|
|
+ * │D
|
|
+ * G │──┘
|
|
+ * [GPIO12]──────┤ │<─┐ 2N7002
|
|
+ * │──┤
|
|
+ * │S
|
|
+ * ─┴─
|
|
+ * GND
|
|
+ *
|
|
+ * Build:
|
|
+ * - `sudo dtc -W no-unit_address_vs_reg -@ -I dts -O dtb -o /boot/overlays/gpio-fan.dtbo gpio-fan-overlay.dts`
|
|
+ * Activate:
|
|
+ * - sudo nano /boot/config.txt add "dtoverlay=gpio-fan" or "dtoverlay=gpio-fan,gpiopin=12,temp=45000"
|
|
+ * or
|
|
+ * - sudo sh -c 'printf "\n# Enable PI GPIO-Fan Default\ndtoverlay=gpio-fan\n" >> /boot/config.txt'
|
|
+ * - sudo sh -c 'printf "\n# Enable PI GPIO-Fan Custom\ndtoverlay=gpio-fan,gpiopin=12,temp=45000\n" >> /boot/config.txt'
|
|
+ *
|
|
+ */
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ fan0: gpio-fan@0 {
|
|
+ compatible = "gpio-fan";
|
|
+ gpios = <&gpio 12 0>;
|
|
+ gpio-fan,speed-map = <0 0>,
|
|
+ <5000 1>;
|
|
+ #cooling-cells = <2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&cpu_thermal>;
|
|
+ polling-delay = <2000>; /* milliseconds */
|
|
+ __overlay__ {
|
|
+ trips {
|
|
+ cpu_hot: trip-point@0 {
|
|
+ temperature = <55000>; /* (millicelsius) Fan started at 55°C */
|
|
+ hysteresis = <10000>; /* (millicelsius) Fan stopped at 45°C */
|
|
+ type = "active";
|
|
+ };
|
|
+ };
|
|
+ cooling-maps {
|
|
+ map0 {
|
|
+ trip = <&cpu_hot>;
|
|
+ cooling-device = <&fan0 1 1>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ gpiopin = <&fan0>,"gpios:4", <&fan0>,"brcm,pins:0";
|
|
+ temp = <&cpu_hot>,"temperature:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..162b6ce07dc9
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/gpio-ir-overlay.dts
|
|
@@ -0,0 +1,49 @@
|
|
+// Definitions for ir-gpio module
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ gpio_ir: ir-receiver@12 {
|
|
+ compatible = "gpio-ir-receiver";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gpio_ir_pins>;
|
|
+
|
|
+ // pin number, high or low
|
|
+ gpios = <&gpio 18 1>;
|
|
+
|
|
+ // parameter for keymap name
|
|
+ linux,rc-map-name = "rc-rc6-mce";
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ gpio_ir_pins: gpio_ir_pins@12 {
|
|
+ brcm,pins = <18>; // pin 18
|
|
+ brcm,function = <0>; // in
|
|
+ brcm,pull = <2>; // up
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ // parameters
|
|
+ gpio_pin = <&gpio_ir>,"gpios:4", // pin number
|
|
+ <&gpio_ir>,"reg:0",
|
|
+ <&gpio_ir_pins>,"brcm,pins:0",
|
|
+ <&gpio_ir_pins>,"reg:0";
|
|
+ gpio_pull = <&gpio_ir_pins>,"brcm,pull:0"; // pull-up/down state
|
|
+ invert = <&gpio_ir>,"gpios:8"; // 0 = active high input
|
|
+
|
|
+ rc-map-name = <&gpio_ir>,"linux,rc-map-name"; // default rc map
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..3625431b7560
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/gpio-ir-tx-overlay.dts
|
|
@@ -0,0 +1,36 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ gpio_ir_tx_pins: gpio_ir_tx_pins@12 {
|
|
+ brcm,pins = <18>;
|
|
+ brcm,function = <1>; // out
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ gpio_ir_tx: gpio-ir-transmitter@12 {
|
|
+ compatible = "gpio-ir-tx";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gpio_ir_tx_pins>;
|
|
+ gpios = <&gpio 18 0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpio_pin = <&gpio_ir_tx>, "gpios:4", // pin number
|
|
+ <&gpio_ir_tx>, "reg:0",
|
|
+ <&gpio_ir_tx_pins>, "brcm,pins:0",
|
|
+ <&gpio_ir_tx_pins>, "reg:0";
|
|
+ invert = <&gpio_ir_tx>, "gpios:8"; // 1 = active low
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/gpio-key-overlay.dts b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..2e7253d1d0ab
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/gpio-key-overlay.dts
|
|
@@ -0,0 +1,48 @@
|
|
+// Definitions for gpio-key module
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ // Configure the gpio pin controller
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ pin_state: button_pins@0 {
|
|
+ brcm,pins = <3>; // gpio number
|
|
+ brcm,function = <0>; // 0 = input, 1 = output
|
|
+ brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ button: button@0 {
|
|
+ compatible = "gpio-keys";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pin_state>;
|
|
+ status = "okay";
|
|
+
|
|
+ key: key {
|
|
+ linux,code = <116>;
|
|
+ gpios = <&gpio 3 1>;
|
|
+ label = "KEY_POWER";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpio = <&key>,"gpios:4",
|
|
+ <&button>,"reg:0",
|
|
+ <&pin_state>,"brcm,pins:0",
|
|
+ <&pin_state>,"reg:0";
|
|
+ label = <&key>,"label";
|
|
+ keycode = <&key>,"linux,code:0";
|
|
+ gpio_pull = <&pin_state>,"brcm,pull:0";
|
|
+ active_low = <&key>,"gpios:8";
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/gpio-led-overlay.dts b/arch/arm/boot/dts/overlays/gpio-led-overlay.dts
|
|
new file mode 100755
|
|
index 000000000000..d8e9d53f1b61
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/gpio-led-overlay.dts
|
|
@@ -0,0 +1,97 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-or-later
|
|
+/*
|
|
+ * gpio-led - generic connection of kernel's LED framework to the RPI's GPIO.
|
|
+ * Copyright (C) 2021 House Gordon Software Company Ltd. <assafgordon@gmail.com>
|
|
+ *
|
|
+ * Based on information from:
|
|
+ * https://mjoldfield.com/atelier/2017/03/rpi-devicetree.html
|
|
+ * https://www.raspberrypi.org/documentation/configuration/device-tree.md
|
|
+ * https://www.kernel.org/doc/html/latest/leds/index.html
|
|
+ *
|
|
+ * compile with:
|
|
+ * dtc -@ -Hepapr -I dts -O dtb -o gpio-led.dtbo gpio-led-overlay.dts
|
|
+ *
|
|
+ * There will be some warnings (can be ignored):
|
|
+ * Warning (label_is_string): /__overrides__:label: property is not a string
|
|
+ * Warning (unit_address_vs_reg): /fragment@0/__overlay__/led_pins@0:
|
|
+ * node has a unit name, but no reg property
|
|
+ * Warning (unit_address_vs_reg): /fragment@1/__overlay__/leds@0:
|
|
+ * node has a unit name, but no reg property
|
|
+ * Warning (gpios_property): /__overrides__: Missing property
|
|
+ * '#gpio-cells' in node /fragment@1/__overlay__/leds@0/led
|
|
+ * or bad phandle (referred from gpio[0])
|
|
+ *
|
|
+ * Typical electrical connection is:
|
|
+ * RPI-GPIO.19 -> LED -> 300ohm resister -> RPI-GND
|
|
+ * The GPIO pin number can be changed with the 'gpio=' parameter.
|
|
+ *
|
|
+ * Test from user-space with:
|
|
+ * # if nothing is shown, the overlay file isn't found in /boot/overlays
|
|
+ * dtoverlay -a | grep gpio-led
|
|
+ *
|
|
+ * # Load the overlay
|
|
+ * dtoverlay gpio-led label=moo gpio=19
|
|
+ *
|
|
+ * # if nothing is shown, the overlay wasn't loaded successfully
|
|
+ * dtoverlay -l | grep gpio-led
|
|
+ *
|
|
+ * echo 1 > /sys/class/leds/moo/brightness
|
|
+ * echo 0 > /sys/class/leds/moo/brightness
|
|
+ * echo cpu > /sys/class/leds/moo/trigger
|
|
+ * echo heartbeat > /sys/class/leds/moo/trigger
|
|
+ *
|
|
+ * # unload the overlay
|
|
+ * dtoverlay -r gpio-led
|
|
+ *
|
|
+ * To load in /boot/config.txt add lines such as:
|
|
+ * dtoverlay=gpio-led,gpio=19,label=heart,trigger=heartbeat
|
|
+ * dtoverlay=gpio-led,gpio=26,label=brain,trigger=cpu
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ // Configure the gpio pin controller
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ led_pin: led_pins@19 {
|
|
+ brcm,pins = <19>; // gpio number
|
|
+ brcm,function = <1>; // 0 = input, 1 = output
|
|
+ brcm,pull = <0>; // 0 = none, 1 = pull down, 2 = pull up
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ leds: leds@0 {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&led_pin>;
|
|
+ status = "okay";
|
|
+
|
|
+ led: led {
|
|
+ label = "myled1";
|
|
+ gpios = <&gpio 19 0>;
|
|
+ linux,default-trigger = "none";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpio = <&led>,"gpios:4",
|
|
+ <&leds>,"reg:0",
|
|
+ <&led_pin>,"brcm,pins:0",
|
|
+ <&led_pin>,"reg:0";
|
|
+ label = <&led>,"label";
|
|
+ active_low = <&led>,"gpios:8";
|
|
+ trigger = <&led>,"linux,default-trigger";
|
|
+ };
|
|
+
|
|
+};
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts b/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts
|
|
new file mode 100755
|
|
index 000000000000..96cbe80820b7
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/gpio-no-bank0-irq-overlay.dts
|
|
@@ -0,0 +1,14 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ // Configure the gpio pin controller
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ interrupts = <255 255>, <2 18>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts b/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..55f9bff3a8f6
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/gpio-no-irq-overlay.dts
|
|
@@ -0,0 +1,14 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ // Configure the gpio pin controller
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ interrupts;
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..416aa2bc797a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts
|
|
@@ -0,0 +1,37 @@
|
|
+// Definitions for gpio-poweroff module
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ power_ctrl: power_ctrl {
|
|
+ compatible = "gpio-poweroff";
|
|
+ gpios = <&gpio 26 0>;
|
|
+ force;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ power_ctrl_pins: power_ctrl_pins {
|
|
+ brcm,pins = <26>;
|
|
+ brcm,function = <1>; // out
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpiopin = <&power_ctrl>,"gpios:4",
|
|
+ <&power_ctrl_pins>,"brcm,pins:0";
|
|
+ active_low = <&power_ctrl>,"gpios:8";
|
|
+ input = <&power_ctrl>,"input?";
|
|
+ export = <&power_ctrl>,"export?";
|
|
+ timeout_ms = <&power_ctrl>,"timeout-ms:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..da148064aedd
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/gpio-shutdown-overlay.dts
|
|
@@ -0,0 +1,86 @@
|
|
+// Definitions for gpio-poweroff module
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+// This overlay sets up an input device that generates KEY_POWER events
|
|
+// when a given GPIO pin changes. It defaults to using GPIO3, which can
|
|
+// also be used to wake up (start) the Rpi again after shutdown.
|
|
+// Raspberry Pi 1 Model B rev 1 can be wake up only by GPIO1 pin, so for
|
|
+// these boards change default GPIO pin to 1 via gpio_pin parameter. Since
|
|
+// wakeup is active-low, this defaults to active-low with a pullup
|
|
+// enabled, but all of this can be changed using overlay parameters (but
|
|
+// note that GPIO3 has an external pullup on at least some boards).
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ // Configure the gpio pin controller
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ // Define a pinctrl state, that sets up the gpio
|
|
+ // as an input with a pullup enabled. This does
|
|
+ // not take effect by itself, only when referenced
|
|
+ // by a "pinctrl client", as is done below. See:
|
|
+ // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
|
|
+ // https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/brcm,bcm2835-gpio.txt
|
|
+ pin_state: shutdown_button_pins@3 {
|
|
+ brcm,pins = <3>; // gpio number
|
|
+ brcm,function = <0>; // 0 = input, 1 = output
|
|
+ brcm,pull = <2>; // 0 = none, 1 = pull down, 2 = pull up
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@1 {
|
|
+ // Add a new device to the /soc devicetree node
|
|
+ target-path = "/soc";
|
|
+ __overlay__ {
|
|
+ shutdown_button: shutdown_button@3 {
|
|
+ // Let the gpio-keys driver handle this device. See:
|
|
+ // https://www.kernel.org/doc/Documentation/devicetree/bindings/input/gpio-keys.txt
|
|
+ compatible = "gpio-keys";
|
|
+
|
|
+ // Declare a single pinctrl state (referencing the one declared above) and name it
|
|
+ // default, so it is activated automatically.
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pin_state>;
|
|
+
|
|
+ // Enable this device
|
|
+ status = "okay";
|
|
+
|
|
+ // Define a single key, called "shutdown" that monitors the gpio and sends KEY_POWER
|
|
+ // (keycode 116, see
|
|
+ // https://github.com/torvalds/linux/blob/v4.12/include/uapi/linux/input-event-codes.h#L190)
|
|
+ button: shutdown {
|
|
+ label = "shutdown";
|
|
+ linux,code = <116>; // KEY_POWER
|
|
+ gpios = <&gpio 3 1>;
|
|
+ debounce-interval = <100>; // ms
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // This defines parameters that can be specified when loading
|
|
+ // the overlay. Each foo = line specifies one parameter, named
|
|
+ // foo. The rest of the specification gives properties where the
|
|
+ // parameter value is inserted into (changing the values above
|
|
+ // or adding new ones).
|
|
+ __overrides__ {
|
|
+ // Allow overriding the GPIO number.
|
|
+ gpio_pin = <&button>,"gpios:4",
|
|
+ <&shutdown_button>,"reg:0",
|
|
+ <&pin_state>,"reg:0",
|
|
+ <&pin_state>,"brcm,pins:0";
|
|
+
|
|
+ // Allow changing the internal pullup/down state. 0 = none, 1 = pulldown, 2 = pullup
|
|
+ // Note that GPIO3 and GPIO2 are the I2c pins and have an external pullup (at least
|
|
+ // on some boards). Same applies for GPIO1 on Raspberry Pi 1 Model B rev 1.
|
|
+ gpio_pull = <&pin_state>,"brcm,pull:0";
|
|
+
|
|
+ // Allow setting the active_low flag. 0 = active high, 1 = active low
|
|
+ active_low = <&button>,"gpios:8";
|
|
+ debounce = <&button>,"debounce-interval:0";
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts b/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ee726669ff51
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hd44780-lcd-overlay.dts
|
|
@@ -0,0 +1,46 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ lcd_screen: auxdisplay {
|
|
+ compatible = "hit,hd44780";
|
|
+
|
|
+ data-gpios = <&gpio 6 0>,
|
|
+ <&gpio 13 0>,
|
|
+ <&gpio 19 0>,
|
|
+ <&gpio 26 0>;
|
|
+ enable-gpios = <&gpio 21 0>;
|
|
+ rs-gpios = <&gpio 20 0>;
|
|
+
|
|
+ display-height-chars = <2>;
|
|
+ display-width-chars = <16>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&lcd_screen>;
|
|
+ __dormant__ {
|
|
+ backlight-gpios = <&gpio 12 0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pin_d4 = <&lcd_screen>,"data-gpios:4";
|
|
+ pin_d5 = <&lcd_screen>,"data-gpios:16";
|
|
+ pin_d6 = <&lcd_screen>,"data-gpios:28";
|
|
+ pin_d7 = <&lcd_screen>,"data-gpios:40";
|
|
+ pin_en = <&lcd_screen>,"enable-gpios:4";
|
|
+ pin_rs = <&lcd_screen>,"rs-gpios:4";
|
|
+ pin_bl = <0>,"+1", <&lcd_screen>,"backlight-gpios:4";
|
|
+ display_height = <&lcd_screen>,"display-height-chars:0";
|
|
+ display_width = <&lcd_screen>,"display-width-chars:0";
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts b/arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..50b9a2665c80
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts
|
|
@@ -0,0 +1,47 @@
|
|
+/*
|
|
+ * Devicetree overlay for GPIO based backlight on/off capability.
|
|
+ *
|
|
+ * Use this if you have one of those HDMI displays whose backlight cannot be
|
|
+ * controlled via DPMS over HDMI and plan to do a little soldering to use an
|
|
+ * RPi gpio pin for on/off switching.
|
|
+ *
|
|
+ * See: https://www.waveshare.com/wiki/7inch_HDMI_LCD_(C)#Backlight_Control
|
|
+ *
|
|
+ */
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ hdmi_backlight_hwhack_gpio_pins: hdmi_backlight_hwhack_gpio_pins {
|
|
+ brcm,pins = <17>;
|
|
+ brcm,function = <1>; /* out */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ hdmi_backlight_hwhack_gpio: hdmi_backlight_hwhack_gpio {
|
|
+ compatible = "gpio-backlight";
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&hdmi_backlight_hwhack_gpio_pins>;
|
|
+
|
|
+ gpios = <&gpio 17 0>;
|
|
+ default-on;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpio_pin = <&hdmi_backlight_hwhack_gpio>,"gpios:4",
|
|
+ <&hdmi_backlight_hwhack_gpio_pins>,"brcm,pins:0";
|
|
+ active_low = <&hdmi_backlight_hwhack_gpio>,"gpios:8";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..142518ab348b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-amp-overlay.dts
|
|
@@ -0,0 +1,39 @@
|
|
+// Definitions for HiFiBerry Amp/Amp+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ tas5713@1b {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,tas5713";
|
|
+ reg = <0x1b>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "hifiberry,hifiberry-amp";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ebdef55d6110
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-amp100-overlay.dts
|
|
@@ -0,0 +1,64 @@
|
|
+// Definitions for HiFiBerry AMP100
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ dacpro_osc: dacpro_osc {
|
|
+ compatible = "hifiberry,dacpro-clk";
|
|
+ #clock-cells = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm5122@4d {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4d>;
|
|
+ clocks = <&dacpro_osc>;
|
|
+ AVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ CPVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ hifiberry_dacplus: __overlay__ {
|
|
+ compatible = "hifiberry,hifiberry-dacplus";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ mute-gpio = <&gpio 4 0>;
|
|
+ reset-gpio = <&gpio 17 0x11>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain =
|
|
+ <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
|
|
+ slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
|
|
+ leds_off = <&hifiberry_dacplus>,"hifiberry-dacplus,leds_off?";
|
|
+ mute_ext_ctl = <&hifiberry_dacplus>,"hifiberry-dacplus,mute_ext_ctl:0";
|
|
+ auto_mute = <&hifiberry_dacplus>,"hifiberry-dacplus,auto_mute?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ea8a6c8f36c0
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts
|
|
@@ -0,0 +1,34 @@
|
|
+// Definitions for HiFiBerry DAC
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ pcm5102a-codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5102a";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "hifiberry,hifiberry-dac";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ff19015ba656
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts
|
|
@@ -0,0 +1,65 @@
|
|
+// Definitions for HiFiBerry DAC+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ dacpro_osc: dacpro_osc {
|
|
+ compatible = "hifiberry,dacpro-clk";
|
|
+ #clock-cells = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm5122@4d {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4d>;
|
|
+ clocks = <&dacpro_osc>;
|
|
+ AVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ CPVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ hpamp: hpamp@60 {
|
|
+ compatible = "ti,tpa6130a2";
|
|
+ reg = <0x60>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ hifiberry_dacplus: __overlay__ {
|
|
+ compatible = "hifiberry,hifiberry-dacplus";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain =
|
|
+ <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?";
|
|
+ slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?";
|
|
+ leds_off = <&hifiberry_dacplus>,"hifiberry-dacplus,leds_off?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..540563dec10f
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts
|
|
@@ -0,0 +1,72 @@
|
|
+// Definitions for HiFiBerry DAC+ADC
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ dacpro_osc: dacpro_osc {
|
|
+ compatible = "hifiberry,dacpro-clk";
|
|
+ #clock-cells = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm_codec: pcm5122@4d {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4d>;
|
|
+ clocks = <&dacpro_osc>;
|
|
+ AVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ CPVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ dmic {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "dmic-codec";
|
|
+ num-channels = <2>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&sound>;
|
|
+ hifiberry_dacplusadc: __overlay__ {
|
|
+ compatible = "hifiberry,hifiberry-dacplusadc";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain =
|
|
+ <&hifiberry_dacplusadc>,"hifiberry,24db_digital_gain?";
|
|
+ slave = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,slave?";
|
|
+ leds_off = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,leds_off?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..cafa2ccd7ff7
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts
|
|
@@ -0,0 +1,65 @@
|
|
+// Definitions for HiFiBerry DAC+ADC PRO
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ dacpro_osc: dacpro_osc {
|
|
+ compatible = "hifiberry,dacpro-clk";
|
|
+ #clock-cells = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ hb_dac: pcm5122@4d {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4d>;
|
|
+ clocks = <&dacpro_osc>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ hb_adc: pcm186x@4a {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm1863";
|
|
+ reg = <0x4a>;
|
|
+ clocks = <&dacpro_osc>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ hifiberry_dacplusadcpro: __overlay__ {
|
|
+ compatible = "hifiberry,hifiberry-dacplusadcpro";
|
|
+ audio-codec = <&hb_dac &hb_adc>;
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain =
|
|
+ <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,24db_digital_gain?";
|
|
+ slave = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,slave?";
|
|
+ leds_off = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,leds_off?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..63432e8b983f
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusdsp-overlay.dts
|
|
@@ -0,0 +1,34 @@
|
|
+// Definitions for hifiberry DAC+DSP soundcard overlay
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ dacplusdsp-codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "hifiberry,dacplusdsp";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "hifiberrydacplusdsp,hifiberrydacplusdsp-soundcard";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..c5583e010339
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts
|
|
@@ -0,0 +1,106 @@
|
|
+// Definitions for HiFiBerry DAC+ HD
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ dachd_osc: pll_dachd_osc {
|
|
+ compatible = "hifiberry,dachd-clk";
|
|
+ #clock-cells = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm1792a@4c {
|
|
+ compatible = "ti,pcm1792a";
|
|
+ #sound-dai-cells = <0>;
|
|
+ #clock-cells = <0>;
|
|
+ clocks = <&dachd_osc>;
|
|
+ reg = <0x4c>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ pll: pll@62 {
|
|
+ compatible = "hifiberry,dachd-clk";
|
|
+ #clock-cells = <0>;
|
|
+ reg = <0x62>;
|
|
+ clocks = <&dachd_osc>;
|
|
+ status = "okay";
|
|
+ common_pll_regs = [
|
|
+ 02 53 03 00 07 20 0F 00
|
|
+ 10 0D 11 1D 12 0D 13 8C
|
|
+ 14 8C 15 8C 16 8C 17 8C
|
|
+ 18 2A 1C 00 1D 0F 1F 00
|
|
+ 2A 00 2C 00 2F 00 30 00
|
|
+ 31 00 32 00 34 00 37 00
|
|
+ 38 00 39 00 3A 00 3B 01
|
|
+ 3E 00 3F 00 40 00 41 00
|
|
+ 5A 00 5B 00 95 00 96 00
|
|
+ 97 00 98 00 99 00 9A 00
|
|
+ 9B 00 A2 00 A3 00 A4 00
|
|
+ B7 92 ];
|
|
+ 192k_pll_regs = [
|
|
+ 1A 0C 1B 35 1E F0 20 09
|
|
+ 21 50 2B 02 2D 10 2E 40
|
|
+ 33 01 35 22 36 80 3C 22
|
|
+ 3D 46 ];
|
|
+ 96k_pll_regs = [
|
|
+ 1A 0C 1B 35 1E F0 20 09
|
|
+ 21 50 2B 02 2D 10 2E 40
|
|
+ 33 01 35 47 36 00 3C 32
|
|
+ 3D 46 ];
|
|
+ 48k_pll_regs = [
|
|
+ 1A 0C 1B 35 1E F0 20 09
|
|
+ 21 50 2B 02 2D 10 2E 40
|
|
+ 33 01 35 90 36 00 3C 42
|
|
+ 3D 46 ];
|
|
+ 176k4_pll_regs = [
|
|
+ 1A 3D 1B 09 1E F3 20 13
|
|
+ 21 75 2B 04 2D 11 2E E0
|
|
+ 33 02 35 25 36 C0 3C 22
|
|
+ 3D 7A ];
|
|
+ 88k2_pll_regs = [
|
|
+ 1A 3D 1B 09 1E F3 20 13
|
|
+ 21 75 2B 04 2D 11 2E E0
|
|
+ 33 01 35 4D 36 80 3C 32
|
|
+ 3D 7A ];
|
|
+ 44k1_pll_regs = [
|
|
+ 1A 3D 1B 09 1E F3 20 13
|
|
+ 21 75 2B 04 2D 11 2E E0
|
|
+ 33 01 35 9D 36 00 3C 42
|
|
+ 3D 7A ];
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "hifiberry,hifiberry-dacplushd";
|
|
+ i2s-controller = <&i2s>;
|
|
+ clocks = <&pll 0>;
|
|
+ reset-gpio = <&gpio 16 GPIO_ACTIVE_LOW>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..a2309a50e8d8
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-digi-overlay.dts
|
|
@@ -0,0 +1,41 @@
|
|
+// Definitions for HiFiBerry Digi
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ wm8804@3b {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "wlf,wm8804";
|
|
+ reg = <0x3b>;
|
|
+ PVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "hifiberry,hifiberry-digi";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..83de602e76ba
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hifiberry-digi-pro-overlay.dts
|
|
@@ -0,0 +1,43 @@
|
|
+// Definitions for HiFiBerry Digi Pro
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ wm8804@3b {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "wlf,wm8804";
|
|
+ reg = <0x3b>;
|
|
+ PVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "hifiberry,hifiberry-digi";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ clock44-gpio = <&gpio 5 0>;
|
|
+ clock48-gpio = <&gpio 6 0>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/highperi-overlay.dts b/arch/arm/boot/dts/overlays/highperi-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..46cb76c2d34f
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/highperi-overlay.dts
|
|
@@ -0,0 +1,63 @@
|
|
+/*
|
|
+ * highperi.dts
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&soc>;
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ ranges = <0x7c000000 0x4 0x7c000000 0x04000000>,
|
|
+ <0x40000000 0x4 0xc0000000 0x00800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&scb>;
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ __overlay__ {
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+ ranges = <0x0 0x7c000000 0x4 0x7c000000 0x0 0x04000000>,
|
|
+ <0x0 0x40000000 0x4 0xc0000000 0x0 0x00800000>,
|
|
+ <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>;
|
|
+ dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x2 0x00000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&v3dbus>;
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <2>;
|
|
+ ranges = <0x7c500000 0x4 0x7c500000 0x0 0x03300000>,
|
|
+ <0x40000000 0x4 0xc0000000 0x0 0x00800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&emmc2bus>;
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ __overlay__ {
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <1>;
|
|
+ ranges = <0x0 0x7e000000 0x4 0x7e000000 0x01800000>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hy28a-overlay.dts b/arch/arm/boot/dts/overlays/hy28a-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..5843a5e9c86a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hy28a-overlay.dts
|
|
@@ -0,0 +1,93 @@
|
|
+/*
|
|
+ * Device Tree overlay for HY28A display
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ hy28a_pins: hy28a_pins {
|
|
+ brcm,pins = <17 25 18>;
|
|
+ brcm,function = <0 1 1>; /* in out out */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ hy28a: hy28a@0{
|
|
+ compatible = "ilitek,ili9320";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&hy28a_pins>;
|
|
+
|
|
+ spi-max-frequency = <32000000>;
|
|
+ spi-cpol;
|
|
+ spi-cpha;
|
|
+ rotate = <270>;
|
|
+ bgr;
|
|
+ fps = <50>;
|
|
+ buswidth = <8>;
|
|
+ startbyte = <0x70>;
|
|
+ reset-gpios = <&gpio 25 1>;
|
|
+ led-gpios = <&gpio 18 1>;
|
|
+ debug = <0>;
|
|
+ };
|
|
+
|
|
+ hy28a_ts: hy28a-ts@1 {
|
|
+ compatible = "ti,ads7846";
|
|
+ reg = <1>;
|
|
+
|
|
+ spi-max-frequency = <2000000>;
|
|
+ interrupts = <17 2>; /* high-to-low edge triggered */
|
|
+ interrupt-parent = <&gpio>;
|
|
+ pendown-gpio = <&gpio 17 0>;
|
|
+ ti,x-plate-ohms = /bits/ 16 <100>;
|
|
+ ti,pressure-max = /bits/ 16 <255>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ speed = <&hy28a>,"spi-max-frequency:0";
|
|
+ rotate = <&hy28a>,"rotate:0";
|
|
+ fps = <&hy28a>,"fps:0";
|
|
+ debug = <&hy28a>,"debug:0";
|
|
+ xohms = <&hy28a_ts>,"ti,x-plate-ohms;0";
|
|
+ resetgpio = <&hy28a>,"reset-gpios:4",
|
|
+ <&hy28a_pins>, "brcm,pins:4";
|
|
+ ledgpio = <&hy28a>,"led-gpios:4",
|
|
+ <&hy28a_pins>, "brcm,pins:8";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts b/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..95bfb1eadc20
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hy28b-2017-overlay.dts
|
|
@@ -0,0 +1,152 @@
|
|
+/*
|
|
+ * Device Tree overlay for HY28b display shield by Texy.
|
|
+ * Modified for 2017 version with ILI9325 D chip
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ hy28b_pins: hy28b_pins {
|
|
+ brcm,pins = <17 25 18>;
|
|
+ brcm,function = <0 1 1>; /* in out out */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ hy28b: hy28b@0{
|
|
+ compatible = "ilitek,ili9325";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&hy28b_pins>;
|
|
+
|
|
+ spi-max-frequency = <48000000>;
|
|
+ spi-cpol;
|
|
+ spi-cpha;
|
|
+ rotate = <270>;
|
|
+ bgr;
|
|
+ fps = <50>;
|
|
+ buswidth = <8>;
|
|
+ startbyte = <0x70>;
|
|
+ reset-gpios = <&gpio 25 1>;
|
|
+ led-gpios = <&gpio 18 1>;
|
|
+
|
|
+ init = <0x10000e5 0x78F0
|
|
+ 0x1000001 0x0100
|
|
+ 0x1000002 0x0700
|
|
+ 0x1000003 0x1030
|
|
+ 0x1000004 0x0000
|
|
+ 0x1000008 0x0207
|
|
+ 0x1000009 0x0000
|
|
+ 0x100000a 0x0000
|
|
+ 0x100000c 0x0000
|
|
+ 0x100000d 0x0000
|
|
+ 0x100000f 0x0000
|
|
+ 0x1000010 0x0000
|
|
+ 0x1000011 0x0007
|
|
+ 0x1000012 0x0000
|
|
+ 0x1000013 0x0000
|
|
+ 0x1000007 0x0001
|
|
+ 0x2000032
|
|
+ 0x2000032
|
|
+ 0x2000032
|
|
+ 0x2000032
|
|
+ 0x1000010 0x1090
|
|
+ 0x1000011 0x0227
|
|
+ 0x2000032
|
|
+ 0x1000012 0x001f
|
|
+ 0x2000032
|
|
+ 0x1000013 0x1500
|
|
+ 0x1000029 0x0027
|
|
+ 0x100002b 0x000d
|
|
+ 0x2000032
|
|
+ 0x1000020 0x0000
|
|
+ 0x1000021 0x0000
|
|
+ 0x2000032
|
|
+ 0x1000030 0x0000
|
|
+ 0x1000031 0x0707
|
|
+ 0x1000032 0x0307
|
|
+ 0x1000035 0x0200
|
|
+ 0x1000036 0x0008
|
|
+ 0x1000037 0x0004
|
|
+ 0x1000038 0x0000
|
|
+ 0x1000039 0x0707
|
|
+ 0x100003c 0x0002
|
|
+ 0x100003d 0x1d04
|
|
+ 0x1000050 0x0000
|
|
+ 0x1000051 0x00ef
|
|
+ 0x1000052 0x0000
|
|
+ 0x1000053 0x013f
|
|
+ 0x1000060 0xa700
|
|
+ 0x1000061 0x0001
|
|
+ 0x100006a 0x0000
|
|
+ 0x1000080 0x0000
|
|
+ 0x1000081 0x0000
|
|
+ 0x1000082 0x0000
|
|
+ 0x1000083 0x0000
|
|
+ 0x1000084 0x0000
|
|
+ 0x1000085 0x0000
|
|
+ 0x1000090 0x0010
|
|
+ 0x1000092 0x0600
|
|
+ 0x1000007 0x0133>;
|
|
+ debug = <0>;
|
|
+ };
|
|
+
|
|
+ hy28b_ts: hy28b-ts@1 {
|
|
+ compatible = "ti,ads7846";
|
|
+ reg = <1>;
|
|
+
|
|
+ spi-max-frequency = <2000000>;
|
|
+ interrupts = <17 2>; /* high-to-low edge triggered */
|
|
+ interrupt-parent = <&gpio>;
|
|
+ pendown-gpio = <&gpio 17 0>;
|
|
+ ti,x-plate-ohms = /bits/ 16 <100>;
|
|
+ ti,pressure-max = /bits/ 16 <255>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ speed = <&hy28b>,"spi-max-frequency:0";
|
|
+ rotate = <&hy28b>,"rotate:0";
|
|
+ fps = <&hy28b>,"fps:0";
|
|
+ debug = <&hy28b>,"debug:0";
|
|
+ xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
|
|
+ resetgpio = <&hy28b>,"reset-gpios:4",
|
|
+ <&hy28b_pins>, "brcm,pins:4";
|
|
+ ledgpio = <&hy28b>,"led-gpios:4",
|
|
+ <&hy28b_pins>, "brcm,pins:8";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/hy28b-overlay.dts b/arch/arm/boot/dts/overlays/hy28b-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..9edd0848d555
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/hy28b-overlay.dts
|
|
@@ -0,0 +1,148 @@
|
|
+/*
|
|
+ * Device Tree overlay for HY28b display shield by Texy
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ hy28b_pins: hy28b_pins {
|
|
+ brcm,pins = <17 25 18>;
|
|
+ brcm,function = <0 1 1>; /* in out out */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ hy28b: hy28b@0{
|
|
+ compatible = "ilitek,ili9325";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&hy28b_pins>;
|
|
+
|
|
+ spi-max-frequency = <48000000>;
|
|
+ spi-cpol;
|
|
+ spi-cpha;
|
|
+ rotate = <270>;
|
|
+ bgr;
|
|
+ fps = <50>;
|
|
+ buswidth = <8>;
|
|
+ startbyte = <0x70>;
|
|
+ reset-gpios = <&gpio 25 1>;
|
|
+ led-gpios = <&gpio 18 1>;
|
|
+
|
|
+ gamma = "04 1F 4 7 7 0 7 7 6 0\n0F 00 1 7 4 0 0 0 6 7";
|
|
+
|
|
+ init = <0x10000e7 0x0010
|
|
+ 0x1000000 0x0001
|
|
+ 0x1000001 0x0100
|
|
+ 0x1000002 0x0700
|
|
+ 0x1000003 0x1030
|
|
+ 0x1000004 0x0000
|
|
+ 0x1000008 0x0207
|
|
+ 0x1000009 0x0000
|
|
+ 0x100000a 0x0000
|
|
+ 0x100000c 0x0001
|
|
+ 0x100000d 0x0000
|
|
+ 0x100000f 0x0000
|
|
+ 0x1000010 0x0000
|
|
+ 0x1000011 0x0007
|
|
+ 0x1000012 0x0000
|
|
+ 0x1000013 0x0000
|
|
+ 0x2000032
|
|
+ 0x1000010 0x1590
|
|
+ 0x1000011 0x0227
|
|
+ 0x2000032
|
|
+ 0x1000012 0x009c
|
|
+ 0x2000032
|
|
+ 0x1000013 0x1900
|
|
+ 0x1000029 0x0023
|
|
+ 0x100002b 0x000e
|
|
+ 0x2000032
|
|
+ 0x1000020 0x0000
|
|
+ 0x1000021 0x0000
|
|
+ 0x2000032
|
|
+ 0x1000050 0x0000
|
|
+ 0x1000051 0x00ef
|
|
+ 0x1000052 0x0000
|
|
+ 0x1000053 0x013f
|
|
+ 0x1000060 0xa700
|
|
+ 0x1000061 0x0001
|
|
+ 0x100006a 0x0000
|
|
+ 0x1000080 0x0000
|
|
+ 0x1000081 0x0000
|
|
+ 0x1000082 0x0000
|
|
+ 0x1000083 0x0000
|
|
+ 0x1000084 0x0000
|
|
+ 0x1000085 0x0000
|
|
+ 0x1000090 0x0010
|
|
+ 0x1000092 0x0000
|
|
+ 0x1000093 0x0003
|
|
+ 0x1000095 0x0110
|
|
+ 0x1000097 0x0000
|
|
+ 0x1000098 0x0000
|
|
+ 0x1000007 0x0133
|
|
+ 0x1000020 0x0000
|
|
+ 0x1000021 0x0000
|
|
+ 0x2000064>;
|
|
+ debug = <0>;
|
|
+ };
|
|
+
|
|
+ hy28b_ts: hy28b-ts@1 {
|
|
+ compatible = "ti,ads7846";
|
|
+ reg = <1>;
|
|
+
|
|
+ spi-max-frequency = <2000000>;
|
|
+ interrupts = <17 2>; /* high-to-low edge triggered */
|
|
+ interrupt-parent = <&gpio>;
|
|
+ pendown-gpio = <&gpio 17 0>;
|
|
+ ti,x-plate-ohms = /bits/ 16 <100>;
|
|
+ ti,pressure-max = /bits/ 16 <255>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ speed = <&hy28b>,"spi-max-frequency:0";
|
|
+ rotate = <&hy28b>,"rotate:0";
|
|
+ fps = <&hy28b>,"fps:0";
|
|
+ debug = <&hy28b>,"debug:0";
|
|
+ xohms = <&hy28b_ts>,"ti,x-plate-ohms;0";
|
|
+ resetgpio = <&hy28b>,"reset-gpios:4",
|
|
+ <&hy28b_pins>, "brcm,pins:4";
|
|
+ ledgpio = <&hy28b>,"led-gpios:4",
|
|
+ <&hy28b_pins>, "brcm,pins:8";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts b/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..0c4cff354674
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i-sabre-q2m-overlay.dts
|
|
@@ -0,0 +1,39 @@
|
|
+// Definitions for I-Sabre Q2M
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&sound>;
|
|
+ frag0: __overlay__ {
|
|
+ compatible = "audiophonics,i-sabre-q2m";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ i-sabre-codec@48 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "audiophonics,i-sabre-codec";
|
|
+ reg = <0x48>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..8204b6b3aef8
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c-bcm2708-overlay.dts
|
|
@@ -0,0 +1,13 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_arm>;
|
|
+ __overlay__ {
|
|
+ compatible = "brcm,bcm2708-i2c";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..63231b5d7c0c
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c-gpio-overlay.dts
|
|
@@ -0,0 +1,47 @@
|
|
+// Overlay for i2c_gpio bitbanging host bus.
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+
|
|
+ __overlay__ {
|
|
+ i2c_gpio: i2c@0 {
|
|
+ reg = <0xffffffff>;
|
|
+ compatible = "i2c-gpio";
|
|
+ gpios = <&gpio 23 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* sda */
|
|
+ &gpio 24 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* scl */
|
|
+ >;
|
|
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/aliases";
|
|
+ __overlay__ {
|
|
+ i2c_gpio = "/i2c@0";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "/__symbols__";
|
|
+ __overlay__ {
|
|
+ i2c_gpio = "/i2c@0";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ i2c_gpio_sda = <&i2c_gpio>,"gpios:4";
|
|
+ i2c_gpio_scl = <&i2c_gpio>,"gpios:16";
|
|
+ i2c_gpio_delay_us = <&i2c_gpio>,"i2c-gpio,delay-us:0";
|
|
+ bus = <&i2c_gpio>, "reg:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..112aed91ecb2
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c-mux-overlay.dts
|
|
@@ -0,0 +1,139 @@
|
|
+// Umbrella I2C Mux overlay
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pca9542: mux@70 {
|
|
+ compatible = "nxp,pca9542";
|
|
+ reg = <0x70>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ i2c@0 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <0>;
|
|
+ };
|
|
+ i2c@1 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <1>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pca9545: mux@70 {
|
|
+ compatible = "nxp,pca9545";
|
|
+ reg = <0x70>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ i2c@0 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <0>;
|
|
+ };
|
|
+ i2c@1 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <1>;
|
|
+ };
|
|
+ i2c@2 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <2>;
|
|
+ };
|
|
+ i2c@3 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <3>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pca9548: mux@70 {
|
|
+ compatible = "nxp,pca9548";
|
|
+ reg = <0x70>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ i2c@0 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <0>;
|
|
+ };
|
|
+ i2c@1 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <1>;
|
|
+ };
|
|
+ i2c@2 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <2>;
|
|
+ };
|
|
+ i2c@3 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <3>;
|
|
+ };
|
|
+ i2c@4 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <4>;
|
|
+ };
|
|
+ i2c@5 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <5>;
|
|
+ };
|
|
+ i2c@6 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <6>;
|
|
+ };
|
|
+ i2c@7 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ reg = <7>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pca9542 = <0>, "+0";
|
|
+ pca9545 = <0>, "+1";
|
|
+ pca9548 = <0>, "+2";
|
|
+
|
|
+ addr = <&pca9542>,"reg:0",
|
|
+ <&pca9545>,"reg:0",
|
|
+ <&pca9548>,"reg:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..9bb16465a50e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts
|
|
@@ -0,0 +1,26 @@
|
|
+// Definitions for NXP PCA9685A I2C PWM controller on ARM I2C bus.
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_arm>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pca: pca@40 {
|
|
+ compatible = "nxp,pca9685-pwm";
|
|
+ #pwm-cells = <2>;
|
|
+ reg = <0x40>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ addr = <&pca>,"reg:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c-rtc-common.dtsi b/arch/arm/boot/dts/overlays/i2c-rtc-common.dtsi
|
|
new file mode 100644
|
|
index 000000000000..7f749fc2d802
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c-rtc-common.dtsi
|
|
@@ -0,0 +1,323 @@
|
|
+// Definitions for several I2C based Real Time Clocks
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ abx80x: abx80x@69 {
|
|
+ compatible = "abracon,abx80x";
|
|
+ reg = <0x69>;
|
|
+ abracon,tc-diode = "standard";
|
|
+ abracon,tc-resistor = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ds1307: ds1307@68 {
|
|
+ compatible = "dallas,ds1307";
|
|
+ reg = <0x68>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ds1339: ds1339@68 {
|
|
+ compatible = "dallas,ds1339";
|
|
+ trickle-resistor-ohms = <0>;
|
|
+ reg = <0x68>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ds3231: ds3231@68 {
|
|
+ compatible = "maxim,ds3231";
|
|
+ reg = <0x68>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp7940x: mcp7940x@6f {
|
|
+ compatible = "microchip,mcp7940x";
|
|
+ reg = <0x6f>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp7941x: mcp7941x@6f {
|
|
+ compatible = "microchip,mcp7941x";
|
|
+ reg = <0x6f>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pcf2127@51 {
|
|
+ compatible = "nxp,pcf2127";
|
|
+ reg = <0x51>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pcf8523: pcf8523@68 {
|
|
+ compatible = "nxp,pcf8523";
|
|
+ reg = <0x68>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pcf8563: pcf8563@51 {
|
|
+ compatible = "nxp,pcf8563";
|
|
+ reg = <0x51>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@9 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ m41t62: m41t62@68 {
|
|
+ compatible = "st,m41t62";
|
|
+ reg = <0x68>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@10 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ rv3028: rv3028@52 {
|
|
+ compatible = "microcrystal,rv3028";
|
|
+ reg = <0x52>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@11 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pcf2129@51 {
|
|
+ compatible = "nxp,pcf2129";
|
|
+ reg = <0x51>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@12 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pcf85363@51 {
|
|
+ compatible = "nxp,pcf85363";
|
|
+ reg = <0x51>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@13 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ rv1805: rv1805@69 {
|
|
+ compatible = "microcrystal,rv1805";
|
|
+ reg = <0x69>;
|
|
+ abracon,tc-diode = "standard";
|
|
+ abracon,tc-resistor = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@14 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sd3078: sd3078@32 {
|
|
+ compatible = "whwave,sd3078";
|
|
+ reg = <0x32>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@15 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pcf85063@51 {
|
|
+ compatible = "nxp,pcf85063";
|
|
+ reg = <0x51>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@16 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pcf85063a@51 {
|
|
+ compatible = "nxp,pcf85063a";
|
|
+ reg = <0x51>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@17 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ds1340: ds1340@68 {
|
|
+ compatible = "dallas,ds1340";
|
|
+ trickle-resistor-ohms = <0>;
|
|
+ reg = <0x68>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@18 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ s35390a: s35390a@30 {
|
|
+ compatible = "ablic,s35390a";
|
|
+ reg = <0x30>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@19 {
|
|
+ target = <&i2cbus>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ bq32000: bq32000@68 {
|
|
+ compatible = "ti,bq32000";
|
|
+ trickle-resistor-ohms = <0>;
|
|
+ reg = <0x68>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+
|
|
+ __overrides__ {
|
|
+ abx80x = <0>,"+0";
|
|
+ ds1307 = <0>,"+1";
|
|
+ ds1339 = <0>,"+2";
|
|
+ ds1340 = <0>,"+17";
|
|
+ ds3231 = <0>,"+3";
|
|
+ mcp7940x = <0>,"+4";
|
|
+ mcp7941x = <0>,"+5";
|
|
+ pcf2127 = <0>,"+6";
|
|
+ pcf8523 = <0>,"+7";
|
|
+ pcf8563 = <0>,"+8";
|
|
+ m41t62 = <0>,"+9";
|
|
+ rv3028 = <0>,"+10";
|
|
+ pcf2129 = <0>,"+11";
|
|
+ pcf85363 = <0>,"+12";
|
|
+ rv1805 = <0>,"+13";
|
|
+ sd3078 = <0>,"+14";
|
|
+ pcf85063 = <0>,"+15";
|
|
+ pcf85063a = <0>,"+16";
|
|
+ s35390a = <0>,"+18";
|
|
+ bq32000 = <0>,"+19";
|
|
+
|
|
+ addr = <&abx80x>, "reg:0",
|
|
+ <&ds1307>, "reg:0",
|
|
+ <&ds1339>, "reg:0",
|
|
+ <&ds3231>, "reg:0",
|
|
+ <&mcp7940x>, "reg:0",
|
|
+ <&mcp7941x>, "reg:0",
|
|
+ <&pcf8523>, "reg:0",
|
|
+ <&pcf8563>, "reg:0",
|
|
+ <&m41t62>, "reg:0",
|
|
+ <&rv1805>, "reg:0",
|
|
+ <&s35390a>, "reg:0";
|
|
+ trickle-diode-disable = <&bq32000>,"trickle-diode-disable?";
|
|
+ trickle-diode-type = <&abx80x>,"abracon,tc-diode",
|
|
+ <&rv1805>,"abracon,tc-diode";
|
|
+ trickle-resistor-ohms = <&ds1339>,"trickle-resistor-ohms:0",
|
|
+ <&ds1340>,"trickle-resistor-ohms:0",
|
|
+ <&abx80x>,"abracon,tc-resistor:0",
|
|
+ <&rv3028>,"trickle-resistor-ohms:0",
|
|
+ <&rv1805>,"abracon,tc-resistor:0",
|
|
+ <&bq32000>,"abracon,tc-resistor:0";
|
|
+ backup-switchover-mode = <&rv3028>,"backup-switchover-mode:0";
|
|
+ wakeup-source = <&ds1339>,"wakeup-source?",
|
|
+ <&ds3231>,"wakeup-source?",
|
|
+ <&mcp7940x>,"wakeup-source?",
|
|
+ <&mcp7941x>,"wakeup-source?",
|
|
+ <&m41t62>,"wakeup-source?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..c83480c1c327
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c-rtc-gpio-overlay.dts
|
|
@@ -0,0 +1,31 @@
|
|
+// Definitions for several I2C based Real Time Clocks
|
|
+// Available through i2c-gpio
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+#include "i2c-rtc-common.dtsi"
|
|
+
|
|
+/ {
|
|
+ fragment@100 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ i2cbus: i2c-gpio-rtc@0 {
|
|
+ compatible = "i2c-gpio";
|
|
+ gpios = <&gpio 23 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* sda */
|
|
+ &gpio 24 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN) /* scl */
|
|
+ >;
|
|
+ i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ i2c_gpio_sda = <&i2cbus>,"gpios:4";
|
|
+ i2c_gpio_scl = <&i2cbus>,"gpios:16";
|
|
+ i2c_gpio_delay_us = <&i2cbus>,"i2c-gpio,delay-us:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..1eae9e1a5c96
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts
|
|
@@ -0,0 +1,34 @@
|
|
+// Definitions for several I2C based Real Time Clocks
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include "i2c-rtc-common.dtsi"
|
|
+
|
|
+/ {
|
|
+ frag100: fragment@100 {
|
|
+ target = <&i2c_arm>;
|
|
+ i2cbus: __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@101 {
|
|
+ target = <&i2c0if>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@102 {
|
|
+ target = <&i2c0mux>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ i2c0 = <&frag100>, "target:0=",<&i2c0>;
|
|
+ i2c_csi_dsi = <&frag100>, "target:0=",<&i2c_csi_dsi>,
|
|
+ <0>,"+101+102";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
|
|
new file mode 100755
|
|
index 000000000000..b05b0fa91942
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts
|
|
@@ -0,0 +1,320 @@
|
|
+// Definitions for I2C based sensors using the Industrial IO or HWMON interface.
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ bme280: bme280@76 {
|
|
+ compatible = "bosch,bme280";
|
|
+ reg = <0x76>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ bmp085: bmp085@77 {
|
|
+ compatible = "bosch,bmp085";
|
|
+ reg = <0x77>;
|
|
+ default-oversampling = <3>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ bmp180: bmp180@77 {
|
|
+ compatible = "bosch,bmp180";
|
|
+ reg = <0x77>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ bmp280: bmp280@76 {
|
|
+ compatible = "bosch,bmp280";
|
|
+ reg = <0x76>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ htu21: htu21@40 {
|
|
+ compatible = "htu21";
|
|
+ reg = <0x40>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ lm75: lm75@4f {
|
|
+ compatible = "lm75";
|
|
+ reg = <0x4f>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ si7020: si7020@40 {
|
|
+ compatible = "si7020";
|
|
+ reg = <0x40>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ tmp102: tmp102@48 {
|
|
+ compatible = "ti,tmp102";
|
|
+ reg = <0x48>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ hdc100x: hdc100x@40 {
|
|
+ compatible = "hdc100x";
|
|
+ reg = <0x40>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@9 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ tsl4531: tsl4531@29 {
|
|
+ compatible = "tsl4531";
|
|
+ reg = <0x29>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@10 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ veml6070: veml6070@38 {
|
|
+ compatible = "veml6070";
|
|
+ reg = <0x38>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@11 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ sht3x: sht3x@44 {
|
|
+ compatible = "sht3x";
|
|
+ reg = <0x44>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@12 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ds1621: ds1621@48 {
|
|
+ compatible = "ds1621";
|
|
+ reg = <0x48>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@13 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ max17040: max17040@36 {
|
|
+ compatible = "maxim,max17040";
|
|
+ reg = <0x36>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@14 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ bme680: bme680@76 {
|
|
+ compatible = "bosch,bme680";
|
|
+ reg = <0x76>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@15 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ sps30: sps30@69 {
|
|
+ compatible = "sensirion,sps30";
|
|
+ reg = <0x69>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@16 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ sgp30: sgp30@58 {
|
|
+ compatible = "sensirion,sgp30";
|
|
+ reg = <0x58>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@17 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ccs811: ccs811@5b {
|
|
+ compatible = "ccs811";
|
|
+ reg = <0x5b>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@18 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ bh1750: bh1750@23 {
|
|
+ compatible = "bh1750";
|
|
+ reg = <0x23>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ addr = <&bme280>,"reg:0", <&bmp280>,"reg:0", <&tmp102>,"reg:0",
|
|
+ <&lm75>,"reg:0", <&hdc100x>,"reg:0", <&sht3x>,"reg:0",
|
|
+ <&ds1621>,"reg:0", <&bme680>,"reg:0", <&ccs811>,"reg:0",
|
|
+ <&bh1750>,"reg:0";
|
|
+ bme280 = <0>,"+0";
|
|
+ bmp085 = <0>,"+1";
|
|
+ bmp180 = <0>,"+2";
|
|
+ bmp280 = <0>,"+3";
|
|
+ htu21 = <0>,"+4";
|
|
+ lm75 = <0>,"+5";
|
|
+ lm75addr = <&lm75>,"reg:0";
|
|
+ si7020 = <0>,"+6";
|
|
+ tmp102 = <0>,"+7";
|
|
+ hdc100x = <0>,"+8";
|
|
+ tsl4531 = <0>,"+9";
|
|
+ veml6070 = <0>,"+10";
|
|
+ sht3x = <0>,"+11";
|
|
+ ds1621 = <0>,"+12";
|
|
+ max17040 = <0>,"+13";
|
|
+ bme680 = <0>,"+14";
|
|
+ sps30 = <0>,"+15";
|
|
+ sgp30 = <0>,"+16";
|
|
+ ccs811 = <0>, "+17";
|
|
+ bh1750 = <0>, "+18";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c0-overlay.dts b/arch/arm/boot/dts/overlays/i2c0-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..46bf1bf2dc5c
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c0-overlay.dts
|
|
@@ -0,0 +1,83 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c0if>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c0_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c0_pins>;
|
|
+ pins1: __overlay__ {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c0_pins>;
|
|
+ pins2: __dormant__ {
|
|
+ brcm,pins = <28 29>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c0_pins>;
|
|
+ pins3: __dormant__ {
|
|
+ brcm,pins = <44 45>;
|
|
+ brcm,function = <5>; /* alt1 */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2c0_pins>;
|
|
+ pins4: __dormant__ {
|
|
+ brcm,pins = <46 47>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ compatible = "brcm,bcm2708-i2c";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target = <&i2c0mux>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target-path = "/aliases";
|
|
+ __overlay__ {
|
|
+ i2c0 = "/soc/i2c@7e205000";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target-path = "/__symbols__";
|
|
+ __overlay__ {
|
|
+ i2c0 = "/soc/i2c@7e205000";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pins_0_1 = <0>,"+1-2-3-4";
|
|
+ pins_28_29 = <0>,"-1+2-3-4";
|
|
+ pins_44_45 = <0>,"-1-2+3-4";
|
|
+ pins_46_47 = <0>,"-1-2-3+4";
|
|
+ combine = <0>, "!5";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c1-overlay.dts b/arch/arm/boot/dts/overlays/i2c1-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..addaed73e665
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c1-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1_pins>;
|
|
+ pins1: __overlay__ {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>; /* alt 0 */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1_pins>;
|
|
+ pins2: __dormant__ {
|
|
+ brcm,pins = <44 45>;
|
|
+ brcm,function = <6>; /* alt 2 */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ compatible = "brcm,bcm2708-i2c";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pins_2_3 = <0>,"=1!2";
|
|
+ pins_44_45 = <0>,"!1=2";
|
|
+ combine = <0>, "!3";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c3-overlay.dts b/arch/arm/boot/dts/overlays/i2c3-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e24a1df21f99
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c3-overlay.dts
|
|
@@ -0,0 +1,36 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c3>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c3_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c3_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <2 3>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c3_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins = <4 5>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pins_2_3 = <0>,"=1!2";
|
|
+ pins_4_5 = <0>,"!1=2";
|
|
+ baudrate = <&frag0>, "clock-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c4-overlay.dts b/arch/arm/boot/dts/overlays/i2c4-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..14c7f4d1da4c
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c4-overlay.dts
|
|
@@ -0,0 +1,36 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c4>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c4_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c4_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <6 7>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c4_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins = <8 9>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pins_6_7 = <0>,"=1!2";
|
|
+ pins_8_9 = <0>,"!1=2";
|
|
+ baudrate = <&frag0>, "clock-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c5-overlay.dts b/arch/arm/boot/dts/overlays/i2c5-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..7953621112de
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c5-overlay.dts
|
|
@@ -0,0 +1,36 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c5>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c5_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c5_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <10 11>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c5_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins = <12 13>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pins_10_11 = <0>,"=1!2";
|
|
+ pins_12_13 = <0>,"!1=2";
|
|
+ baudrate = <&frag0>, "clock-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2c6-overlay.dts b/arch/arm/boot/dts/overlays/i2c6-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..555305a7ee1f
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2c6-overlay.dts
|
|
@@ -0,0 +1,36 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c6>;
|
|
+ frag0: __overlay__ {
|
|
+ status = "okay";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c6_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c6_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <0 1>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c6_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins = <22 23>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pins_0_1 = <0>,"=1!2";
|
|
+ pins_22_23 = <0>,"!1=2";
|
|
+ baudrate = <&frag0>, "clock-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..cf43094c6ff4
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/i2s-gpio28-31-overlay.dts
|
|
@@ -0,0 +1,18 @@
|
|
+/*
|
|
+ * Device tree overlay to move i2s to gpio 28 to 31 on CM
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins = <28 29 30 31>;
|
|
+ brcm,function = <6>; /* alt2 */
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts b/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..551aba591d26
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ilitek251x-overlay.dts
|
|
@@ -0,0 +1,45 @@
|
|
+// Device tree overlay for I2C connected Ilitek multiple touch controller
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+ / {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ ili251x_pins: ili251x_pins {
|
|
+ brcm,pins = <4>; // interrupt
|
|
+ brcm,function = <0>; // in
|
|
+ brcm,pull = <2>; // pull-up //
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ili251x: ili251x@41 {
|
|
+ compatible = "ilitek,ili251x";
|
|
+ reg = <0x41>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&ili251x_pins>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <4 8>; // high-to-low edge triggered
|
|
+ touchscreen-size-x = <16384>;
|
|
+ touchscreen-size-y = <9600>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ interrupt = <&ili251x_pins>,"brcm,pins:0",
|
|
+ <&ili251x>,"interrupts:0";
|
|
+ sizex = <&ili251x>,"touchscreen-size-x:0";
|
|
+ sizey = <&ili251x>,"touchscreen-size-y:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/imx219-overlay.dts b/arch/arm/boot/dts/overlays/imx219-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..0c065bf09f54
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/imx219-overlay.dts
|
|
@@ -0,0 +1,115 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for IMX219 camera module on VC I2C bus
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ imx219: imx219@10 {
|
|
+ compatible = "sony,imx219";
|
|
+ reg = <0x10>;
|
|
+ status = "okay";
|
|
+
|
|
+ clocks = <&imx219_clk>;
|
|
+ clock-names = "xclk";
|
|
+
|
|
+ VANA-supply = <&cam1_reg>; /* 2.8v */
|
|
+ VDIG-supply = <&imx219_vdig>; /* 1.8v */
|
|
+ VDDL-supply = <&imx219_vddl>; /* 1.2v */
|
|
+
|
|
+ rotation = <180>;
|
|
+ orientation = <2>;
|
|
+
|
|
+ port {
|
|
+ imx219_0: endpoint {
|
|
+ remote-endpoint = <&csi1_ep>;
|
|
+ clock-lanes = <0>;
|
|
+ data-lanes = <1 2>;
|
|
+ clock-noncontinuous;
|
|
+ link-frequencies =
|
|
+ /bits/ 64 <456000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&csi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ csi1_ep: endpoint {
|
|
+ remote-endpoint = <&imx219_0>;
|
|
+ clock-lanes = <0>;
|
|
+ data-lanes = <1 2>;
|
|
+ clock-noncontinuous;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c0if>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path="/";
|
|
+ __overlay__ {
|
|
+ imx219_vdig: fixedregulator@1 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "imx219_vdig";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ };
|
|
+ imx219_vddl: fixedregulator@2 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "imx219_vddl";
|
|
+ regulator-min-microvolt = <1200000>;
|
|
+ regulator-max-microvolt = <1200000>;
|
|
+ };
|
|
+
|
|
+ imx219_clk: camera-clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <24000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2c0mux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&cam1_reg>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ regulator-name = "imx219_vana";
|
|
+ regulator-min-microvolt = <2800000>;
|
|
+ regulator-max-microvolt = <2800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ rotation = <&imx219>,"rotation:0";
|
|
+ orientation = <&imx219>,"orientation:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/imx290-overlay.dts b/arch/arm/boot/dts/overlays/imx290-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e536aa7f9e33
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/imx290-overlay.dts
|
|
@@ -0,0 +1,32 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for IMX290 camera module on VC I2C bus
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include "imx290_327-overlay.dtsi"
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ // Fragment numbers deliberately high to avoid conflicts with the
|
|
+ // included imx290_327 overlay file.
|
|
+
|
|
+ fragment@101 {
|
|
+ target = <&imx290>;
|
|
+ __overlay__ {
|
|
+ compatible = "sony,imx290";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@102 {
|
|
+ target = <&imx290>;
|
|
+ __dormant__ {
|
|
+ compatible = "sony,imx290-mono";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ mono = <0>, "-101+102";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi b/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
|
|
new file mode 100644
|
|
index 000000000000..d4a5ed6dbbcf
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/imx290_327-overlay.dtsi
|
|
@@ -0,0 +1,144 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Partial definitions for IMX290 or IMX327 camera module on VC I2C bus
|
|
+// The compatible string should be set in an overlay that then includes this one
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ imx290: imx290@1a {
|
|
+ reg = <0x1a>;
|
|
+ status = "okay";
|
|
+
|
|
+ clocks = <&imx290_clk>;
|
|
+ clock-names = "xclk";
|
|
+ clock-frequency = <37125000>;
|
|
+
|
|
+ rotation = <0>;
|
|
+ orientation = <2>;
|
|
+
|
|
+ vdda-supply = <&cam1_reg>; /* 2.8v */
|
|
+ vdddo-supply = <&imx290_vdddo>; /* 1.8v */
|
|
+ vddd-supply = <&imx290_vddd>; /* 1.5v */
|
|
+
|
|
+ port {
|
|
+ imx290_0: endpoint {
|
|
+ remote-endpoint = <&csi1_ep>;
|
|
+ clock-lanes = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&csi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ csi1_ep: endpoint {
|
|
+ remote-endpoint = <&imx290_0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c0if>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path="/";
|
|
+ __overlay__ {
|
|
+ imx290_vdddo: fixedregulator@1 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "imx290_vdddo";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ };
|
|
+ imx290_vddd: fixedregulator@2 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "imx290_vddd";
|
|
+ regulator-min-microvolt = <1500000>;
|
|
+ regulator-max-microvolt = <1500000>;
|
|
+ };
|
|
+
|
|
+ imx290_clk: camera-clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <37125000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2c0mux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&cam1_reg>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ regulator-name = "imx290_vdda";
|
|
+ regulator-min-microvolt = <2800000>;
|
|
+ regulator-max-microvolt = <2800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target = <&imx290_0>;
|
|
+ __overlay__ {
|
|
+ data-lanes = <1 2>;
|
|
+ link-frequencies =
|
|
+ /bits/ 64 <445500000 297000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target = <&imx290_0>;
|
|
+ __dormant__ {
|
|
+ data-lanes = <1 2 3 4>;
|
|
+ link-frequencies =
|
|
+ /bits/ 64 <222750000 148500000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target = <&csi1_ep>;
|
|
+ __overlay__ {
|
|
+ data-lanes = <1 2>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@9 {
|
|
+ target = <&csi1_ep>;
|
|
+ __dormant__ {
|
|
+ data-lanes = <1 2 3 4>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 4lane = <0>, "-6+7-8+9";
|
|
+ clock-frequency = <&imx290_clk>,"clock-frequency:0",
|
|
+ <&imx290>,"clock-frequency:0";
|
|
+ rotation = <&imx290>,"rotation:0";
|
|
+ orientation = <&imx290>,"orientation:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/imx378-overlay.dts b/arch/arm/boot/dts/overlays/imx378-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..74c7288d12f5
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/imx378-overlay.dts
|
|
@@ -0,0 +1,10 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for IMX378 camera module on VC I2C bus
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include "imx477_378-overlay.dtsi"
|
|
+
|
|
+&imx477 {
|
|
+ compatible = "sony,imx378";
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/imx477-overlay.dts b/arch/arm/boot/dts/overlays/imx477-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ca315d120e6b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/imx477-overlay.dts
|
|
@@ -0,0 +1,10 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for IMX477 camera module on VC I2C bus
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include "imx477_378-overlay.dtsi"
|
|
+
|
|
+&imx477 {
|
|
+ compatible = "sony,imx477";
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/imx477_378-overlay.dtsi b/arch/arm/boot/dts/overlays/imx477_378-overlay.dtsi
|
|
new file mode 100644
|
|
index 000000000000..bb9a9acdbbd7
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/imx477_378-overlay.dtsi
|
|
@@ -0,0 +1,110 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for IMX477 camera module on VC I2C bus
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ imx477: imx477@1a {
|
|
+ reg = <0x1a>;
|
|
+ status = "okay";
|
|
+
|
|
+ clocks = <&imx477_clk>;
|
|
+ clock-names = "xclk";
|
|
+
|
|
+ VANA-supply = <&cam1_reg>; /* 2.8v */
|
|
+ VDIG-supply = <&imx477_vdig>; /* 1.05v */
|
|
+ VDDL-supply = <&imx477_vddl>; /* 1.8v */
|
|
+
|
|
+ rotation = <180>;
|
|
+ orientation = <2>;
|
|
+
|
|
+ port {
|
|
+ imx477_0: endpoint {
|
|
+ remote-endpoint = <&csi1_ep>;
|
|
+ clock-lanes = <0>;
|
|
+ data-lanes = <1 2>;
|
|
+ clock-noncontinuous;
|
|
+ link-frequencies =
|
|
+ /bits/ 64 <450000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&csi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ csi1_ep: endpoint {
|
|
+ remote-endpoint = <&imx477_0>;
|
|
+ clock-lanes = <0>;
|
|
+ data-lanes = <1 2>;
|
|
+ clock-noncontinuous;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c0if>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path="/";
|
|
+ __overlay__ {
|
|
+ imx477_vdig: fixedregulator@0 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "imx477_vdig";
|
|
+ regulator-min-microvolt = <1050000>;
|
|
+ regulator-max-microvolt = <1050000>;
|
|
+ };
|
|
+ imx477_vddl: fixedregulator@1 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "imx477_vddl";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ };
|
|
+ imx477_clk: camera-clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <24000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2c0mux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&cam1_reg>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ regulator-name = "imx477_vana";
|
|
+ startup-delay-us = <300000>;
|
|
+ regulator-min-microvolt = <2800000>;
|
|
+ regulator-max-microvolt = <2800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ rotation = <&imx477>,"rotation:0";
|
|
+ orientation = <&imx477>,"orientation:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..9110f5d34298
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts
|
|
@@ -0,0 +1,42 @@
|
|
+// Definitions for IQaudIO CODEC
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ da2713@1a {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "dlg,da7213";
|
|
+ reg = <0x1a>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ iqaudio_dac: __overlay__ {
|
|
+ compatible = "iqaudio,iqaudio-codec";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..24073cadd0ef
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/iqaudio-dac-overlay.dts
|
|
@@ -0,0 +1,46 @@
|
|
+// Definitions for IQaudIO DAC
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm5122@4c {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4c>;
|
|
+ AVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ CPVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ frag2: __overlay__ {
|
|
+ compatible = "iqaudio,iqaudio-dac";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain = <&frag2>,"iqaudio,24db_digital_gain?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..7c70b25e58d7
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/iqaudio-dacplus-overlay.dts
|
|
@@ -0,0 +1,49 @@
|
|
+// Definitions for IQaudIO DAC+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm5122@4c {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4c>;
|
|
+ AVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ CPVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ iqaudio_dac: __overlay__ {
|
|
+ compatible = "iqaudio,iqaudio-dac";
|
|
+ i2s-controller = <&i2s>;
|
|
+ mute-gpios = <&gpio 22 0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain = <&iqaudio_dac>,"iqaudio,24db_digital_gain?";
|
|
+ auto_mute_amp = <&iqaudio_dac>,"iqaudio-dac,auto-mute-amp?";
|
|
+ unmute_amp = <&iqaudio_dac>,"iqaudio-dac,unmute-amp?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ee54095c869b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/iqaudio-digi-wm8804-audio-overlay.dts
|
|
@@ -0,0 +1,47 @@
|
|
+// Definitions for IQAudIO Digi WM8804 audio board
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ wm8804@3b {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "wlf,wm8804";
|
|
+ reg = <0x3b>;
|
|
+ status = "okay";
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ PVDD-supply = <&vdd_3v3_reg>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ wm8804_digi: __overlay__ {
|
|
+ compatible = "iqaudio,wm8804-digi";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ card_name = <&wm8804_digi>,"wm8804-digi,card-name";
|
|
+ dai_name = <&wm8804_digi>,"wm8804-digi,dai-name";
|
|
+ dai_stream_name = <&wm8804_digi>,"wm8804-digi,dai-stream-name";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/irs1125-overlay.dts b/arch/arm/boot/dts/overlays/irs1125-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e926e18e71fc
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/irs1125-overlay.dts
|
|
@@ -0,0 +1,85 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for IRS1125 camera module on VC I2C bus
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ irs1125: irs1125@3D {
|
|
+ compatible = "infineon,irs1125";
|
|
+ reg = <0x3D>;
|
|
+ status = "okay";
|
|
+
|
|
+ pwdn-gpios = <&gpio 5 0>;
|
|
+ clocks = <&irs1125_clk>;
|
|
+
|
|
+ port {
|
|
+ irs1125_0: endpoint {
|
|
+ remote-endpoint = <&csi1_ep>;
|
|
+ clock-lanes = <0>;
|
|
+ data-lanes = <1 2>;
|
|
+ clock-noncontinuous;
|
|
+ link-frequencies =
|
|
+ /bits/ 64 <297000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&csi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ csi1_ep: endpoint {
|
|
+ remote-endpoint = <&irs1125_0>;
|
|
+ data-lanes = <1 2>;
|
|
+ clock-noncontinuous;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c0if>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c0mux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target-path="/__overrides__";
|
|
+ __overlay__ {
|
|
+ cam0-pwdn-ctrl = <&irs1125>,"pwdn-gpios:0";
|
|
+ cam0-pwdn = <&irs1125>,"pwdn-gpios:4";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ irs1125_clk: camera-clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <26000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..585c7dbcdf7f
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/jedec-spi-nor-overlay.dts
|
|
@@ -0,0 +1,309 @@
|
|
+// Overlay for JEDEC SPI-NOR Flash Devices (aka m25p80)
|
|
+
|
|
+// dtparams:
|
|
+// flash-spi<n>-<m> - Enables flash device on SPI<n>, CS#<m>.
|
|
+// flash-fastr-spi<n>-<m> - Enables flash device with fast read capability on SPI<n>, CS#<m>.
|
|
+//
|
|
+// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
|
|
+//
|
|
+// Example: A single flash device with fast read capability on SPI0, CS#0:
|
|
+// dtoverlay=jedec-spi-nor:flash-fastr-spi0-0
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ // disable spi-dev on spi0.0
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi0.1
|
|
+ fragment@1 {
|
|
+ target = <&spidev1>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi1.0
|
|
+ fragment@2 {
|
|
+ target-path = "spi1/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi1.1
|
|
+ fragment@3 {
|
|
+ target-path = "spi1/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi1.2
|
|
+ fragment@4 {
|
|
+ target-path = "spi1/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi2.0
|
|
+ fragment@5 {
|
|
+ target-path = "spi2/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi2.1
|
|
+ fragment@6 {
|
|
+ target-path = "spi2/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi2.2
|
|
+ fragment@7 {
|
|
+ target-path = "spi2/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable flash on spi0.0
|
|
+ fragment@8 {
|
|
+ target = <&spi0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi_nor_00: spi_nor@0 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable flash on spi0.1
|
|
+ fragment@9 {
|
|
+ target = <&spi0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi_nor_01: spi_nor@1 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable flash on spi1.0
|
|
+ fragment@10 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi_nor_10: spi_nor@0 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable flash on spi1.1
|
|
+ fragment@11 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi_nor_11: spi_nor@1 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable flash on spi1.2
|
|
+ fragment@12 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi_nor_12: spi_nor@2 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable flash on spi2.0
|
|
+ fragment@13 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi_nor_20: spi_nor@0 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable flash on spi2.1
|
|
+ fragment@14 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi_nor_21: spi_nor@1 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable flash on spi2.2
|
|
+ fragment@15 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi_nor_22: spi_nor@2 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable fast read for device on spi0.0.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@16 {
|
|
+ target = <&spi_nor_00>;
|
|
+ __dormant__ {
|
|
+ m25p,fast-read;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable fast read for device on spi0.1.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@17 {
|
|
+ target = <&spi_nor_01>;
|
|
+ __dormant__ {
|
|
+ m25p,fast-read;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable fast read for device on spi1.0.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@18 {
|
|
+ target = <&spi_nor_10>;
|
|
+ __dormant__ {
|
|
+ m25p,fast-read;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable fast read for device on spi1.1.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@19 {
|
|
+ target = <&spi_nor_11>;
|
|
+ __dormant__ {
|
|
+ m25p,fast-read;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable fast read for device on spi1.2.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@20 {
|
|
+ target = <&spi_nor_12>;
|
|
+ __dormant__ {
|
|
+ m25p,fast-read;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable fast read for device on spi2.0.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@21 {
|
|
+ target = <&spi_nor_20>;
|
|
+ __dormant__ {
|
|
+ m25p,fast-read;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable fast read for device on spi2.1.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@22 {
|
|
+ target = <&spi_nor_21>;
|
|
+ __dormant__ {
|
|
+ m25p,fast-read;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable fast read for device on spi2.2.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@23 {
|
|
+ target = <&spi_nor_22>;
|
|
+ __dormant__ {
|
|
+ m25p,fast-read;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ flash-spi0-0 = <0>,"+0+8";
|
|
+ flash-spi0-1 = <0>,"+1+9";
|
|
+ flash-spi1-0 = <0>,"+2+10";
|
|
+ flash-spi1-1 = <0>,"+3+11";
|
|
+ flash-spi1-2 = <0>,"+4+12";
|
|
+ flash-spi2-0 = <0>,"+5+13";
|
|
+ flash-spi2-1 = <0>,"+6+14";
|
|
+ flash-spi2-2 = <0>,"+7+15";
|
|
+ flash-fastr-spi0-0 = <0>,"+0+8+16";
|
|
+ flash-fastr-spi0-1 = <0>,"+1+9+17";
|
|
+ flash-fastr-spi1-0 = <0>,"+2+10+18";
|
|
+ flash-fastr-spi1-1 = <0>,"+3+11+19";
|
|
+ flash-fastr-spi1-2 = <0>,"+4+12+20";
|
|
+ flash-fastr-spi2-0 = <0>,"+5+13+21";
|
|
+ flash-fastr-spi2-1 = <0>,"+6+14+22";
|
|
+ flash-fastr-spi2-2 = <0>,"+7+15+23";
|
|
+ };
|
|
+};
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/justboom-both-overlay.dts b/arch/arm/boot/dts/overlays/justboom-both-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..9c42670631c0
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/justboom-both-overlay.dts
|
|
@@ -0,0 +1,65 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+// Definitions for JustBoom Both (Digi+DAC)
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ wm8804@3b {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "wlf,wm8804";
|
|
+ reg = <0x3b>;
|
|
+ PVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm5122@4d {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4d>;
|
|
+ AVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ CPVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ frag3: __overlay__ {
|
|
+ compatible = "justboom,justboom-both";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain = <&frag3>,"justboom,24db_digital_gain?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..d00515dca419
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/justboom-dac-overlay.dts
|
|
@@ -0,0 +1,46 @@
|
|
+// Definitions for JustBoom DAC
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pcm5122@4d {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5122";
|
|
+ reg = <0x4d>;
|
|
+ AVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ CPVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ frag2: __overlay__ {
|
|
+ compatible = "justboom,justboom-dac";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 24db_digital_gain = <&frag2>,"justboom,24db_digital_gain?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e73336029c54
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/justboom-digi-overlay.dts
|
|
@@ -0,0 +1,41 @@
|
|
+// Definitions for JustBoom Digi
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ wm8804@3b {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "wlf,wm8804";
|
|
+ reg = <0x3b>;
|
|
+ PVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "justboom,justboom-digi";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ltc294x-overlay.dts b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..6d971f3649ca
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ltc294x-overlay.dts
|
|
@@ -0,0 +1,86 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ltc2941: ltc2941@64 {
|
|
+ compatible = "lltc,ltc2941";
|
|
+ reg = <0x64>;
|
|
+ lltc,resistor-sense = <50>;
|
|
+ lltc,prescaler-exponent = <7>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ltc2942: ltc2942@64 {
|
|
+ compatible = "lltc,ltc2942";
|
|
+ reg = <0x64>;
|
|
+ lltc,resistor-sense = <50>;
|
|
+ lltc,prescaler-exponent = <7>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ltc2943: ltc2943@64 {
|
|
+ compatible = "lltc,ltc2943";
|
|
+ reg = <0x64>;
|
|
+ lltc,resistor-sense = <50>;
|
|
+ lltc,prescaler-exponent = <7>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c_arm>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ltc2944: ltc2944@64 {
|
|
+ compatible = "lltc,ltc2944";
|
|
+ reg = <0x64>;
|
|
+ lltc,resistor-sense = <50>;
|
|
+ lltc,prescaler-exponent = <7>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ ltc2941 = <0>,"+0";
|
|
+ ltc2942 = <0>,"+1";
|
|
+ ltc2943 = <0>,"+2";
|
|
+ ltc2944 = <0>,"+3";
|
|
+ resistor-sense = <<c2941>, "lltc,resistor-sense:0",
|
|
+ <<c2942>, "lltc,resistor-sense:0",
|
|
+ <<c2943>, "lltc,resistor-sense:0",
|
|
+ <<c2944>, "lltc,resistor-sense:0";
|
|
+ prescaler-exponent = <<c2941>, "lltc,prescaler-exponent:0",
|
|
+ <<c2942>, "lltc,prescaler-exponent:0",
|
|
+ <<c2943>, "lltc,prescaler-exponent:0",
|
|
+ <<c2944>, "lltc,prescaler-exponent:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/max98357a-overlay.dts b/arch/arm/boot/dts/overlays/max98357a-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..9e2afb05b7cb
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/max98357a-overlay.dts
|
|
@@ -0,0 +1,84 @@
|
|
+// Overlay for Maxim MAX98357A audio DAC
|
|
+
|
|
+// dtparams:
|
|
+// no-sdmode - SD_MODE pin not managed by driver.
|
|
+// sdmode-pin - Specify GPIO pin to which SD_MODE is connected (default 4).
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ /* Enable I2S */
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* DAC whose SD_MODE pin is managed by driver (via GPIO pin) */
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ max98357a_dac: max98357a {
|
|
+ compatible = "maxim,max98357a";
|
|
+ #sound-dai-cells = <0>;
|
|
+ sdmode-gpios = <&gpio 4 0>; /* 2nd word overwritten by sdmode-pin parameter */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* DAC whose SD_MODE pin is not managed by driver */
|
|
+ fragment@2 {
|
|
+ target-path = "/";
|
|
+ __dormant__ {
|
|
+ max98357a_nsd: max98357a {
|
|
+ compatible = "maxim,max98357a";
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* Soundcard connecting I2S to DAC with SD_MODE */
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ simple-audio-card,format = "i2s";
|
|
+ simple-audio-card,name = "MAX98357A";
|
|
+ status = "okay";
|
|
+ simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ };
|
|
+ simple-audio-card,codec {
|
|
+ sound-dai = <&max98357a_dac>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* Soundcard connecting I2S to DAC without SD_MODE */
|
|
+ fragment@4 {
|
|
+ target = <&sound>;
|
|
+ __dormant__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ simple-audio-card,format = "i2s";
|
|
+ simple-audio-card,name = "MAX98357A";
|
|
+ status = "okay";
|
|
+ simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ };
|
|
+ simple-audio-card,codec {
|
|
+ sound-dai = <&max98357a_nsd>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ no-sdmode = <0>,"-1+2-3+4";
|
|
+ sdmode-pin = <&max98357a_dac>,"sdmode-gpios:4";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/maxtherm-overlay.dts b/arch/arm/boot/dts/overlays/maxtherm-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..9964e246c14f
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/maxtherm-overlay.dts
|
|
@@ -0,0 +1,186 @@
|
|
+/*
|
|
+ * Universal device tree overlay for SPI devices
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/iio/temperature/thermocouple.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev1>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "spi1/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path = "spi1/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target-path = "spi1/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target-path = "spi2/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target-path = "spi2/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target-path = "spi2/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ maxfrag: fragment@8 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ max: maxtherm@0 {
|
|
+ compatible = "maxim,max6675";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@9 {
|
|
+ target = <&max>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,max31855e", "maxim,max31855";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@10 {
|
|
+ target = <&max>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,max31855j", "maxim,max31855";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@11 {
|
|
+ target = <&max>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,max31855k", "maxim,max31855";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@12 {
|
|
+ target = <&max>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,max31855n", "maxim,max31855";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@13 {
|
|
+ target = <&max>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,max31855r", "maxim,max31855";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@14 {
|
|
+ target = <&max>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,max31855s", "maxim,max31855";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@15 {
|
|
+ target = <&max>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,max31855t", "maxim,max31855";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@16 {
|
|
+ target = <&max>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,max31856";
|
|
+ spi-cpha;
|
|
+ thermocouple-type = <THERMOCOUPLE_TYPE_K>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ spi0-0 = <0>, "+0",
|
|
+ <&maxfrag>,"target:0=",<&spi0>,
|
|
+ <&max>,"reg:0=0";
|
|
+ spi0-1 = <0>, "+1",
|
|
+ <&maxfrag>,"target:0=",<&spi0>,
|
|
+ <&max>,"reg:0=1";
|
|
+ spi1-0 = <0>, "+2",
|
|
+ <&maxfrag>,"target:0=",<&spi1>,
|
|
+ <&max>,"reg:0=0";
|
|
+ spi1-1 = <0>, "+3",
|
|
+ <&maxfrag>,"target:0=",<&spi1>,
|
|
+ <&max>,"reg:0=1";
|
|
+ spi1-2 = <0>, "+4",
|
|
+ <&maxfrag>,"target:0=",<&spi1>,
|
|
+ <&max>,"reg:0=2";
|
|
+ spi2-0 = <0>, "+5",
|
|
+ <&maxfrag>,"target:0=",<&spi2>,
|
|
+ <&max>,"reg:0=0";
|
|
+ spi2-1 = <0>, "+6",
|
|
+ <&maxfrag>,"target:0=",<&spi2>,
|
|
+ <&max>,"reg:0=1";
|
|
+ spi2-2 = <0>, "+7",
|
|
+ <&maxfrag>,"target:0=",<&spi2>,
|
|
+ <&max>,"reg:0=2";
|
|
+ max6675 = <&max>,"compatible=maxim,max6675";
|
|
+ max31855 = <&max>,"compatible=maxim,max31855";
|
|
+ max31855e = <0>,"+9";
|
|
+ max31855j = <0>,"+10";
|
|
+ max31855k = <0>,"+11";
|
|
+ max31855n = <0>,"+12";
|
|
+ max31855r = <0>,"+13";
|
|
+ max31855s = <0>,"+14";
|
|
+ max31855t = <0>,"+15";
|
|
+ max31856 = <0>,"+16";
|
|
+ type_b = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_B>;
|
|
+ type_e = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_E>;
|
|
+ type_j = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_J>;
|
|
+ type_k = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_K>;
|
|
+ type_n = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_N>;
|
|
+ type_r = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_R>;
|
|
+ type_s = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_S>;
|
|
+ type_t = <&max>,"thermocouple-type:0=",<THERMOCOUPLE_TYPE_T>;
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..840dd9b31db4
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/mbed-dac-overlay.dts
|
|
@@ -0,0 +1,64 @@
|
|
+// Definitions for mbed DAC
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ tlv320aic23: codec@1a {
|
|
+ #sound-dai-cells = <0>;
|
|
+ reg = <0x1a>;
|
|
+ compatible = "ti,tlv320aic23";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+
|
|
+ simple-audio-card,name = "mbed-DAC";
|
|
+
|
|
+ simple-audio-card,widgets =
|
|
+ "Microphone", "Mic Jack",
|
|
+ "Line", "Line In",
|
|
+ "Headphone", "Headphone Jack";
|
|
+
|
|
+ simple-audio-card,routing =
|
|
+ "Headphone Jack", "LHPOUT",
|
|
+ "Headphone Jack", "RHPOUT",
|
|
+ "LLINEIN", "Line In",
|
|
+ "RLINEIN", "Line In",
|
|
+ "MICIN", "Mic Jack";
|
|
+
|
|
+ simple-audio-card,format = "i2s";
|
|
+
|
|
+ simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ };
|
|
+
|
|
+ sound_master: simple-audio-card,codec {
|
|
+ sound-dai = <&tlv320aic23>;
|
|
+ system-clock-frequency = <12288000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/mcp23017-overlay.dts b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..c546d8ba7e6d
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts
|
|
@@ -0,0 +1,69 @@
|
|
+// Definitions for MCP23017 Gpio Extender from Microchip Semiconductor
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ mcp23017_pins: mcp23017_pins@20 {
|
|
+ brcm,pins = <4>;
|
|
+ brcm,function = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp23017: mcp@20 {
|
|
+ compatible = "microchip,mcp23017";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&mcp23017>;
|
|
+ __dormant__ {
|
|
+ compatible = "microchip,mcp23008";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&mcp23017>;
|
|
+ mcp23017_irq: __overlay__ {
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <4 2>;
|
|
+ interrupt-controller;
|
|
+ microchip,irq-mirror;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpiopin = <&mcp23017_pins>,"brcm,pins:0",
|
|
+ <&mcp23017_irq>,"interrupts:0";
|
|
+ addr = <&mcp23017>,"reg:0", <&mcp23017_pins>,"reg:0";
|
|
+ mcp23008 = <0>,"=3";
|
|
+ noints = <0>,"!1!4";
|
|
+ };
|
|
+};
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..484d64b225fb
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/mcp23s17-overlay.dts
|
|
@@ -0,0 +1,732 @@
|
|
+// Overlay for MCP23S08/17 GPIO Extenders from Microchip Semiconductor
|
|
+
|
|
+// dtparams:
|
|
+// s08-spi<n>-<m>-present - 4-bit integer, bitmap indicating MCP23S08 devices present on SPI<n>, CS#<m>.
|
|
+// s17-spi<n>-<m>-present - 8-bit integer, bitmap indicating MCP23S17 devices present on SPI<n>, CS#<m>.
|
|
+// s08-spi<n>-<m>-int-gpio - integer, enables interrupts on a single MCP23S08 device on SPI<n>, CS#<m>, specifies the GPIO pin to which INT output is connected.
|
|
+// s17-spi<n>-<m>-int-gpio - integer, enables mirrored interrupts on a single MCP23S17 device on SPI<n>, CS#<m>, specifies the GPIO pin to which either INTA or INTB output is connected.
|
|
+//
|
|
+// If devices are present on SPI1 or SPI2, those interfaces must be enabled with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
|
|
+// If interrupts are enabled for a device on a given CS# on a SPI bus, that device must be the only one present on that SPI bus/CS#.
|
|
+//
|
|
+// Example 1: A single MCP23S17 device on SPI0, CS#0 with its SPI addr set to 0 and INTA output connected to GPIO25:
|
|
+// dtoverlay=mcp23s17:s17-spi0-0-present=1,s17-spi0-0-int-gpio=25
|
|
+//
|
|
+// Example 2: Two MCP23S08 devices on SPI1, CS#0 with their addrs set to 2 and 3. Three MCP23S17 devices on SPI1, CS#1 with their addrs set to 0, 1 and 7:
|
|
+// dtoverlay=spi1-2cs
|
|
+// dtoverlay=mcp23s17:s08-spi1-0-present=12,s17-spi1-1-present=131
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ // disable spi-dev on spi0.0
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi0.1
|
|
+ fragment@1 {
|
|
+ target = <&spidev1>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi1.0
|
|
+ fragment@2 {
|
|
+ target-path = "spi1/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi1.1
|
|
+ fragment@3 {
|
|
+ target-path = "spi1/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi1.2
|
|
+ fragment@4 {
|
|
+ target-path = "spi1/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi2.0
|
|
+ fragment@5 {
|
|
+ target-path = "spi2/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi2.1
|
|
+ fragment@6 {
|
|
+ target-path = "spi2/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // disable spi-dev on spi2.2
|
|
+ fragment@7 {
|
|
+ target-path = "spi2/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s08s on spi0.0
|
|
+ fragment@8 {
|
|
+ target = <&spi0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s08_00: mcp23s08@0 {
|
|
+ compatible = "microchip,mcp23s08";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-0-present parameter */
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-0-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s08s on spi0.1
|
|
+ fragment@9 {
|
|
+ target = <&spi0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s08_01: mcp23s08@1 {
|
|
+ compatible = "microchip,mcp23s08";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi0-1-present parameter */
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi0-1-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s08s on spi1.0
|
|
+ fragment@10 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s08_10: mcp23s08@0 {
|
|
+ compatible = "microchip,mcp23s08";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-0-present parameter */
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-0-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s08s on spi1.1
|
|
+ fragment@11 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s08_11: mcp23s08@1 {
|
|
+ compatible = "microchip,mcp23s08";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-1-present parameter */
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-1-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s08s on spi1.2
|
|
+ fragment@12 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s08_12: mcp23s08@2 {
|
|
+ compatible = "microchip,mcp23s08";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi1-2-present parameter */
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi1-2-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s08s on spi2.0
|
|
+ fragment@13 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s08_20: mcp23s08@0 {
|
|
+ compatible = "microchip,mcp23s08";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-0-present parameter */
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-0-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s08s on spi2.1
|
|
+ fragment@14 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s08_21: mcp23s08@1 {
|
|
+ compatible = "microchip,mcp23s08";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-1-present parameter */
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-1-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s08s on spi2.2
|
|
+ fragment@15 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s08_22: mcp23s08@2 {
|
|
+ compatible = "microchip,mcp23s08";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s08-spi2-2-present parameter */
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s08-spi2-2-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s17s on spi0.0
|
|
+ fragment@16 {
|
|
+ target = <&spi0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s17_00: mcp23s17@0 {
|
|
+ compatible = "microchip,mcp23s17";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-0-present parameter */
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-0-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s17s on spi0.1
|
|
+ fragment@17 {
|
|
+ target = <&spi0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s17_01: mcp23s17@1 {
|
|
+ compatible = "microchip,mcp23s17";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi0-1-present parameter */
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi0-1-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s17s on spi1.0
|
|
+ fragment@18 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s17_10: mcp23s17@0 {
|
|
+ compatible = "microchip,mcp23s17";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-0-present parameter */
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-0-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s17s on spi1.1
|
|
+ fragment@19 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s17_11: mcp23s17@1 {
|
|
+ compatible = "microchip,mcp23s17";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-1-present parameter */
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-1-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s17s on spi1.2
|
|
+ fragment@20 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s17_12: mcp23s17@2 {
|
|
+ compatible = "microchip,mcp23s17";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi1-2-present parameter */
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi1-2-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s17s on spi2.0
|
|
+ fragment@21 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s17_20: mcp23s17@0 {
|
|
+ compatible = "microchip,mcp23s17";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-0-present parameter */
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-0-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s17s on spi2.1
|
|
+ fragment@22 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s17_21: mcp23s17@1 {
|
|
+ compatible = "microchip,mcp23s17";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-1-present parameter */
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-1-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // enable one or more mcp23s17s on spi2.2
|
|
+ fragment@23 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp23s17_22: mcp23s17@2 {
|
|
+ compatible = "microchip,mcp23s17";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ microchip,spi-present-mask = <0x00>; /* overwritten by mcp23s17-spi2-2-present parameter */
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ status = "okay";
|
|
+ #interrupt-cells=<2>;
|
|
+ interrupts = <0 2>; /* 1st word overwritten by mcp23s17-spi2-2-int-gpio parameter */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.0 as a input with no pull-up/down
|
|
+ fragment@24 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ spi0_0_int_pins: spi0_0_int_pins {
|
|
+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-0-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi0.1 as a input with no pull-up/down
|
|
+ fragment@25 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ spi0_1_int_pins: spi0_1_int_pins {
|
|
+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi0-1-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.0 as a input with no pull-up/down
|
|
+ fragment@26 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ spi1_0_int_pins: spi1_0_int_pins {
|
|
+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-0-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.1 as a input with no pull-up/down
|
|
+ fragment@27 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ spi1_1_int_pins: spi1_1_int_pins {
|
|
+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-1-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi1.2 as a input with no pull-up/down
|
|
+ fragment@28 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ spi1_2_int_pins: spi1_2_int_pins {
|
|
+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi1-2-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.0 as a input with no pull-up/down
|
|
+ fragment@29 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ spi2_0_int_pins: spi2_0_int_pins {
|
|
+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-0-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.1 as a input with no pull-up/down
|
|
+ fragment@30 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ spi2_1_int_pins: spi2_1_int_pins {
|
|
+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-1-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to INT(A/B) output of mcp23s08/17 on spi2.2 as a input with no pull-up/down
|
|
+ fragment@31 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ spi2_2_int_pins: spi2_2_int_pins {
|
|
+ brcm,pins = <0>; /* overwritten by mcp23s08/17-spi2-2-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s08 on spi0.0.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@32 {
|
|
+ target = <&mcp23s08_00>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s08 on spi0.1.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@33 {
|
|
+ target = <&mcp23s08_01>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s08 on spi1.0.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@34 {
|
|
+ target = <&mcp23s08_10>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s08 on spi1.1.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@35 {
|
|
+ target = <&mcp23s08_11>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s08 on spi1.2.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@36 {
|
|
+ target = <&mcp23s08_12>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s08 on spi2.0.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@37 {
|
|
+ target = <&mcp23s08_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s08 on spi2.1.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@38 {
|
|
+ target = <&mcp23s08_21>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s08 on spi2.2.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@39 {
|
|
+ target = <&mcp23s08_22>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s17 on spi0.0.
|
|
+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
+ // Use default active low interrupt signalling.
|
|
+ fragment@40 {
|
|
+ target = <&mcp23s17_00>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ microchip,irq-mirror;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s17 on spi0.1.
|
|
+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
+ // Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
+ fragment@41 {
|
|
+ target = <&mcp23s17_01>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ microchip,irq-mirror;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s17 on spi1.0.
|
|
+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
+ // Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
+ fragment@42 {
|
|
+ target = <&mcp23s17_10>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ microchip,irq-mirror;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s17 on spi1.1.
|
|
+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
+ // Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
+ fragment@43 {
|
|
+ target = <&mcp23s17_11>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ microchip,irq-mirror;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s17 on spi1.2.
|
|
+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
+ // Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
+ fragment@44 {
|
|
+ target = <&mcp23s17_12>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ microchip,irq-mirror;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s17 on spi2.0.
|
|
+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
+ // Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
+ fragment@45 {
|
|
+ target = <&mcp23s17_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ microchip,irq-mirror;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s17 on spi2.1.
|
|
+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
+ // Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
+ fragment@46 {
|
|
+ target = <&mcp23s17_21>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ microchip,irq-mirror;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a mcp23s17 on spi2.2.
|
|
+ // Enable mirroring so that either INTA or INTB output of mcp23s17 can be connected to the GPIO pin.
|
|
+ // Configure INTA/B outputs of mcp23s08/17 as active low.
|
|
+ fragment@47 {
|
|
+ target = <&mcp23s17_22>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ microchip,irq-mirror;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ s08-spi0-0-present = <0>,"+0+8", <&mcp23s08_00>,"microchip,spi-present-mask:0";
|
|
+ s08-spi0-1-present = <0>,"+1+9", <&mcp23s08_01>,"microchip,spi-present-mask:0";
|
|
+ s08-spi1-0-present = <0>,"+2+10", <&mcp23s08_10>,"microchip,spi-present-mask:0";
|
|
+ s08-spi1-1-present = <0>,"+3+11", <&mcp23s08_11>,"microchip,spi-present-mask:0";
|
|
+ s08-spi1-2-present = <0>,"+4+12", <&mcp23s08_12>,"microchip,spi-present-mask:0";
|
|
+ s08-spi2-0-present = <0>,"+5+13", <&mcp23s08_20>,"microchip,spi-present-mask:0";
|
|
+ s08-spi2-1-present = <0>,"+6+14", <&mcp23s08_21>,"microchip,spi-present-mask:0";
|
|
+ s08-spi2-2-present = <0>,"+7+15", <&mcp23s08_22>,"microchip,spi-present-mask:0";
|
|
+ s17-spi0-0-present = <0>,"+0+16", <&mcp23s17_00>,"microchip,spi-present-mask:0";
|
|
+ s17-spi0-1-present = <0>,"+1+17", <&mcp23s17_01>,"microchip,spi-present-mask:0";
|
|
+ s17-spi1-0-present = <0>,"+2+18", <&mcp23s17_10>,"microchip,spi-present-mask:0";
|
|
+ s17-spi1-1-present = <0>,"+3+19", <&mcp23s17_11>,"microchip,spi-present-mask:0";
|
|
+ s17-spi1-2-present = <0>,"+4+20", <&mcp23s17_12>,"microchip,spi-present-mask:0";
|
|
+ s17-spi2-0-present = <0>,"+5+21", <&mcp23s17_20>,"microchip,spi-present-mask:0";
|
|
+ s17-spi2-1-present = <0>,"+6+22", <&mcp23s17_21>,"microchip,spi-present-mask:0";
|
|
+ s17-spi2-2-present = <0>,"+7+23", <&mcp23s17_22>,"microchip,spi-present-mask:0";
|
|
+ s08-spi0-0-int-gpio = <0>,"+24+32", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s08_00>,"interrupts:0";
|
|
+ s08-spi0-1-int-gpio = <0>,"+25+33", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s08_01>,"interrupts:0";
|
|
+ s08-spi1-0-int-gpio = <0>,"+26+34", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s08_10>,"interrupts:0";
|
|
+ s08-spi1-1-int-gpio = <0>,"+27+35", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s08_11>,"interrupts:0";
|
|
+ s08-spi1-2-int-gpio = <0>,"+28+36", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s08_12>,"interrupts:0";
|
|
+ s08-spi2-0-int-gpio = <0>,"+29+37", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s08_20>,"interrupts:0";
|
|
+ s08-spi2-1-int-gpio = <0>,"+30+38", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s08_21>,"interrupts:0";
|
|
+ s08-spi2-2-int-gpio = <0>,"+31+39", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s08_22>,"interrupts:0";
|
|
+ s17-spi0-0-int-gpio = <0>,"+24+40", <&spi0_0_int_pins>,"brcm,pins:0", <&mcp23s17_00>,"interrupts:0";
|
|
+ s17-spi0-1-int-gpio = <0>,"+25+41", <&spi0_1_int_pins>,"brcm,pins:0", <&mcp23s17_01>,"interrupts:0";
|
|
+ s17-spi1-0-int-gpio = <0>,"+26+42", <&spi1_0_int_pins>,"brcm,pins:0", <&mcp23s17_10>,"interrupts:0";
|
|
+ s17-spi1-1-int-gpio = <0>,"+27+43", <&spi1_1_int_pins>,"brcm,pins:0", <&mcp23s17_11>,"interrupts:0";
|
|
+ s17-spi1-2-int-gpio = <0>,"+28+44", <&spi1_2_int_pins>,"brcm,pins:0", <&mcp23s17_12>,"interrupts:0";
|
|
+ s17-spi2-0-int-gpio = <0>,"+29+45", <&spi2_0_int_pins>,"brcm,pins:0", <&mcp23s17_20>,"interrupts:0";
|
|
+ s17-spi2-1-int-gpio = <0>,"+30+46", <&spi2_1_int_pins>,"brcm,pins:0", <&mcp23s17_21>,"interrupts:0";
|
|
+ s17-spi2-2-int-gpio = <0>,"+31+47", <&spi2_2_int_pins>,"brcm,pins:0", <&mcp23s17_22>,"interrupts:0";
|
|
+ };
|
|
+};
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
|
|
new file mode 100755
|
|
index 000000000000..46f143d809cc
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/mcp2515-can0-overlay.dts
|
|
@@ -0,0 +1,73 @@
|
|
+/*
|
|
+ * Device tree overlay for mcp251x/can0 on spi0.0
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+ /* disable spi-dev for spi0.0 */
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* the interrupt pin of the can-controller */
|
|
+ fragment@2 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ can0_pins: can0_pins {
|
|
+ brcm,pins = <25>;
|
|
+ brcm,function = <0>; /* input */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* the clock/oscillator of the can-controller */
|
|
+ fragment@3 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ /* external oscillator of mcp2515 on SPI0.0 */
|
|
+ can0_osc: can0_osc {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <16000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* the spi config of the can-controller itself binding everything together */
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ can0: mcp2515@0 {
|
|
+ reg = <0>;
|
|
+ compatible = "microchip,mcp2515";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&can0_pins>;
|
|
+ spi-max-frequency = <10000000>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
|
|
+ clocks = <&can0_osc>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ oscillator = <&can0_osc>,"clock-frequency:0";
|
|
+ spimaxfrequency = <&can0>,"spi-max-frequency:0";
|
|
+ interrupt = <&can0_pins>,"brcm,pins:0",<&can0>,"interrupts:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..0a8dd576818e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/mcp2515-can1-overlay.dts
|
|
@@ -0,0 +1,73 @@
|
|
+/*
|
|
+ * Device tree overlay for mcp251x/can1 on spi0.1 edited by petit_miner
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+ /* disable spi-dev for spi0.1 */
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* the interrupt pin of the can-controller */
|
|
+ fragment@2 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ can1_pins: can1_pins {
|
|
+ brcm,pins = <25>;
|
|
+ brcm,function = <0>; /* input */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* the clock/oscillator of the can-controller */
|
|
+ fragment@3 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ /* external oscillator of mcp2515 on spi0.1 */
|
|
+ can1_osc: can1_osc {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <16000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* the spi config of the can-controller itself binding everything together */
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ can1: mcp2515@1 {
|
|
+ reg = <1>;
|
|
+ compatible = "microchip,mcp2515";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&can1_pins>;
|
|
+ spi-max-frequency = <10000000>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <25 8>; /* IRQ_TYPE_LEVEL_LOW */
|
|
+ clocks = <&can1_osc>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ oscillator = <&can1_osc>,"clock-frequency:0";
|
|
+ spimaxfrequency = <&can1>,"spi-max-frequency:0";
|
|
+ interrupt = <&can1_pins>,"brcm,pins:0",<&can1>,"interrupts:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/mcp251xfd-overlay.dts b/arch/arm/boot/dts/overlays/mcp251xfd-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..65c861bbd340
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/mcp251xfd-overlay.dts
|
|
@@ -0,0 +1,226 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/interrupt-controller/irq.h>
|
|
+#include <dt-bindings/pinctrl/bcm2835.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev1>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "spi1/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path = "spi1/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target-path = "spi1/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target-path = "spi2/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target-path = "spi2/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target-path = "spi2/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ mcp251xfd_pins: mcp251xfd_pins {
|
|
+ brcm,pins = <25>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_IN>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@9 {
|
|
+ target-path = "/clocks";
|
|
+ __overlay__ {
|
|
+ clk_mcp251xfd_osc: mcp251xfd-osc {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <40000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mcp251xfd_frag: fragment@10 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp251xfd: mcp251xfd@0 {
|
|
+ compatible = "microchip,mcp251xfd";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&mcp251xfd_pins>;
|
|
+ spi-max-frequency = <20000000>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
|
|
+ clocks = <&clk_mcp251xfd_osc>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@11 {
|
|
+ target = <&mcp251xfd>;
|
|
+ mcp251xfd_rx_int_gpios: __dormant__ {
|
|
+ microchip,rx-int-gpios = <&gpio 255 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@12 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ mcp251xfd_xceiver_pins: mcp251xfd_xceiver_pins {
|
|
+ brcm,pins = <255>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@13 {
|
|
+ target-path = "/";
|
|
+ __dormant__ {
|
|
+ reg_mcp251xfd_xceiver: reg_mcp251xfd_xceiver {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "mcp251xfd_xceiver";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ gpio = <&gpio 4 GPIO_ACTIVE_HIGH>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&mcp251xfd_xceiver_pins>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@14 {
|
|
+ target = <&mcp251xfd>;
|
|
+ __dormant__ {
|
|
+ xceiver-supply = <®_mcp251xfd_xceiver>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ spi0-0 = <0>, "+0",
|
|
+ <&mcp251xfd_frag>, "target:0=", <&spi0>,
|
|
+ <&mcp251xfd>, "reg:0=0",
|
|
+ <&mcp251xfd_pins>, "name=mcp251xfd_spi0_0_pins",
|
|
+ <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi0-0-osc",
|
|
+ <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi0_0_xceiver_pins",
|
|
+ <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi0-0-xceiver",
|
|
+ <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi0-0-xceiver";
|
|
+ spi0-1 = <0>, "+1",
|
|
+ <&mcp251xfd_frag>, "target:0=", <&spi0>,
|
|
+ <&mcp251xfd>, "reg:0=1",
|
|
+ <&mcp251xfd_pins>, "name=mcp251xfd_spi0_1_pins",
|
|
+ <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi0-1-osc",
|
|
+ <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi0_1_xceiver_pins",
|
|
+ <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi0-1-xceiver",
|
|
+ <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi0-1-xceiver";
|
|
+ spi1-0 = <0>, "+2",
|
|
+ <&mcp251xfd_frag>, "target:0=", <&spi1>,
|
|
+ <&mcp251xfd>, "reg:0=0",
|
|
+ <&mcp251xfd_pins>, "name=mcp251xfd_spi1_0_pins",
|
|
+ <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi1-0-osc",
|
|
+ <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi1_0_xceiver_pins",
|
|
+ <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi1-0-xceiver",
|
|
+ <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi1-0-xceiver";
|
|
+ spi1-1 = <0>, "+3",
|
|
+ <&mcp251xfd_frag>, "target:0=", <&spi1>,
|
|
+ <&mcp251xfd>, "reg:0=1",
|
|
+ <&mcp251xfd_pins>, "name=mcp251xfd_spi1_1_pins",
|
|
+ <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi1-1-osc",
|
|
+ <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi1_1_xceiver_pins",
|
|
+ <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi1-1-xceiver",
|
|
+ <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi1-1-xceiver";
|
|
+ spi1-2 = <0>, "+4",
|
|
+ <&mcp251xfd_frag>, "target:0=", <&spi1>,
|
|
+ <&mcp251xfd>, "reg:0=2",
|
|
+ <&mcp251xfd_pins>, "name=mcp251xfd_spi1_2_pins",
|
|
+ <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi1-2-osc",
|
|
+ <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi1_2_xceiver_pins",
|
|
+ <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi1-2-xceiver",
|
|
+ <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi1-2-xceiver";
|
|
+ spi2-0 = <0>, "+5",
|
|
+ <&mcp251xfd_frag>, "target:0=", <&spi2>,
|
|
+ <&mcp251xfd>, "reg:0=0",
|
|
+ <&mcp251xfd_pins>, "name=mcp251xfd_spi2_0_pins",
|
|
+ <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi2-0-osc",
|
|
+ <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi2_0_xceiver_pins",
|
|
+ <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi2-0-xceiver",
|
|
+ <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi2-0-xceiver";
|
|
+ spi2-1 = <0>, "+6",
|
|
+ <&mcp251xfd_frag>, "target:0=", <&spi2>,
|
|
+ <&mcp251xfd>, "reg:0=1",
|
|
+ <&mcp251xfd_pins>, "name=mcp251xfd_spi2_1_pins",
|
|
+ <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi2-1-osc",
|
|
+ <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi2_1_xceiver_pins",
|
|
+ <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi2-1-xceiver",
|
|
+ <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi2-1-xceiver";
|
|
+ spi2-2 = <0>, "+7",
|
|
+ <&mcp251xfd_frag>, "target:0=", <&spi2>,
|
|
+ <&mcp251xfd>, "reg:0=2",
|
|
+ <&mcp251xfd_pins>, "name=mcp251xfd_spi2_2_pins",
|
|
+ <&clk_mcp251xfd_osc>, "name=mcp251xfd-spi2-2-osc",
|
|
+ <&mcp251xfd_xceiver_pins>, "name=mcp251xfd_spi2_2_xceiver_pins",
|
|
+ <®_mcp251xfd_xceiver>, "name=reg-mcp251xfd-spi2-2-xceiver",
|
|
+ <®_mcp251xfd_xceiver>, "regulator-name=mcp251xfd-spi2-2-xceiver";
|
|
+ oscillator = <&clk_mcp251xfd_osc>, "clock-frequency:0";
|
|
+ speed = <&mcp251xfd>, "spi-max-frequency:0";
|
|
+ interrupt = <&mcp251xfd_pins>, "brcm,pins:0",
|
|
+ <&mcp251xfd>, "interrupts:0";
|
|
+ rx_interrupt = <0>, "+11",
|
|
+ <&mcp251xfd_pins>, "brcm,pins:4",
|
|
+ <&mcp251xfd_rx_int_gpios>, "microchip,rx-int-gpios:4";
|
|
+ xceiver_enable = <0>, "+12+13+14",
|
|
+ <&mcp251xfd_xceiver_pins>, "brcm,pins:0",
|
|
+ <®_mcp251xfd_xceiver>, "gpio:4";
|
|
+ xceiver_active_high = <®_mcp251xfd_xceiver>, "enable-active-high?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/mcp3008-overlay.dts b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts
|
|
new file mode 100755
|
|
index 000000000000..957fdb9310af
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/mcp3008-overlay.dts
|
|
@@ -0,0 +1,205 @@
|
|
+/*
|
|
+ * Device tree overlay for Microchip mcp3008 10-Bit A/D Converters
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev1>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "spi1/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path = "spi1/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target-path = "spi1/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target-path = "spi2/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target-path = "spi2/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target-path = "spi2/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target = <&spi0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3008_00: mcp3008@0 {
|
|
+ compatible = "microchip,mcp3008";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@9 {
|
|
+ target = <&spi0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3008_01: mcp3008@1 {
|
|
+ compatible = "microchip,mcp3008";
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@10 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3008_10: mcp3008@0 {
|
|
+ compatible = "microchip,mcp3008";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@11 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3008_11: mcp3008@1 {
|
|
+ compatible = "microchip,mcp3008";
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@12 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3008_12: mcp3008@2 {
|
|
+ compatible = "microchip,mcp3008";
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@13 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3008_20: mcp3008@0 {
|
|
+ compatible = "microchip,mcp3008";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@14 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3008_21: mcp3008@1 {
|
|
+ compatible = "microchip,mcp3008";
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@15 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3008_22: mcp3008@2 {
|
|
+ compatible = "microchip,mcp3008";
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ spi0-0-present = <0>, "+0+8";
|
|
+ spi0-1-present = <0>, "+1+9";
|
|
+ spi1-0-present = <0>, "+2+10";
|
|
+ spi1-1-present = <0>, "+3+11";
|
|
+ spi1-2-present = <0>, "+4+12";
|
|
+ spi2-0-present = <0>, "+5+13";
|
|
+ spi2-1-present = <0>, "+6+14";
|
|
+ spi2-2-present = <0>, "+7+15";
|
|
+ spi0-0-speed = <&mcp3008_00>, "spi-max-frequency:0";
|
|
+ spi0-1-speed = <&mcp3008_01>, "spi-max-frequency:0";
|
|
+ spi1-0-speed = <&mcp3008_10>, "spi-max-frequency:0";
|
|
+ spi1-1-speed = <&mcp3008_11>, "spi-max-frequency:0";
|
|
+ spi1-2-speed = <&mcp3008_12>, "spi-max-frequency:0";
|
|
+ spi2-0-speed = <&mcp3008_20>, "spi-max-frequency:0";
|
|
+ spi2-1-speed = <&mcp3008_21>, "spi-max-frequency:0";
|
|
+ spi2-2-speed = <&mcp3008_22>, "spi-max-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/mcp3202-overlay.dts b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
|
|
new file mode 100755
|
|
index 000000000000..8e4e9f60f285
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
|
|
@@ -0,0 +1,205 @@
|
|
+/*
|
|
+ * Device tree overlay for Microchip mcp3202 12-Bit A/D Converters
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev1>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "spi1/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path = "spi1/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target-path = "spi1/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target-path = "spi2/spidev@0";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target-path = "spi2/spidev@1";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target-path = "spi2/spidev@2";
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target = <&spi0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3202_00: mcp3202@0 {
|
|
+ compatible = "mcp3202";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@9 {
|
|
+ target = <&spi0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3202_01: mcp3202@1 {
|
|
+ compatible = "mcp3202";
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@10 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3202_10: mcp3202@0 {
|
|
+ compatible = "mcp3202";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@11 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3202_11: mcp3202@1 {
|
|
+ compatible = "mcp3202";
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@12 {
|
|
+ target = <&spi1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3202_12: mcp3202@2 {
|
|
+ compatible = "mcp3202";
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@13 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3202_20: mcp3202@0 {
|
|
+ compatible = "mcp3202";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@14 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3202_21: mcp3202@1 {
|
|
+ compatible = "mcp3202";
|
|
+ reg = <1>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@15 {
|
|
+ target = <&spi2>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mcp3202_22: mcp3202@2 {
|
|
+ compatible = "mcp3202";
|
|
+ reg = <2>;
|
|
+ spi-max-frequency = <1600000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ spi0-0-present = <0>, "+0+8";
|
|
+ spi0-1-present = <0>, "+1+9";
|
|
+ spi1-0-present = <0>, "+2+10";
|
|
+ spi1-1-present = <0>, "+3+11";
|
|
+ spi1-2-present = <0>, "+4+12";
|
|
+ spi2-0-present = <0>, "+5+13";
|
|
+ spi2-1-present = <0>, "+6+14";
|
|
+ spi2-2-present = <0>, "+7+15";
|
|
+ spi0-0-speed = <&mcp3202_00>, "spi-max-frequency:0";
|
|
+ spi0-1-speed = <&mcp3202_01>, "spi-max-frequency:0";
|
|
+ spi1-0-speed = <&mcp3202_10>, "spi-max-frequency:0";
|
|
+ spi1-1-speed = <&mcp3202_11>, "spi-max-frequency:0";
|
|
+ spi1-2-speed = <&mcp3202_12>, "spi-max-frequency:0";
|
|
+ spi2-0-speed = <&mcp3202_20>, "spi-max-frequency:0";
|
|
+ spi2-1-speed = <&mcp3202_21>, "spi-max-frequency:0";
|
|
+ spi2-2-speed = <&mcp3202_22>, "spi-max-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/mcp342x-overlay.dts b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..714eca5a4b5e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts
|
|
@@ -0,0 +1,164 @@
|
|
+// Overlay for MCP3421-8 ADCs from Microchip Semiconductor
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ mcp3421: mcp@68 {
|
|
+ reg = <0x68>;
|
|
+ compatible = "microchip,mcp3421";
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ mcp3422: mcp@68 {
|
|
+ reg = <0x68>;
|
|
+ compatible = "microchip,mcp3422";
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ mcp3423: mcp@68 {
|
|
+ reg = <0x68>;
|
|
+ compatible = "microchip,mcp3423";
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ mcp3424: mcp@68 {
|
|
+ reg = <0x68>;
|
|
+ compatible = "microchip,mcp3424";
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ mcp3425: mcp@68 {
|
|
+ reg = <0x68>;
|
|
+ compatible = "microchip,mcp3425","mcp3425";
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ mcp3426: mcp@68 {
|
|
+ reg = <0x68>;
|
|
+ compatible = "microchip,mcp3426";
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ mcp3427: mcp@68 {
|
|
+ reg = <0x68>;
|
|
+ compatible = "microchip,mcp3427";
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ mcp3428: mcp@68 {
|
|
+ reg = <0x68>;
|
|
+ compatible = "microchip,mcp3428";
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ addr = <&mcp3421>,"reg:0",
|
|
+ <&mcp3422>,"reg:0",
|
|
+ <&mcp3423>,"reg:0",
|
|
+ <&mcp3424>,"reg:0",
|
|
+ <&mcp3425>,"reg:0",
|
|
+ <&mcp3426>,"reg:0",
|
|
+ <&mcp3427>,"reg:0",
|
|
+ <&mcp3428>,"reg:0";
|
|
+ mcp3421 = <0>,"=0";
|
|
+ mcp3422 = <0>,"=1";
|
|
+ mcp3423 = <0>,"=2";
|
|
+ mcp3424 = <0>,"=3";
|
|
+ mcp3425 = <0>,"=4";
|
|
+ mcp3426 = <0>,"=5";
|
|
+ mcp3427 = <0>,"=6";
|
|
+ mcp3428 = <0>,"=7";
|
|
+ };
|
|
+};
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/media-center-overlay.dts b/arch/arm/boot/dts/overlays/media-center-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..1b56963f4f16
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/media-center-overlay.dts
|
|
@@ -0,0 +1,134 @@
|
|
+/*
|
|
+ * Device Tree overlay for Media Center HAT by Pi Supply
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ spidev@0{
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spidev@1{
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ rpi_display_pins: rpi_display_pins {
|
|
+ brcm,pins = <12 23 24 25>;
|
|
+ brcm,function = <1 1 1 0>; /* out out out in */
|
|
+ brcm,pull = <0 0 0 2>; /* - - - up */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ rpidisplay: rpi-display@0{
|
|
+ compatible = "ilitek,ili9341";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rpi_display_pins>;
|
|
+
|
|
+ spi-max-frequency = <32000000>;
|
|
+ rotate = <90>;
|
|
+ bgr;
|
|
+ fps = <30>;
|
|
+ buswidth = <8>;
|
|
+ reset-gpios = <&gpio 23 1>;
|
|
+ dc-gpios = <&gpio 24 0>;
|
|
+ led-gpios = <&gpio 12 0>;
|
|
+ debug = <0>;
|
|
+ };
|
|
+
|
|
+ rpidisplay_ts: rpi-display-ts@1 {
|
|
+ compatible = "ti,ads7846";
|
|
+ reg = <1>;
|
|
+
|
|
+ spi-max-frequency = <2000000>;
|
|
+ interrupts = <25 2>; /* high-to-low edge triggered */
|
|
+ interrupt-parent = <&gpio>;
|
|
+ pendown-gpio = <&gpio 25 1>;
|
|
+ ti,x-plate-ohms = /bits/ 16 <60>;
|
|
+ ti,pressure-max = /bits/ 16 <255>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ lirc_rpi: lirc_rpi {
|
|
+ compatible = "rpi,lirc-rpi";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&lirc_pins>;
|
|
+ status = "okay";
|
|
+
|
|
+ // Override autodetection of IR receiver circuit
|
|
+ // (0 = active high, 1 = active low, -1 = no override )
|
|
+ rpi,sense = <0xffffffff>;
|
|
+
|
|
+ // Software carrier
|
|
+ // (0 = off, 1 = on)
|
|
+ rpi,softcarrier = <1>;
|
|
+
|
|
+ // Invert output
|
|
+ // (0 = off, 1 = on)
|
|
+ rpi,invert = <0>;
|
|
+
|
|
+ // Enable debugging messages
|
|
+ // (0 = off, 1 = on)
|
|
+ rpi,debug = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ lirc_pins: lirc_pins {
|
|
+ brcm,pins = <6 5>;
|
|
+ brcm,function = <1 0>; // out in
|
|
+ brcm,pull = <0 1>; // off down
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ speed = <&rpidisplay>,"spi-max-frequency:0";
|
|
+ rotate = <&rpidisplay>,"rotate:0";
|
|
+ fps = <&rpidisplay>,"fps:0";
|
|
+ debug = <&rpidisplay>,"debug:0",
|
|
+ <&lirc_rpi>,"rpi,debug:0";
|
|
+ xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
|
|
+ swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
|
|
+ backlight = <&rpidisplay>,"led-gpios:4",
|
|
+ <&rpi_display_pins>,"brcm,pins:0";
|
|
+
|
|
+ gpio_out_pin = <&lirc_pins>,"brcm,pins:0";
|
|
+ gpio_in_pin = <&lirc_pins>,"brcm,pins:4";
|
|
+ gpio_in_pull = <&lirc_pins>,"brcm,pull:4";
|
|
+
|
|
+ sense = <&lirc_rpi>,"rpi,sense:0";
|
|
+ softcarrier = <&lirc_rpi>,"rpi,softcarrier:0";
|
|
+ invert = <&lirc_rpi>,"rpi,invert:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/merus-amp-overlay.dts b/arch/arm/boot/dts/overlays/merus-amp-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..4501fbdc253d
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/merus-amp-overlay.dts
|
|
@@ -0,0 +1,60 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for Infineon Merus-Amp
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+#include <dt-bindings/pinctrl/bcm2835.h>
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ merus_amp_pins: merus_amp_pins {
|
|
+ brcm,pins = <23>;
|
|
+ brcm,function = <0>; /* in */
|
|
+ brcm,pull = <2>; /* up */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ merus_amp: ma120x0p@20 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ma,ma120x0p";
|
|
+ reg = <0x20>;
|
|
+ status = "okay";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&merus_amp_pins>;
|
|
+ enable_gp-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
|
|
+ mute_gp-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
|
|
+ booster_gp-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
|
|
+ error_gp-gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "merus,merus-amp";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..f7e44d29e101
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/midi-uart0-overlay.dts
|
|
@@ -0,0 +1,36 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+
|
|
+/*
|
|
+ * Fake a higher clock rate to get a larger divisor, and thereby a lower
|
|
+ * baudrate. The real clock is 48MHz, which we scale so that requesting
|
|
+ * 38.4kHz results in an actual 31.25kHz.
|
|
+ *
|
|
+ * 48000000*38400/31250 = 58982400
|
|
+ */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ midi_clk: midi_clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "uart0_pclk";
|
|
+ clock-frequency = <58982400>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart0>;
|
|
+ __overlay__ {
|
|
+ clocks = <&midi_clk>,
|
|
+ <&clocks BCM2835_CLOCK_VPU>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e0bc410acbff
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/midi-uart1-overlay.dts
|
|
@@ -0,0 +1,43 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/bcm2835-aux.h>
|
|
+
|
|
+/*
|
|
+ * Fake a higher clock rate to get a larger divisor, and thereby a lower
|
|
+ * baudrate. The real clock is 48MHz, which we scale so that requesting
|
|
+ * 38.4kHz results in an actual 31.25kHz.
|
|
+ *
|
|
+ * 48000000*38400/31250 = 58982400
|
|
+ */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/clocks";
|
|
+ __overlay__ {
|
|
+ midi_clk: clock@5 {
|
|
+ compatible = "fixed-factor-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clocks = <&aux BCM2835_AUX_CLOCK_UART>;
|
|
+ clock-mult = <38400>;
|
|
+ clock-div = <31250>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart1>;
|
|
+ __overlay__ {
|
|
+ clocks = <&midi_clk>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ clock-output-names = "aux_uart", "aux_spi1", "aux_spi2";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/midi-uart2-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart2-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..66f3092e9a74
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/midi-uart2-overlay.dts
|
|
@@ -0,0 +1,37 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+
|
|
+/*
|
|
+ * Fake a higher clock rate to get a larger divisor, and thereby a lower
|
|
+ * baudrate. The real clock is 48MHz, which we scale so that requesting
|
|
+ * 38.4kHz results in an actual 31.25kHz.
|
|
+ *
|
|
+ * 48000000*38400/31250 = 58982400
|
|
+ */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ midi_clk: midi_clk2 {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "uart2_pclk";
|
|
+ clock-frequency = <58982400>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart2>;
|
|
+ __overlay__ {
|
|
+ clocks = <&midi_clk>,
|
|
+ <&clocks BCM2835_CLOCK_VPU>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/midi-uart3-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart3-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..55c6cb94f963
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/midi-uart3-overlay.dts
|
|
@@ -0,0 +1,38 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+
|
|
+/*
|
|
+ * Fake a higher clock rate to get a larger divisor, and thereby a lower
|
|
+ * baudrate. The real clock is 48MHz, which we scale so that requesting
|
|
+ * 38.4kHz results in an actual 31.25kHz.
|
|
+ *
|
|
+ * 48000000*38400/31250 = 58982400
|
|
+ */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ midi_clk: midi_clk3 {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "uart3_pclk";
|
|
+ clock-frequency = <58982400>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart3>;
|
|
+ __overlay__ {
|
|
+ clocks = <&midi_clk>,
|
|
+ <&clocks BCM2835_CLOCK_VPU>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/midi-uart4-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart4-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..5819df1a6b2e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/midi-uart4-overlay.dts
|
|
@@ -0,0 +1,38 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+
|
|
+/*
|
|
+ * Fake a higher clock rate to get a larger divisor, and thereby a lower
|
|
+ * baudrate. The real clock is 48MHz, which we scale so that requesting
|
|
+ * 38.4kHz results in an actual 31.25kHz.
|
|
+ *
|
|
+ * 48000000*38400/31250 = 58982400
|
|
+ */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ midi_clk: midi_clk4 {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "uart4_pclk";
|
|
+ clock-frequency = <58982400>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart4>;
|
|
+ __overlay__ {
|
|
+ clocks = <&midi_clk>,
|
|
+ <&clocks BCM2835_CLOCK_VPU>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/midi-uart5-overlay.dts b/arch/arm/boot/dts/overlays/midi-uart5-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..a1d37f7103ff
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/midi-uart5-overlay.dts
|
|
@@ -0,0 +1,38 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+
|
|
+/*
|
|
+ * Fake a higher clock rate to get a larger divisor, and thereby a lower
|
|
+ * baudrate. The real clock is 48MHz, which we scale so that requesting
|
|
+ * 38.4kHz results in an actual 31.25kHz.
|
|
+ *
|
|
+ * 48000000*38400/31250 = 58982400
|
|
+ */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ midi_clk: midi_clk5 {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "uart5_pclk";
|
|
+ clock-frequency = <58982400>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart5>;
|
|
+ __overlay__ {
|
|
+ clocks = <&midi_clk>,
|
|
+ <&clocks BCM2835_CLOCK_VPU>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/minipitft13-overlay.dts b/arch/arm/boot/dts/overlays/minipitft13-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..b1a0a2a41f72
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/minipitft13-overlay.dts
|
|
@@ -0,0 +1,70 @@
|
|
+/*
|
|
+ * Device Tree overlay for Adafruit Mini PiTFT 1.3" and 1.5" 240x240 Display
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ spidev@0{
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spidev@1{
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ pitft_pins: pitft_pins {
|
|
+ brcm,pins = <25>;
|
|
+ brcm,function = <1>; /* out */
|
|
+ brcm,pull = <0>; /* none */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pitft: pitft@0 {
|
|
+ compatible = "fbtft,minipitft13";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pitft_pins>;
|
|
+ spi-max-frequency = <32000000>;
|
|
+ rotate = <0>;
|
|
+ width = <240>;
|
|
+ height = <240>;
|
|
+ buswidth = <8>;
|
|
+ dc-gpios = <&gpio 25 0>;
|
|
+ led-gpios = <&gpio 26 0>;
|
|
+ debug = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ speed = <&pitft>,"spi-max-frequency:0";
|
|
+ rotate = <&pitft>,"rotate:0";
|
|
+ width = <&pitft>,"width:0";
|
|
+ height = <&pitft>,"height:0";
|
|
+ fps = <&pitft>,"fps:0";
|
|
+ debug = <&pitft>,"debug:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts b/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..da49f14a0940
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/miniuart-bt-overlay.dts
|
|
@@ -0,0 +1,93 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/* Switch Pi3 Bluetooth function to use the mini-UART (ttyS0) and restore
|
|
+ UART0/ttyAMA0 over GPIOs 14 & 15. Note that this may reduce the maximum
|
|
+ usable baudrate.
|
|
+
|
|
+ It is also necessary to edit /lib/systemd/system/hciuart.service and
|
|
+ replace ttyAMA0 with ttyS0, unless you have a system with udev rules
|
|
+ that create /dev/serial0 and /dev/serial1, in which case use /dev/serial1
|
|
+ instead because it will always be correct.
|
|
+
|
|
+ If cmdline.txt uses the alias serial0 to refer to the user-accessable port
|
|
+ then the firmware will replace with the appropriate port whether or not
|
|
+ this overlay is used.
|
|
+*/
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart0>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&bt>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&uart1>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart1_pins &bt_pins &fake_bt_cts>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&uart0_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins;
|
|
+ brcm,function;
|
|
+ brcm,pull;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&uart1_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins = <32 33>;
|
|
+ brcm,function = <2>; /* alt5=UART1 */
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ fake_bt_cts: fake_bt_cts {
|
|
+ brcm,pins = <31>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target-path = "/aliases";
|
|
+ __overlay__ {
|
|
+ serial0 = "/soc/serial@7e201000";
|
|
+ serial1 = "/soc/serial@7e215040";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target = <&minibt>;
|
|
+ minibt_frag: __overlay__ {
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ krnbt = <&minibt_frag>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/mmc-overlay.dts b/arch/arm/boot/dts/overlays/mmc-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..c1a2f691aa1e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/mmc-overlay.dts
|
|
@@ -0,0 +1,46 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&mmc>;
|
|
+ frag0: __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&mmc_pins>;
|
|
+ bus-width = <4>;
|
|
+ brcm,overclock-50 = <0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ mmc_pins: mmc_pins {
|
|
+ brcm,pins = <48 49 50 51 52 53>;
|
|
+ brcm,function = <7>; /* alt3 */
|
|
+ brcm,pull = <0 2 2 2 2 2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sdhost>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&mmcnr>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ overclock_50 = <&frag0>,"brcm,overclock-50:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/mpu6050-overlay.dts b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..1b4c06535687
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/mpu6050-overlay.dts
|
|
@@ -0,0 +1,29 @@
|
|
+// Definitions for MPU6050
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+ clock-frequency = <400000>;
|
|
+
|
|
+ mpu6050: mpu6050@68 {
|
|
+ compatible = "invensense,mpu6050";
|
|
+ reg = <0x68>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <4 1>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ interrupt = <&mpu6050>,"interrupts:0";
|
|
+ addr = <&mpu6050>,"reg:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/mz61581-overlay.dts b/arch/arm/boot/dts/overlays/mz61581-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..6e00e8b2ddf2
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/mz61581-overlay.dts
|
|
@@ -0,0 +1,117 @@
|
|
+/*
|
|
+ * Device Tree overlay for MZ61581-PI-EXT 2014.12.28 by Tontec
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ mz61581_pins: mz61581_pins {
|
|
+ brcm,pins = <4 15 18 25>;
|
|
+ brcm,function = <0 1 1 1>; /* in out out out */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ mz61581: mz61581@0{
|
|
+ compatible = "samsung,s6d02a1";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&mz61581_pins>;
|
|
+
|
|
+ spi-max-frequency = <128000000>;
|
|
+ spi-cpol;
|
|
+ spi-cpha;
|
|
+
|
|
+ width = <320>;
|
|
+ height = <480>;
|
|
+ rotate = <270>;
|
|
+ bgr;
|
|
+ fps = <30>;
|
|
+ buswidth = <8>;
|
|
+ txbuflen = <32768>;
|
|
+
|
|
+ reset-gpios = <&gpio 15 1>;
|
|
+ dc-gpios = <&gpio 25 0>;
|
|
+ led-gpios = <&gpio 18 0>;
|
|
+
|
|
+ init = <0x10000b0 00
|
|
+ 0x1000011
|
|
+ 0x20000ff
|
|
+ 0x10000b3 0x02 0x00 0x00 0x00
|
|
+ 0x10000c0 0x13 0x3b 0x00 0x02 0x00 0x01 0x00 0x43
|
|
+ 0x10000c1 0x08 0x16 0x08 0x08
|
|
+ 0x10000c4 0x11 0x07 0x03 0x03
|
|
+ 0x10000c6 0x00
|
|
+ 0x10000c8 0x03 0x03 0x13 0x5c 0x03 0x07 0x14 0x08 0x00 0x21 0x08 0x14 0x07 0x53 0x0c 0x13 0x03 0x03 0x21 0x00
|
|
+ 0x1000035 0x00
|
|
+ 0x1000036 0xa0
|
|
+ 0x100003a 0x55
|
|
+ 0x1000044 0x00 0x01
|
|
+ 0x10000d0 0x07 0x07 0x1d 0x03
|
|
+ 0x10000d1 0x03 0x30 0x10
|
|
+ 0x10000d2 0x03 0x14 0x04
|
|
+ 0x1000029
|
|
+ 0x100002c>;
|
|
+
|
|
+ /* This is a workaround to make sure the init sequence slows down and doesn't fail */
|
|
+ debug = <3>;
|
|
+ };
|
|
+
|
|
+ mz61581_ts: mz61581_ts@1 {
|
|
+ compatible = "ti,ads7846";
|
|
+ reg = <1>;
|
|
+
|
|
+ spi-max-frequency = <2000000>;
|
|
+ interrupts = <4 2>; /* high-to-low edge triggered */
|
|
+ interrupt-parent = <&gpio>;
|
|
+ pendown-gpio = <&gpio 4 0>;
|
|
+
|
|
+ ti,x-plate-ohms = /bits/ 16 <60>;
|
|
+ ti,pressure-max = /bits/ 16 <255>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ speed = <&mz61581>, "spi-max-frequency:0";
|
|
+ rotate = <&mz61581>, "rotate:0";
|
|
+ fps = <&mz61581>, "fps:0";
|
|
+ txbuflen = <&mz61581>, "txbuflen:0";
|
|
+ debug = <&mz61581>, "debug:0";
|
|
+ xohms = <&mz61581_ts>,"ti,x-plate-ohms;0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ov5647-overlay.dts b/arch/arm/boot/dts/overlays/ov5647-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..d7ed4703c9b0
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ov5647-overlay.dts
|
|
@@ -0,0 +1,94 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for OV5647 camera module on VC I2C bus
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ov5647: ov5647@36 {
|
|
+ compatible = "ovti,ov5647";
|
|
+ reg = <0x36>;
|
|
+ status = "okay";
|
|
+
|
|
+ pwdn-gpios = <&gpio 41 1>, <&gpio 32 1>;
|
|
+ clocks = <&ov5647_clk>;
|
|
+
|
|
+ rotation = <0>;
|
|
+ orientation = <2>;
|
|
+
|
|
+ port {
|
|
+ ov5647_0: endpoint {
|
|
+ remote-endpoint = <&csi1_ep>;
|
|
+ clock-lanes = <0>;
|
|
+ data-lanes = <1 2>;
|
|
+ clock-noncontinuous;
|
|
+ link-frequencies =
|
|
+ /bits/ 64 <297000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&csi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ csi1_ep: endpoint {
|
|
+ remote-endpoint = <&ov5647_0>;
|
|
+ data-lanes = <1 2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c0if>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c0mux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target-path="/__overrides__";
|
|
+ __overlay__ {
|
|
+ cam0-pwdn-ctrl = <&ov5647>,"pwdn-gpios:0";
|
|
+ cam0-pwdn = <&ov5647>,"pwdn-gpios:4";
|
|
+ cam0-led-ctrl = <&ov5647>,"pwdn-gpios:12";
|
|
+ cam0-led = <&ov5647>,"pwdn-gpios:16";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ ov5647_clk: camera-clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <25000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ rotation = <&ov5647>,"rotation:0";
|
|
+ orientation = <&ov5647>,"orientation:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ov7251-overlay.dts b/arch/arm/boot/dts/overlays/ov7251-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..09dbeda39d06
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ov7251-overlay.dts
|
|
@@ -0,0 +1,113 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for OV7251 camera module on VC I2C bus
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ov7251: ov7251@60 {
|
|
+ compatible = "ovti,ov7251";
|
|
+ reg = <0x60>;
|
|
+ status = "okay";
|
|
+
|
|
+ clocks = <&ov7251_clk>;
|
|
+ clock-names = "xclk";
|
|
+ clock-frequency = <24000000>;
|
|
+
|
|
+ vdddo-supply = <&ov7251_dovdd>;
|
|
+ vdda-supply = <&cam1_reg>;
|
|
+ vddd-supply = <&ov7251_dvdd>;
|
|
+
|
|
+ rotation = <0>;
|
|
+ orientation = <2>;
|
|
+
|
|
+ port {
|
|
+ ov7251_0: endpoint {
|
|
+ remote-endpoint = <&csi1_ep>;
|
|
+ clock-lanes = <0>;
|
|
+ data-lanes = <1>;
|
|
+ clock-noncontinuous;
|
|
+ link-frequencies =
|
|
+ /bits/ 64 <456000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&csi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ csi1_ep: endpoint {
|
|
+ remote-endpoint = <&ov7251_0>;
|
|
+ data-lanes = <1>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c0if>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path="/";
|
|
+ __overlay__ {
|
|
+ ov7251_dovdd: fixedregulator@1 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "ov7251_dovdd";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ };
|
|
+ ov7251_dvdd: fixedregulator@2 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "ov7251_dvdd";
|
|
+ regulator-min-microvolt = <1200000>;
|
|
+ regulator-max-microvolt = <1200000>;
|
|
+ };
|
|
+ ov7251_clk: ov7251-clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <24000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2c0mux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&cam1_reg>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ regulator-name = "ov7251_avdd";
|
|
+ regulator-min-microvolt = <2800000>;
|
|
+ regulator-max-microvolt = <2800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ rotation = <&ov7251>,"rotation:0";
|
|
+ orientation = <&ov7251>,"orientation:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ov9281-overlay.dts b/arch/arm/boot/dts/overlays/ov9281-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..277236c03358
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ov9281-overlay.dts
|
|
@@ -0,0 +1,113 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for OV9281 camera module on VC I2C bus
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ov9281: ov9281@60 {
|
|
+ compatible = "ovti,ov9281";
|
|
+ reg = <0x60>;
|
|
+ status = "okay";
|
|
+
|
|
+ clocks = <&ov9281_clk>;
|
|
+ clock-names = "xvclk";
|
|
+
|
|
+ avdd-supply = <&cam1_reg>;
|
|
+ dovdd-supply = <&ov9281_dovdd>;
|
|
+ dvdd-supply = <&ov9281_dvdd>;
|
|
+
|
|
+ rotation = <0>;
|
|
+ orientation = <2>;
|
|
+
|
|
+ port {
|
|
+ ov9281_0: endpoint {
|
|
+ remote-endpoint = <&csi1_ep>;
|
|
+ clock-lanes = <0>;
|
|
+ data-lanes = <1 2>;
|
|
+ clock-noncontinuous;
|
|
+ link-frequencies =
|
|
+ /bits/ 64 <400000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&csi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ csi1_ep: endpoint {
|
|
+ remote-endpoint = <&ov9281_0>;
|
|
+ data-lanes = <1 2>;
|
|
+ clock-noncontinuous;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c0if>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path="/";
|
|
+ __overlay__ {
|
|
+ ov9281_dovdd: fixedregulator@1 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "ov9281_dovdd";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ };
|
|
+ ov9281_dvdd: fixedregulator@2 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "ov9281_dvdd";
|
|
+ regulator-min-microvolt = <1200000>;
|
|
+ regulator-max-microvolt = <1200000>;
|
|
+ };
|
|
+ ov9281_clk: ov9281-clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <24000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2c0mux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&cam1_reg>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ regulator-name = "ov9281_avdd";
|
|
+ regulator-min-microvolt = <2800000>;
|
|
+ regulator-max-microvolt = <2800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ rotation = <&ov9281>,"rotation:0";
|
|
+ orientation = <&ov9281>,"orientation:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/overlay_map.dts b/arch/arm/boot/dts/overlays/overlay_map.dts
|
|
new file mode 100644
|
|
index 000000000000..bc6e3bce22c7
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/overlay_map.dts
|
|
@@ -0,0 +1,158 @@
|
|
+/dts-v1/;
|
|
+
|
|
+/ {
|
|
+ bmp085_i2c-sensor {
|
|
+ deprecated = "use i2c-sensor,bmp085";
|
|
+ };
|
|
+
|
|
+ highperi {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ i2c0-bcm2708 {
|
|
+ deprecated = "use i2c0";
|
|
+ };
|
|
+
|
|
+ i2c1-bcm2708 {
|
|
+ deprecated = "use i2c1";
|
|
+ };
|
|
+
|
|
+ i2c3 {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ i2c4 {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ i2c5 {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ i2c6 {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ lirc-rpi {
|
|
+ deprecated = "use gpio-ir";
|
|
+ };
|
|
+
|
|
+ pcie-32bit-dma {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ pi3-act-led {
|
|
+ renamed = "act-led";
|
|
+ };
|
|
+
|
|
+ pi3-disable-bt {
|
|
+ renamed = "disable-bt";
|
|
+ };
|
|
+
|
|
+ pi3-disable-wifi {
|
|
+ renamed = "disable-wifi";
|
|
+ };
|
|
+
|
|
+ pi3-miniuart-bt {
|
|
+ renamed = "miniuart-bt";
|
|
+ };
|
|
+
|
|
+ rpivid-v4l2 {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ sdio-1bit {
|
|
+ deprecated = "use sdio,bus_width=1,gpios_22_25";
|
|
+ };
|
|
+
|
|
+ sdtweak {
|
|
+ deprecated = "use 'dtparam=sd_poll_once' etc.";
|
|
+ };
|
|
+
|
|
+ spi0-cs {
|
|
+ renamed = "spi0-2cs";
|
|
+ };
|
|
+
|
|
+ spi0-hw-cs {
|
|
+ deprecated = "no longer necessary";
|
|
+ };
|
|
+
|
|
+ spi3-1cs {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ spi3-2cs {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ spi4-1cs {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ spi4-2cs {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ spi5-1cs {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ spi5-2cs {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ spi6-1cs {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ spi6-2cs {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ uart2 {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ uart3 {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ uart4 {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ uart5 {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ upstream {
|
|
+ bcm2835;
|
|
+ bcm2711 = "upstream-pi4";
|
|
+ };
|
|
+
|
|
+ upstream-aux-interrupt {
|
|
+ deprecated = "no longer necessary";
|
|
+ };
|
|
+
|
|
+ upstream-pi4 {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ vc4-fkms-v3d {
|
|
+ bcm2835;
|
|
+ bcm2711 = "vc4-fkms-v3d-pi4";
|
|
+ };
|
|
+
|
|
+ vc4-fkms-v3d-pi4 {
|
|
+ bcm2711;
|
|
+ };
|
|
+
|
|
+ vc4-kms-v3d {
|
|
+ bcm2835;
|
|
+ bcm2711 = "vc4-kms-v3d-pi4";
|
|
+ };
|
|
+
|
|
+ vc4-kms-v3d-pi4 {
|
|
+ bcm2711;
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/papirus-overlay.dts b/arch/arm/boot/dts/overlays/papirus-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..7b6bcfd49c86
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/papirus-overlay.dts
|
|
@@ -0,0 +1,89 @@
|
|
+/* PaPiRus ePaper Screen by Pi Supply */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_arm>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ display_temp: lm75@48 {
|
|
+ compatible = "lm75b";
|
|
+ reg = <0x48>;
|
|
+ status = "okay";
|
|
+ #thermal-sensor-cells = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ thermal-zones {
|
|
+ display {
|
|
+ polling-delay-passive = <0>;
|
|
+ polling-delay = <0>;
|
|
+ thermal-sensors = <&display_temp>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ spidev@0{
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ repaper_pins: repaper_pins {
|
|
+ brcm,pins = <14 15 23 24 25>;
|
|
+ brcm,function = <1 1 1 1 0>; /* out out out out in */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ repaper: repaper@0{
|
|
+ compatible = "not_set";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&repaper_pins>;
|
|
+
|
|
+ spi-max-frequency = <8000000>;
|
|
+
|
|
+ panel-on-gpios = <&gpio 23 0>;
|
|
+ border-gpios = <&gpio 14 0>;
|
|
+ discharge-gpios = <&gpio 15 0>;
|
|
+ reset-gpios = <&gpio 24 0>;
|
|
+ busy-gpios = <&gpio 25 0>;
|
|
+
|
|
+ repaper-thermal-zone = "display";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ panel = <&repaper>, "compatible";
|
|
+ speed = <&repaper>, "spi-max-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pca953x-overlay.dts b/arch/arm/boot/dts/overlays/pca953x-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..8b6ee44665ce
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pca953x-overlay.dts
|
|
@@ -0,0 +1,240 @@
|
|
+// Definitions for NXP PCA953x family of I2C GPIO controllers on ARM I2C bus.
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_arm>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pca: pca@20 {
|
|
+ compatible = "nxp,pca9534";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca6416";
|
|
+ };
|
|
+ };
|
|
+ fragment@2 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9505";
|
|
+ };
|
|
+ };
|
|
+ fragment@3 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9535";
|
|
+ };
|
|
+ };
|
|
+ fragment@4 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9536";
|
|
+ };
|
|
+ };
|
|
+ fragment@5 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9537";
|
|
+ };
|
|
+ };
|
|
+ fragment@6 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9538";
|
|
+ };
|
|
+ };
|
|
+ fragment@7 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9539";
|
|
+ };
|
|
+ };
|
|
+ fragment@8 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9554";
|
|
+ };
|
|
+ };
|
|
+ fragment@9 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9555";
|
|
+ };
|
|
+ };
|
|
+ fragment@10 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9556";
|
|
+ };
|
|
+ };
|
|
+ fragment@11 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9557";
|
|
+ };
|
|
+ };
|
|
+ fragment@12 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9574";
|
|
+ };
|
|
+ };
|
|
+ fragment@13 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9575";
|
|
+ };
|
|
+ };
|
|
+ fragment@14 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca9698";
|
|
+ };
|
|
+ };
|
|
+ fragment@15 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca16416";
|
|
+ };
|
|
+ };
|
|
+ fragment@16 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca16524";
|
|
+ };
|
|
+ };
|
|
+ fragment@17 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,pca19555a";
|
|
+ };
|
|
+ };
|
|
+ fragment@18 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,max7310";
|
|
+ };
|
|
+ };
|
|
+ fragment@19 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,max7312";
|
|
+ };
|
|
+ };
|
|
+ fragment@20 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,max7313";
|
|
+ };
|
|
+ };
|
|
+ fragment@21 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,max7315";
|
|
+ };
|
|
+ };
|
|
+ fragment@22 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "ti,pca6107";
|
|
+ };
|
|
+ };
|
|
+ fragment@23 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "ti,tca6408";
|
|
+ };
|
|
+ };
|
|
+ fragment@24 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "ti,tca6416";
|
|
+ };
|
|
+ };
|
|
+ fragment@25 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "ti,tca6424";
|
|
+ };
|
|
+ };
|
|
+ fragment@26 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "ti,tca9539";
|
|
+ };
|
|
+ };
|
|
+ fragment@27 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "ti,tca9554";
|
|
+ };
|
|
+ };
|
|
+ fragment@28 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "onnn,cat9554";
|
|
+ };
|
|
+ };
|
|
+ fragment@29 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "onnn,pca9654";
|
|
+ };
|
|
+ };
|
|
+ fragment@30 {
|
|
+ target = <&pca>;
|
|
+ __dormant__ {
|
|
+ compatible = "exar,xra1202";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ addr = <&pca>,"reg:0";
|
|
+ pca6416 = <0>, "+1";
|
|
+ pca9505 = <0>, "+2";
|
|
+ pca9535 = <0>, "+3";
|
|
+ pca9536 = <0>, "+4";
|
|
+ pca9537 = <0>, "+5";
|
|
+ pca9538 = <0>, "+6";
|
|
+ pca9539 = <0>, "+7";
|
|
+ pca9554 = <0>, "+8";
|
|
+ pca9555 = <0>, "+9";
|
|
+ pca9556 = <0>, "+10";
|
|
+ pca9557 = <0>, "+11";
|
|
+ pca9574 = <0>, "+12";
|
|
+ pca9575 = <0>, "+13";
|
|
+ pca9698 = <0>, "+14";
|
|
+ pca16416 = <0>, "+15";
|
|
+ pca16524 = <0>, "+16";
|
|
+ pca19555a = <0>, "+17";
|
|
+ max7310 = <0>, "+18";
|
|
+ max7312 = <0>, "+19";
|
|
+ max7313 = <0>, "+20";
|
|
+ max7315 = <0>, "+21";
|
|
+ pca6107 = <0>, "+22";
|
|
+ tca6408 = <0>, "+23";
|
|
+ tca6416 = <0>, "+24";
|
|
+ tca6424 = <0>, "+25";
|
|
+ tca9539 = <0>, "+26";
|
|
+ tca9554 = <0>, "+27";
|
|
+ cat9554 = <0>, "+28";
|
|
+ pca9654 = <0>, "+29";
|
|
+ xra1202 = <0>, "+30";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pcie-32bit-dma-overlay.dts b/arch/arm/boot/dts/overlays/pcie-32bit-dma-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..cca3e83721b7
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pcie-32bit-dma-overlay.dts
|
|
@@ -0,0 +1,18 @@
|
|
+/*
|
|
+ * pcie-32bit-dma-overlay.dts
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/aliases";
|
|
+ __overlay__ {
|
|
+ pcie0 = "";
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pibell-overlay.dts b/arch/arm/boot/dts/overlays/pibell-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..9333a9b09772
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pibell-overlay.dts
|
|
@@ -0,0 +1,81 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ codec_out: spdif-transmitter {
|
|
+ #address-cells = <0>;
|
|
+ #size-cells = <0>;
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "linux,spdif-dit";
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ codec_in: card-codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "invensense,ics43432";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ snd: __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ simple-audio-card,name = "PiBell";
|
|
+
|
|
+ status="okay";
|
|
+
|
|
+ capture_link: simple-audio-card,dai-link@0 {
|
|
+ format = "i2s";
|
|
+
|
|
+ r_cpu_dai: cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+
|
|
+/* example TDM slot configuration
|
|
+ dai-tdm-slot-num = <2>;
|
|
+ dai-tdm-slot-width = <32>;
|
|
+*/
|
|
+ };
|
|
+
|
|
+ r_codec_dai: codec {
|
|
+ sound-dai = <&codec_in>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ playback_link: simple-audio-card,dai-link@1 {
|
|
+ format = "i2s";
|
|
+
|
|
+ p_cpu_dai: cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+
|
|
+/* example TDM slot configuration
|
|
+ dai-tdm-slot-num = <2>;
|
|
+ dai-tdm-slot-width = <32>;
|
|
+*/
|
|
+ };
|
|
+
|
|
+ p_codec_dai: codec {
|
|
+ sound-dai = <&codec_out>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ alsaname = <&snd>, "simple-audio-card,name";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pifacedigital-overlay.dts b/arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..532a858683d6
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
|
|
@@ -0,0 +1,144 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+/*
|
|
+ * PiFace Digital, Device Tree Overlay.
|
|
+ * Copyright (C) 2020 Thomas Preston <thomas.preston@codethink.co.uk>
|
|
+ *
|
|
+ * The PiFace Digital is a convenient breakout board for the Microchip mcp23s17
|
|
+ * SPI GPIO port expander.
|
|
+ *
|
|
+ * The first eight GPIOs 0..7 (bank A) are connected to eight output terminals
|
|
+ * and LEDs, plus two relays on the first two outputs. These output loads are
|
|
+ * active-high.
|
|
+ *
|
|
+ * The next eight GPIOs 8..15 (bank B) are connected to eight input terminals
|
|
+ * with four on-board switches connecting them to ground. Inputs devices are
|
|
+ * therefore expected to bridge terminals to ground, so the mcp23s17 pullups are
|
|
+ * activated for GPIO bank B.
|
|
+ *
|
|
+ * On PiFace Digital, the mcp23s17 is connected to the Raspberry Pi's SPI0 CS0
|
|
+ * bus. Each SPI bus supports up to eight addressable child devices. The PiFace
|
|
+ * Digital only supports addresses 0-4, which can be configured by jumpers JP1
|
|
+ * and JP2.
|
|
+ *
|
|
+ * You can tell the driver about these jumper configurations with the
|
|
+ * spi-present-mask bitmask:
|
|
+ *
|
|
+ * | JP1 | JP2 | dtoverlay line in /boot/config.txt |
|
|
+ * | --- | --- | ------------------------------------------ |
|
|
+ * | 0 | 0 | dtoverlay=pifacedigital |
|
|
+ * | 0 | 0 | dtoverlay=pifacedigital:spi-present-mask=1 |
|
|
+ * | 0 | 1 | dtoverlay=pifacedigital:spi-present-mask=2 |
|
|
+ * | 1 | 0 | dtoverlay=pifacedigital:spi-present-mask=4 |
|
|
+ * | 1 | 1 | dtoverlay=pifacedigital:spi-present-mask=8 |
|
|
+ *
|
|
+ * # Example
|
|
+ * Set the dtoverlay config in /boot/config.txt and power off the Raspberry Pi:
|
|
+ *
|
|
+ * $ grep pifacedigital /boot/config.txt
|
|
+ * dtoverlay=pifacedigital
|
|
+ * $ sudo systemctl poweroff
|
|
+ *
|
|
+ * Attach the PiFace Digital and power on the Raspberry Pi.
|
|
+ * Then use the libgpiod tools to query the device:
|
|
+ *
|
|
+ * $ sudo apt install gpiod
|
|
+ * $ gpiodetect | grep mcp23s17
|
|
+ * gpiochip2 [mcp23s17.0] (16 lines)
|
|
+ *
|
|
+ * Set GPIO outputs 0, 2 and 5:
|
|
+ *
|
|
+ * $ gpioset gpiochip2 0=1 2=1 5=1
|
|
+ *
|
|
+ * Get GPIO status (input GPIO 8..15 are high, because they are active-low):
|
|
+ *
|
|
+ * $ gpioget gpiochip2 {8..15}
|
|
+ * 1 1 1 1 1 1 1 1
|
|
+ *
|
|
+ * And even monitor interrupts:
|
|
+ *
|
|
+ * $ gpiomon gpiochip2 {8..15}
|
|
+ * event: FALLING EDGE offset: 11 timestamp: [1597361662.926741667]
|
|
+ * event: RISING EDGE offset: 11 timestamp: [1597361663.062555051]
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ /* Disable exposing /dev/spidev0.0 */
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* Add the PiFace Digital device node to the spi0.0 device. */
|
|
+ fragment@1 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pfdigital: pifacedigital@0 {
|
|
+ compatible = "microchip,mcp23s17";
|
|
+ reg = <0>;
|
|
+
|
|
+ /* Set devices present with 8-bit mask. */
|
|
+ microchip,spi-present-mask = <0x01>;
|
|
+ spi-max-frequency = <500000>;
|
|
+
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+
|
|
+ /* This device can pass through interrupts. */
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <2>;
|
|
+
|
|
+ /* INTB is connected to GPIO 25.
|
|
+ * 0x8 active-low level-sensitive
|
|
+ */
|
|
+ interrupts = <25 0x8>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+
|
|
+ /* Configure pull-ups on bank B GPIOs */
|
|
+ pinctrl-0 = <&pfdigital_irq &pfdigital_pullups>;
|
|
+ pinctrl-names = "default";
|
|
+ pfdigital_pullups: pinmux {
|
|
+ pins =
|
|
+ "gpio8",
|
|
+ "gpio9",
|
|
+ "gpio10",
|
|
+ "gpio11",
|
|
+ "gpio12",
|
|
+ "gpio13",
|
|
+ "gpio14",
|
|
+ "gpio15";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* PiFace Digital mcp23s17 INTB pin is connected to GPIO 25. The INTB
|
|
+ * pin is configured active-low (0 on interrupt), so expect to see
|
|
+ * FALLING_EDGE when inputs are bridged to ground (switch is pressed).
|
|
+ */
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ pfdigital_irq: pifacedigital_irq {
|
|
+ brcm,pins = <25>;
|
|
+ brcm,function = <0>; /* input */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ spi-present-mask = <&pfdigital>, "microchip,spi-present-mask:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pifi-40-overlay.dts b/arch/arm/boot/dts/overlays/pifi-40-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..51a20e54977f
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pifi-40-overlay.dts
|
|
@@ -0,0 +1,50 @@
|
|
+// Definitions for PiFi-40 Amp
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ tas5711l: audio-codec@1a {
|
|
+ compatible = "ti,tas5711";
|
|
+ reg = <0x1a>;
|
|
+ #sound-dai-cells = <0>;
|
|
+ sound-name-prefix = "Left";
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ tas5711r: audio-codec@1b {
|
|
+ compatible = "ti,tas5711";
|
|
+ reg = <0x1b>;
|
|
+ #sound-dai-cells = <0>;
|
|
+ sound-name-prefix = "Right";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ pifi_40: __overlay__ {
|
|
+ compatible = "pifi,pifi-40";
|
|
+ audio-codec = <&tas5711l &tas5711r>;
|
|
+ i2s-controller = <&i2s>;
|
|
+ pdn-gpios = <&gpio 23 1>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pifi-dac-hd-overlay.dts b/arch/arm/boot/dts/overlays/pifi-dac-hd-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..67f50db7861a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pifi-dac-hd-overlay.dts
|
|
@@ -0,0 +1,49 @@
|
|
+// Overlay for PiFi-DAC-HD
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells =<0>;
|
|
+
|
|
+ pcm5142: pcm5142@4c {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5142";
|
|
+ reg = <0x4c>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ simple-audio-card,name = "PiFi-DAC-HD";
|
|
+ status = "okay";
|
|
+
|
|
+ simple-audio-card,dai-link@1 {
|
|
+ format = "i2s";
|
|
+ cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ };
|
|
+ codec {
|
|
+ sound-dai = <&pcm5142>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pifi-dac-zero-overlay.dts b/arch/arm/boot/dts/overlays/pifi-dac-zero-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..645ea74cb435
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pifi-dac-zero-overlay.dts
|
|
@@ -0,0 +1,49 @@
|
|
+// Overlay for PiFi-DAC-Zero
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ simple-audio-card,name = "PiFi-DAC-Zero";
|
|
+ status = "okay";
|
|
+
|
|
+ simple-audio-card,dai-link@1 {
|
|
+ format = "i2s";
|
|
+
|
|
+ cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ dai-tdm-slot-num = <2>;
|
|
+ dai-tdm-slot-width = <32>;
|
|
+ };
|
|
+
|
|
+ codec {
|
|
+ sound-dai = <&codec_out>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ codec_out: pcm5102a-codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5102a";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pifi-mini-210-overlay.dts b/arch/arm/boot/dts/overlays/pifi-mini-210-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..963597d611b5
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pifi-mini-210-overlay.dts
|
|
@@ -0,0 +1,42 @@
|
|
+// Definitions for PiFi Mini 210
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ tas5711@1a {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,tas5711";
|
|
+ reg = <0x1a>;
|
|
+ status = "okay";
|
|
+ pdn-gpios = <&gpio 23 1>;
|
|
+ reset-gpios = <&gpio 24 1>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "pifi,pifi-mini-210";
|
|
+ i2s-controller = <&i2s>;
|
|
+
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/piglow-overlay.dts b/arch/arm/boot/dts/overlays/piglow-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..075bceef158c
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/piglow-overlay.dts
|
|
@@ -0,0 +1,97 @@
|
|
+// Definitions for SN3218 LED driver from Si-En Technology on PiGlow
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_arm>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ sn3218@54 {
|
|
+ compatible = "si-en,sn3218";
|
|
+ reg = <0x54>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ led@1 {
|
|
+ reg = <1>;
|
|
+ label = "piglow:red:led1";
|
|
+ };
|
|
+ led@2 {
|
|
+ reg = <2>;
|
|
+ label = "piglow:orange:led2";
|
|
+ };
|
|
+ led@3 {
|
|
+ reg = <3>;
|
|
+ label = "piglow:yellow:led3";
|
|
+ };
|
|
+ led@4 {
|
|
+ reg = <4>;
|
|
+ label = "piglow:green:led4";
|
|
+ };
|
|
+ led@5 {
|
|
+ reg = <5>;
|
|
+ label = "piglow:blue:led5";
|
|
+ };
|
|
+ led@6 {
|
|
+ reg = <6>;
|
|
+ label = "piglow:green:led6";
|
|
+ };
|
|
+ led@7 {
|
|
+ reg = <7>;
|
|
+ label = "piglow:red:led7";
|
|
+ };
|
|
+ led@8 {
|
|
+ reg = <8>;
|
|
+ label = "piglow:orange:led8";
|
|
+ };
|
|
+ led@9 {
|
|
+ reg = <9>;
|
|
+ label = "piglow:yellow:led9";
|
|
+ };
|
|
+ led@10 {
|
|
+ reg = <10>;
|
|
+ label = "piglow:white:led10";
|
|
+ };
|
|
+ led@11 {
|
|
+ reg = <11>;
|
|
+ label = "piglow:white:led11";
|
|
+ };
|
|
+ led@12 {
|
|
+ reg = <12>;
|
|
+ label = "piglow:blue:led12";
|
|
+ };
|
|
+ led@13 {
|
|
+ reg = <13>;
|
|
+ label = "piglow:white:led13";
|
|
+ };
|
|
+ led@14 {
|
|
+ reg = <14>;
|
|
+ label = "piglow:green:led14";
|
|
+ };
|
|
+ led@15 {
|
|
+ reg = <15>;
|
|
+ label = "piglow:blue:led15";
|
|
+ };
|
|
+ led@16 {
|
|
+ reg = <16>;
|
|
+ label = "piglow:yellow:led16";
|
|
+ };
|
|
+ led@17 {
|
|
+ reg = <17>;
|
|
+ label = "piglow:orange:led17";
|
|
+ };
|
|
+ led@18 {
|
|
+ reg = <18>;
|
|
+ label = "piglow:red:led18";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/piscreen-overlay.dts b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..1ac75a248fab
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/piscreen-overlay.dts
|
|
@@ -0,0 +1,102 @@
|
|
+/*
|
|
+ * Device Tree overlay for PiScreen 3.5" display shield by Ozzmaker
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ piscreen_pins: piscreen_pins {
|
|
+ brcm,pins = <17 25 24 22>;
|
|
+ brcm,function = <0 1 1 1>; /* in out out out */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ piscreen: piscreen@0{
|
|
+ compatible = "ilitek,ili9486";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&piscreen_pins>;
|
|
+
|
|
+ spi-max-frequency = <24000000>;
|
|
+ rotate = <270>;
|
|
+ bgr;
|
|
+ fps = <30>;
|
|
+ buswidth = <8>;
|
|
+ regwidth = <16>;
|
|
+ reset-gpios = <&gpio 25 1>;
|
|
+ dc-gpios = <&gpio 24 0>;
|
|
+ led-gpios = <&gpio 22 0>;
|
|
+ debug = <0>;
|
|
+
|
|
+ init = <0x10000b0 0x00
|
|
+ 0x1000011
|
|
+ 0x20000ff
|
|
+ 0x100003a 0x55
|
|
+ 0x1000036 0x28
|
|
+ 0x10000c2 0x44
|
|
+ 0x10000c5 0x00 0x00 0x00 0x00
|
|
+ 0x10000e0 0x0f 0x1f 0x1c 0x0c 0x0f 0x08 0x48 0x98 0x37 0x0a 0x13 0x04 0x11 0x0d 0x00
|
|
+ 0x10000e1 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
|
|
+ 0x10000e2 0x0f 0x32 0x2e 0x0b 0x0d 0x05 0x47 0x75 0x37 0x06 0x10 0x03 0x24 0x20 0x00
|
|
+ 0x1000011
|
|
+ 0x1000029>;
|
|
+ };
|
|
+
|
|
+ piscreen_ts: piscreen-ts@1 {
|
|
+ compatible = "ti,ads7846";
|
|
+ reg = <1>;
|
|
+
|
|
+ spi-max-frequency = <2000000>;
|
|
+ interrupts = <17 2>; /* high-to-low edge triggered */
|
|
+ interrupt-parent = <&gpio>;
|
|
+ pendown-gpio = <&gpio 17 0>;
|
|
+ ti,swap-xy;
|
|
+ ti,x-plate-ohms = /bits/ 16 <100>;
|
|
+ ti,pressure-max = /bits/ 16 <255>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ speed = <&piscreen>,"spi-max-frequency:0";
|
|
+ rotate = <&piscreen>,"rotate:0";
|
|
+ fps = <&piscreen>,"fps:0";
|
|
+ debug = <&piscreen>,"debug:0";
|
|
+ xohms = <&piscreen_ts>,"ti,x-plate-ohms;0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..9d2b51101969
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/piscreen2r-overlay.dts
|
|
@@ -0,0 +1,106 @@
|
|
+ /*
|
|
+ * Device Tree overlay for PiScreen2 3.5" TFT with resistive touch by Ozzmaker.com
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ piscreen2_pins: piscreen2_pins {
|
|
+ brcm,pins = <17 25 24 22>;
|
|
+ brcm,function = <0 1 1 1>; /* in out out out */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ piscreen2: piscreen2@0{
|
|
+ compatible = "ilitek,ili9486";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&piscreen2_pins>;
|
|
+ bgr;
|
|
+ spi-max-frequency = <64000000>;
|
|
+ rotate = <90>;
|
|
+ fps = <30>;
|
|
+ buswidth = <8>;
|
|
+ regwidth = <16>;
|
|
+ txbuflen = <32768>;
|
|
+ reset-gpios = <&gpio 25 1>;
|
|
+ dc-gpios = <&gpio 24 0>;
|
|
+ led-gpios = <&gpio 22 0>;
|
|
+ debug = <0>;
|
|
+
|
|
+ init = <0x10000b0 0x00
|
|
+ 0x1000011
|
|
+ 0x20000ff
|
|
+ 0x100003a 0x55
|
|
+ 0x1000036 0x28
|
|
+ 0x10000c0 0x11 0x09
|
|
+ 0x10000c1 0x41
|
|
+ 0x10000c5 0x00 0x00 0x00 0x00
|
|
+ 0x10000b6 0x00 0x02
|
|
+ 0x10000f7 0xa9 0x51 0x2c 0x2
|
|
+ 0x10000be 0x00 0x04
|
|
+ 0x10000e9 0x00
|
|
+ 0x1000011
|
|
+ 0x1000029>;
|
|
+
|
|
+ };
|
|
+
|
|
+ piscreen2_ts: piscreen2-ts@1 {
|
|
+ compatible = "ti,ads7846";
|
|
+ reg = <1>;
|
|
+
|
|
+ spi-max-frequency = <2000000>;
|
|
+ interrupts = <17 2>; /* high-to-low edge triggered */
|
|
+ interrupt-parent = <&gpio>;
|
|
+ pendown-gpio = <&gpio 17 0>;
|
|
+ ti,swap-xy;
|
|
+ ti,x-plate-ohms = /bits/ 16 <100>;
|
|
+ ti,pressure-max = /bits/ 16 <255>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ speed = <&piscreen2>,"spi-max-frequency:0";
|
|
+ rotate = <&piscreen2>,"rotate:0";
|
|
+ fps = <&piscreen2>,"fps:0";
|
|
+ debug = <&piscreen2>,"debug:0";
|
|
+ xohms = <&piscreen2_ts>,"ti,x-plate-ohms;0";
|
|
+ };
|
|
+};
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/pisound-overlay.dts b/arch/arm/boot/dts/overlays/pisound-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..49efb2b768fb
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pisound-overlay.dts
|
|
@@ -0,0 +1,120 @@
|
|
+/*
|
|
+ * Pisound Linux kernel module.
|
|
+ * Copyright (C) 2016-2017 Vilniaus Blokas UAB, https://blokas.io/pisound
|
|
+ *
|
|
+ * This program is free software; you can redistribute it and/or
|
|
+ * modify it under the terms of the GNU General Public License
|
|
+ * as published by the Free Software Foundation; version 2 of the
|
|
+ * License.
|
|
+ *
|
|
+ * This program is distributed in the hope that it will be useful,
|
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+ * GNU General Public License for more details.
|
|
+ *
|
|
+ * You should have received a copy of the GNU General Public License
|
|
+ * along with this program; if not, write to the Free Software
|
|
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pisound_spi: pisound_spi@0{
|
|
+ compatible = "blokaslabs,pisound-spi";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins>;
|
|
+ spi-max-frequency = <1000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ pcm5102a-codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm5102a";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "blokaslabs,pisound";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+
|
|
+ pinctrl-0 = <&pisound_button_pins>;
|
|
+
|
|
+ osr-gpios =
|
|
+ <&gpio 13 GPIO_ACTIVE_HIGH>,
|
|
+ <&gpio 26 GPIO_ACTIVE_HIGH>,
|
|
+ <&gpio 16 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ reset-gpios =
|
|
+ <&gpio 12 GPIO_ACTIVE_HIGH>,
|
|
+ <&gpio 24 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ data_available-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
|
|
+
|
|
+ button-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pisound_button_pins>;
|
|
+
|
|
+ pisound_button_pins: pisound_button_pins {
|
|
+ brcm,pins = <17>;
|
|
+ brcm,function = <0>; // Input
|
|
+ brcm,pull = <2>; // Pull-Up
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pitft22-overlay.dts b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..589ad13795b1
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pitft22-overlay.dts
|
|
@@ -0,0 +1,69 @@
|
|
+/*
|
|
+ * Device Tree overlay for pitft by Adafruit
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ spidev@0{
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spidev@1{
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ pitft_pins: pitft_pins {
|
|
+ brcm,pins = <25>;
|
|
+ brcm,function = <1>; /* out */
|
|
+ brcm,pull = <0>; /* none */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pitft: pitft@0{
|
|
+ compatible = "ilitek,ili9340";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pitft_pins>;
|
|
+
|
|
+ spi-max-frequency = <32000000>;
|
|
+ rotate = <90>;
|
|
+ fps = <25>;
|
|
+ bgr;
|
|
+ buswidth = <8>;
|
|
+ dc-gpios = <&gpio 25 0>;
|
|
+ debug = <0>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ speed = <&pitft>,"spi-max-frequency:0";
|
|
+ rotate = <&pitft>,"rotate:0";
|
|
+ fps = <&pitft>,"fps:0";
|
|
+ debug = <&pitft>,"debug:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..33901ee1db7a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pitft28-capacitive-overlay.dts
|
|
@@ -0,0 +1,91 @@
|
|
+/*
|
|
+ * Device Tree overlay for Adafruit PiTFT 2.8" capacitive touch screen
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ pitft_pins: pitft_pins {
|
|
+ brcm,pins = <24 25>;
|
|
+ brcm,function = <0 1>; /* in out */
|
|
+ brcm,pull = <2 0>; /* pullup none */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pitft: pitft@0{
|
|
+ compatible = "ilitek,ili9340";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pitft_pins>;
|
|
+
|
|
+ spi-max-frequency = <32000000>;
|
|
+ rotate = <90>;
|
|
+ fps = <25>;
|
|
+ bgr;
|
|
+ buswidth = <8>;
|
|
+ dc-gpios = <&gpio 25 0>;
|
|
+ debug = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ft6236: ft6236@38 {
|
|
+ compatible = "focaltech,ft6236";
|
|
+ reg = <0x38>;
|
|
+
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <24 2>;
|
|
+ touchscreen-size-x = <240>;
|
|
+ touchscreen-size-y = <320>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ speed = <&pitft>,"spi-max-frequency:0";
|
|
+ rotate = <&pitft>,"rotate:0";
|
|
+ fps = <&pitft>,"fps:0";
|
|
+ debug = <&pitft>,"debug:0";
|
|
+ touch-sizex = <&ft6236>,"touchscreen-size-x?";
|
|
+ touch-sizey = <&ft6236>,"touchscreen-size-y?";
|
|
+ touch-invx = <&ft6236>,"touchscreen-inverted-x?";
|
|
+ touch-invy = <&ft6236>,"touchscreen-inverted-y?";
|
|
+ touch-swapxy = <&ft6236>,"touchscreen-swapped-x-y?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..4a4a3f44c29d
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pitft28-resistive-overlay.dts
|
|
@@ -0,0 +1,119 @@
|
|
+/*
|
|
+ * Device Tree overlay for Adafruit PiTFT 2.8" resistive touch screen
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ pitft_pins: pitft_pins {
|
|
+ brcm,pins = <24 25>;
|
|
+ brcm,function = <0 1>; /* in out */
|
|
+ brcm,pull = <2 0>; /* pullup none */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pitft: pitft@0{
|
|
+ compatible = "ilitek,ili9340";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pitft_pins>;
|
|
+
|
|
+ spi-max-frequency = <32000000>;
|
|
+ rotate = <90>;
|
|
+ fps = <25>;
|
|
+ bgr;
|
|
+ buswidth = <8>;
|
|
+ dc-gpios = <&gpio 25 0>;
|
|
+ debug = <0>;
|
|
+ };
|
|
+
|
|
+ pitft_ts@1 {
|
|
+ compatible = "st,stmpe610";
|
|
+ reg = <1>;
|
|
+
|
|
+ spi-max-frequency = <500000>;
|
|
+ irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
|
|
+ interrupts = <24 2>; /* high-to-low edge triggered */
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+
|
|
+ stmpe_touchscreen {
|
|
+ compatible = "st,stmpe-ts";
|
|
+ st,sample-time = <4>;
|
|
+ st,mod-12b = <1>;
|
|
+ st,ref-sel = <0>;
|
|
+ st,adc-freq = <2>;
|
|
+ st,ave-ctrl = <3>;
|
|
+ st,touch-det-delay = <4>;
|
|
+ st,settling = <2>;
|
|
+ st,fraction-z = <7>;
|
|
+ st,i-drive = <0>;
|
|
+ };
|
|
+
|
|
+ stmpe_gpio: stmpe_gpio {
|
|
+ #gpio-cells = <2>;
|
|
+ compatible = "st,stmpe-gpio";
|
|
+ /*
|
|
+ * only GPIO2 is wired/available
|
|
+ * and it is wired to the backlight
|
|
+ */
|
|
+ st,norequest-mask = <0x7b>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target-path = "/soc";
|
|
+ __overlay__ {
|
|
+ backlight {
|
|
+ compatible = "gpio-backlight";
|
|
+ gpios = <&stmpe_gpio 2 0>;
|
|
+ default-on;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ speed = <&pitft>,"spi-max-frequency:0";
|
|
+ rotate = <&pitft>,"rotate:0";
|
|
+ fps = <&pitft>,"fps:0";
|
|
+ debug = <&pitft>,"debug:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..37629f18a740
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pitft35-resistive-overlay.dts
|
|
@@ -0,0 +1,119 @@
|
|
+/*
|
|
+ * Device Tree overlay for Adafruit PiTFT 3.5" resistive touch screen
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ pitft_pins: pitft_pins {
|
|
+ brcm,pins = <24 25>;
|
|
+ brcm,function = <0 1>; /* in out */
|
|
+ brcm,pull = <2 0>; /* pullup none */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pitft: pitft@0{
|
|
+ compatible = "himax,hx8357d", "adafruit,yx350hv15";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pitft_pins>;
|
|
+
|
|
+ spi-max-frequency = <32000000>;
|
|
+ rotate = <90>;
|
|
+ fps = <25>;
|
|
+ bgr;
|
|
+ buswidth = <8>;
|
|
+ dc-gpios = <&gpio 25 0>;
|
|
+ debug = <0>;
|
|
+ };
|
|
+
|
|
+ pitft_ts@1 {
|
|
+ compatible = "st,stmpe610";
|
|
+ reg = <1>;
|
|
+
|
|
+ spi-max-frequency = <500000>;
|
|
+ irq-gpio = <&gpio 24 0x2>; /* IRQF_TRIGGER_FALLING */
|
|
+ interrupts = <24 2>; /* high-to-low edge triggered */
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+
|
|
+ stmpe_touchscreen {
|
|
+ compatible = "st,stmpe-ts";
|
|
+ st,sample-time = <4>;
|
|
+ st,mod-12b = <1>;
|
|
+ st,ref-sel = <0>;
|
|
+ st,adc-freq = <2>;
|
|
+ st,ave-ctrl = <3>;
|
|
+ st,touch-det-delay = <4>;
|
|
+ st,settling = <2>;
|
|
+ st,fraction-z = <7>;
|
|
+ st,i-drive = <0>;
|
|
+ };
|
|
+
|
|
+ stmpe_gpio: stmpe_gpio {
|
|
+ #gpio-cells = <2>;
|
|
+ compatible = "st,stmpe-gpio";
|
|
+ /*
|
|
+ * only GPIO2 is wired/available
|
|
+ * and it is wired to the backlight
|
|
+ */
|
|
+ st,norequest-mask = <0x7b>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target-path = "/soc";
|
|
+ __overlay__ {
|
|
+ backlight {
|
|
+ compatible = "gpio-backlight";
|
|
+ gpios = <&stmpe_gpio 2 0>;
|
|
+ default-on;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ speed = <&pitft>,"spi-max-frequency:0";
|
|
+ rotate = <&pitft>,"rotate:0";
|
|
+ fps = <&pitft>,"fps:0";
|
|
+ debug = <&pitft>,"debug:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..524a1c1d3670
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pps-gpio-overlay.dts
|
|
@@ -0,0 +1,38 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ pps: pps@12 {
|
|
+ compatible = "pps-gpio";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pps_pins>;
|
|
+ gpios = <&gpio 18 0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ pps_pins: pps_pins@12 {
|
|
+ brcm,pins = <18>;
|
|
+ brcm,function = <0>; // in
|
|
+ brcm,pull = <0>; // off
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpiopin = <&pps>,"gpios:4",
|
|
+ <&pps>,"reg:0",
|
|
+ <&pps_pins>,"brcm,pins:0",
|
|
+ <&pps_pins>,"reg:0";
|
|
+ assert_falling_edge = <&pps>,"assert-falling-edge?";
|
|
+ capture_clear = <&pps>,"capture-clear?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..4ddbbfa04065
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts
|
|
@@ -0,0 +1,49 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/*
|
|
+This is the 2-channel overlay - only use it if you need both channels.
|
|
+
|
|
+Legal pin,function combinations for each channel:
|
|
+ PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
|
|
+ PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
|
|
+
|
|
+N.B.:
|
|
+ 1) Pin 18 is the only one available on all platforms, and
|
|
+ it is the one used by the I2S audio interface.
|
|
+ Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
|
|
+ 2) The onboard analogue audio output uses both PWM channels.
|
|
+ 3) So be careful mixing audio and PWM.
|
|
+*/
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ pwm_pins: pwm_pins {
|
|
+ brcm,pins = <18 19>;
|
|
+ brcm,function = <2 2>; /* Alt5 */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&pwm>;
|
|
+ frag1: __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pwm_pins>;
|
|
+ assigned-clock-rates = <100000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pin = <&pwm_pins>,"brcm,pins:0";
|
|
+ pin2 = <&pwm_pins>,"brcm,pins:4";
|
|
+ func = <&pwm_pins>,"brcm,function:0";
|
|
+ func2 = <&pwm_pins>,"brcm,function:4";
|
|
+ clock = <&frag1>,"assigned-clock-rates:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..119caf746b3b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pwm-ir-tx-overlay.dts
|
|
@@ -0,0 +1,40 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ pwm0_pins: pwm0_pins {
|
|
+ brcm,pins = <18>;
|
|
+ brcm,function = <2>; /* Alt5 */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&pwm>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pwm0_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ pwm-ir-transmitter {
|
|
+ compatible = "pwm-ir-tx";
|
|
+ pwms = <&pwm 0 100>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpio_pin = <&pwm0_pins>, "brcm,pins:0";
|
|
+ func = <&pwm0_pins>,"brcm,function:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/pwm-overlay.dts b/arch/arm/boot/dts/overlays/pwm-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..92876ab3bc8c
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/pwm-overlay.dts
|
|
@@ -0,0 +1,45 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/*
|
|
+Legal pin,function combinations for each channel:
|
|
+ PWM0: 12,4(Alt0) 18,2(Alt5) 40,4(Alt0) 52,5(Alt1)
|
|
+ PWM1: 13,4(Alt0) 19,2(Alt5) 41,4(Alt0) 45,4(Alt0) 53,5(Alt1)
|
|
+
|
|
+N.B.:
|
|
+ 1) Pin 18 is the only one available on all platforms, and
|
|
+ it is the one used by the I2S audio interface.
|
|
+ Pins 12 and 13 might be better choices on an A+, B+ or Pi2.
|
|
+ 2) The onboard analogue audio output uses both PWM channels.
|
|
+ 3) So be careful mixing audio and PWM.
|
|
+*/
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ pwm_pins: pwm_pins {
|
|
+ brcm,pins = <18>;
|
|
+ brcm,function = <2>; /* Alt5 */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&pwm>;
|
|
+ frag1: __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pwm_pins>;
|
|
+ assigned-clock-rates = <100000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pin = <&pwm_pins>,"brcm,pins:0";
|
|
+ func = <&pwm_pins>,"brcm,function:0";
|
|
+ clock = <&frag1>,"assigned-clock-rates:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/qca7000-overlay.dts b/arch/arm/boot/dts/overlays/qca7000-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..f695f36024fa
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/qca7000-overlay.dts
|
|
@@ -0,0 +1,55 @@
|
|
+// Overlay for the Qualcomm Atheros QCA7000 on PLC Stamp micro EVK
|
|
+// Visit: https://in-tech-smartcharging.com/products/evaluation-tools/plc-stamp-micro-2-evaluation-board for details
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ eth1: qca7000@0 {
|
|
+ compatible = "qca,qca7000";
|
|
+ reg = <0>; /* CE0 */
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <ð1_pins>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <23 0x1>; /* rising edge */
|
|
+ spi-max-frequency = <12000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ eth1_pins: eth1_pins {
|
|
+ brcm,pins = <23>;
|
|
+ brcm,function = <0>; /* in */
|
|
+ brcm,pull = <0>; /* none */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ int_pin = <ð1>, "interrupts:0",
|
|
+ <ð1_pins>, "brcm,pins:0";
|
|
+ speed = <ð1>, "spi-max-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/qca7000-uart0-overlay.dts b/arch/arm/boot/dts/overlays/qca7000-uart0-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..5dee70853289
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/qca7000-uart0-overlay.dts
|
|
@@ -0,0 +1,46 @@
|
|
+// Overlay for the Qualcomm Atheros QCA7000 on PLC Stamp micro EVK
|
|
+// Visit: https://in-tech-smartcharging.com/products/evaluation-tools/plc-stamp-micro-2-evaluation-board for details
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart0>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_pins>;
|
|
+ status = "okay";
|
|
+
|
|
+ eth2: qca7000 {
|
|
+ compatible = "qca,qca7000";
|
|
+ current-speed = <115200>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ uart0_pins: uart0_pins {
|
|
+ brcm,pins = <14 15>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "/aliases";
|
|
+ __overlay__ {
|
|
+ serial0 = "/soc/serial@7e201000";
|
|
+ serial1 = "/soc/serial@7e215040";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ baudrate = <ð2>, "current-speed:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ea1d952734e9
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rotary-encoder-overlay.dts
|
|
@@ -0,0 +1,59 @@
|
|
+// Device tree overlay for GPIO connected rotary encoder.
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ rotary_pins: rotary_pins@4 {
|
|
+ brcm,pins = <4 17>; /* gpio 4 17 */
|
|
+ brcm,function = <0 0>; /* input */
|
|
+ brcm,pull = <2 2>; /* pull-up */
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ rotary: rotary@4 {
|
|
+ compatible = "rotary-encoder";
|
|
+ status = "okay";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rotary_pins>;
|
|
+ gpios = <&gpio 4 0>, <&gpio 17 0>;
|
|
+ linux,axis = <0>; /* REL_X */
|
|
+ rotary-encoder,encoding = "gray";
|
|
+ rotary-encoder,steps = <24>; /* 24 default */
|
|
+ rotary-encoder,steps-per-period = <1>; /* corresponds to full period mode. See README */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ pin_a = <&rotary>,"gpios:4",
|
|
+ <&rotary_pins>,"brcm,pins:0",
|
|
+ /* modify reg values to allow multiple instantiation */
|
|
+ <&rotary>,"reg:0",
|
|
+ <&rotary_pins>,"reg:0";
|
|
+ pin_b = <&rotary>,"gpios:16",
|
|
+ <&rotary_pins>,"brcm,pins:4";
|
|
+ relative_axis = <&rotary>,"rotary-encoder,relative-axis?";
|
|
+ linux_axis = <&rotary>,"linux,axis:0";
|
|
+ rollover = <&rotary>,"rotary-encoder,rollover?";
|
|
+ steps-per-period = <&rotary>,"rotary-encoder,steps-per-period:0";
|
|
+ steps = <&rotary>,"rotary-encoder,steps:0";
|
|
+ wakeup = <&rotary>,"wakeup-source?";
|
|
+ encoding = <&rotary>,"rotary-encoder,encoding";
|
|
+ /* legacy parameters*/
|
|
+ rotary0_pin_a = <&rotary>,"gpios:4",
|
|
+ <&rotary_pins>,"brcm,pins:0";
|
|
+ rotary0_pin_b = <&rotary>,"gpios:16",
|
|
+ <&rotary_pins>,"brcm,pins:4";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..cac5e44c6ec5
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rpi-backlight-overlay.dts
|
|
@@ -0,0 +1,21 @@
|
|
+/*
|
|
+ * Devicetree overlay for mailbox-driven Raspberry Pi DSI Display
|
|
+ * backlight controller
|
|
+ */
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ rpi_backlight: rpi_backlight {
|
|
+ compatible = "raspberrypi,rpi-backlight";
|
|
+ firmware = <&firmware>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ed0c2745399f
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts
|
|
@@ -0,0 +1,172 @@
|
|
+// Definitions for the Cirrus Logic Audio Card
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+#include <dt-bindings/pinctrl/bcm2835.h>
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/mfd/arizona.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ wlf_5102_pins: wlf_5102_pins {
|
|
+ brcm,pins = <17 22 27>;
|
|
+ brcm,function = <
|
|
+ BCM2835_FSEL_GPIO_OUT
|
|
+ BCM2835_FSEL_GPIO_OUT
|
|
+ BCM2835_FSEL_GPIO_IN
|
|
+ >;
|
|
+ };
|
|
+ wlf_8804_pins: wlf_8804_pins {
|
|
+ brcm,pins = <8>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spi0_cs_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins = <7>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ rpi_cirrus_reg_1v8: rpi_cirrus_reg_1v8 {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "RPi-Cirrus 1v8";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+ cs-gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
|
|
+
|
|
+ wm5102@0{
|
|
+ compatible = "wlf,wm5102";
|
|
+ reg = <0>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&wlf_5102_pins>;
|
|
+
|
|
+ spi-max-frequency = <500000>;
|
|
+
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <27 8>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <2>;
|
|
+
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+
|
|
+ LDOVDD-supply = <&rpi_cirrus_reg_1v8>;
|
|
+ AVDD-supply = <&rpi_cirrus_reg_1v8>;
|
|
+ DBVDD1-supply = <&rpi_cirrus_reg_1v8>;
|
|
+ DBVDD2-supply = <&vdd_3v3_reg>;
|
|
+ DBVDD3-supply = <&vdd_3v3_reg>;
|
|
+ CPVDD-supply = <&rpi_cirrus_reg_1v8>;
|
|
+ SPKVDDL-supply = <&vdd_5v0_reg>;
|
|
+ SPKVDDR-supply = <&vdd_5v0_reg>;
|
|
+ DCVDD-supply = <&arizona_ldo1>;
|
|
+
|
|
+ reset-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
|
|
+ wlf,ldoena = <&gpio 22 GPIO_ACTIVE_HIGH>;
|
|
+ wlf,gpio-defaults = <
|
|
+ ARIZONA_GP_DEFAULT
|
|
+ ARIZONA_GP_DEFAULT
|
|
+ ARIZONA_GP_DEFAULT
|
|
+ ARIZONA_GP_DEFAULT
|
|
+ ARIZONA_GP_DEFAULT
|
|
+ >;
|
|
+ wlf,micd-configs = <0 1 0>;
|
|
+ wlf,dmic-ref = <
|
|
+ ARIZONA_DMIC_MICVDD
|
|
+ ARIZONA_DMIC_MICBIAS2
|
|
+ ARIZONA_DMIC_MICVDD
|
|
+ ARIZONA_DMIC_MICVDD
|
|
+ >;
|
|
+ wlf,inmode = <
|
|
+ ARIZONA_INMODE_DIFF
|
|
+ ARIZONA_INMODE_DMIC
|
|
+ ARIZONA_INMODE_SE
|
|
+ ARIZONA_INMODE_DIFF
|
|
+ >;
|
|
+ status = "okay";
|
|
+
|
|
+ arizona_ldo1: ldo1 {
|
|
+ regulator-name = "LDO1";
|
|
+ // default constraints as in
|
|
+ // arizona-ldo1.c
|
|
+ regulator-min-microvolt = <1200000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ wm8804@3b {
|
|
+ compatible = "wlf,wm8804";
|
|
+ reg = <0x3b>;
|
|
+ status = "okay";
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&wlf_8804_pins>;
|
|
+
|
|
+ PVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ wlf,reset-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "wlf,rpi-cirrus";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..07a915342702
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rpi-dac-overlay.dts
|
|
@@ -0,0 +1,34 @@
|
|
+// Definitions for RPi DAC
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ pcm1794a-codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "ti,pcm1794a";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "rpi,rpi-dac";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rpi-display-overlay.dts b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..de87432ff2be
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rpi-display-overlay.dts
|
|
@@ -0,0 +1,91 @@
|
|
+/*
|
|
+ * Device Tree overlay for rpi-display by Watterott
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ rpi_display_pins: rpi_display_pins {
|
|
+ brcm,pins = <18 23 24 25>;
|
|
+ brcm,function = <1 1 1 0>; /* out out out in */
|
|
+ brcm,pull = <0 0 0 2>; /* - - - up */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ rpidisplay: rpi-display@0{
|
|
+ compatible = "ilitek,ili9341";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rpi_display_pins>;
|
|
+
|
|
+ spi-max-frequency = <32000000>;
|
|
+ rotate = <270>;
|
|
+ bgr;
|
|
+ fps = <30>;
|
|
+ buswidth = <8>;
|
|
+ reset-gpios = <&gpio 23 1>;
|
|
+ dc-gpios = <&gpio 24 0>;
|
|
+ led-gpios = <&gpio 18 0>;
|
|
+ debug = <0>;
|
|
+ };
|
|
+
|
|
+ rpidisplay_ts: rpi-display-ts@1 {
|
|
+ compatible = "ti,ads7846";
|
|
+ reg = <1>;
|
|
+
|
|
+ spi-max-frequency = <2000000>;
|
|
+ interrupts = <25 2>; /* high-to-low edge triggered */
|
|
+ interrupt-parent = <&gpio>;
|
|
+ pendown-gpio = <&gpio 25 1>;
|
|
+ ti,x-plate-ohms = /bits/ 16 <60>;
|
|
+ ti,pressure-max = /bits/ 16 <255>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ speed = <&rpidisplay>,"spi-max-frequency:0";
|
|
+ rotate = <&rpidisplay>,"rotate:0";
|
|
+ fps = <&rpidisplay>,"fps:0";
|
|
+ debug = <&rpidisplay>,"debug:0";
|
|
+ xohms = <&rpidisplay_ts>,"ti,x-plate-ohms;0";
|
|
+ swapxy = <&rpidisplay_ts>,"ti,swap-xy?";
|
|
+ backlight = <&rpidisplay>,"led-gpios:4",
|
|
+ <&rpi_display_pins>,"brcm,pins:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..8483c4f4b2eb
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rpi-ft5406-overlay.dts
|
|
@@ -0,0 +1,25 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/soc/firmware";
|
|
+ __overlay__ {
|
|
+ ts: touchscreen {
|
|
+ compatible = "raspberrypi,firmware-ts";
|
|
+ touchscreen-size-x = <800>;
|
|
+ touchscreen-size-y = <480>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ touchscreen-size-x = <&ts>,"touchscreen-size-x:0";
|
|
+ touchscreen-size-y = <&ts>,"touchscreen-size-y:0";
|
|
+ touchscreen-inverted-x = <&ts>,"touchscreen-inverted-x?";
|
|
+ touchscreen-inverted-y = <&ts>,"touchscreen-inverted-y?";
|
|
+ touchscreen-swapped-x-y = <&ts>,"touchscreen-swapped-x-y?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..1eeac4854db4
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rpi-poe-overlay.dts
|
|
@@ -0,0 +1,102 @@
|
|
+/*
|
|
+ * Overlay for the Raspberry Pi POE HAT.
|
|
+ */
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&firmware>;
|
|
+ __overlay__ {
|
|
+ fwpwm: pwm {
|
|
+ compatible = "raspberrypi,firmware-poe-pwm";
|
|
+ #pwm-cells = <2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ fan: pwm-fan {
|
|
+ compatible = "pwm-fan";
|
|
+ cooling-levels = <0 1 10 100 255>;
|
|
+ #cooling-cells = <2>;
|
|
+ pwms = <&fwpwm 0 80000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&cpu_thermal>;
|
|
+ __overlay__ {
|
|
+ trips {
|
|
+ trip0: trip0 {
|
|
+ temperature = <40000>;
|
|
+ hysteresis = <2000>;
|
|
+ type = "active";
|
|
+ };
|
|
+ trip1: trip1 {
|
|
+ temperature = <45000>;
|
|
+ hysteresis = <2000>;
|
|
+ type = "active";
|
|
+ };
|
|
+ trip2: trip2 {
|
|
+ temperature = <50000>;
|
|
+ hysteresis = <2000>;
|
|
+ type = "active";
|
|
+ };
|
|
+ trip3: trip3 {
|
|
+ temperature = <55000>;
|
|
+ hysteresis = <5000>;
|
|
+ type = "active";
|
|
+ };
|
|
+ };
|
|
+ cooling-maps {
|
|
+ map0 {
|
|
+ trip = <&trip0>;
|
|
+ cooling-device = <&fan 0 1>;
|
|
+ };
|
|
+ map1 {
|
|
+ trip = <&trip1>;
|
|
+ cooling-device = <&fan 1 2>;
|
|
+ };
|
|
+ map2 {
|
|
+ trip = <&trip2>;
|
|
+ cooling-device = <&fan 2 3>;
|
|
+ };
|
|
+ map3 {
|
|
+ trip = <&trip3>;
|
|
+ cooling-device = <&fan 3 4>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path = "/__overrides__";
|
|
+ __overlay__ {
|
|
+ poe_fan_temp0 = <&trip0>,"temperature:0";
|
|
+ poe_fan_temp0_hyst = <&trip0>,"hysteresis:0";
|
|
+ poe_fan_temp1 = <&trip1>,"temperature:0";
|
|
+ poe_fan_temp1_hyst = <&trip1>,"hysteresis:0";
|
|
+ poe_fan_temp2 = <&trip2>,"temperature:0";
|
|
+ poe_fan_temp2_hyst = <&trip2>,"hysteresis:0";
|
|
+ poe_fan_temp3 = <&trip3>,"temperature:0";
|
|
+ poe_fan_temp3_hyst = <&trip3>,"hysteresis:0";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ poe_fan_temp0 = <&trip0>,"temperature:0";
|
|
+ poe_fan_temp0_hyst = <&trip0>,"hysteresis:0";
|
|
+ poe_fan_temp1 = <&trip1>,"temperature:0";
|
|
+ poe_fan_temp1_hyst = <&trip1>,"hysteresis:0";
|
|
+ poe_fan_temp2 = <&trip2>,"temperature:0";
|
|
+ poe_fan_temp2_hyst = <&trip2>,"hysteresis:0";
|
|
+ poe_fan_temp3 = <&trip3>,"temperature:0";
|
|
+ poe_fan_temp3_hyst = <&trip3>,"hysteresis:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rpi-poe-plus-overlay.dts b/arch/arm/boot/dts/overlays/rpi-poe-plus-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..011f92ad33f3
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rpi-poe-plus-overlay.dts
|
|
@@ -0,0 +1,23 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
|
+// Overlay for the Raspberry Pi PoE+ HAT.
|
|
+
|
|
+#include "rpi-poe-overlay.dts"
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@10 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ rpi_poe_power_supply: rpi-poe-power-supply {
|
|
+ compatible = "raspberrypi,rpi-poe-power-supply";
|
|
+ firmware = <&firmware>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&fan {
|
|
+ cooling-levels = <0 32 64 128 255>;
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..9cda044a0f62
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rpi-proto-overlay.dts
|
|
@@ -0,0 +1,39 @@
|
|
+// Definitions for Rpi-Proto
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ wm8731@1a {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "wlf,wm8731";
|
|
+ reg = <0x1a>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "rpi,rpi-proto";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..89d8d2ea6b2e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rpi-sense-overlay.dts
|
|
@@ -0,0 +1,47 @@
|
|
+// rpi-sense HAT
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ rpi-sense@46 {
|
|
+ compatible = "rpi,rpi-sense";
|
|
+ reg = <0x46>;
|
|
+ keys-int-gpios = <&gpio 23 1>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ lsm9ds1-magn@1c {
|
|
+ compatible = "st,lsm9ds1-magn";
|
|
+ reg = <0x1c>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ lsm9ds1-accel6a {
|
|
+ compatible = "st,lsm9ds1-accel";
|
|
+ reg = <0x6a>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ lps25h-press@5c {
|
|
+ compatible = "st,lps25h-press";
|
|
+ reg = <0x5c>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ hts221-humid@5f {
|
|
+ compatible = "st,hts221-humid", "st,hts221";
|
|
+ reg = <0x5f>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..3c97a545d820
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rpi-tv-overlay.dts
|
|
@@ -0,0 +1,34 @@
|
|
+// rpi-tv HAT
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ cxd2880@0 {
|
|
+ compatible = "sony,cxd2880";
|
|
+ reg = <0>; /* CE0 */
|
|
+ spi-max-frequency = <50000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rpivid-v4l2-overlay.dts b/arch/arm/boot/dts/overlays/rpivid-v4l2-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..bdd1c0e5a915
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rpivid-v4l2-overlay.dts
|
|
@@ -0,0 +1,50 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for Raspberry Pi video decode engine
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&scb>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <2>;
|
|
+
|
|
+ codec@7eb10000 {
|
|
+ compatible = "raspberrypi,rpivid-vid-decoder";
|
|
+ reg = <0x0 0x7eb10000 0x0 0x1000>, /* INTC */
|
|
+ <0x0 0x7eb00000 0x0 0x10000>; /* HEVC */
|
|
+ reg-names = "intc",
|
|
+ "hevc";
|
|
+
|
|
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ clocks = <&firmware_clocks 11>;
|
|
+ clock-names = "hevc";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&scb>;
|
|
+ __overlay__ {
|
|
+ hevc-decoder@7eb00000 {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ rpivid-local-intc@7eb10000 {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ h264-decoder@7eb20000 {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ vp9-decoder@7eb30000 {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..87e9a326eff1
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/rra-digidac1-wm8741-audio-overlay.dts
|
|
@@ -0,0 +1,49 @@
|
|
+// Definitions for RRA DigiDAC1 Audio card
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ wm8804@3b {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "wlf,wm8804";
|
|
+ reg = <0x3b>;
|
|
+ status = "okay";
|
|
+ PVDD-supply = <&vdd_3v3_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ };
|
|
+
|
|
+ wm8742: wm8741@1a {
|
|
+ compatible = "wlf,wm8741";
|
|
+ reg = <0x1a>;
|
|
+ status = "okay";
|
|
+ AVDD-supply = <&vdd_5v0_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "rra,digidac1-soundcard";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/sainsmart18-overlay.dts b/arch/arm/boot/dts/overlays/sainsmart18-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..c51f1c030a55
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/sainsmart18-overlay.dts
|
|
@@ -0,0 +1,52 @@
|
|
+/*
|
|
+ * Device Tree overlay for the Sainsmart 1.8" TFT LCD with ST7735R chip 160x128
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ ss18: sainsmart18@0 {
|
|
+ compatible = "fbtft,sainsmart18";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ spi-max-frequency = <40000000>;
|
|
+ rotate = <90>;
|
|
+ buswidth = <8>;
|
|
+ fps = <50>;
|
|
+ height = <160>;
|
|
+ width = <128>;
|
|
+ reset-gpios = <&gpio 25 1>;
|
|
+ dc-gpios = <&gpio 24 0>;
|
|
+ debug = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ speed = <&ss18>,"spi-max-frequency:0";
|
|
+ rotate = <&ss18>,"rotate:0";
|
|
+ fps = <&ss18>,"fps:0";
|
|
+ bgr = <&ss18>,"bgr?";
|
|
+ debug = <&ss18>,"debug:0";
|
|
+ dc_pin = <&ss18>,"dc-gpios:4";
|
|
+ reset_pin = <&ss18>,"reset-gpios:4";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..04d74d62897b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
|
|
@@ -0,0 +1,43 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_arm>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ sc16is750: sc16is750@48 {
|
|
+ compatible = "nxp,sc16is750";
|
|
+ reg = <0x48>; /* i2c address */
|
|
+ clocks = <&sc16is750_clk>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ i2c-max-frequency = <400000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ sc16is750_clk: sc16is750_i2c_clk@48 {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <14745600>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ int_pin = <&sc16is750>,"interrupts:0";
|
|
+ addr = <&sc16is750>,"reg:0", <&sc16is750_clk>,"name";
|
|
+ xtal = <&sc16is750_clk>,"clock-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..da05e981314c
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
|
|
@@ -0,0 +1,43 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_arm>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ sc16is752: sc16is752@48 {
|
|
+ compatible = "nxp,sc16is752";
|
|
+ reg = <0x48>; /* i2c address */
|
|
+ clocks = <&sc16is752_clk>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ i2c-max-frequency = <400000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ sc16is752_clk: sc16is752_i2c_clk@48 {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <14745600>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ int_pin = <&sc16is752>,"interrupts:0";
|
|
+ addr = <&sc16is752>,"reg:0",<&sc16is752_clk>,"name";
|
|
+ xtal = <&sc16is752_clk>,"clock-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts b/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..a49a04722b99
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
|
|
@@ -0,0 +1,49 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ sc16is752: sc16is752@0 {
|
|
+ compatible = "nxp,sc16is752";
|
|
+ reg = <0>; /* CE0 */
|
|
+ clocks = <&sc16is752_clk>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ spi-max-frequency = <4000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ sc16is752_clk: sc16is752_spi0_0_clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <14745600>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ int_pin = <&sc16is752>,"interrupts:0";
|
|
+ xtal = <&sc16is752_clk>,"clock-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..730c6e8cd614
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
|
|
@@ -0,0 +1,67 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ spi1_pins: spi1_pins {
|
|
+ brcm,pins = <19 20 21>;
|
|
+ brcm,function = <3>; /* alt4 */
|
|
+ };
|
|
+
|
|
+ spi1_cs_pins: spi1_cs_pins {
|
|
+ brcm,pins = <18>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
|
|
+ cs-gpios = <&gpio 18 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ sc16is752: sc16is752@0 {
|
|
+ compatible = "nxp,sc16is752";
|
|
+ reg = <0>; /* CE0 */
|
|
+ clocks = <&sc16is752_clk>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ spi-max-frequency = <4000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ sc16is752_clk: sc16is752_spi1_0_clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <14745600>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ int_pin = <&sc16is752>,"interrupts:0";
|
|
+ xtal = <&sc16is752_clk>,"clock-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/sdhost-overlay.dts b/arch/arm/boot/dts/overlays/sdhost-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..0b72b4eeac88
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/sdhost-overlay.dts
|
|
@@ -0,0 +1,38 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/* Provide backwards compatible aliases for the old sdhost dtparams. */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&sdhost>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,overclock-50 = <0>;
|
|
+ brcm,pio-limit = <1>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&mmc>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&mmcnr>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ overclock_50 = <&frag0>,"brcm,overclock-50:0";
|
|
+ force_pio = <&frag0>,"brcm,force-pio?";
|
|
+ pio_limit = <&frag0>,"brcm,pio-limit:0";
|
|
+ debug = <&frag0>,"brcm,debug?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/sdio-overlay.dts b/arch/arm/boot/dts/overlays/sdio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..873e49056379
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/sdio-overlay.dts
|
|
@@ -0,0 +1,77 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/* Enable SDIO from MMC interface via various GPIO groups */
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&mmcnr>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&mmc>;
|
|
+ sdio_ovl: __overlay__ {
|
|
+ pinctrl-0 = <&sdio_ovl_pins>;
|
|
+ pinctrl-names = "default";
|
|
+ non-removable;
|
|
+ bus-width = <4>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ sdio_ovl_pins: sdio_ovl_pins {
|
|
+ brcm,pins = <22 23 24 25 26 27>;
|
|
+ brcm,function = <7>; /* ALT3 = SD1 */
|
|
+ brcm,pull = <0 2 2 2 2 2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sdio_ovl_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <22 23 24 25>;
|
|
+ brcm,pull = <0 2 2 2>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&sdio_ovl_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <34 35 36 37>;
|
|
+ brcm,pull = <0 2 2 2>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&sdio_ovl_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <34 35 36 37 38 39>;
|
|
+ brcm,pull = <0 2 2 2 2 2>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target-path = "/aliases";
|
|
+ __overlay__ {
|
|
+ mmc1 = "/soc/mmc@7e300000";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ poll_once = <&sdio_ovl>,"non-removable?";
|
|
+ bus_width = <&sdio_ovl>,"bus-width:0";
|
|
+ sdio_overclock = <&sdio_ovl>,"brcm,overclock-50:0";
|
|
+ gpios_22_25 = <0>,"=3";
|
|
+ gpios_34_37 = <0>,"=4";
|
|
+ gpios_34_39 = <0>,"=5";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v1-overlay.dts b/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v1-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..210d027a073e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v1-overlay.dts
|
|
@@ -0,0 +1,138 @@
|
|
+// redo: ovmerge -c spi1-1cs-overlay.dts,cs0_pin=18,cs0_spidev=false mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi1-0,interrupt=24
|
|
+
|
|
+// Device tree overlay for https://www.seeedstudio.com/2-Channel-CAN-BUS-FD-Shield-for-Raspberry-Pi-p-4072.html
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/interrupt-controller/irq.h>
|
|
+#include <dt-bindings/pinctrl/bcm2835.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ spi1_pins: spi1_pins {
|
|
+ brcm,pins = <19 20 21>;
|
|
+ brcm,function = <3>;
|
|
+ };
|
|
+ spi1_cs_pins: spi1_cs_pins {
|
|
+ brcm,pins = <18>;
|
|
+ brcm,function = <1>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@1 {
|
|
+ target = <&spi1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
|
|
+ cs-gpios = <&gpio 18 1>;
|
|
+ status = "okay";
|
|
+ spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@3 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ fragment@4 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ mcp251xfd_pins: mcp251xfd_spi0_0_pins {
|
|
+ brcm,pins = <25>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_IN>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@5 {
|
|
+ target-path = "/clocks";
|
|
+ __overlay__ {
|
|
+ clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <40000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@6 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp251xfd@0 {
|
|
+ compatible = "microchip,mcp251xfd";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&mcp251xfd_pins>;
|
|
+ spi-max-frequency = <20000000>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
|
|
+ clocks = <&clk_mcp251xfd_osc>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@7 {
|
|
+ target-path = "spi1/spidev@0";
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ fragment@8 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ mcp251xfd_pins_1: mcp251xfd_spi1_0_pins {
|
|
+ brcm,pins = <24>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_IN>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@9 {
|
|
+ target-path = "/clocks";
|
|
+ __overlay__ {
|
|
+ clk_mcp251xfd_osc_1: mcp251xfd-spi1-0-osc {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <40000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@10 {
|
|
+ target = <&spi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp251xfd@0 {
|
|
+ compatible = "microchip,mcp251xfd";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&mcp251xfd_pins_1>;
|
|
+ spi-max-frequency = <20000000>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
|
|
+ clocks = <&clk_mcp251xfd_osc_1>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v2-overlay.dts b/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v2-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e843d0b19745
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v2-overlay.dts
|
|
@@ -0,0 +1,117 @@
|
|
+// redo: ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi0-1,interrupt=24 i2c-rtc-overlay.dts,pcf85063
|
|
+
|
|
+// Device tree overlay for https://www.seeedstudio.com/CAN-BUS-FD-HAT-for-Raspberry-Pi-p-4742.html
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/interrupt-controller/irq.h>
|
|
+#include <dt-bindings/pinctrl/bcm2835.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ mcp251xfd_pins: mcp251xfd_spi0_0_pins {
|
|
+ brcm,pins = <25>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_IN>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@2 {
|
|
+ target-path = "/clocks";
|
|
+ __overlay__ {
|
|
+ clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <40000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@3 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp251xfd@0 {
|
|
+ compatible = "microchip,mcp251xfd";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&mcp251xfd_pins>;
|
|
+ spi-max-frequency = <20000000>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
|
|
+ clocks = <&clk_mcp251xfd_osc>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@4 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ fragment@5 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ mcp251xfd_pins_1: mcp251xfd_spi0_1_pins {
|
|
+ brcm,pins = <24>;
|
|
+ brcm,function = <BCM2835_FSEL_GPIO_IN>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@6 {
|
|
+ target-path = "/clocks";
|
|
+ __overlay__ {
|
|
+ clk_mcp251xfd_osc_1: mcp251xfd-spi0-1-osc {
|
|
+ #clock-cells = <0>;
|
|
+ compatible = "fixed-clock";
|
|
+ clock-frequency = <40000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@7 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ mcp251xfd@1 {
|
|
+ compatible = "microchip,mcp251xfd";
|
|
+ reg = <1>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&mcp251xfd_pins_1>;
|
|
+ spi-max-frequency = <20000000>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
|
|
+ clocks = <&clk_mcp251xfd_osc_1>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@8 {
|
|
+ target = <&i2cbus>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pcf85063@51 {
|
|
+ compatible = "nxp,pcf85063";
|
|
+ reg = <0x51>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@9 {
|
|
+ target = <&i2c_arm>;
|
|
+ i2cbus: __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts b/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..57a0cc9b1741
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
|
|
@@ -0,0 +1,84 @@
|
|
+/*
|
|
+ * Device Tree overlay for SH1106 based SPI OLED display
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ sh1106_pins: sh1106_pins {
|
|
+ brcm,pins = <25 24>;
|
|
+ brcm,function = <1 1>; /* out out */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sh1106: sh1106@0{
|
|
+ compatible = "sinowealth,sh1106";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sh1106_pins>;
|
|
+
|
|
+ spi-max-frequency = <4000000>;
|
|
+ bgr = <0>;
|
|
+ bpp = <1>;
|
|
+ rotate = <0>;
|
|
+ fps = <25>;
|
|
+ buswidth = <8>;
|
|
+ reset-gpios = <&gpio 25 1>;
|
|
+ dc-gpios = <&gpio 24 0>;
|
|
+ debug = <0>;
|
|
+
|
|
+ sinowealth,height = <64>;
|
|
+ sinowealth,width = <128>;
|
|
+ sinowealth,page-offset = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ speed = <&sh1106>,"spi-max-frequency:0";
|
|
+ rotate = <&sh1106>,"rotate:0";
|
|
+ fps = <&sh1106>,"fps:0";
|
|
+ debug = <&sh1106>,"debug:0";
|
|
+ dc_pin = <&sh1106>,"dc-gpios:4",
|
|
+ <&sh1106_pins>,"brcm,pins:4";
|
|
+ reset_pin = <&sh1106>,"reset-gpios:4",
|
|
+ <&sh1106_pins>,"brcm,pins:0";
|
|
+ height = <&sh1106>,"sinowealth,height:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/si446x-spi0-overlay.dts b/arch/arm/boot/dts/overlays/si446x-spi0-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..90495f0941fb
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/si446x-spi0-overlay.dts
|
|
@@ -0,0 +1,53 @@
|
|
+// Overlay for the SiLabs Si446X Controller - SPI0
|
|
+// Default Interrupt Pin: 17
|
|
+// Default SDN Pin: 27
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+ / {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ // needed to avoid dtc warning
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ uhf0: si446x@0{
|
|
+ compatible = "silabs,si446x";
|
|
+ reg = <0>; // CE0
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uhf0_pins>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <17 0x2>; // falling edge
|
|
+ spi-max-frequency = <4000000>;
|
|
+ sdn_pin = <27>;
|
|
+ irq_pin = <17>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ uhf0_pins: uhf0_pins {
|
|
+ brcm,pins = <17 27>;
|
|
+ brcm,function = <0 1>; // in, out
|
|
+ brcm,pull = <2 0>; // high, none
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ int_pin = <&uhf0>, "interrupts:0",
|
|
+ <&uhf0>, "irq_pin:0",
|
|
+ <&uhf0_pins>, "brcm,pins:0";
|
|
+ reset_pin = <&uhf0>, "sdn_pin:0",
|
|
+ <&uhf0_pins>, "brcm,pins:4";
|
|
+ speed = <&uhf0>, "spi-max-frequency:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/smi-dev-overlay.dts b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..bafab6c92506
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts
|
|
@@ -0,0 +1,20 @@
|
|
+// Description: Overlay to enable character device interface for SMI.
|
|
+// Author: Luke Wren <luke@raspberrypi.org>
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&soc>;
|
|
+ __overlay__ {
|
|
+ smi_dev {
|
|
+ compatible = "brcm,bcm2835-smi-dev";
|
|
+ smi_handle = <&smi>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/smi-nand-overlay.dts b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ae1e50329d66
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/smi-nand-overlay.dts
|
|
@@ -0,0 +1,66 @@
|
|
+// Description: Overlay to enable NAND flash through
|
|
+// the secondary memory interface
|
|
+// Author: Luke Wren
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&smi>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&smi_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&soc>;
|
|
+ __overlay__ {
|
|
+ nand: flash@0 {
|
|
+ compatible = "brcm,bcm2835-smi-nand";
|
|
+ smi_handle = <&smi>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ status = "okay";
|
|
+
|
|
+ partition@0 {
|
|
+ label = "stage2";
|
|
+ // 128k
|
|
+ reg = <0 0x20000>;
|
|
+ read-only;
|
|
+ };
|
|
+ partition@1 {
|
|
+ label = "firmware";
|
|
+ // 16M
|
|
+ reg = <0x20000 0x1000000>;
|
|
+ read-only;
|
|
+ };
|
|
+ partition@2 {
|
|
+ label = "root";
|
|
+ // 2G (will need to use 64 bit for >=4G)
|
|
+ reg = <0x1020000 0x80000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ smi_pins: smi_pins {
|
|
+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
|
|
+ 12 13 14 15>;
|
|
+ /* Alt 1: SMI */
|
|
+ brcm,function = <5 5 5 5 5 5 5 5 5 5 5
|
|
+ 5 5 5 5 5>;
|
|
+ /* /CS, /WE and /OE are pulled high, as they are
|
|
+ generally active low signals */
|
|
+ brcm,pull = <2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/smi-overlay.dts b/arch/arm/boot/dts/overlays/smi-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..bb8c7830df23
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/smi-overlay.dts
|
|
@@ -0,0 +1,37 @@
|
|
+// Description: Overlay to enable the secondary memory interface peripheral
|
|
+// Author: Luke Wren
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&smi>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&smi_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ smi_pins: smi_pins {
|
|
+ /* Don't configure the top two address bits, as
|
|
+ these are already used as ID_SD and ID_SC */
|
|
+ brcm,pins = <2 3 4 5 6 7 8 9 10 11 12 13 14 15
|
|
+ 16 17 18 19 20 21 22 23 24 25>;
|
|
+ /* Alt 1: SMI */
|
|
+ brcm,function = <5 5 5 5 5 5 5 5 5 5 5 5 5 5 5
|
|
+ 5 5 5 5 5 5 5 5 5>;
|
|
+ /* /CS, /WE and /OE are pulled high, as they are
|
|
+ generally active low signals */
|
|
+ brcm,pull = <2 2 2 2 2 2 0 0 0 0 0 0 0 0 0 0 0
|
|
+ 0 0 0 0 0 0 0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..a132b8637c31
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi-gpio35-39-overlay.dts
|
|
@@ -0,0 +1,31 @@
|
|
+/*
|
|
+ * Device tree overlay to move spi0 to gpio 35 to 39 on CM
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ cs-gpios = <&gpio 36 1>, <&gpio 35 1>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi0_cs_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins = <36 35>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spi0_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins = <37 38 39>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts b/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..9ebcaf1b5ea0
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi-gpio40-45-overlay.dts
|
|
@@ -0,0 +1,36 @@
|
|
+/*
|
|
+ * Boot EEPROM overlay
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi0_cs_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins = <45 44 43>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spi0_pins>;
|
|
+ __overlay__ {
|
|
+ brcm,pins = <40 41 42>;
|
|
+ brcm,function = <3>; /* alt4 */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..51b7fec281c0
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi-rtc-overlay.dts
|
|
@@ -0,0 +1,75 @@
|
|
+// Definitions for several SPI-based Real Time Clocks
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&rtc>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,ds3232";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&rtc>;
|
|
+ __dormant__ {
|
|
+ compatible = "maxim,ds3234";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&rtc>;
|
|
+ __dormant__ {
|
|
+ compatible = "nxp,rtc-pcf2123";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spidev: fragment@100 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ frag101: fragment@101 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ rtc: rtc@0 {
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <5000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ spi0_0 = <&spidev>, "target:0=",<&spidev0>,
|
|
+ <&frag101>, "target:0=",<&spi0>,
|
|
+ <&rtc>, "reg:0=0";
|
|
+ spi0_1 = <&spidev>, "target:0=",<&spidev1>,
|
|
+ <&frag101>, "target:0=",<&spi0>,
|
|
+ <&rtc>, "reg:0=1";
|
|
+ spi1_0 = <0>,"-100",
|
|
+ <&frag101>, "target:0=",<&spi1>,
|
|
+ <&rtc>, "reg:0=0";
|
|
+ spi1_1 = <0>,"-100",
|
|
+ <&frag101>, "target:0=",<&spi1>,
|
|
+ <&rtc>, "reg:0=1";
|
|
+ spi2_0 = <0>,"-100",
|
|
+ <&frag101>, "target:0=",<&spi2>,
|
|
+ <&rtc>, "reg:0=0";
|
|
+ spi2_1 = <0>,"-100",
|
|
+ <&frag101>, "target:0=",<&spi2>,
|
|
+ <&rtc>, "reg:0=1";
|
|
+ cs_high = <&rtc>, "spi-cs-high?";
|
|
+
|
|
+ ds3232 = <0>,"+0";
|
|
+ ds3234 = <0>,"+1";
|
|
+ pcf2123 = <0>,"+2";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi0-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi0-1cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e6eb66e2076a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi0-1cs-overlay.dts
|
|
@@ -0,0 +1,42 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0_cs_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,pins = <8>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi0>;
|
|
+ frag1: __overlay__ {
|
|
+ cs-gpios = <&gpio 8 1>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&spi0_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <10 11>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ no_miso = <0>,"=3";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi0-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi0-2cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..df6519537c3a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi0-2cs-overlay.dts
|
|
@@ -0,0 +1,37 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0_cs_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,pins = <8 7>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi0>;
|
|
+ frag1: __overlay__ {
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spi0_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <10 11>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&frag0>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ no_miso = <0>,"=2";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ea2794bc5fd5
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi1-1cs-overlay.dts
|
|
@@ -0,0 +1,57 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ spi1_pins: spi1_pins {
|
|
+ brcm,pins = <19 20 21>;
|
|
+ brcm,function = <3>; /* alt4 */
|
|
+ };
|
|
+
|
|
+ spi1_cs_pins: spi1_cs_pins {
|
|
+ brcm,pins = <18>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi1>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
|
|
+ cs-gpios = <&gpio 18 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev1_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs0_spidev = <&spidev1_0>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..dab34ee79ae2
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi1-2cs-overlay.dts
|
|
@@ -0,0 +1,69 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ spi1_pins: spi1_pins {
|
|
+ brcm,pins = <19 20 21>;
|
|
+ brcm,function = <3>; /* alt4 */
|
|
+ };
|
|
+
|
|
+ spi1_cs_pins: spi1_cs_pins {
|
|
+ brcm,pins = <18 17>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi1>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
|
|
+ cs-gpios = <&gpio 18 1>, <&gpio 17 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev1_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev1_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs0_spidev = <&spidev1_0>,"status";
|
|
+ cs1_spidev = <&spidev1_1>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..bc7e7d04324b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi1-3cs-overlay.dts
|
|
@@ -0,0 +1,81 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ spi1_pins: spi1_pins {
|
|
+ brcm,pins = <19 20 21>;
|
|
+ brcm,function = <3>; /* alt4 */
|
|
+ };
|
|
+
|
|
+ spi1_cs_pins: spi1_cs_pins {
|
|
+ brcm,pins = <18 17 16>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi1>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
|
|
+ cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev1_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev1_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev1_2: spidev@2 {
|
|
+ compatible = "spidev";
|
|
+ reg = <2>; /* CE2 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&spi1_cs_pins>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&spi1_cs_pins>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs2_pin = <&spi1_cs_pins>,"brcm,pins:8",
|
|
+ <&frag1>,"cs-gpios:28";
|
|
+ cs0_spidev = <&spidev1_0>,"status";
|
|
+ cs1_spidev = <&spidev1_1>,"status";
|
|
+ cs2_spidev = <&spidev1_2>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..2a29750462af
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi2-1cs-overlay.dts
|
|
@@ -0,0 +1,57 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ spi2_pins: spi2_pins {
|
|
+ brcm,pins = <40 41 42>;
|
|
+ brcm,function = <3>; /* alt4 */
|
|
+ };
|
|
+
|
|
+ spi2_cs_pins: spi2_cs_pins {
|
|
+ brcm,pins = <43>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi2>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
|
|
+ cs-gpios = <&gpio 43 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev2_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs0_spidev = <&spidev2_0>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..642678fc9ddd
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi2-2cs-overlay.dts
|
|
@@ -0,0 +1,69 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ spi2_pins: spi2_pins {
|
|
+ brcm,pins = <40 41 42>;
|
|
+ brcm,function = <3>; /* alt4 */
|
|
+ };
|
|
+
|
|
+ spi2_cs_pins: spi2_cs_pins {
|
|
+ brcm,pins = <43 44>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi2>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
|
|
+ cs-gpios = <&gpio 43 1>, <&gpio 44 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev2_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev2_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs0_spidev = <&spidev2_0>,"status";
|
|
+ cs1_spidev = <&spidev2_1>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..28d40c6c3c37
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi2-3cs-overlay.dts
|
|
@@ -0,0 +1,81 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ spi2_pins: spi2_pins {
|
|
+ brcm,pins = <40 41 42>;
|
|
+ brcm,function = <3>; /* alt4 */
|
|
+ };
|
|
+
|
|
+ spi2_cs_pins: spi2_cs_pins {
|
|
+ brcm,pins = <43 44 45>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi2>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi2_pins &spi2_cs_pins>;
|
|
+ cs-gpios = <&gpio 43 1>, <&gpio 44 1>, <&gpio 45 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev2_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev2_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev2_2: spidev@2 {
|
|
+ compatible = "spidev";
|
|
+ reg = <2>; /* CE2 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&aux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&spi2_cs_pins>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&spi2_cs_pins>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs2_pin = <&spi2_cs_pins>,"brcm,pins:8",
|
|
+ <&frag1>,"cs-gpios:28";
|
|
+ cs0_spidev = <&spidev2_0>,"status";
|
|
+ cs1_spidev = <&spidev2_1>,"status";
|
|
+ cs2_spidev = <&spidev2_2>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..335af8637051
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi3-1cs-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi3_cs_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,pins = <0>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi3>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
|
|
+ cs-gpios = <&gpio 0 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev3_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs0_spidev = <&spidev3_0>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ce65da27f767
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi3-2cs-overlay.dts
|
|
@@ -0,0 +1,56 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi3_cs_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,pins = <0 24>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi3>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi3_pins &spi3_cs_pins>;
|
|
+ cs-gpios = <&gpio 0 1>, <&gpio 24 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev3_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev3_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&frag0>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs0_spidev = <&spidev3_0>,"status";
|
|
+ cs1_spidev = <&spidev3_1>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..85d70b40352b
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi4-1cs-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi4_cs_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,pins = <4>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi4>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
|
|
+ cs-gpios = <&gpio 4 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev4_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs0_spidev = <&spidev4_0>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..8bc2215a6a7e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi4-2cs-overlay.dts
|
|
@@ -0,0 +1,56 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi4_cs_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,pins = <4 25>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi4>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi4_pins &spi4_cs_pins>;
|
|
+ cs-gpios = <&gpio 4 1>, <&gpio 25 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev4_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev4_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&frag0>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs0_spidev = <&spidev4_0>,"status";
|
|
+ cs1_spidev = <&spidev4_1>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..c0f8cb8510ee
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi5-1cs-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi5_cs_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,pins = <12>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi5>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
|
|
+ cs-gpios = <&gpio 12 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev5_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs0_spidev = <&spidev5_0>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..7758b9c00b4e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi5-2cs-overlay.dts
|
|
@@ -0,0 +1,56 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi5_cs_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,pins = <12 26>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi5>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi5_pins &spi5_cs_pins>;
|
|
+ cs-gpios = <&gpio 12 1>, <&gpio 26 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev5_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev5_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&frag0>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs0_spidev = <&spidev5_0>,"status";
|
|
+ cs1_spidev = <&spidev5_1>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts b/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..8c8a953eca01
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi6-1cs-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi6_cs_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,pins = <18>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi6>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
|
|
+ cs-gpios = <&gpio 18 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev6_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs0_spidev = <&spidev6_0>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts b/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..2ff897f21aed
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/spi6-2cs-overlay.dts
|
|
@@ -0,0 +1,56 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi6_cs_pins>;
|
|
+ frag0: __overlay__ {
|
|
+ brcm,pins = <18 27>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spi6>;
|
|
+ frag1: __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi6_pins &spi6_cs_pins>;
|
|
+ cs-gpios = <&gpio 18 1>, <&gpio 27 1>;
|
|
+ status = "okay";
|
|
+
|
|
+ spidev6_0: spidev@0 {
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ spidev6_1: spidev@1 {
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <125000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ cs0_pin = <&frag0>,"brcm,pins:0",
|
|
+ <&frag1>,"cs-gpios:4";
|
|
+ cs1_pin = <&frag0>,"brcm,pins:4",
|
|
+ <&frag1>,"cs-gpios:16";
|
|
+ cs0_spidev = <&spidev6_0>,"status";
|
|
+ cs1_spidev = <&spidev6_1>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ssd1306-overlay.dts b/arch/arm/boot/dts/overlays/ssd1306-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..84cf10e489d3
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ssd1306-overlay.dts
|
|
@@ -0,0 +1,36 @@
|
|
+// Overlay for SSD1306 128x64 and 128x32 OLED displays
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ssd1306: oled@3c{
|
|
+ compatible = "solomon,ssd1306fb-i2c";
|
|
+ reg = <0x3c>;
|
|
+ solomon,width = <128>;
|
|
+ solomon,height = <64>;
|
|
+ solomon,page-offset = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ address = <&ssd1306>,"reg:0";
|
|
+ width = <&ssd1306>,"solomon,width:0";
|
|
+ height = <&ssd1306>,"solomon,height:0";
|
|
+ offset = <&ssd1306>,"solomon,page-offset:0";
|
|
+ normal = <&ssd1306>,"solomon,segment-no-remap?";
|
|
+ sequential = <&ssd1306>,"solomon,com-seq?";
|
|
+ remapped = <&ssd1306>,"solomon,com-lrremap?";
|
|
+ inverted = <&ssd1306>,"solomon,com-invdir?";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts b/arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ffc90c7cecf6
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts
|
|
@@ -0,0 +1,84 @@
|
|
+/*
|
|
+ * Device Tree overlay for SSD1306 based SPI OLED display
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ ssd1306_pins: ssd1306_pins {
|
|
+ brcm,pins = <25 24>;
|
|
+ brcm,function = <1 1>; /* out out */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ssd1306: ssd1306@0{
|
|
+ compatible = "solomon,ssd1306";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&ssd1306_pins>;
|
|
+
|
|
+ spi-max-frequency = <10000000>;
|
|
+ bgr = <0>;
|
|
+ bpp = <1>;
|
|
+ rotate = <0>;
|
|
+ fps = <25>;
|
|
+ buswidth = <8>;
|
|
+ reset-gpios = <&gpio 25 1>;
|
|
+ dc-gpios = <&gpio 24 0>;
|
|
+ debug = <0>;
|
|
+
|
|
+ solomon,height = <64>;
|
|
+ solomon,width = <128>;
|
|
+ solomon,page-offset = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ speed = <&ssd1306>,"spi-max-frequency:0";
|
|
+ rotate = <&ssd1306>,"rotate:0";
|
|
+ fps = <&ssd1306>,"fps:0";
|
|
+ debug = <&ssd1306>,"debug:0";
|
|
+ dc_pin = <&ssd1306>,"dc-gpios:4",
|
|
+ <&ssd1306_pins>,"brcm,pins:4";
|
|
+ reset_pin = <&ssd1306>,"reset-gpios:4",
|
|
+ <&ssd1306_pins>,"brcm,pins:0";
|
|
+ height = <&ssd1306>,"solomon,height:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ssd1331-spi-overlay.dts b/arch/arm/boot/dts/overlays/ssd1331-spi-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..9fd5ebf2feda
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ssd1331-spi-overlay.dts
|
|
@@ -0,0 +1,83 @@
|
|
+/*
|
|
+ * Device Tree overlay for SSD1331 based SPI OLED display
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ ssd1331_pins: ssd1331_pins {
|
|
+ brcm,pins = <25 24>;
|
|
+ brcm,function = <1 1>; /* out out */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ssd1331: ssd1331@0{
|
|
+ compatible = "solomon,ssd1331";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&ssd1331_pins>;
|
|
+
|
|
+ spi-max-frequency = <4500000>;
|
|
+ bgr = <0>;
|
|
+ bpp = <16>;
|
|
+ rotate = <0>;
|
|
+ fps = <25>;
|
|
+ buswidth = <8>;
|
|
+ reset-gpios = <&gpio 25 1>;
|
|
+ dc-gpios = <&gpio 24 0>;
|
|
+ debug = <0>;
|
|
+
|
|
+ solomon,height = <64>;
|
|
+ solomon,width = <96>;
|
|
+ solomon,page-offset = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ speed = <&ssd1331>,"spi-max-frequency:0";
|
|
+ rotate = <&ssd1331>,"rotate:0";
|
|
+ fps = <&ssd1331>,"fps:0";
|
|
+ debug = <&ssd1331>,"debug:0";
|
|
+ dc_pin = <&ssd1331>,"dc-gpios:4",
|
|
+ <&ssd1331_pins>,"brcm,pins:4";
|
|
+ reset_pin = <&ssd1331>,"reset-gpios:4",
|
|
+ <&ssd1331_pins>,"brcm,pins:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts b/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ffc872c60648
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
|
|
@@ -0,0 +1,83 @@
|
|
+/*
|
|
+ * Device Tree overlay for SSD1351 based SPI OLED display
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ ssd1351_pins: ssd1351_pins {
|
|
+ brcm,pins = <25 24>;
|
|
+ brcm,function = <1 1>; /* out out */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ ssd1351: ssd1351@0{
|
|
+ compatible = "solomon,ssd1351";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&ssd1351_pins>;
|
|
+
|
|
+ spi-max-frequency = <4500000>;
|
|
+ bgr = <0>;
|
|
+ bpp = <16>;
|
|
+ rotate = <0>;
|
|
+ fps = <25>;
|
|
+ buswidth = <8>;
|
|
+ reset-gpios = <&gpio 25 1>;
|
|
+ dc-gpios = <&gpio 24 0>;
|
|
+ debug = <0>;
|
|
+
|
|
+ solomon,height = <128>;
|
|
+ solomon,width = <128>;
|
|
+ solomon,page-offset = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ speed = <&ssd1351>,"spi-max-frequency:0";
|
|
+ rotate = <&ssd1351>,"rotate:0";
|
|
+ fps = <&ssd1351>,"fps:0";
|
|
+ debug = <&ssd1351>,"debug:0";
|
|
+ dc_pin = <&ssd1351>,"dc-gpios:4",
|
|
+ <&ssd1351_pins>,"brcm,pins:4";
|
|
+ reset_pin = <&ssd1351>,"reset-gpios:4",
|
|
+ <&ssd1351_pins>,"brcm,pins:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
|
|
new file mode 100755
|
|
index 000000000000..bad61535981e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/superaudioboard-overlay.dts
|
|
@@ -0,0 +1,73 @@
|
|
+// Definitions for SuperAudioBoard
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&sound>;
|
|
+ __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+
|
|
+ simple-audio-card,name = "SuperAudioBoard";
|
|
+
|
|
+ simple-audio-card,widgets =
|
|
+ "Line", "Line In",
|
|
+ "Line", "Line Out";
|
|
+
|
|
+ simple-audio-card,routing =
|
|
+ "Line Out","AOUTA+",
|
|
+ "Line Out","AOUTA-",
|
|
+ "Line Out","AOUTB+",
|
|
+ "Line Out","AOUTB-",
|
|
+ "AINA","Line In",
|
|
+ "AINB","Line In";
|
|
+
|
|
+ simple-audio-card,format = "i2s";
|
|
+
|
|
+ simple-audio-card,bitclock-master = <&sound_master>;
|
|
+ simple-audio-card,frame-master = <&sound_master>;
|
|
+
|
|
+ simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ dai-tdm-slot-num = <2>;
|
|
+ dai-tdm-slot-width = <32>;
|
|
+ };
|
|
+
|
|
+ sound_master: simple-audio-card,codec {
|
|
+ sound-dai = <&cs4271>;
|
|
+ system-clock-frequency = <24576000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ cs4271: cs4271@10 {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "cirrus,cs4271";
|
|
+ reg = <0x10>;
|
|
+ status = "okay";
|
|
+ reset-gpio = <&gpio 26 0>; /* Pin 26, active high */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ __overrides__ {
|
|
+ gpiopin = <&cs4271>,"reset-gpio:4";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/sx150x-overlay.dts b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..1d1069345da2
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/sx150x-overlay.dts
|
|
@@ -0,0 +1,1706 @@
|
|
+// Definitions for SX150x I2C GPIO Expanders from Semtech
|
|
+
|
|
+// dtparams:
|
|
+// sx150<x>-<n>-<m> - Enables SX150X device on I2C#<n> with slave address <m>. <x> may be 1-9.
|
|
+// <n> may be 0 or 1. Permissible values of <m> (which is denoted in hex)
|
|
+// depend on the device variant.
|
|
+// For SX1501, SX1502, SX1504 and SX1505, <m> may be 20 or 21.
|
|
+// For SX1503 and SX1506, <m> may be 20.
|
|
+// For SX1507 and SX1509, <m> may be 3E, 3F, 70 or 71.
|
|
+// For SX1508, <m> may be 20, 21, 22 or 23.
|
|
+// sx150<x>-<n>-<m>-int-gpio - Integer, enables interrupts on SX150X device on I2C#<n> with slave address <m>,
|
|
+// specifies the GPIO pin to which NINT output of SX150X is connected.
|
|
+//
|
|
+//
|
|
+// Example 1: A single SX1505 device on I2C#1 with its slave address set to 0x20 and NINT output connected to GPIO25:
|
|
+// dtoverlay=sx150x:sx1505-1-20,sx1505-1-20-int-gpio=25
|
|
+//
|
|
+// Example 2: Two SX1507 devices on I2C#0 with their slave addresses set to 0x3E and 0x70 (interrupts not used):
|
|
+// dtoverlay=sx150x:sx1507-0-3E,sx1507-0-70
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ // Enable I2C#0 interface
|
|
+ fragment@0 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable I2C#1 interface
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1501 on I2C#0 at slave addr 0x20
|
|
+ fragment@2 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1501_0_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1501q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1501-0-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1501 on I2C#1 at slave addr 0x20
|
|
+ fragment@3 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1501_1_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1501q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1501-1-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1501 on I2C#0 at slave addr 0x21
|
|
+ fragment@4 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1501_0_21: sx150x@21 {
|
|
+ compatible = "semtech,sx1501q";
|
|
+ reg = <0x21>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1501-0-21-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1501 on I2C#1 at slave addr 0x21
|
|
+ fragment@5 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1501_1_21: sx150x@21 {
|
|
+ compatible = "semtech,sx1501q";
|
|
+ reg = <0x21>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1502 on I2C#0 at slave addr 0x20
|
|
+ fragment@6 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1502_0_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1502q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1502-0-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1502 on I2C#1 at slave addr 0x20
|
|
+ fragment@7 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1502_1_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1502q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1502-1-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1502 on I2C#0 at slave addr 0x21
|
|
+ fragment@8 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1502_0_21: sx150x@21 {
|
|
+ compatible = "semtech,sx1502q";
|
|
+ reg = <0x21>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1502-0-21-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1502 on I2C#1 at slave addr 0x21
|
|
+ fragment@9 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1502_1_21: sx150x@21 {
|
|
+ compatible = "semtech,sx1502q";
|
|
+ reg = <0x21>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1501-1-21-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1503 on I2C#0 at slave addr 0x20
|
|
+ fragment@10 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1503_0_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1503q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1503-0-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1503 on I2C#1 at slave addr 0x20
|
|
+ fragment@11 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1503_1_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1503q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1503-1-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1504 on I2C#0 at slave addr 0x20
|
|
+ fragment@12 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1504_0_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1504q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1504-0-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1504 on I2C#1 at slave addr 0x20
|
|
+ fragment@13 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1504_1_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1504q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1504 on I2C#0 at slave addr 0x21
|
|
+ fragment@14 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1504_0_21: sx150x@21 {
|
|
+ compatible = "semtech,sx1504q";
|
|
+ reg = <0x21>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1504-0-21-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1504 on I2C#1 at slave addr 0x21
|
|
+ fragment@15 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1504_1_21: sx150x@21 {
|
|
+ compatible = "semtech,sx1504q";
|
|
+ reg = <0x21>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1504-1-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1505 on I2C#0 at slave addr 0x20
|
|
+ fragment@16 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1505_0_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1505q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1505-0-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1505 on I2C#1 at slave addr 0x20
|
|
+ fragment@17 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1505_1_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1505q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1505-1-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1505 on I2C#0 at slave addr 0x21
|
|
+ fragment@18 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1505_0_21: sx150x@21 {
|
|
+ compatible = "semtech,sx1505q";
|
|
+ reg = <0x21>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1505-0-21-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1505 on I2C#1 at slave addr 0x21
|
|
+ fragment@19 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1505_1_21: sx150x@21 {
|
|
+ compatible = "semtech,sx1505q";
|
|
+ reg = <0x21>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1505-1-21-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1506 on I2C#0 at slave addr 0x20
|
|
+ fragment@20 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1506_0_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1506q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1506-0-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1506 on I2C#1 at slave addr 0x20
|
|
+ fragment@21 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1506_1_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1506q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1506-1-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1507 on I2C#0 at slave addr 0x3E
|
|
+ fragment@22 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1507_0_3E: sx150x@3E {
|
|
+ compatible = "semtech,sx1507q";
|
|
+ reg = <0x3E>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3E-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1507 on I2C#1 at slave addr 0x3E
|
|
+ fragment@23 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1507_1_3E: sx150x@3E {
|
|
+ compatible = "semtech,sx1507q";
|
|
+ reg = <0x3E>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3E-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1507 on I2C#0 at slave addr 0x3F
|
|
+ fragment@24 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1507_0_3F: sx150x@3F {
|
|
+ compatible = "semtech,sx1507q";
|
|
+ reg = <0x3F>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1507_0_3F-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1507 on I2C#1 at slave addr 0x3F
|
|
+ fragment@25 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1507_1_3F: sx150x@3F {
|
|
+ compatible = "semtech,sx1507q";
|
|
+ reg = <0x3F>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1507_1_3F-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1507 on I2C#0 at slave addr 0x70
|
|
+ fragment@26 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1507_0_70: sx150x@70 {
|
|
+ compatible = "semtech,sx1507q";
|
|
+ reg = <0x70>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1507-0-70-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1507 on I2C#1 at slave addr 0x70
|
|
+ fragment@27 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1507_1_70: sx150x@70 {
|
|
+ compatible = "semtech,sx1507q";
|
|
+ reg = <0x70>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1507-1-70-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1507 on I2C#0 at slave addr 0x71
|
|
+ fragment@28 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1507_0_71: sx150x@71 {
|
|
+ compatible = "semtech,sx1507q";
|
|
+ reg = <0x71>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1507-0-71-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1507 on I2C#1 at slave addr 0x71
|
|
+ fragment@29 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1507_1_71: sx150x@71 {
|
|
+ compatible = "semtech,sx1507q";
|
|
+ reg = <0x71>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1507-1-71-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1508 on I2C#0 at slave addr 0x20
|
|
+ fragment@30 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1508_0_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1508q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1508-0-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1508 on I2C#1 at slave addr 0x20
|
|
+ fragment@31 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1508_1_20: sx150x@20 {
|
|
+ compatible = "semtech,sx1508q";
|
|
+ reg = <0x20>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1508-1-20-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1508 on I2C#0 at slave addr 0x21
|
|
+ fragment@32 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1508_0_21: sx150x@21 {
|
|
+ compatible = "semtech,sx1508q";
|
|
+ reg = <0x21>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1508-0-21-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1508 on I2C#1 at slave addr 0x21
|
|
+ fragment@33 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1508_1_21: sx150x@21 {
|
|
+ compatible = "semtech,sx1508q";
|
|
+ reg = <0x21>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1508-1-21-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1508 on I2C#0 at slave addr 0x22
|
|
+ fragment@34 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1508_0_22: sx150x@22 {
|
|
+ compatible = "semtech,sx1508q";
|
|
+ reg = <0x22>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1508-0-22-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1508 on I2C#1 at slave addr 0x22
|
|
+ fragment@35 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1508_1_22: sx150x@22 {
|
|
+ compatible = "semtech,sx1508q";
|
|
+ reg = <0x22>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1508-1-22-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1508 on I2C#0 at slave addr 0x23
|
|
+ fragment@36 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1508_0_23: sx150x@23 {
|
|
+ compatible = "semtech,sx1508q";
|
|
+ reg = <0x23>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1508-0-23-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1508 on I2C#1 at slave addr 0x23
|
|
+ fragment@37 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1508_1_23: sx150x@23 {
|
|
+ compatible = "semtech,sx1508q";
|
|
+ reg = <0x23>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1508-1-23-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1509 on I2C#0 at slave addr 0x3E
|
|
+ fragment@38 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1509_0_3E: sx150x@3E {
|
|
+ compatible = "semtech,sx1509q";
|
|
+ reg = <0x3E>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3E-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1509 on I2C#1 at slave addr 0x3E
|
|
+ fragment@39 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1509_1_3E: sx150x@3E {
|
|
+ compatible = "semtech,sx1509q";
|
|
+ reg = <0x3E>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3E-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1509 on I2C#0 at slave addr 0x3F
|
|
+ fragment@40 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1509_0_3F: sx150x@3F {
|
|
+ compatible = "semtech,sx1509q";
|
|
+ reg = <0x3F>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1509_0_3F-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1509 on I2C#1 at slave addr 0x3F
|
|
+ fragment@41 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1509_1_3F: sx150x@3F {
|
|
+ compatible = "semtech,sx1509q";
|
|
+ reg = <0x3F>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1509_1_3F-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1509 on I2C#0 at slave addr 0x70
|
|
+ fragment@42 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1509_0_70: sx150x@70 {
|
|
+ compatible = "semtech,sx1509q";
|
|
+ reg = <0x70>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1509-0-70-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1509 on I2C#1 at slave addr 0x70
|
|
+ fragment@43 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1509_1_70: sx150x@70 {
|
|
+ compatible = "semtech,sx1509q";
|
|
+ reg = <0x70>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1509-1-70-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1509 on I2C#0 at slave addr 0x71
|
|
+ fragment@44 {
|
|
+ target = <&i2c0>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1509_0_71: sx150x@71 {
|
|
+ compatible = "semtech,sx1509q";
|
|
+ reg = <0x71>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1509-0-71-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable a SX1509 on I2C#1 at slave addr 0x71
|
|
+ fragment@45 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ sx1509_1_71: sx150x@71 {
|
|
+ compatible = "semtech,sx1509q";
|
|
+ reg = <0x71>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ #interrupt-cells = <2>;
|
|
+ interrupts = <25 2>; /* 1st word overwritten by sx1509-1-71-int-gpio parameter
|
|
+ 2nd word is 2 for falling-edge triggered */
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x20
|
|
+ fragment@46 {
|
|
+ target = <&sx1501_0_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x20
|
|
+ fragment@47 {
|
|
+ target = <&sx1501_1_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1501 on I2C#0 at slave addr 0x21
|
|
+ fragment@48 {
|
|
+ target = <&sx1501_0_21>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_21_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1501 on I2C#1 at slave addr 0x21
|
|
+ fragment@49 {
|
|
+ target = <&sx1501_1_21>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_21_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x20
|
|
+ fragment@50 {
|
|
+ target = <&sx1502_0_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x20
|
|
+ fragment@51 {
|
|
+ target = <&sx1502_1_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1502 on I2C#0 at slave addr 0x21
|
|
+ fragment@52 {
|
|
+ target = <&sx1502_0_21>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_21_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1502 on I2C#1 at slave addr 0x21
|
|
+ fragment@53 {
|
|
+ target = <&sx1502_1_21>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_21_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1503 on I2C#0 at slave addr 0x20
|
|
+ fragment@54 {
|
|
+ target = <&sx1503_0_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1503 on I2C#1 at slave addr 0x20
|
|
+ fragment@55 {
|
|
+ target = <&sx1503_1_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x20
|
|
+ fragment@56 {
|
|
+ target = <&sx1504_0_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x20
|
|
+ fragment@57 {
|
|
+ target = <&sx1504_1_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1504 on I2C#0 at slave addr 0x21
|
|
+ fragment@58 {
|
|
+ target = <&sx1504_0_21>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_21_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1504 on I2C#1 at slave addr 0x21
|
|
+ fragment@59 {
|
|
+ target = <&sx1504_1_21>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_21_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x20
|
|
+ fragment@60 {
|
|
+ target = <&sx1505_0_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x20
|
|
+ fragment@61 {
|
|
+ target = <&sx1505_1_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1505 on I2C#0 at slave addr 0x21
|
|
+ fragment@62 {
|
|
+ target = <&sx1505_0_21>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_21_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1505 on I2C#1 at slave addr 0x21
|
|
+ fragment@63 {
|
|
+ target = <&sx1505_1_21>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_21_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1506 on I2C#0 at slave addr 0x20
|
|
+ fragment@64 {
|
|
+ target = <&sx1506_0_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1506 on I2C#1 at slave addr 0x20
|
|
+ fragment@65 {
|
|
+ target = <&sx1506_1_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3E
|
|
+ fragment@66 {
|
|
+ target = <&sx1507_0_3E>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_3E_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3E
|
|
+ fragment@67 {
|
|
+ target = <&sx1507_1_3E>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_3E_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x3F
|
|
+ fragment@68 {
|
|
+ target = <&sx1507_0_3F>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_3F_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x3F
|
|
+ fragment@69 {
|
|
+ target = <&sx1507_1_3F>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_3F_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x70
|
|
+ fragment@70 {
|
|
+ target = <&sx1507_0_70>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_70_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x70
|
|
+ fragment@71 {
|
|
+ target = <&sx1507_1_70>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_70_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1507 on I2C#0 at slave addr 0x71
|
|
+ fragment@72 {
|
|
+ target = <&sx1507_0_71>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_71_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1507 on I2C#1 at slave addr 0x71
|
|
+ fragment@73 {
|
|
+ target = <&sx1507_1_71>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_71_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x20
|
|
+ fragment@74 {
|
|
+ target = <&sx1508_0_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x20
|
|
+ fragment@75 {
|
|
+ target = <&sx1508_1_20>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_20_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x21
|
|
+ fragment@76 {
|
|
+ target = <&sx1508_0_21>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_21_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x21
|
|
+ fragment@77 {
|
|
+ target = <&sx1508_1_21>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_21_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x22
|
|
+ fragment@78 {
|
|
+ target = <&sx1508_0_22>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_22_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x22
|
|
+ fragment@79 {
|
|
+ target = <&sx1508_1_22>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_22_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1508 on I2C#0 at slave addr 0x23
|
|
+ fragment@80 {
|
|
+ target = <&sx1508_0_23>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_23_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1508 on I2C#1 at slave addr 0x23
|
|
+ fragment@81 {
|
|
+ target = <&sx1508_1_23>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_23_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3E
|
|
+ fragment@82 {
|
|
+ target = <&sx1509_0_3E>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_3E_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3E
|
|
+ fragment@83 {
|
|
+ target = <&sx1509_1_3E>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_3E_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x3F
|
|
+ fragment@84 {
|
|
+ target = <&sx1509_0_3F>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_3F_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x3F
|
|
+ fragment@85 {
|
|
+ target = <&sx1509_1_3F>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_3F_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x70
|
|
+ fragment@86 {
|
|
+ target = <&sx1509_0_70>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_70_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x70
|
|
+ fragment@87 {
|
|
+ target = <&sx1509_1_70>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_70_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1509 on I2C#0 at slave addr 0x71
|
|
+ fragment@88 {
|
|
+ target = <&sx1509_0_71>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_0_71_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Enable interrupts for a SX1509 on I2C#1 at slave addr 0x71
|
|
+ fragment@89 {
|
|
+ target = <&sx1509_1_71>;
|
|
+ __dormant__ {
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupt-controller;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sx150x_1_71_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x20
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@90 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_0_20_pins: sx150x_0_20_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-0-20-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x20
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@91 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_1_20_pins: sx150x_1_20_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-1-20-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x21
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@92 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_0_21_pins: sx150x_0_21_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-0-21-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x21
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@93 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_1_21_pins: sx150x_1_21_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-1-21-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x22
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@94 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_0_22_pins: sx150x_0_22_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-0-22-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x22
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@95 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_1_22_pins: sx150x_1_22_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-1-22-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x23
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@96 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_0_23_pins: sx150x_0_23_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-0-23-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x23
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@97 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_1_23_pins: sx150x_1_23_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-1-23-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3E
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@98 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_0_3E_pins: sx150x_0_3E_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-0-3E-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3E
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@99 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_1_3E_pins: sx150x_1_3E_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-1-3E-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x3F
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@100 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_0_3F_pins: sx150x_0_3F_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-0-3F-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x3F
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@101 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_1_3F_pins: sx150x_1_3F_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-1-3F-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x70
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@102 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_0_70_pins: sx150x_0_70_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-0-70-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x70
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@103 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_1_70_pins: sx150x_1_70_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-1-70-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#0 interface at slave addr 0x71
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@104 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_0_71_pins: sx150x_0_71_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-0-71-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ // Configure GPIO pin connected to NINT output of a SX150x on I2C#1 interface at slave addr 0x71
|
|
+ // Configure as a input with no pull-up/down
|
|
+ fragment@105 {
|
|
+ target = <&gpio>;
|
|
+ __dormant__ {
|
|
+ sx150x_1_71_pins: sx150x_1_71_pins {
|
|
+ brcm,pins = <0>; /* overwritten by sx150x-1-71-int-gpio parameter */
|
|
+ brcm,function = <0>;
|
|
+ brcm,pull = <0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ sx1501-0-20 = <0>,"+0+2";
|
|
+ sx1501-1-20 = <0>,"+1+3";
|
|
+ sx1501-0-21 = <0>,"+0+4";
|
|
+ sx1501-1-21 = <0>,"+1+5";
|
|
+ sx1502-0-20 = <0>,"+0+6";
|
|
+ sx1502-1-20 = <0>,"+1+7";
|
|
+ sx1502-0-21 = <0>,"+0+8";
|
|
+ sx1502-1-21 = <0>,"+1+9";
|
|
+ sx1503-0-20 = <0>,"+0+10";
|
|
+ sx1503-1-20 = <0>,"+1+11";
|
|
+ sx1504-0-20 = <0>,"+0+12";
|
|
+ sx1504-1-20 = <0>,"+1+13";
|
|
+ sx1504-0-21 = <0>,"+0+14";
|
|
+ sx1504-1-21 = <0>,"+1+15";
|
|
+ sx1505-0-20 = <0>,"+0+16";
|
|
+ sx1505-1-20 = <0>,"+1+17";
|
|
+ sx1505-0-21 = <0>,"+0+18";
|
|
+ sx1505-1-21 = <0>,"+1+19";
|
|
+ sx1506-0-20 = <0>,"+0+20";
|
|
+ sx1506-1-20 = <0>,"+1+21";
|
|
+ sx1507-0-3E = <0>,"+0+22";
|
|
+ sx1507-1-3E = <0>,"+1+23";
|
|
+ sx1507-0-3F = <0>,"+0+24";
|
|
+ sx1507-1-3F = <0>,"+1+25";
|
|
+ sx1507-0-70 = <0>,"+0+26";
|
|
+ sx1507-1-70 = <0>,"+1+27";
|
|
+ sx1507-0-71 = <0>,"+0+28";
|
|
+ sx1507-1-71 = <0>,"+1+29";
|
|
+ sx1508-0-20 = <0>,"+0+30";
|
|
+ sx1508-1-20 = <0>,"+1+31";
|
|
+ sx1508-0-21 = <0>,"+0+32";
|
|
+ sx1508-1-21 = <0>,"+1+33";
|
|
+ sx1508-0-22 = <0>,"+0+34";
|
|
+ sx1508-1-22 = <0>,"+1+35";
|
|
+ sx1508-0-23 = <0>,"+0+36";
|
|
+ sx1508-1-23 = <0>,"+1+37";
|
|
+ sx1509-0-3E = <0>,"+0+38";
|
|
+ sx1509-1-3E = <0>,"+1+39";
|
|
+ sx1509-0-3F = <0>,"+0+40";
|
|
+ sx1509-1-3F = <0>,"+1+41";
|
|
+ sx1509-0-70 = <0>,"+0+42";
|
|
+ sx1509-1-70 = <0>,"+1+43";
|
|
+ sx1509-0-71 = <0>,"+0+44";
|
|
+ sx1509-1-71 = <0>,"+1+45";
|
|
+ sx1501-0-20-int-gpio = <0>,"+46+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1501_0_20>,"interrupts:0";
|
|
+ sx1501-1-20-int-gpio = <0>,"+47+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1501_1_20>,"interrupts:0";
|
|
+ sx1501-0-21-int-gpio = <0>,"+48+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1501_0_21>,"interrupts:0";
|
|
+ sx1501-1-21-int-gpio = <0>,"+49+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1501_1_21>,"interrupts:0";
|
|
+ sx1502-0-20-int-gpio = <0>,"+50+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1502_0_20>,"interrupts:0";
|
|
+ sx1502-1-20-int-gpio = <0>,"+51+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1502_1_20>,"interrupts:0";
|
|
+ sx1502-0-21-int-gpio = <0>,"+52+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1502_0_21>,"interrupts:0";
|
|
+ sx1502-1-21-int-gpio = <0>,"+53+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1502_1_21>,"interrupts:0";
|
|
+ sx1503-0-20-int-gpio = <0>,"+54+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1503_0_20>,"interrupts:0";
|
|
+ sx1503-1-20-int-gpio = <0>,"+55+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1503_1_20>,"interrupts:0";
|
|
+ sx1504-0-20-int-gpio = <0>,"+56+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1504_0_20>,"interrupts:0";
|
|
+ sx1504-1-20-int-gpio = <0>,"+57+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1504_1_20>,"interrupts:0";
|
|
+ sx1504-0-21-int-gpio = <0>,"+58+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1504_0_21>,"interrupts:0";
|
|
+ sx1504-1-21-int-gpio = <0>,"+59+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1504_1_21>,"interrupts:0";
|
|
+ sx1505-0-20-int-gpio = <0>,"+60+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1505_0_20>,"interrupts:0";
|
|
+ sx1505-1-20-int-gpio = <0>,"+61+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1505_1_20>,"interrupts:0";
|
|
+ sx1505-0-21-int-gpio = <0>,"+62+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1505_0_21>,"interrupts:0";
|
|
+ sx1505-1-21-int-gpio = <0>,"+63+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1505_1_21>,"interrupts:0";
|
|
+ sx1506-0-20-int-gpio = <0>,"+64+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1506_0_20>,"interrupts:0";
|
|
+ sx1506-1-20-int-gpio = <0>,"+65+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1506_1_20>,"interrupts:0";
|
|
+ sx1507-0-3E-int-gpio = <0>,"+66+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1507_0_3E>,"interrupts:0";
|
|
+ sx1507-1-3E-int-gpio = <0>,"+67+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1507_1_3E>,"interrupts:0";
|
|
+ sx1507-0-3F-int-gpio = <0>,"+68+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1507_0_3F>,"interrupts:0";
|
|
+ sx1507-1-3F-int-gpio = <0>,"+69+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1507_1_3F>,"interrupts:0";
|
|
+ sx1507-0-70-int-gpio = <0>,"+60+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1507_0_70>,"interrupts:0";
|
|
+ sx1507-1-70-int-gpio = <0>,"+71+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1507_1_70>,"interrupts:0";
|
|
+ sx1507-0-71-int-gpio = <0>,"+72+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1507_0_71>,"interrupts:0";
|
|
+ sx1507-1-71-int-gpio = <0>,"+73+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1507_1_71>,"interrupts:0";
|
|
+ sx1508-0-20-int-gpio = <0>,"+74+90", <&sx150x_0_20_pins>,"brcm,pins:0", <&sx1508_0_20>,"interrupts:0";
|
|
+ sx1508-1-20-int-gpio = <0>,"+75+91", <&sx150x_1_20_pins>,"brcm,pins:0", <&sx1508_1_20>,"interrupts:0";
|
|
+ sx1508-0-21-int-gpio = <0>,"+76+92", <&sx150x_0_21_pins>,"brcm,pins:0", <&sx1508_0_21>,"interrupts:0";
|
|
+ sx1508-1-21-int-gpio = <0>,"+77+93", <&sx150x_1_21_pins>,"brcm,pins:0", <&sx1508_1_21>,"interrupts:0";
|
|
+ sx1508-0-22-int-gpio = <0>,"+78+94", <&sx150x_0_22_pins>,"brcm,pins:0", <&sx1508_0_22>,"interrupts:0";
|
|
+ sx1508-1-22-int-gpio = <0>,"+79+95", <&sx150x_1_22_pins>,"brcm,pins:0", <&sx1508_1_22>,"interrupts:0";
|
|
+ sx1508-0-23-int-gpio = <0>,"+80+96", <&sx150x_0_23_pins>,"brcm,pins:0", <&sx1508_0_23>,"interrupts:0";
|
|
+ sx1508-1-23-int-gpio = <0>,"+81+97", <&sx150x_1_23_pins>,"brcm,pins:0", <&sx1508_1_23>,"interrupts:0";
|
|
+ sx1509-0-3E-int-gpio = <0>,"+82+98", <&sx150x_0_3E_pins>,"brcm,pins:0", <&sx1509_0_3E>,"interrupts:0";
|
|
+ sx1509-1-3E-int-gpio = <0>,"+83+99", <&sx150x_1_3E_pins>,"brcm,pins:0", <&sx1509_1_3E>,"interrupts:0";
|
|
+ sx1509-0-3F-int-gpio = <0>,"+84+100", <&sx150x_0_3F_pins>,"brcm,pins:0", <&sx1509_0_3F>,"interrupts:0";
|
|
+ sx1509-1-3F-int-gpio = <0>,"+85+101", <&sx150x_1_3F_pins>,"brcm,pins:0", <&sx1509_1_3F>,"interrupts:0";
|
|
+ sx1509-0-70-int-gpio = <0>,"+86+102", <&sx150x_0_70_pins>,"brcm,pins:0", <&sx1509_0_70>,"interrupts:0";
|
|
+ sx1509-1-70-int-gpio = <0>,"+87+103", <&sx150x_1_70_pins>,"brcm,pins:0", <&sx1509_1_70>,"interrupts:0";
|
|
+ sx1509-0-71-int-gpio = <0>,"+88+104", <&sx150x_0_71_pins>,"brcm,pins:0", <&sx1509_0_71>,"interrupts:0";
|
|
+ sx1509-1-71-int-gpio = <0>,"+89+105", <&sx150x_1_71_pins>,"brcm,pins:0", <&sx1509_1_71>,"interrupts:0";
|
|
+ };
|
|
+};
|
|
+
|
|
diff --git a/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts b/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..047695bb0c71
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/tc358743-audio-overlay.dts
|
|
@@ -0,0 +1,52 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions to add I2S audio from the Toshiba TC358743 HDMI to CSI2 bridge.
|
|
+// Requires tc358743 overlay to have been loaded to actually function.
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ tc358743_codec: tc358743-codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "linux,spdif-dir";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ sound_overlay: __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ simple-audio-card,format = "i2s";
|
|
+ simple-audio-card,name = "tc358743";
|
|
+ simple-audio-card,bitclock-master = <&dailink0_slave>;
|
|
+ simple-audio-card,frame-master = <&dailink0_slave>;
|
|
+ status = "okay";
|
|
+
|
|
+ simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ dai-tdm-slot-num = <2>;
|
|
+ dai-tdm-slot-width = <32>;
|
|
+ };
|
|
+ dailink0_slave: simple-audio-card,codec {
|
|
+ sound-dai = <&tc358743_codec>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ card-name = <&sound_overlay>,"simple-audio-card,name";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/tc358743-overlay.dts b/arch/arm/boot/dts/overlays/tc358743-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..a1f8af36d2e7
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/tc358743-overlay.dts
|
|
@@ -0,0 +1,107 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-only
|
|
+// Definitions for Toshiba TC358743 HDMI to CSI2 bridge on VC I2C bus
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ tc358743@0f {
|
|
+ compatible = "toshiba,tc358743";
|
|
+ reg = <0x0f>;
|
|
+ status = "okay";
|
|
+
|
|
+ clocks = <&tc358743_clk>;
|
|
+ clock-names = "refclk";
|
|
+
|
|
+ port {
|
|
+ tc358743: endpoint {
|
|
+ remote-endpoint = <&csi1_ep>;
|
|
+ clock-lanes = <0>;
|
|
+ clock-noncontinuous;
|
|
+ link-frequencies =
|
|
+ /bits/ 64 <486000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&csi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ port {
|
|
+ csi1_ep: endpoint {
|
|
+ remote-endpoint = <&tc358743>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&tc358743>;
|
|
+ __overlay__ {
|
|
+ data-lanes = <1 2>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&tc358743>;
|
|
+ __dormant__ {
|
|
+ data-lanes = <1 2 3 4>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2c0if>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&i2c0mux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ tc358743_clk: bridge-clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <27000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target = <&csi1_ep>;
|
|
+ __overlay__ {
|
|
+ data-lanes = <1 2>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target = <&csi1_ep>;
|
|
+ __dormant__ {
|
|
+ data-lanes = <1 2 3 4>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ 4lane = <0>, "-2+3-7+8";
|
|
+ link-frequency = <&tc358743>,"link-frequencies#0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..a102b09e3ab5
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/tinylcd35-overlay.dts
|
|
@@ -0,0 +1,222 @@
|
|
+/*
|
|
+ * tinylcd35-overlay.dts
|
|
+ *
|
|
+ * -------------------------------------------------
|
|
+ * www.tinlylcd.com
|
|
+ * -------------------------------------------------
|
|
+ * Device---Driver-----BUS GPIO's
|
|
+ * display tinylcd35 spi0.0 25 24 18
|
|
+ * touch ads7846 spi0.1 5
|
|
+ * rtc ds1307 i2c1-0068
|
|
+ * rtc pcf8563 i2c1-0051
|
|
+ * keypad gpio-keys --------- 17 22 27 23 28
|
|
+ *
|
|
+ *
|
|
+ * TinyLCD.com 3.5 inch TFT
|
|
+ *
|
|
+ * Version 001
|
|
+ * 5/3/2015 -- Noralf Trønnes Initial Device tree framework
|
|
+ * 10/3/2015 -- tinylcd@gmail.com added ds1307 support.
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ tinylcd35_pins: tinylcd35_pins {
|
|
+ brcm,pins = <25 24 18>;
|
|
+ brcm,function = <1>; /* out */
|
|
+ };
|
|
+ tinylcd35_ts_pins: tinylcd35_ts_pins {
|
|
+ brcm,pins = <5>;
|
|
+ brcm,function = <0>; /* in */
|
|
+ };
|
|
+ keypad_pins: keypad_pins {
|
|
+ brcm,pins = <4 17 22 23 27>;
|
|
+ brcm,function = <0>; /* in */
|
|
+ brcm,pull = <1>; /* down */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ tinylcd35: tinylcd35@0{
|
|
+ compatible = "neosec,tinylcd";
|
|
+ reg = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&tinylcd35_pins>,
|
|
+ <&tinylcd35_ts_pins>;
|
|
+
|
|
+ spi-max-frequency = <48000000>;
|
|
+ rotate = <270>;
|
|
+ fps = <20>;
|
|
+ bgr;
|
|
+ buswidth = <8>;
|
|
+ reset-gpios = <&gpio 25 1>;
|
|
+ dc-gpios = <&gpio 24 0>;
|
|
+ led-gpios = <&gpio 18 0>;
|
|
+ debug = <0>;
|
|
+
|
|
+ init = <0x10000B0 0x80
|
|
+ 0x10000C0 0x0A 0x0A
|
|
+ 0x10000C1 0x01 0x01
|
|
+ 0x10000C2 0x33
|
|
+ 0x10000C5 0x00 0x42 0x80
|
|
+ 0x10000B1 0xD0 0x11
|
|
+ 0x10000B4 0x02
|
|
+ 0x10000B6 0x00 0x22 0x3B
|
|
+ 0x10000B7 0x07
|
|
+ 0x1000036 0x58
|
|
+ 0x10000F0 0x36 0xA5 0xD3
|
|
+ 0x10000E5 0x80
|
|
+ 0x10000E5 0x01
|
|
+ 0x10000B3 0x00
|
|
+ 0x10000E5 0x00
|
|
+ 0x10000F0 0x36 0xA5 0x53
|
|
+ 0x10000E0 0x00 0x35 0x33 0x00 0x00 0x00 0x00 0x35 0x33 0x00 0x00 0x00
|
|
+ 0x100003A 0x55
|
|
+ 0x1000011
|
|
+ 0x2000001
|
|
+ 0x1000029>;
|
|
+ };
|
|
+
|
|
+ tinylcd35_ts: tinylcd35_ts@1 {
|
|
+ compatible = "ti,ads7846";
|
|
+ reg = <1>;
|
|
+ status = "disabled";
|
|
+
|
|
+ spi-max-frequency = <2000000>;
|
|
+ interrupts = <5 2>; /* high-to-low edge triggered */
|
|
+ interrupt-parent = <&gpio>;
|
|
+ pendown-gpio = <&gpio 5 0>;
|
|
+ ti,x-plate-ohms = /bits/ 16 <100>;
|
|
+ ti,pressure-max = /bits/ 16 <255>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* RTC */
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ pcf8563: pcf8563@51 {
|
|
+ compatible = "nxp,pcf8563";
|
|
+ reg = <0x51>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target = <&i2c1>;
|
|
+ __dormant__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ ds1307: ds1307@68 {
|
|
+ compatible = "dallas,ds1307";
|
|
+ reg = <0x68>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * Values for input event code is found under the
|
|
+ * 'Keys and buttons' heading in include/uapi/linux/input.h
|
|
+ */
|
|
+ fragment@7 {
|
|
+ target-path = "/soc";
|
|
+ __overlay__ {
|
|
+ keypad: keypad {
|
|
+ compatible = "gpio-keys";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&keypad_pins>;
|
|
+ status = "disabled";
|
|
+ autorepeat;
|
|
+
|
|
+ button@17 {
|
|
+ label = "GPIO KEY_UP";
|
|
+ linux,code = <103>;
|
|
+ gpios = <&gpio 17 0>;
|
|
+ };
|
|
+ button@22 {
|
|
+ label = "GPIO KEY_DOWN";
|
|
+ linux,code = <108>;
|
|
+ gpios = <&gpio 22 0>;
|
|
+ };
|
|
+ button@27 {
|
|
+ label = "GPIO KEY_LEFT";
|
|
+ linux,code = <105>;
|
|
+ gpios = <&gpio 27 0>;
|
|
+ };
|
|
+ button@23 {
|
|
+ label = "GPIO KEY_RIGHT";
|
|
+ linux,code = <106>;
|
|
+ gpios = <&gpio 23 0>;
|
|
+ };
|
|
+ button@4 {
|
|
+ label = "GPIO KEY_ENTER";
|
|
+ linux,code = <28>;
|
|
+ gpios = <&gpio 4 0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ speed = <&tinylcd35>,"spi-max-frequency:0";
|
|
+ rotate = <&tinylcd35>,"rotate:0";
|
|
+ fps = <&tinylcd35>,"fps:0";
|
|
+ debug = <&tinylcd35>,"debug:0";
|
|
+ touch = <&tinylcd35_ts>,"status";
|
|
+ touchgpio = <&tinylcd35_ts_pins>,"brcm,pins:0",
|
|
+ <&tinylcd35_ts>,"interrupts:0",
|
|
+ <&tinylcd35_ts>,"pendown-gpio:4";
|
|
+ xohms = <&tinylcd35_ts>,"ti,x-plate-ohms;0";
|
|
+ rtc-pcf = <0>,"=5";
|
|
+ rtc-ds = <0>,"=6";
|
|
+ keypad = <&keypad>,"status";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts b/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..e69188503ca3
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/tpm-slb9670-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/*
|
|
+ * Device Tree overlay for the Infineon SLB9670 Trusted Platform Module add-on
|
|
+ * boards, which can be used as a secure key storage and hwrng.
|
|
+ * available as "Iridium SLB9670" by Infineon and "LetsTrust TPM" by pi3g.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev1>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ slb9670: slb9670@1 {
|
|
+ compatible = "infineon,slb9670";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <32000000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/uart0-overlay.dts b/arch/arm/boot/dts/overlays/uart0-overlay.dts
|
|
new file mode 100755
|
|
index 000000000000..73d563bbaabf
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/uart0-overlay.dts
|
|
@@ -0,0 +1,32 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart0>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ uart0_pins: uart0_pins {
|
|
+ brcm,pins = <14 15>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ txd0_pin = <&uart0_pins>,"brcm,pins:0";
|
|
+ rxd0_pin = <&uart0_pins>,"brcm,pins:4";
|
|
+ pin_func = <&uart0_pins>,"brcm,function:0";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/uart1-overlay.dts b/arch/arm/boot/dts/overlays/uart1-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..986d725a2652
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/uart1-overlay.dts
|
|
@@ -0,0 +1,38 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart1>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart1_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ uart1_pins: uart1_pins {
|
|
+ brcm,pins = <14 15>;
|
|
+ brcm,function = <2>; /* alt5 */
|
|
+ brcm,pull = <0 2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target-path = "/chosen";
|
|
+ __overlay__ {
|
|
+ bootargs = "8250.nr_uarts=1";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ txd1_pin = <&uart1_pins>,"brcm,pins:0";
|
|
+ rxd1_pin = <&uart1_pins>,"brcm,pins:4";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/uart2-overlay.dts b/arch/arm/boot/dts/overlays/uart2-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..9face240aca1
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/uart2-overlay.dts
|
|
@@ -0,0 +1,27 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart2>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart2_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart2_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <0 1 2 3>;
|
|
+ brcm,pull = <0 2 2 0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ ctsrts = <0>,"=1";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/uart3-overlay.dts b/arch/arm/boot/dts/overlays/uart3-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ae9f9fe5ea1d
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/uart3-overlay.dts
|
|
@@ -0,0 +1,27 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart3>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart3_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart3_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <4 5 6 7>;
|
|
+ brcm,pull = <0 2 2 0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ ctsrts = <0>,"=1";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/uart4-overlay.dts b/arch/arm/boot/dts/overlays/uart4-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ac004ffbadbf
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/uart4-overlay.dts
|
|
@@ -0,0 +1,27 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart4>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart4_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart4_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <8 9 10 11>;
|
|
+ brcm,pull = <0 2 2 0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ ctsrts = <0>,"=1";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/uart5-overlay.dts b/arch/arm/boot/dts/overlays/uart5-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..04eaf376effe
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/uart5-overlay.dts
|
|
@@ -0,0 +1,27 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&uart5>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart5_pins>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&uart5_pins>;
|
|
+ __dormant__ {
|
|
+ brcm,pins = <12 13 14 15>;
|
|
+ brcm,pull = <0 2 2 0>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ ctsrts = <0>,"=1";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/udrc-overlay.dts b/arch/arm/boot/dts/overlays/udrc-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ae7c37996894
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/udrc-overlay.dts
|
|
@@ -0,0 +1,128 @@
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+/*
|
|
+ * Device tree overlay for the Universal Digital Radio Controller
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ clocks = <&clocks BCM2835_CLOCK_PCM>;
|
|
+ clock-names = "pcm";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ regulators {
|
|
+ compatible = "simple-bus";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ udrc0_ldoin: udrc0_ldoin {
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "ldoin";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ clock-frequency = <400000>;
|
|
+
|
|
+ tlv320aic32x4: tlv320aic32x4@18 {
|
|
+ compatible = "ti,tlv320aic32x4";
|
|
+ #sound-dai-cells = <0>;
|
|
+ reg = <0x18>;
|
|
+ status = "okay";
|
|
+
|
|
+ clocks = <&clocks BCM2835_CLOCK_GP0>;
|
|
+ clock-names = "mclk";
|
|
+ assigned-clocks = <&clocks BCM2835_CLOCK_GP0>;
|
|
+ assigned-clock-rates = <25000000>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gpclk0_pin &aic3204_reset>;
|
|
+
|
|
+ reset-gpios = <&gpio 13 0>;
|
|
+
|
|
+ iov-supply = <&udrc0_ldoin>;
|
|
+ ldoin-supply = <&udrc0_ldoin>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ snd: __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ i2s-controller = <&i2s>;
|
|
+ status = "okay";
|
|
+
|
|
+ simple-audio-card,name = "udrc";
|
|
+ simple-audio-card,format = "i2s";
|
|
+
|
|
+ simple-audio-card,bitclock-master = <&dailink0_master>;
|
|
+ simple-audio-card,frame-master = <&dailink0_master>;
|
|
+
|
|
+ simple-audio-card,widgets =
|
|
+ "Line", "Line In",
|
|
+ "Line", "Line Out";
|
|
+
|
|
+ simple-audio-card,routing =
|
|
+ "IN1_R", "Line In",
|
|
+ "IN1_L", "Line In",
|
|
+ "CM_L", "Line In",
|
|
+ "CM_R", "Line In",
|
|
+ "Line Out", "LOR",
|
|
+ "Line Out", "LOL";
|
|
+
|
|
+ dailink0_master: simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ };
|
|
+
|
|
+ simple-audio-card,codec {
|
|
+ sound-dai = <&tlv320aic32x4>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ gpclk0_pin: gpclk0_pin {
|
|
+ brcm,pins = <4>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ aic3204_reset: aic3204_reset {
|
|
+ brcm,pins = <13>;
|
|
+ brcm,function = <1>;
|
|
+ brcm,pull = <1>;
|
|
+ };
|
|
+
|
|
+ aic3204_gpio: aic3204_gpio {
|
|
+ brcm,pins = <26>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ alsaname = <&snd>, "simple-audio-card,name";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts b/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..fc8d9b118068
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/ugreen-dabboard-overlay.dts
|
|
@@ -0,0 +1,49 @@
|
|
+// Definitions for the ugreen dabboard I2S
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ dmic_codec: dmic-codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ compatible = "dmic-codec";
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&sound>;
|
|
+ sound_overlay: __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ simple-audio-card,format = "i2s";
|
|
+ simple-audio-card,name = "dabboard";
|
|
+ simple-audio-card,bitclock-master = <&dailink0_slave>;
|
|
+ simple-audio-card,frame-master = <&dailink0_slave>;
|
|
+ simple-audio-card,widgets = "Microphone", "Microphone Jack";
|
|
+ status = "okay";
|
|
+ simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ };
|
|
+ dailink0_slave: simple-audio-card,codec {
|
|
+ #sound-dai-cells = <0>;
|
|
+ sound-dai = <&dmic_codec>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ card-name = <&sound_overlay>,"simple-audio-card,name";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/upstream-overlay.dts b/arch/arm/boot/dts/overlays/upstream-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..7c4071a7cb27
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts
|
|
@@ -0,0 +1,101 @@
|
|
+// redo: ovmerge -c vc4-kms-v3d-overlay.dts,cma-default dwc2-overlay.dts,dr_mode=otg
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+ fragment@0 {
|
|
+ target = <&i2c2>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@1 {
|
|
+ target = <&fb>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ fragment@2 {
|
|
+ target = <&pixelvalve0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@3 {
|
|
+ target = <&pixelvalve1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@4 {
|
|
+ target = <&pixelvalve2>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@5 {
|
|
+ target = <&hvs>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@6 {
|
|
+ target = <&hdmi>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@7 {
|
|
+ target = <&v3d>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@8 {
|
|
+ target = <&vc4>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@9 {
|
|
+ target = <&clocks>;
|
|
+ __overlay__ {
|
|
+ claim-clocks = <BCM2835_PLLD_DSI0 BCM2835_PLLD_DSI1 BCM2835_PLLH_AUX BCM2835_PLLH_PIX>;
|
|
+ };
|
|
+ };
|
|
+ fragment@10 {
|
|
+ target = <&vec>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@11 {
|
|
+ target = <&txp>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@12 {
|
|
+ target = <&audio>;
|
|
+ __overlay__ {
|
|
+ brcm,disable-hdmi;
|
|
+ };
|
|
+ };
|
|
+ fragment@13 {
|
|
+ target = <&usb>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ __overlay__ {
|
|
+ compatible = "brcm,bcm2835-usb";
|
|
+ dr_mode = "otg";
|
|
+ g-np-tx-fifo-size = <32>;
|
|
+ g-rx-fifo-size = <558>;
|
|
+ g-tx-fifo-size = <512 512 512 512 512 256 256>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/upstream-pi4-overlay.dts b/arch/arm/boot/dts/overlays/upstream-pi4-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..f4328634542e
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/upstream-pi4-overlay.dts
|
|
@@ -0,0 +1,137 @@
|
|
+// redo: ovmerge -c vc4-kms-v3d-pi4-overlay.dts,cma-default dwc2-overlay.dts,dr_mode=otg
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+ fragment@0 {
|
|
+ target = <&ddc0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@1 {
|
|
+ target = <&ddc1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@2 {
|
|
+ target = <&hdmi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@3 {
|
|
+ target = <&hdmi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@4 {
|
|
+ target = <&hvs>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@5 {
|
|
+ target = <&pixelvalve0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@6 {
|
|
+ target = <&pixelvalve1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@7 {
|
|
+ target = <&pixelvalve2>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@8 {
|
|
+ target = <&pixelvalve3>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@9 {
|
|
+ target = <&pixelvalve4>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@10 {
|
|
+ target = <&v3d>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@11 {
|
|
+ target = <&vc4>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@12 {
|
|
+ target = <&txp>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@13 {
|
|
+ target = <&fb>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ fragment@14 {
|
|
+ target = <&firmwarekms>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ fragment@15 {
|
|
+ target = <&vec>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+ fragment@16 {
|
|
+ target = <&audio>;
|
|
+ __overlay__ {
|
|
+ brcm,disable-hdmi;
|
|
+ };
|
|
+ };
|
|
+ fragment@17 {
|
|
+ target = <&dvp>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@18 {
|
|
+ target = <&aon_intr>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@19 {
|
|
+ target = <&usb>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <1>;
|
|
+ __overlay__ {
|
|
+ compatible = "brcm,bcm2835-usb";
|
|
+ dr_mode = "otg";
|
|
+ g-np-tx-fifo-size = <32>;
|
|
+ g-rx-fifo-size = <558>;
|
|
+ g-tx-fifo-size = <512 512 512 512 512 256 256>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ca344492bed8
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-overlay.dts
|
|
@@ -0,0 +1,40 @@
|
|
+/*
|
|
+ * vc4-fkms-v3d-overlay.dts
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include "cma-overlay.dts"
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&fb>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&firmwarekms>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&v3d>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&vc4>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/vc4-fkms-v3d-pi4-overlay.dts b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-pi4-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..7792ead0cbb3
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-fkms-v3d-pi4-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/*
|
|
+ * vc4-fkms-v3d-overlay.dts
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include "cma-overlay.dts"
|
|
+
|
|
+&frag0 {
|
|
+ size = <((320-4)*1024*1024)>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&fb>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&firmwarekms>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&v3d>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&vc4>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/vc4-kms-dpi-at056tn53v1-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-dpi-at056tn53v1-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..f7181c9828bf
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-kms-dpi-at056tn53v1-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/*
|
|
+ * vc4-kms-dpi-at056tn53v1-overlay.dts
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/pinctrl/bcm2835.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ panel: panel {
|
|
+ compatible = "innolux,at056tn53v1", "simple-panel";
|
|
+
|
|
+ port {
|
|
+ panel_in: endpoint {
|
|
+ remote-endpoint = <&dpi_out>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&dpi>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&dpi_18bit_cpadhi_gpio0>;
|
|
+
|
|
+ port {
|
|
+ dpi_out: endpoint {
|
|
+ remote-endpoint = <&panel_in>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..ecd3bef3d65a
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-7inch-overlay.dts
|
|
@@ -0,0 +1,118 @@
|
|
+/*
|
|
+ * Device Tree overlay for RaspberryPi 7" Touchscreen panel
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include "edt-ft5406.dtsi"
|
|
+
|
|
+/ {
|
|
+ /* No compatible as it will have come from edt-ft5406.dtsi */
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&dsi1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+ port {
|
|
+ dsi_out: endpoint {
|
|
+ remote-endpoint = <&bridge_in>;
|
|
+ };
|
|
+ };
|
|
+ bridge@0 {
|
|
+ reg = <0>;
|
|
+ compatible = "toshiba,tc358762";
|
|
+ vddc-supply = <®_bridge>;
|
|
+ ports {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ port@0 {
|
|
+ reg = <0>;
|
|
+ bridge_in: endpoint {
|
|
+ remote-endpoint = <&dsi_out>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ port@1 {
|
|
+ reg = <1>;
|
|
+ bridge_out: endpoint {
|
|
+ remote-endpoint = <&panel_in>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ panel_disp1: panel_disp1@0 {
|
|
+ reg = <0>;
|
|
+ compatible = "raspberrypi,7inch-dsi", "simple-panel";
|
|
+ backlight = <®_display>;
|
|
+ power-supply = <®_display>;
|
|
+
|
|
+ port {
|
|
+ panel_in: endpoint {
|
|
+ remote-endpoint = <&bridge_out>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ reg_bridge: reg_bridge@0 {
|
|
+ reg = <0>;
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "bridge_reg";
|
|
+ gpio = <®_display 0 0>;
|
|
+ vin-supply = <®_display>;
|
|
+ enable-active-high;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ reg_display: reg_display@45 {
|
|
+ compatible = "raspberrypi,7inch-touchscreen-panel-regulator";
|
|
+ reg = <0x45>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c0if>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2c0mux>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ fragment@5 {
|
|
+ target = <&ft5406>;
|
|
+ __overlay__ {
|
|
+ vcc-supply = <®_display>;
|
|
+ reset-gpio = <®_display 1 1>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ disable_touch = <0>, "-10-11-12-13";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..d7b8f6713804
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-overlay.dts
|
|
@@ -0,0 +1,69 @@
|
|
+/*
|
|
+ * Device Tree overlay to connect a JDI LT070ME05000 DSI panel to DSI1.
|
|
+ * This uses 4 DSI data lanes, so can only be used with a Compute Module.
|
|
+ *
|
|
+ * Credit to forum user gizmomouse on
|
|
+ * https://www.raspberrypi.org/forums/viewtopic.php?f=98&t=253912 and
|
|
+ * Andrey Vostrukhin of Harlab for the overlay.
|
|
+ *
|
|
+ * Refer to https://github.com/harlab/CM4_LCD_LT070ME05000 for schematics and
|
|
+ * other documentation.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&dsi1>;
|
|
+ __overlay__{
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ port {
|
|
+ dsi_out_port:endpoint {
|
|
+ remote-endpoint = <&panel_dsi_port>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ lt070me05000:lt070me05000@0 {
|
|
+ compatible = "jdi,lt070me05000";
|
|
+ status = "okay";
|
|
+ reg = <0>;
|
|
+ reset-gpios = <&gpio 17 1>; // LCD RST
|
|
+ enable-gpios = <&gpio 4 0>; // LCD Enable
|
|
+ dcdc-en-gpios = <&gpio 5 0>; // LCD DC-DC Enable
|
|
+ port {
|
|
+ panel_dsi_port: endpoint {
|
|
+ remote-endpoint = <&dsi_out_port>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ lt070me05000_pins: lt070me05000_pins {
|
|
+ brcm,pins = <4 5 17>;
|
|
+ brcm,function = <1 1 1>; // out
|
|
+ brcm,pull = <0 0 0>; // off
|
|
+ };
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ reset = <<070me05000_pins>,"brcm,pins:8",
|
|
+ <<070me05000>,"reset-gpios:4";
|
|
+
|
|
+ enable = <<070me05000_pins>,"brcm,pins:0",
|
|
+ <<070me05000>,"enable-gpios:4";
|
|
+
|
|
+ dcdc-en = <<070me05000_pins>,"brcm,pins:4",
|
|
+ <<070me05000>,"dcdc-en-gpios:4";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..5dcd0f2243e2
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-lt070me05000-v2-overlay.dts
|
|
@@ -0,0 +1,64 @@
|
|
+/*
|
|
+ * Device Tree overlay to connect a JDI LT070ME05000 DSI panel to DSI1.
|
|
+ * This uses 4 DSI data lanes, so can only be used with a Compute Module.
|
|
+ *
|
|
+ * The overlay is for V2 of Harlab's interface board that uses a PCA9536 to
|
|
+ * handle the panel's control GPIOs instead of wiring it back to Pi GPIOs.
|
|
+ *
|
|
+ * Credit to Andrey Vostrukhin of Harlab for the overlay.
|
|
+ *
|
|
+ * Refer to https://github.com/harlab/CM4_LCD_LT070ME05000 for schematics and
|
|
+ * other documentation.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2c_csi_dsi>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ pca: pca@41 {
|
|
+ compatible = "nxp,pca9536";
|
|
+ reg = <0x41>;
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&dsi1>;
|
|
+ __overlay__{
|
|
+ status = "okay";
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ port {
|
|
+ dsi_out_port:endpoint {
|
|
+ remote-endpoint = <&panel_dsi_port>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ lt070me05000:lt070me05000@0 {
|
|
+ compatible = "jdi,lt070me05000";
|
|
+ status = "okay";
|
|
+ reg = <0>;
|
|
+ reset-gpios = <&pca 0 1>;
|
|
+ enable-gpios = <&pca 2 0>;
|
|
+ dcdc-en-gpios = <&pca 1 0>;
|
|
+ port {
|
|
+ panel_dsi_port: endpoint {
|
|
+ remote-endpoint = <&dsi_out_port>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..b03394844abd
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-kms-kippah-7inch-overlay.dts
|
|
@@ -0,0 +1,43 @@
|
|
+/*
|
|
+ * vc4-kms-v3d-overlay.dts
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/pinctrl/bcm2835.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ panel: panel {
|
|
+ compatible = "ontat,yx700wv03", "simple-panel";
|
|
+
|
|
+ port {
|
|
+ panel_in: endpoint {
|
|
+ remote-endpoint = <&dpi_out>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&dpi>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&dpi_18bit_gpio0>;
|
|
+
|
|
+ port {
|
|
+ dpi_out: endpoint@0 {
|
|
+ remote-endpoint = <&panel_in>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..5a4efdeed663
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-overlay.dts
|
|
@@ -0,0 +1,123 @@
|
|
+/*
|
|
+ * vc4-kms-v3d-overlay.dts
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+
|
|
+#include "cma-overlay.dts"
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c2>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&fb>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&pixelvalve0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&pixelvalve1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&pixelvalve2>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target = <&hvs>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target = <&hdmi>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target = <&v3d>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@9 {
|
|
+ target = <&vc4>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@10 {
|
|
+ target = <&clocks>;
|
|
+ __overlay__ {
|
|
+ claim-clocks = <
|
|
+ BCM2835_PLLD_DSI0
|
|
+ BCM2835_PLLD_DSI1
|
|
+ BCM2835_PLLH_AUX
|
|
+ BCM2835_PLLH_PIX
|
|
+ >;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@11 {
|
|
+ target = <&vec>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@12 {
|
|
+ target = <&txp>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@13 {
|
|
+ target = <&hdmi>;
|
|
+ __dormant__ {
|
|
+ dmas;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@14 {
|
|
+ target = <&audio>;
|
|
+ __overlay__ {
|
|
+ brcm,disable-hdmi;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ audio = <0>,"!13", <0>,"=14";
|
|
+ noaudio = <0>,"=13", <0>,"!14";
|
|
+ nocomposite = <0>, "!11";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..4285e12a4e53
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-kms-v3d-pi4-overlay.dts
|
|
@@ -0,0 +1,197 @@
|
|
+/*
|
|
+ * vc4-kms-v3d-pi4-overlay.dts
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/clock/bcm2835.h>
|
|
+
|
|
+#include "cma-overlay.dts"
|
|
+
|
|
+&frag0 {
|
|
+ size = <((320-4)*1024*1024)>;
|
|
+};
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&ddc0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&ddc1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&hdmi0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&hdmi1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@5 {
|
|
+ target = <&hvs>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@6 {
|
|
+ target = <&pixelvalve0>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@7 {
|
|
+ target = <&pixelvalve1>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@8 {
|
|
+ target = <&pixelvalve2>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@9 {
|
|
+ target = <&pixelvalve3>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@10 {
|
|
+ target = <&pixelvalve4>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@11 {
|
|
+ target = <&v3d>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@12 {
|
|
+ target = <&vc4>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@13 {
|
|
+ target = <&txp>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@14 {
|
|
+ target = <&fb>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@15 {
|
|
+ target = <&firmwarekms>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@16 {
|
|
+ target = <&vec>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@17 {
|
|
+ target = <&hdmi0>;
|
|
+ __dormant__ {
|
|
+ dmas;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@18 {
|
|
+ target = <&hdmi1>;
|
|
+ __dormant__ {
|
|
+ dmas;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@19 {
|
|
+ target = <&audio>;
|
|
+ __overlay__ {
|
|
+ brcm,disable-hdmi;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@20 {
|
|
+ target = <&dvp>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@21 {
|
|
+ target = <&pixelvalve3>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@22 {
|
|
+ target = <&vec>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@23 {
|
|
+ target = <&aon_intr>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ audio = <0>,"!17";
|
|
+ audio1 = <0>,"!18";
|
|
+ noaudio = <0>,"=17", <0>,"=18", <0>,"!19";
|
|
+ composite = <0>, "!1",
|
|
+ <0>, "!2",
|
|
+ <0>, "!3",
|
|
+ <0>, "!4",
|
|
+ <0>, "!6",
|
|
+ <0>, "!7",
|
|
+ <0>, "!8",
|
|
+ <0>, "!9",
|
|
+ <0>, "!10",
|
|
+ <0>, "!16",
|
|
+ <0>, "=21",
|
|
+ <0>, "=22";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..6e787099e861
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/vc4-kms-vga666-overlay.dts
|
|
@@ -0,0 +1,100 @@
|
|
+/*
|
|
+ * vc4-kms-vga666-overlay.dts
|
|
+ * Configures a FenLogic or similar VGA666 DPI adapter when using the
|
|
+ * vc4-kms-v3d driver.
|
|
+ * If a suitable I2C level shifter is connected to GPIOs 0&1 and the VGA
|
|
+ * ID1/SDA (pin 12) and ID3/SCL (pin 15) lines, then there is the option to
|
|
+ * enable reading the EDID from the display.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+#include <dt-bindings/pinctrl/bcm2835.h>
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+ vga_connector: vga_connector {
|
|
+ compatible = "vga-connector";
|
|
+ label = "vga";
|
|
+
|
|
+ port {
|
|
+ vga_con_in: endpoint {
|
|
+ remote-endpoint = <&vga666_out>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vga_dac {
|
|
+ compatible = "dumb-vga-dac";
|
|
+
|
|
+ ports {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ port@0 {
|
|
+ reg = <0>;
|
|
+
|
|
+ vga666_in: endpoint {
|
|
+ remote-endpoint = <&dpi_out>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ port@1 {
|
|
+ reg = <1>;
|
|
+
|
|
+ vga666_out: endpoint {
|
|
+ remote-endpoint = <&vga_con_in>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&dpi>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&dpi_18bit_gpio2>;
|
|
+
|
|
+ port {
|
|
+ dpi_out: endpoint@0 {
|
|
+ remote-endpoint = <&vga666_in>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&vga_connector>;
|
|
+ __dormant__ {
|
|
+ ddc-i2c-bus = <&i2c_vc>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&i2c0if>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@4 {
|
|
+ target = <&i2c0mux>;
|
|
+ __dormant__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ ddc = <0>,"=2", <0>,"=3", <0>,"=4";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/vga666-overlay.dts b/arch/arm/boot/dts/overlays/vga666-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..a4968d180a5d
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/vga666-overlay.dts
|
|
@@ -0,0 +1,30 @@
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/{
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ // There is no VGA driver module, but we need a platform device
|
|
+ // node (that doesn't already use pinctrl) to hang the pinctrl
|
|
+ // reference on - leds will do
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&leds>;
|
|
+ __overlay__ {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&vga666_pins>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ vga666_pins: vga666_pins {
|
|
+ brcm,pins = <2 3 4 5 6 7 8 9 10 11 12
|
|
+ 13 14 15 16 17 18 19 20 21>;
|
|
+ brcm,function = <6>; /* alt2 */
|
|
+ brcm,pull = <0>; /* no pull */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..f44e325bc1f2
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/w1-gpio-overlay.dts
|
|
@@ -0,0 +1,40 @@
|
|
+// Definitions for w1-gpio module (without external pullup)
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+
|
|
+ w1: onewire@0 {
|
|
+ compatible = "w1-gpio";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&w1_pins>;
|
|
+ gpios = <&gpio 4 0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ w1_pins: w1_pins@0 {
|
|
+ brcm,pins = <4>;
|
|
+ brcm,function = <0>; // in (initially)
|
|
+ brcm,pull = <0>; // off
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpiopin = <&w1>,"gpios:4",
|
|
+ <&w1>,"reg:0",
|
|
+ <&w1_pins>,"brcm,pins:0",
|
|
+ <&w1_pins>,"reg:0";
|
|
+ pullup; // Silently ignore unneeded parameter
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..953c6a1aeab9
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/w1-gpio-pullup-overlay.dts
|
|
@@ -0,0 +1,42 @@
|
|
+// Definitions for w1-gpio module (with external pullup)
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target-path = "/";
|
|
+ __overlay__ {
|
|
+
|
|
+ w1: onewire@0 {
|
|
+ compatible = "w1-gpio";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&w1_pins>;
|
|
+ gpios = <&gpio 4 0>, <&gpio 5 1>;
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ w1_pins: w1_pins@0 {
|
|
+ brcm,pins = <4 5>;
|
|
+ brcm,function = <0 1>; // in out
|
|
+ brcm,pull = <0 0>; // off off
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ gpiopin = <&w1>,"gpios:4",
|
|
+ <&w1>,"reg:0",
|
|
+ <&w1_pins>,"brcm,pins:0",
|
|
+ <&w1_pins>,"reg:0";
|
|
+ extpullup = <&w1>,"gpios:16",
|
|
+ <&w1_pins>,"brcm,pins:4";
|
|
+ pullup; // Silently ignore unneeded parameter
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/w5500-overlay.dts b/arch/arm/boot/dts/overlays/w5500-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..4d3e66296753
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/w5500-overlay.dts
|
|
@@ -0,0 +1,63 @@
|
|
+// Overlay for the Wiznet w5500 Ethernet Controller
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&spidev0>;
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&spidev1>;
|
|
+ __dormant__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ eth1: w5500@0{
|
|
+ compatible = "wiznet,w5500";
|
|
+ reg = <0>; /* CE0 */
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <ð1_pins>;
|
|
+ interrupt-parent = <&gpio>;
|
|
+ interrupts = <25 0x8>;
|
|
+ spi-max-frequency = <30000000>;
|
|
+// local-mac-address = [aa bb cc dd ee ff];
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&gpio>;
|
|
+ __overlay__ {
|
|
+ eth1_pins: eth1_pins {
|
|
+ brcm,pins = <25>;
|
|
+ brcm,function = <0>; /* in */
|
|
+ brcm,pull = <0>; /* none */
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ int_pin = <ð1>, "interrupts:0",
|
|
+ <ð1_pins>, "brcm,pins:0";
|
|
+ speed = <ð1>, "spi-max-frequency:0";
|
|
+ cs = <ð1>, "reg:0",
|
|
+ <0>, "!0=1";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/wittypi-overlay.dts b/arch/arm/boot/dts/overlays/wittypi-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..71ce806186de
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/wittypi-overlay.dts
|
|
@@ -0,0 +1,44 @@
|
|
+/*
|
|
+ * Device Tree overlay for Witty Pi extension board by UUGear
|
|
+ *
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&leds>;
|
|
+ __overlay__ {
|
|
+ compatible = "gpio-leds";
|
|
+ wittypi_led: wittypi_led {
|
|
+ label = "wittypi_led";
|
|
+ linux,default-trigger = "default-on";
|
|
+ gpios = <&gpio 17 0>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ rtc: ds1337@68 {
|
|
+ compatible = "dallas,ds1337";
|
|
+ reg = <0x68>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ led_gpio = <&wittypi_led>,"gpios:4";
|
|
+ led_trigger = <&wittypi_led>,"linux,default-trigger";
|
|
+ };
|
|
+
|
|
+};
|
|
diff --git a/arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts b/arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts
|
|
new file mode 100644
|
|
index 000000000000..289fa4dacdf1
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/overlays/wm8960-soundcard-overlay.dts
|
|
@@ -0,0 +1,82 @@
|
|
+// Definitions for Waveshare WM8960 https://github.com/waveshare/WM8960-Audio-HAT
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2835";
|
|
+
|
|
+ fragment@0 {
|
|
+ target = <&i2s>;
|
|
+ __overlay__ {
|
|
+ status = "okay";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target-path="/";
|
|
+ __overlay__ {
|
|
+ wm8960_mclk: wm8960_mclk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <12288000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@2 {
|
|
+ target = <&i2c1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ wm8960: wm8960 {
|
|
+ compatible = "wlf,wm8960";
|
|
+ reg = <0x1a>;
|
|
+ #sound-dai-cells = <0>;
|
|
+ AVDD-supply = <&vdd_5v0_reg>;
|
|
+ DVDD-supply = <&vdd_3v3_reg>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&sound>;
|
|
+ slave_overlay: __overlay__ {
|
|
+ compatible = "simple-audio-card";
|
|
+ simple-audio-card,format = "i2s";
|
|
+ simple-audio-card,name = "wm8960-soundcard";
|
|
+ status = "okay";
|
|
+
|
|
+ simple-audio-card,widgets =
|
|
+ "Microphone", "Mic Jack",
|
|
+ "Line", "Line In",
|
|
+ "Line", "Line Out",
|
|
+ "Speaker", "Speaker",
|
|
+ "Headphone", "Headphone Jack";
|
|
+ simple-audio-card,routing =
|
|
+ "Headphone Jack", "HP_L",
|
|
+ "Headphone Jack", "HP_R",
|
|
+ "Speaker", "SPK_LP",
|
|
+ "Speaker", "SPK_LN",
|
|
+ "LINPUT1", "Mic Jack",
|
|
+ "LINPUT3", "Mic Jack",
|
|
+ "RINPUT1", "Mic Jack",
|
|
+ "RINPUT2", "Mic Jack";
|
|
+
|
|
+ simple-audio-card,cpu {
|
|
+ sound-dai = <&i2s>;
|
|
+ };
|
|
+ dailink0_slave: simple-audio-card,codec {
|
|
+ sound-dai = <&wm8960>;
|
|
+ clocks = <&wm8960_mclk>;
|
|
+ clock-names = "mclk";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ alsaname = <&slave_overlay>,"simple-audio-card,name";
|
|
+ compatible = <&wm8960>,"compatible";
|
|
+ };
|
|
+};
|
|
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile
|
|
index 639e01a4d855..becca30ad4fe 100644
|
|
--- a/arch/arm64/boot/dts/Makefile
|
|
+++ b/arch/arm64/boot/dts/Makefile
|
|
@@ -30,3 +30,5 @@ subdir-y += synaptics
|
|
subdir-y += ti
|
|
subdir-y += toshiba
|
|
subdir-y += xilinx
|
|
+
|
|
+subdir-y += overlays
|
|
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
|
|
index 11eae3e3a944..5a90727064ee 100644
|
|
--- a/arch/arm64/boot/dts/broadcom/Makefile
|
|
+++ b/arch/arm64/boot/dts/broadcom/Makefile
|
|
@@ -5,7 +5,19 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \
|
|
bcm2837-rpi-3-b.dtb \
|
|
bcm2837-rpi-3-b-plus.dtb \
|
|
bcm2837-rpi-cm3-io3.dtb
|
|
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-2-b.dtb
|
|
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b.dtb
|
|
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-3-b-plus.dtb
|
|
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-4-b.dtb
|
|
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb
|
|
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-cm3.dtb
|
|
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4.dtb
|
|
|
|
subdir-y += bcm4908
|
|
subdir-y += northstar2
|
|
subdir-y += stingray
|
|
+
|
|
+# Enable fixups to support overlays on BCM2835 platforms
|
|
+ifeq ($(CONFIG_ARCH_BCM2835),y)
|
|
+ DTC_FLAGS += -@
|
|
+endif
|
|
diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts
|
|
new file mode 100644
|
|
index 000000000000..36ecea71f0ef
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-2-b.dts
|
|
@@ -0,0 +1 @@
|
|
+#include "../../../../arm/boot/dts/bcm2710-rpi-2-b.dts"
|
|
diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
|
|
new file mode 100644
|
|
index 000000000000..22fc6a82f2a9
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b-plus.dts
|
|
@@ -0,0 +1 @@
|
|
+#include "../../../../arm/boot/dts/bcm2710-rpi-3-b-plus.dts"
|
|
diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
|
|
new file mode 100644
|
|
index 000000000000..4cacc5b72ae3
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-3-b.dts
|
|
@@ -0,0 +1 @@
|
|
+#include "../../../../arm/boot/dts/bcm2710-rpi-3-b.dts"
|
|
diff --git a/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts
|
|
new file mode 100644
|
|
index 000000000000..e1e13784cff6
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm2710-rpi-cm3.dts
|
|
@@ -0,0 +1 @@
|
|
+#include "../../../../arm/boot/dts/bcm2710-rpi-cm3.dts"
|
|
diff --git a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
|
|
index d24c53682e44..bf69a4b0b172 100644
|
|
--- a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-4-b.dts
|
|
@@ -1,2 +1 @@
|
|
-// SPDX-License-Identifier: GPL-2.0
|
|
-#include "arm/bcm2711-rpi-4-b.dts"
|
|
+#include "../../../../arm/boot/dts/bcm2711-rpi-4-b.dts"
|
|
diff --git a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts
|
|
index b9000f58beb5..90c2b5a195d4 100644
|
|
--- a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-400.dts
|
|
@@ -1,2 +1 @@
|
|
-// SPDX-License-Identifier: GPL-2.0
|
|
-#include "arm/bcm2711-rpi-400.dts"
|
|
+#include "../../../../arm/boot/dts/bcm2711-rpi-400.dts"
|
|
diff --git a/arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4.dts b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4.dts
|
|
new file mode 100644
|
|
index 000000000000..8064a58155f1
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm2711-rpi-cm4.dts
|
|
@@ -0,0 +1 @@
|
|
+#include "../../../../arm/boot/dts/bcm2711-rpi-cm4.dts"
|
|
diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi
|
|
new file mode 120000
|
|
index 000000000000..e5c400284467
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-csi1-2lane.dtsi
|
|
@@ -0,0 +1 @@
|
|
+../../../../arm/boot/dts/bcm283x-rpi-csi1-2lane.dtsi
|
|
\ No newline at end of file
|
|
diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
|
|
new file mode 120000
|
|
index 000000000000..fc4c05bbe7fd
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-lan7515.dtsi
|
|
@@ -0,0 +1 @@
|
|
+../../../../arm/boot/dts/bcm283x-rpi-lan7515.dtsi
|
|
\ No newline at end of file
|
|
diff --git a/arch/arm64/boot/dts/overlays b/arch/arm64/boot/dts/overlays
|
|
new file mode 120000
|
|
index 000000000000..ded08646b6f6
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/overlays
|
|
@@ -0,0 +1 @@
|
|
+../../../arm/boot/dts/overlays
|
|
\ No newline at end of file
|
|
diff --git a/scripts/Makefile.dtbinst b/scripts/Makefile.dtbinst
|
|
index 190d781e84f4..84c46c081218 100644
|
|
--- a/scripts/Makefile.dtbinst
|
|
+++ b/scripts/Makefile.dtbinst
|
|
@@ -18,9 +18,10 @@ include $(srctree)/scripts/Kbuild.include
|
|
include $(src)/Makefile
|
|
|
|
dtbs := $(addprefix $(dst)/, $(dtb-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
|
|
+dtbos := $(addprefix $(dst)/, $(dtbo-y) $(if $(CONFIG_OF_ALL_DTBS),$(dtb-)))
|
|
subdirs := $(addprefix $(obj)/, $(subdir-y) $(subdir-m))
|
|
|
|
-__dtbs_install: $(dtbs) $(subdirs)
|
|
+__dtbs_install: $(dtbs) $(dtbos) $(subdirs)
|
|
@:
|
|
|
|
quiet_cmd_dtb_install = INSTALL $@
|
|
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
|
|
index 0a8a4689c3eb..dff7d1ef5ff4 100644
|
|
--- a/scripts/Makefile.lib
|
|
+++ b/scripts/Makefile.lib
|
|
@@ -300,6 +300,7 @@ DTC_FLAGS += -Wno-interrupt_provider
|
|
ifeq ($(findstring 1,$(KBUILD_EXTRA_WARN)),)
|
|
DTC_FLAGS += -Wno-unit_address_vs_reg \
|
|
-Wno-unit_address_format \
|
|
+ -Wno-gpios_property \
|
|
-Wno-avoid_unnecessary_addr_size \
|
|
-Wno-alias_paths \
|
|
-Wno-graph_child_address \
|
|
@@ -373,6 +374,18 @@ endef
|
|
$(obj)/%.dt.yaml: $(src)/%.dts $(DTC) $(DT_TMP_SCHEMA) FORCE
|
|
$(call if_changed_rule,dtc)
|
|
|
|
+quiet_cmd_dtco = DTCO $@
|
|
+cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \
|
|
+ $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \
|
|
+ $(DTC) -@ -H epapr -O dtb -o $@ -b 0 \
|
|
+ -i $(dir $<) $(DTC_FLAGS) \
|
|
+ -Wno-interrupts_property \
|
|
+ -d $(depfile).dtc.tmp $(dtc-tmp) ; \
|
|
+ cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile)
|
|
+
|
|
+$(obj)/%.dtbo: $(src)/%-overlay.dts FORCE
|
|
+ $(call if_changed_dep,dtco)
|
|
+
|
|
dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp)
|
|
|
|
# Bzip2
|
|
--
|
|
2.30.2
|
|
|