1cdbddae6e
Drop upstreamed patches and refresh remaining ones. Manually rebased: - 033-ARM-dts-stm32-rtc-add-LSCO-to-WLAN-BT-module-on-stm3.patch - 035-ARM-dts-stm32-rtc-add-pin-to-provide-LSCO-on-stm32mp.patch Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Link: https://github.com/openwrt/openwrt/pull/18740 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
53 lines
1.3 KiB
Diff
53 lines
1.3 KiB
Diff
From 63c84f846ec5b794a6c90a1c5813cdb0ae75daf6 Mon Sep 17 00:00:00 2001
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From: Thomas Richard <thomas.richard@bootlin.com>
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Date: Thu, 26 Sep 2024 16:48:52 +0200
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Subject: [PATCH] ARM: dts: stm32: add ethernet2 for STM32MP135F-DK board
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This patch is based on the stm32mp135f-dk devicetree from 6.6 ST kernel.
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Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
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---
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arch/arm/boot/dts/st/stm32mp135f-dk.dts | 25 +++++++++++++++++++++++++
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1 file changed, 25 insertions(+)
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--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
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+++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
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@@ -20,6 +20,7 @@
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aliases {
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ethernet0 = ðernet1;
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+ ethernet1 = ðernet2;
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serial0 = &uart4;
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serial1 = &usart1;
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serial2 = &uart8;
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@@ -208,6 +209,30 @@
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};
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};
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+ðernet2 {
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+ status = "okay";
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+ pinctrl-0 = <ð2_rmii_pins_a>;
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+ pinctrl-1 = <ð2_rmii_sleep_pins_a>;
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+ pinctrl-names = "default", "sleep";
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+ phy-mode = "rmii";
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+ phy-handle = <&phy0_eth2>;
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+ st,ext-phyclk;
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+ phy-supply = <&scmi_v3v3_sw>;
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+
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+ mdio1 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ compatible = "snps,dwmac-mdio";
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+ phy0_eth2: ethernet-phy@0 {
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+ compatible = "ethernet-phy-id0007.c131";
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+ reset-gpios = <&mcp23017 10 GPIO_ACTIVE_LOW>;
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+ reg = <0>;
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+ };
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+ };
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+};
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+
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+
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+
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&i2c1 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&i2c1_pins_a>;
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