difos/target/linux/starfive/patches-6.12/1019-riscv-dts-starfive-Add-JH7100-USB-node.patch
Zoltan HERPAI 8f0f02d297 starfive: 6.12: refresh patches and drop upstreamed ones
- refresh, rebase and reorder patches
 - JH7110 media drivers have been dropped for now
 - JH7110 E24 and mailbox drivers were added
 - JH7100 DMA- and errata-patches have been dropped as they were
   upstreamed

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
2025-06-05 16:39:15 +02:00

60 lines
1.9 KiB
Diff

From e73da6a4dc3f127d45e26d68ee051199c1fc2bb9 Mon Sep 17 00:00:00 2001
From: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Date: Sat, 22 Jul 2023 16:36:17 +0200
Subject: [PATCH 1019/1021] riscv: dts: starfive: Add JH7100 USB node
Add the device tree node for the USB 3.0 peripheral on the
StarFive JH7100 SoC.
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
---
.../boot/dts/starfive/jh7100-common.dtsi | 5 ++++
arch/riscv/boot/dts/starfive/jh7100.dtsi | 26 +++++++++++++++++++
2 files changed, 31 insertions(+)
--- a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
@@ -447,3 +447,8 @@
pinctrl-0 = <&uart3_pins>;
status = "okay";
};
+
+&usb3 {
+ dr_mode = "host";
+ status = "okay";
+};
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
@@ -255,6 +255,32 @@
#reset-cells = <1>;
};
+ usb3: usb@104c0000 {
+ compatible = "starfive,jh7100-usb";
+ ranges = <0x0 0x0 0x104c0000 0x100000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&audclk JH7100_AUDCLK_USB_LPM>,
+ <&audclk JH7100_AUDCLK_USB_STB>,
+ <&clkgen JH7100_CLK_USB_AXI>,
+ <&clkgen JH7100_CLK_USBNOC_AXI>;
+ clock-names = "lpm", "stb", "axi", "nocaxi";
+ resets = <&rstgen JH7100_RSTN_USB_AXI>,
+ <&rstgen JH7100_RSTN_USBNOC_AXI>;
+ reset-names = "axi", "nocaxi";
+ status = "disabled";
+
+ usb_cdns3: usb@0 {
+ compatible = "cdns,usb3";
+ reg = <0x00000 0x10000>,
+ <0x10000 0x10000>,
+ <0x20000 0x10000>;
+ reg-names = "otg", "xhci", "dev";
+ interrupts = <44>, <52>, <43>;
+ interrupt-names = "host", "peripheral", "otg";
+ };
+ };
+
clkgen: clock-controller@11800000 {
compatible = "starfive,jh7100-clkgen";
reg = <0x0 0x11800000 0x0 0x10000>;