c057db94f8
Siflower SF21A6826/SF21H8898 are a family of RISC-V SoCs with: * Quad-core T-Head C908 (1.125G for SF21A6826, 1.25G for SF21H8898) * DDR3/DDR4 memory controller * 1 QSGMII 4x1G * 1 SGMII/2500Base-X 2.5G * 1 additional RGMII on SF21H8898 * Network offloading engine for L2 switching and L3 NAT * 2 PCIE Gen2 lanes, operating in either one PCIE Gen2x2 or two PCIE Gen2x1 mode * 1 USB2.0 Link: https://github.com/openwrt/openwrt/pull/17115 Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
41 lines
1.3 KiB
Diff
41 lines
1.3 KiB
Diff
From: Chuanhong Guo <gch981213@gmail.com>
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Date: Thu, 19 Sep 2024 09:23:27 +0800
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Subject: [PATCH 16/20] spi: spi-mem: allow gpio cs in spi_mem_exec_op
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spi_mem_exec_op can use gpio cs, either by not asserting the native
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cs or switching the native cs pin to GPIO mode with pinctrl.
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Allow calling exec_op when GPIO CS present and control GPIO CS
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before and after calling exec_op.
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If exec_op decided to return -EOPNOTSUPP, the code will assert and
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deassert GPIO CS without clock pulsing, which should be fine on most
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SPI slaves.
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Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
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---
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drivers/spi/spi-mem.c | 8 +++++++-
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1 file changed, 7 insertions(+), 1 deletion(-)
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--- a/drivers/spi/spi-mem.c
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+++ b/drivers/spi/spi-mem.c
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@@ -325,13 +325,19 @@ int spi_mem_exec_op(struct spi_mem *mem,
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if (!spi_mem_internal_supports_op(mem, op))
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return -ENOTSUPP;
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- if (ctlr->mem_ops && ctlr->mem_ops->exec_op && !spi_get_csgpiod(mem->spi, 0)) {
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+ if (ctlr->mem_ops && ctlr->mem_ops->exec_op) {
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ret = spi_mem_access_start(mem);
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if (ret)
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return ret;
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+ if (spi_get_csgpiod(mem->spi, 0))
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+ gpiod_set_value_cansleep(spi_get_csgpiod(mem->spi, 0), 1);
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+
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ret = ctlr->mem_ops->exec_op(mem, op);
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+ if (spi_get_csgpiod(mem->spi, 0))
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+ gpiod_set_value_cansleep(spi_get_csgpiod(mem->spi, 0), 0);
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+
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spi_mem_access_end(mem);
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/*
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