Backport support for RK3588 hardware RNG driver. Signed-off-by: Marty Jones <mj8263788@gmail.com> Link: https://github.com/openwrt/openwrt/pull/19366 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
74 lines
2.6 KiB
Diff
74 lines
2.6 KiB
Diff
From 849d9db170fc8a03ce9f64133a1d0cd46c135105 Mon Sep 17 00:00:00 2001
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From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
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Date: Tue, 4 Feb 2025 16:35:46 +0100
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Subject: [PATCH] dt-bindings: reset: Add SCMI reset IDs for RK3588
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When TF-A is used to assert/deassert the resets through SCMI, the
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IDs communicated to it are different than the ones mainline Linux uses.
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Import the list of SCMI reset IDs from mainline TF-A so that devicetrees
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can use these IDs more easily.
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Co-developed-by: XiaoDong Huang <derrick.huang@rock-chips.com>
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Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
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Acked-by: Conor Dooley <conor.dooley@microchip.com>
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Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
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Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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---
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.../dt-bindings/reset/rockchip,rk3588-cru.h | 41 ++++++++++++++++++-
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1 file changed, 40 insertions(+), 1 deletion(-)
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--- a/include/dt-bindings/reset/rockchip,rk3588-cru.h
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+++ b/include/dt-bindings/reset/rockchip,rk3588-cru.h
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@@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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/*
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- * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
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+ * Copyright (c) 2021, 2024 Rockchip Electronics Co. Ltd.
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* Copyright (c) 2022 Collabora Ltd.
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*
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* Author: Elaine Zhang <zhangqing@rock-chips.com>
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@@ -753,4 +753,43 @@
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#define SRST_A_HDMIRX_BIU 660
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+/* SCMI Secure Resets */
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+
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+/* Name=SECURE_SOFTRST_CON00,Offset=0xA00 */
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+#define SCMI_SRST_A_SECURE_NS_BIU 10
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+#define SCMI_SRST_H_SECURE_NS_BIU 11
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+#define SCMI_SRST_A_SECURE_S_BIU 12
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+#define SCMI_SRST_H_SECURE_S_BIU 13
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+#define SCMI_SRST_P_SECURE_S_BIU 14
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+#define SCMI_SRST_CRYPTO_CORE 15
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+/* Name=SECURE_SOFTRST_CON01,Offset=0xA04 */
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+#define SCMI_SRST_CRYPTO_PKA 16
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+#define SCMI_SRST_CRYPTO_RNG 17
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+#define SCMI_SRST_A_CRYPTO 18
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+#define SCMI_SRST_H_CRYPTO 19
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+#define SCMI_SRST_KEYLADDER_CORE 25
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+#define SCMI_SRST_KEYLADDER_RNG 26
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+#define SCMI_SRST_A_KEYLADDER 27
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+#define SCMI_SRST_H_KEYLADDER 28
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+#define SCMI_SRST_P_OTPC_S 29
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+#define SCMI_SRST_OTPC_S 30
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+#define SCMI_SRST_WDT_S 31
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+/* Name=SECURE_SOFTRST_CON02,Offset=0xA08 */
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+#define SCMI_SRST_T_WDT_S 32
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+#define SCMI_SRST_H_BOOTROM 33
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+#define SCMI_SRST_A_DCF 34
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+#define SCMI_SRST_P_DCF 35
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+#define SCMI_SRST_H_BOOTROM_NS 37
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+#define SCMI_SRST_P_KEYLADDER 46
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+#define SCMI_SRST_H_TRNG_S 47
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+/* Name=SECURE_SOFTRST_CON03,Offset=0xA0C */
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+#define SCMI_SRST_H_TRNG_NS 48
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+#define SCMI_SRST_D_SDMMC_BUFFER 49
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+#define SCMI_SRST_H_SDMMC 50
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+#define SCMI_SRST_H_SDMMC_BUFFER 51
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+#define SCMI_SRST_SDMMC 52
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+#define SCMI_SRST_P_TRNG_CHK 53
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+#define SCMI_SRST_TRNG_S 54
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+
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+
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#endif
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