e9a093818c
Patches where fuzz had to be cleaned up. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/18935 Signed-off-by: Robert Marko <robimarko@gmail.com>
79 lines
2.6 KiB
Diff
79 lines
2.6 KiB
Diff
From 9d9bf16aa8d966834ac1280f96c37d22552c33d1 Mon Sep 17 00:00:00 2001
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From: Birger Koblitz <git@birger-koblitz.de>
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Date: Wed, 8 Sep 2021 16:13:18 +0200
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Subject: realtek phy: Add PHY hsgmii mode
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This adds RTL93xx-specific MAC configuration routines that allow also configuration
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of 10GBit links for phylink. There is support for the Realtek-specific HSGMII
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protocol.
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Submitted-by: Birger Koblitz <git@birger-koblitz.de>
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---
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drivers/net/phy/phy-core.c | 1 +
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drivers/net/phy/phylink.c | 4 ++++
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include/linux/phy.h | 3 +++
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3 files changed, 8 insertions(+)
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--- a/drivers/net/phy/phy-core.c
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+++ b/drivers/net/phy/phy-core.c
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@@ -126,6 +126,7 @@ int phy_interface_num_ports(phy_interfac
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case PHY_INTERFACE_MODE_MOCA:
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case PHY_INTERFACE_MODE_TRGMII:
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case PHY_INTERFACE_MODE_USXGMII:
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+ case PHY_INTERFACE_MODE_HSGMII:
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_SMII:
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case PHY_INTERFACE_MODE_1000BASEX:
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--- a/drivers/net/phy/phylink.c
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+++ b/drivers/net/phy/phylink.c
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@@ -124,6 +124,7 @@ do { \
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static const phy_interface_t phylink_sfp_interface_preference[] = {
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PHY_INTERFACE_MODE_25GBASER,
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PHY_INTERFACE_MODE_USXGMII,
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+ PHY_INTERFACE_MODE_HSGMII,
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PHY_INTERFACE_MODE_10GBASER,
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PHY_INTERFACE_MODE_5GBASER,
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PHY_INTERFACE_MODE_2500BASEX,
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@@ -239,6 +240,7 @@ static int phylink_interface_max_speed(p
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case PHY_INTERFACE_MODE_XGMII:
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case PHY_INTERFACE_MODE_RXAUI:
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+ case PHY_INTERFACE_MODE_HSGMII:
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case PHY_INTERFACE_MODE_XAUI:
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case PHY_INTERFACE_MODE_10GBASER:
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case PHY_INTERFACE_MODE_10GKR:
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@@ -552,6 +554,7 @@ static unsigned long phylink_get_capabil
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break;
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case PHY_INTERFACE_MODE_XGMII:
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+ case PHY_INTERFACE_MODE_HSGMII:
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case PHY_INTERFACE_MODE_RXAUI:
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case PHY_INTERFACE_MODE_XAUI:
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case PHY_INTERFACE_MODE_10GBASER:
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@@ -933,6 +936,7 @@ static int phylink_parse_mode(struct phy
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case PHY_INTERFACE_MODE_USXGMII:
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case PHY_INTERFACE_MODE_10G_QXGMII:
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case PHY_INTERFACE_MODE_10GKR:
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+ case PHY_INTERFACE_MODE_HSGMII:
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case PHY_INTERFACE_MODE_10GBASER:
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case PHY_INTERFACE_MODE_XLGMII:
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caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
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--- a/include/linux/phy.h
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+++ b/include/linux/phy.h
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@@ -152,6 +152,7 @@ typedef enum {
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PHY_INTERFACE_MODE_XGMII,
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PHY_INTERFACE_MODE_XLGMII,
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PHY_INTERFACE_MODE_MOCA,
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+ PHY_INTERFACE_MODE_HSGMII,
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PHY_INTERFACE_MODE_PSGMII,
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PHY_INTERFACE_MODE_QSGMII,
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PHY_INTERFACE_MODE_TRGMII,
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@@ -261,6 +262,8 @@ static inline const char *phy_modes(phy_
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return "xlgmii";
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case PHY_INTERFACE_MODE_MOCA:
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return "moca";
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+ case PHY_INTERFACE_MODE_HSGMII:
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+ return "hsgmii";
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case PHY_INTERFACE_MODE_PSGMII:
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return "psgmii";
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case PHY_INTERFACE_MODE_QSGMII:
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