e124859587
To avoid unneeded interrupts the R4K timer is deactivated during secondary cpu initialization. This is currently done during phase init_secondary(). With the upgrade to 6.12 the kernel runs a primary/secondary cpu timer/counter synchronization to verify the proper setup in synchronise_count_slave(). That runs at a later point in time and expects the secondary counter to be fully functional. Finding a deactivated counter results in the following messages: WARNING: CPU: 1 PID: 0 at arch/mips/kernel/sync-r4k.c:99 check_counter_warp+0x220/0x254 Warning: zero counter calibration delta: 0 [max: 6500000] Counter synchronization [CPU#0 -> CPU#1]: Measured 278760029 cycles counter warp between CPUs Relocate the deactivation to smp_finsh() at the end of the cpu startup sequence. Additionally polish the startup code and remove all unneeded parts. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/18935 Signed-off-by: Robert Marko <robimarko@gmail.com> |
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