Specification: SoC: MediaTek MT7628AN RAM: 128 MB, Zentel A3R1GE40JBF-8E Flash: 16MB, Winbond W25Q128JV Switch: rt3050-esw, 2 ports 100 Mbps WiFi: MediaTek mt7628-wmac 2.4GHz 802.11n and MediaTek MT7663 5GHz 802.11ac (PCIe) WWAN: Quectel EC200A-EL 4G modem (USB) GPIO: * 1 button (Reset/WPS) * 6 LEDs (Power+WPS, LAN, 3xSignal) * USB port power controls * Modem reset * Modem programming switch * Internal/external antenna switch for 4G Serial Interface: TP10 - 3.3V can be used for level shifter, if needed TP9 - TX TP8 - RX TP11 - GND Interface properties: 115200, 8N1 Access to console using serial port for OEM firmware: Username: admin Password: 1234 Flashing via TFTP (no disassembling or soldering required): 1. Connect your PC and router to port LAN 2. Configure PC interface using static IP 192.168.1.225, mask 255.255.255.0 3. Place OpenWRT firmware image (*-squashfs-tftp-recovery.bin) to TFTP root folder and renamed it to tp_recovery.bin 4. Unplug power from router 5. Press and hold Reset/WPS button 6. Power up the router 7. Wait until TFTP started uploading image (~10 seconds after power up) and release Reset/WPS button 8. Wait until image uploaded, i.e. until LAN LED start lighting 9. Enable DHCP address on PC interface and wait for assigning address 10. Use ssh (root@192.168.1.1) to configure router properties Depends on patch for firmware-utils package: https://github.com/openwrt/firmware-utils/commit/2051fe5b Signed-off-by: Sergii Shcherbakov <shchers@gmail.com> Link: https://github.com/openwrt/openwrt/pull/17819 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
239 lines
4.2 KiB
Text
239 lines
4.2 KiB
Text
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7628an.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "mercusys,mb130-4g-v1", "mediatek,mt7628an-soc";
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model = "MERCUSYS MB130-4G v1";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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label-mac-device = ðernet;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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leds {
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compatible = "gpio-leds";
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wan {
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function = LED_FUNCTION_WAN;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
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};
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lan {
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function = LED_FUNCTION_LAN;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
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};
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led_power: power {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
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};
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wps {
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function = LED_FUNCTION_WPS;
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color = <LED_COLOR_ID_ORANGE>;
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gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
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};
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signal1 {
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label = "green:signal1";
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gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
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};
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signal2 {
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label = "green:signal2";
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gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
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};
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signal3 {
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label = "green:signal3";
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gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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rfkill {
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label = "rfkill";
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gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RFKILL>;
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};
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};
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gpio_export {
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compatible = "gpio-export";
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out_atn {
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gpio-export,name = "out_atn";
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gpio-export,output = <0>;
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gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
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};
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usb_power {
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gpio-export,name = "usb_power";
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gpio-export,output = <1>;
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gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
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};
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usb_boot {
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gpio-export,name = "usb_boot";
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gpio-export,output = <0>;
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gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
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};
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usb_reset {
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gpio-export,name = "usb_reset";
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gpio-export,output = <0>;
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gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x20000>;
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read-only;
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};
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partition@20000 {
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compatible = "tplink,firmware";
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label = "firmware";
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reg = <0x20000 0xe90000>;
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};
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partition@eb0000 {
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label = "ispconfig";
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reg = <0xeb0000 0x10000>;
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read-only;
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};
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partition@ec0000 {
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label = "romfile";
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reg = <0xec0000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_romfile_f100: macaddr@f100 {
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compatible = "mac-base";
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reg = <0xf100 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@ed0000 {
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label = "config";
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reg = <0xed0000 0x10000>;
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read-only;
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};
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partition@ee0000 {
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label = "configbak";
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reg = <0xee0000 0x10000>;
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read-only;
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};
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partition@ef0000 {
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label = "radio";
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reg = <0xef0000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_radio_0: eeprom@0 {
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reg = <0x0 0x400>;
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};
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eeprom_radio_8000: eeprom@8000 {
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reg = <0x8000 0x200>;
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};
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};
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};
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partition@f00000 {
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label = "userdata";
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reg = <0xf00000 0x100000>;
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read-only;
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};
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};
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};
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};
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&state_default {
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gpio {
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groups = "i2c", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an", "uart1", "wdt";
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function = "gpio";
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};
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};
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&wmac {
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nvmem-cells = <&eeprom_radio_0>, <&macaddr_romfile_f100 0>;
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nvmem-cell-names = "eeprom", "mac-address";
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status = "okay";
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};
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&esw {
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mediatek,portmap = <0x37>;
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mediatek,portdisable = <0x33>;
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};
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ðernet {
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nvmem-cells = <&macaddr_romfile_f100 0>;
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nvmem-cell-names = "mac-address";
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_radio_8000>, <&macaddr_romfile_f100 (-1)>;
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nvmem-cell-names = "eeprom", "mac-address";
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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