Replaced all mt76@ with wifi@ per upstream requirement for all wifi nodes. Added missing compatible string where appropriate as stated by mt76.yaml upstream. Also updated reg value to be consistent everywhere. Replace all pci14c3 entries to use mediatek,mt76. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://github.com/openwrt/openwrt/pull/19067 Signed-off-by: Robert Marko <robimarko@gmail.com>
279 lines
4.7 KiB
Text
279 lines
4.7 KiB
Text
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "netgear,ex6150", "mediatek,mt7621-soc";
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model = "Netgear EX6150";
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aliases {
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led-boot = &power_green;
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led-failsafe = &power_amber;
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led-running = &power_green;
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led-upgrade = &power_amber;
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};
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leds {
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compatible = "gpio-leds";
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power_amber: power_amber {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_AMBER>;
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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};
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power_green: power_green {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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};
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wps {
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function = LED_FUNCTION_WPS;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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};
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rightarrow {
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label = "blue:rightarrow";
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gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
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};
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leftarrow {
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label = "blue:leftarrow";
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gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
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};
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router_green {
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label = "green:router";
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gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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router_red {
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label = "red:router";
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gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
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};
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client_green {
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label = "green:client";
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gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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client_red {
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label = "red:client";
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gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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wps {
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label = "wps";
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gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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reset {
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label = "reset";
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gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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toggle {
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label = "AP/Extender toggle";
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gpios = <&gpio 48 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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linux,input-type = <EV_SW>;
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/* Active when switch is set to "Access Point" */
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "config";
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reg = <0x30000 0x10000>;
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read-only;
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};
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partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x200>;
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};
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eeprom_factory_8000: eeprom@8000 {
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reg = <0x8000 0x200>;
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};
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macaddr_factory_4: macaddr@4 {
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reg = <0x4 0x6>;
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};
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};
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0xe80000>;
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};
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partition@ed0000 {
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label = "ML1";
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reg = <0xed0000 0x10000>;
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read-only;
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};
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partition@ef0000 {
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label = "ML2";
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reg = <0xef0000 0x20000>;
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read-only;
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};
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partition@f10000 {
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label = "ML3";
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reg = <0xf10000 0x20000>;
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read-only;
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};
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partition@f30000 {
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label = "ML4";
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reg = <0xf30000 0x20000>;
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read-only;
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};
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partition@f50000 {
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label = "ML5";
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reg = <0xf50000 0x20000>;
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read-only;
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};
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partition@f70000 {
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label = "ML6";
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reg = <0xf70000 0x20000>;
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read-only;
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};
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partition@f90000 {
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label = "ML7";
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reg = <0xf90000 0x20000>;
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read-only;
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};
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partition@fb0000 {
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label = "T_Meter1";
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reg = <0xfb0000 0x10000>;
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read-only;
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};
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partition@fc0000 {
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label = "T_Meter2";
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reg = <0xfc0000 0x10000>;
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read-only;
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};
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partition@fd0000 {
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label = "POT";
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reg = <0xfd0000 0x10000>;
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read-only;
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};
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partition@fe0000 {
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label = "board_data";
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reg = <0xfe0000 0x10000>;
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read-only;
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};
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partition@ff0000 {
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label = "nvram";
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reg = <0xff0000 0x10000>;
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read-only;
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};
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};
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};
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};
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&pcie {
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status = "okay";
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reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
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<&gpio 8 GPIO_ACTIVE_LOW>;
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_8000>;
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nvmem-cell-names = "eeprom";
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&pcie1 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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ieee80211-freq-limit = <2400000 2500000>;
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};
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};
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ðernet {
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pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
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};
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&gmac0 {
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nvmem-cells = <&macaddr_factory_4>;
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nvmem-cell-names = "mac-address";
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};
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&switch0 {
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ports {
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port@0 {
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status = "okay";
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label = "lan";
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};
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};
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};
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&state_default {
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gpio {
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groups = "sdhci", "rgmii2", "jtag";
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function = "gpio";
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};
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};
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