Replaced all mt76@ with wifi@ per upstream requirement for all wifi nodes. Added missing compatible string where appropriate as stated by mt76.yaml upstream. Also updated reg value to be consistent everywhere. Replace all pci14c3 entries to use mediatek,mt76. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://github.com/openwrt/openwrt/pull/19067 Signed-off-by: Robert Marko <robimarko@gmail.com>
218 lines
3.5 KiB
Text
218 lines
3.5 KiB
Text
#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "mtc,wr1201", "mediatek,mt7621-soc";
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model = "MTC Wireless Router WR1201";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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label-mac-device = &gmac0;
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};
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leds {
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compatible = "gpio-leds";
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led_power: power {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
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};
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usb {
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function = LED_FUNCTION_USB;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
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trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
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linux,default-trigger = "usbport";
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};
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eth_link {
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label = "green:eth_link";
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gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
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};
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wps {
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function = LED_FUNCTION_WPS;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Bootloader";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "Config";
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reg = <0x30000 0x10000>;
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read-only;
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};
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partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x200>;
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};
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eeprom_factory_8000: eeprom@8000 {
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reg = <0x8000 0x200>;
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};
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macaddr_factory_4: macaddr@4 {
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compatible = "mac-base";
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reg = <0x4 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0xfa0000>;
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};
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partition@ff0000 {
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label = "Second_Config";
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reg = <0xff0000 0x10000>;
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read-only;
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};
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};
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};
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};
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ðernet {
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pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
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};
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&gmac0 {
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nvmem-cells = <&macaddr_factory_4 0>;
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nvmem-cell-names = "mac-address";
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};
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&switch0 {
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ports {
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port@0 {
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status = "okay";
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label = "lan4";
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};
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port@1 {
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status = "okay";
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label = "lan3";
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};
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port@2 {
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status = "okay";
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label = "lan2";
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};
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port@3 {
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status = "okay";
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label = "lan1";
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};
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port@4 {
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status = "okay";
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label = "wan";
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nvmem-cells = <&macaddr_factory_4 1>;
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nvmem-cell-names = "mac-address";
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};
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};
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};
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&sdhci {
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status = "okay";
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};
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&pcie_pins {
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uart3 {
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groups = "uart3";
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function = "gpio";
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};
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};
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&pcie {
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status = "okay";
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reset-gpios = <&gpio 8 GPIO_ACTIVE_LOW>,
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<&gpio 19 GPIO_ACTIVE_LOW>;
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};
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&pcie0 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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ieee80211-freq-limit = <5000000 6000000>;
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nvmem-cells = <&eeprom_factory_8000>;
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nvmem-cell-names = "eeprom";
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led {
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led-sources = <2>;
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led-active-low;
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};
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};
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};
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&pcie1 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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ieee80211-freq-limit = <2400000 2500000>;
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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led {
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led-sources = <2>;
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led-active-low;
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};
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};
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};
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&state_default {
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gpio {
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groups = "rgmii2";
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function = "gpio";
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};
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};
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