1738e87632
Drop upstreamed patches: 0001-v6.16-pinctrl-armada-37xx-use-correct-OUTPUT_VAL-register-.patch 0002-v6.16-pinctrl-armada-37xx-set-GPIO-output-value-before-set.patch 820-v6.11-01-dt-bindings-firmware-add-cznic-turris-omnia-mcu-bind.patch 820-v6.11-02-platform-cznic-Add-preliminary-support-for-Turris-Om.patch 820-v6.11-03-platform-cznic-turris-omnia-mcu-Add-support-for-MCU-.patch 820-v6.11-04-platform-cznic-turris-omnia-mcu-Add-support-for-powe.patch 820-v6.11-05-platform-cznic-turris-omnia-mcu-Add-support-for-MCU-.patch 820-v6.11-06-platform-cznic-turris-omnia-mcu-Add-support-for-MCU-.patch 820-v6.11-07-ARM-dts-turris-omnia-Add-MCU-system-controller-node.patch 820-v6.11-08-ARM-dts-turris-omnia-Add-GPIO-key-node-for-front-but.patch 820-v6.11-09-platform-cznic-turris-omnia-mcu-Depend-on-OF.patch 820-v6.11-10-platform-cznic-turris-omnia-mcu-Depend-on-WATCHDOG.patch 820-v6.11-11-platform-cznic-turris-omnia-mcu-fix-Kconfig-dependen.patch Manually refreshed: 310-linksys-use-eth0-as-cpu-port.patch 350-drivers-thermal-step_wise-add-support-for-hysteresis.patch 901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch 902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch 910-drivers-leds-wt61p803-puzzle-improvements.patch All other patches automatically refreshed. Signed-off-by: Stefan Kalscheuer <stefan@stklcode.de> Link: https://github.com/openwrt/openwrt/pull/18975 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
309 lines
14 KiB
Diff
309 lines
14 KiB
Diff
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From: Gabor Juhos <j4g8y7@gmail.com>
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Date: Sun, 11 May 2025 15:31:07 +0200
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Subject: [PATCH 3/3] i2c: pxa: handle 'Early Bus Busy' condition on Armada
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3700
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In-Reply-To:
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To: Wolfram Sang <wsa@kernel.org>, Andi Shyti <andi.shyti@kernel.org>,
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Russell King <rmk+kernel@armlinux.org.uk>, Andrew Lunn <andrew@lunn.ch>
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Cc: Robert Marko <robert.marko@sartura.hr>,
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Linus Walleij <linus.walleij@linaro.org>,
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Under some circumstances I2C recovery fails on Armada 3700. At least
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on the Methode uDPU board, removing and replugging an SFP module fails
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often, like this:
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[ 36.953127] sfp sfp-eth1: module removed
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[ 38.468549] i2c i2c-1: i2c_pxa: timeout waiting for bus free
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[ 38.486960] sfp sfp-eth1: module MENTECHOPTO POS22-LDCC-KR rev 1.0 sn MNC208U90009 dc 200828
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[ 38.496867] mvneta d0040000.ethernet eth1: unsupported SFP module: no common interface modes
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[ 38.521448] hwmon hwmon2: temp1_input not attached to any thermal zone
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[ 39.249196] sfp sfp-eth1: module removed
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...
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[ 292.568799] sfp sfp-eth1: please wait, module slow to respond
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...
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[ 625.208814] sfp sfp-eth1: failed to read EEPROM: -EREMOTEIO
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Note that the 'unsupported SFP module' messages are not relevant. The
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module is used only for testing the I2C recovery funcionality, because
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the error can be triggered easily with this specific one.
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Enabling debug in the i2c-pxa driver reveals the following:
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[ 82.034678] sfp sfp-eth1: module removed
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[ 90.008654] i2c i2c-1: slave_0x50 error: timeout with active message
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[ 90.015112] i2c i2c-1: msg_num: 2 msg_idx: 0 msg_ptr: 0
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[ 90.020464] i2c i2c-1: IBMR: 00000003 IDBR: 000000a0 ICR: 000007e0 ISR: 00000802
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[ 90.027906] i2c i2c-1: log:
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[ 90.030787]
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This continues until the retries are exhausted ...
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[ 110.192489] i2c i2c-1: slave_0x50 error: exhausted retries
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[ 110.198012] i2c i2c-1: msg_num: 2 msg_idx: 0 msg_ptr: 0
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[ 110.203323] i2c i2c-1: IBMR: 00000003 IDBR: 000000a0 ICR: 000007e0 ISR: 00000802
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[ 110.210810] i2c i2c-1: log:
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[ 110.213633]
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... then the whole sequence starts again ...
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[ 115.368641] i2c i2c-1: slave_0x50 error: timeout with active message
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... while finally the SFP core gives up:
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[ 671.975258] sfp sfp-eth1: failed to read EEPROM: -EREMOTEIO
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When we analyze the log, it can be seen that bit 1 and 11 is set in the
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ISR (Interface Status Register). Bit 1 indicates the ACK/NACK status, but
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the purpose of bit 11 is not documented in the driver code unfortunately.
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The 'Functional Specification' document of the Armada 3700 SoCs family
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however says that this bit indicates an 'Early Bus Busy' condition. The
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document also notes that whenever this bit is set, it is not possible to
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initiate a transaction on the I2C bus. The observed behaviour corresponds
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to this statement.
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Unfortunately, I2C recovery does not help as it never runs in this
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special case. Although the driver checks the busyness of the bus at
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several places, but since it does not consider the A3700 specific bit
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in these checks it can't determine the actual status of the bus correctly
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which results in the errors above.
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In order to fix the problem, add a new member to struct 'i2c_pxa' to
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store a controller specific bitmask containing the bits indicating the
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busy status, and use that in the code while checking the actual status
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of the bus. This ensures that the correct status can be determined on
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the Armada 3700 based devices without causing functional changes on
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devices based on other SoCs.
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With the change applied, the driver detects the busy condition, and runs
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the recovery process:
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[ 742.617312] i2c i2c-1: state:i2c_pxa_wait_bus_not_busy:449: ISR=00000802, ICR=000007e0, IBMR=03
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[ 742.626099] i2c i2c-1: i2c_pxa: timeout waiting for bus free
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[ 742.631933] i2c i2c-1: recovery: resetting controller, ISR=0x00000802
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[ 742.638421] i2c i2c-1: recovery: IBMR 0x00000003 ISR 0x00000000
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This clears the EBB bit in the ISR register, so it makes it possible to
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initiate transactions on the I2C bus again.
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After this patch, the SFP module used for testing can be removed and
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replugged numerous times without causing the error described at the
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beginning. Previously, the error happened after a few such attempts.
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The patch has been tested also with the following kernel versions:
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5.10.237, 5.15.182, 6.1.138, 6.6.90, 6.12.28, 6.14.6. It improves
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recoverabilty on all of them.
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Cc: stable@vger.kernel.org # 5.8+
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Fixes: 7c9ec2c52518 ("i2c: pxa: implement generic i2c bus recovery")
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Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
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Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
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---
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Note: the patch is included in this series for completeness however
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it can be applied independently from the preceding patches. On kernels
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6.3+, it restores I2C functionality even in itself because it recovers
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the controller from the bad state described in the previous patch.
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---
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drivers/i2c/busses/i2c-pxa.c | 18 ++++++++++++------
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1 file changed, 12 insertions(+), 6 deletions(-)
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--- a/drivers/i2c/busses/i2c-pxa.c
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+++ b/drivers/i2c/busses/i2c-pxa.c
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@@ -71,6 +71,7 @@
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#define ISR_GCAD (1 << 8) /* general call address detected */
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#define ISR_SAD (1 << 9) /* slave address detected */
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#define ISR_BED (1 << 10) /* bus error no ACK/NAK */
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+#define ISR_A3700_EBB (1 << 11) /* early bus busy for armada 3700 */
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#define ILCR_SLV_SHIFT 0
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#define ILCR_SLV_MASK (0x1FF << ILCR_SLV_SHIFT)
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@@ -263,6 +264,7 @@ struct pxa_i2c {
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bool highmode_enter;
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u32 fm_mask;
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u32 hs_mask;
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+ u32 busy_mask;
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struct i2c_bus_recovery_info recovery;
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struct pinctrl *pinctrl;
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@@ -429,7 +431,7 @@ static int i2c_pxa_wait_bus_not_busy(str
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while (1) {
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isr = readl(_ISR(i2c));
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- if (!(isr & (ISR_IBB | ISR_UB)))
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+ if (!(isr & i2c->busy_mask))
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return 0;
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if (isr & ISR_SAD)
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@@ -466,7 +468,7 @@ static int i2c_pxa_wait_master(struct px
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* quick check of the i2c lines themselves to ensure they've
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* gone high...
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*/
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- if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) == 0 &&
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+ if ((readl(_ISR(i2c)) & i2c->busy_mask) == 0 &&
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readl(_IBMR(i2c)) == (IBMR_SCLS | IBMR_SDAS)) {
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if (i2c_debug > 0)
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dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);
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@@ -487,7 +489,7 @@ static int i2c_pxa_set_master(struct pxa
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if (i2c_debug)
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dev_dbg(&i2c->adap.dev, "setting to bus master\n");
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- if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) != 0) {
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+ if ((readl(_ISR(i2c)) & i2c->busy_mask) != 0) {
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dev_dbg(&i2c->adap.dev, "%s: unit is busy\n", __func__);
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if (!i2c_pxa_wait_master(i2c)) {
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dev_dbg(&i2c->adap.dev, "%s: error: unit busy\n", __func__);
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@@ -513,7 +515,7 @@ static int i2c_pxa_wait_slave(struct pxa
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dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
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__func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
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- if ((readl(_ISR(i2c)) & (ISR_UB|ISR_IBB)) == 0 ||
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+ if ((readl(_ISR(i2c)) & i2c->busy_mask) == 0 ||
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(readl(_ISR(i2c)) & ISR_SAD) != 0 ||
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(readl(_ICR(i2c)) & ICR_SCLE) == 0) {
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if (i2c_debug > 1)
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@@ -1171,7 +1173,7 @@ static int i2c_pxa_pio_set_master(struct
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/*
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* Wait for the bus to become free.
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*/
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- while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB))
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+ while (timeout-- && readl(_ISR(i2c)) & i2c->busy_mask)
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udelay(1000);
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if (timeout < 0) {
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@@ -1316,7 +1318,7 @@ static void i2c_pxa_unprepare_recovery(s
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* handing control of the bus back to avoid the bus changing state.
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*/
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isr = readl(_ISR(i2c));
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- if (isr & (ISR_UB | ISR_IBB)) {
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+ if (isr & i2c->busy_mask) {
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dev_dbg(&i2c->adap.dev,
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"recovery: resetting controller, ISR=0x%08x\n", isr);
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i2c_pxa_do_reset(i2c);
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@@ -1480,6 +1482,10 @@ static int i2c_pxa_probe(struct platform
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i2c->fm_mask = pxa_reg_layout[i2c_type].fm;
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i2c->hs_mask = pxa_reg_layout[i2c_type].hs;
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+ i2c->busy_mask = ISR_UB | ISR_IBB;
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+ if (i2c_type == REGS_A3700)
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+ i2c->busy_mask |= ISR_A3700_EBB;
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+
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if (i2c_type != REGS_CE4100)
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i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar;
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