8f9e91ad03
These patches were generated from: https://github.com/raspberrypi/linux/commits/rpi-6.12.y With the following command: git format-patch -N v6.12.27..HEAD (HEAD -> 8d3206ee456a5ecdf9ddbfd8e5e231e4f0cd716e) Exceptions: - (def)configs patches - github workflows patches - applied & reverted patches - readme patches - wireless patches Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
65 lines
2.3 KiB
Diff
65 lines
2.3 KiB
Diff
From f814a2de7898a6bcc55733b4a39c724f90d20a0e Mon Sep 17 00:00:00 2001
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From: Dom Cobley <popcornmix@gmail.com>
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Date: Thu, 27 Jan 2022 15:32:04 +0000
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Subject: [PATCH] vc4/drm:plane: Make use of chroma siting parameter
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Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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---
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drivers/gpu/drm/vc4/vc4_plane.c | 13 +++++++++----
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1 file changed, 9 insertions(+), 4 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_plane.c
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+++ b/drivers/gpu/drm/vc4/vc4_plane.c
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@@ -594,7 +594,7 @@ static void vc4_write_tpz(struct vc4_pla
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#define PHASE_BITS 6
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static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst,
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- u32 xy, int channel)
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+ u32 xy, int channel, int chroma_offset)
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{
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struct vc4_dev *vc4 = to_vc4_dev(vc4_state->base.plane->dev);
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u32 scale = src / dst;
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@@ -605,7 +605,7 @@ static void vc4_write_ppf(struct vc4_pla
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/*
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* Start the phase at 1/2 pixel from the 1st pixel at src_x.
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- * 1/4 pixel for YUV.
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+ * 1/4 pixel for YUV, plus the offset for chroma siting.
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*/
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if (channel) {
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/*
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@@ -613,6 +613,7 @@ static void vc4_write_ppf(struct vc4_pla
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* display list's x value
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*/
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offset = (xy & 0x1ffff) >> (16 - PHASE_BITS) >> 1;
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+ offset -= chroma_offset >> (17 - PHASE_BITS);
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offset += -(1 << PHASE_BITS >> 2);
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} else {
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/*
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@@ -839,13 +840,15 @@ static void vc4_write_scaling_parameters
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/* Ch0 H-PPF Word 0: Scaling Parameters */
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if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) {
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vc4_write_ppf(vc4_state, vc4_state->src_w[channel],
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- vc4_state->crtc_w, vc4_state->src_x, channel);
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+ vc4_state->crtc_w, vc4_state->src_x, channel,
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+ state->chroma_siting_h);
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}
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/* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
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if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) {
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vc4_write_ppf(vc4_state, vc4_state->src_h[channel],
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- vc4_state->crtc_h, vc4_state->src_y, channel);
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+ vc4_state->crtc_h, vc4_state->src_y, channel,
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+ state->chroma_siting_v);
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vc4_dlist_write(vc4_state, 0xc0c0c0c0);
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}
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@@ -2561,6 +2564,8 @@ struct drm_plane *vc4_plane_init(struct
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DRM_COLOR_YCBCR_BT709,
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DRM_COLOR_YCBCR_LIMITED_RANGE);
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+ drm_plane_create_chroma_siting_properties(plane, 0, 0);
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+
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if (type == DRM_PLANE_TYPE_PRIMARY)
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drm_plane_create_zpos_immutable_property(plane, 0);
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