8f9e91ad03
These patches were generated from: https://github.com/raspberrypi/linux/commits/rpi-6.12.y With the following command: git format-patch -N v6.12.27..HEAD (HEAD -> 8d3206ee456a5ecdf9ddbfd8e5e231e4f0cd716e) Exceptions: - (def)configs patches - github workflows patches - applied & reverted patches - readme patches - wireless patches Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
34 lines
1.2 KiB
Diff
34 lines
1.2 KiB
Diff
From c78cba8e745719e47a0c5c7811fa86c8a5334ab4 Mon Sep 17 00:00:00 2001
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From: Dom Cobley <popcornmix@gmail.com>
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Date: Tue, 13 Aug 2024 17:18:51 +0100
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Subject: [PATCH] drm/vc4: Also power down the PLL core when resetting PHY
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The current reset code doesn't actually stop the hdmi output.
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That makes it difficult for displays to handle a mode set.
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Powering down the PLL does actually remove the hdmi signal
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and makes mode sets more reliable
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Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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---
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drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 2 ++
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1 file changed, 2 insertions(+)
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--- a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
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@@ -137,6 +137,7 @@
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#define VC6_HDMI_TX_PHY_PLL_REFCLK_REFCLK_SEL_CMOS BIT(13)
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#define VC6_HDMI_TX_PHY_PLL_REFCLK_REFFRQ_MASK VC4_MASK(9, 0)
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+#define VC6_HDMI_TX_PHY_PLL_POST_KDIV_BYPASS_EN BIT(4)
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#define VC6_HDMI_TX_PHY_PLL_POST_KDIV_CLK0_SEL_MASK VC4_MASK(3, 2)
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#define VC6_HDMI_TX_PHY_PLL_POST_KDIV_KDIV_MASK VC4_MASK(1, 0)
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@@ -947,6 +948,7 @@ static void vc6_hdmi_reset_phy(struct vc
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HDMI_WRITE(HDMI_TX_PHY_RESET_CTL, 0);
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HDMI_WRITE(HDMI_TX_PHY_POWERUP_CTL, 0);
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+ HDMI_WRITE(HDMI_TX_PHY_PLL_POST_KDIV, VC6_HDMI_TX_PHY_PLL_POST_KDIV_BYPASS_EN);
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}
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void vc6_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
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