8f9e91ad03
These patches were generated from: https://github.com/raspberrypi/linux/commits/rpi-6.12.y With the following command: git format-patch -N v6.12.27..HEAD (HEAD -> 8d3206ee456a5ecdf9ddbfd8e5e231e4f0cd716e) Exceptions: - (def)configs patches - github workflows patches - applied & reverted patches - readme patches - wireless patches Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
67 lines
2.1 KiB
Diff
67 lines
2.1 KiB
Diff
From c6f7dcd1d773cc31af3faca462dfc2f18427d95d Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Thu, 3 Oct 2024 18:08:42 +0100
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Subject: [PATCH] arm64: dts: broadcom: Add DT for D-step version of BCM2712
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The D-Step has some minor variations in the hardware, so needs
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matching changes to DT.
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Add a new DTS file that modifies the existing (C-step) devicetree.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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arch/arm64/boot/dts/broadcom/Makefile | 1 +
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.../boot/dts/broadcom/bcm2712-d-rpi-5-b.dts | 37 +++++++++++++++++++
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2 files changed, 38 insertions(+)
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create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dts
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--- a/arch/arm64/boot/dts/broadcom/Makefile
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+++ b/arch/arm64/boot/dts/broadcom/Makefile
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@@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rp
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bcm2711-rpi-4-b.dtb \
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bcm2711-rpi-cm4-io.dtb \
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bcm2712-rpi-5-b.dtb \
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+ bcm2712-d-rpi-5-b.dtb \
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bcm2837-rpi-3-a-plus.dtb \
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bcm2837-rpi-3-b.dtb \
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bcm2837-rpi-3-b-plus.dtb \
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--- /dev/null
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+++ b/arch/arm64/boot/dts/broadcom/bcm2712-d-rpi-5-b.dts
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@@ -0,0 +1,37 @@
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+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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+/dts-v1/;
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+
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+#include "bcm2712-rpi-5-b.dts"
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+
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+&gio_aon {
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+ brcm,gpio-bank-widths = <15 6>;
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+
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+ gpio-line-names =
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+ "RP1_SDA", // AON_GPIO_00
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+ "RP1_SCL", // AON_GPIO_01
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+ "RP1_RUN", // AON_GPIO_02
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+ "SD_IOVDD_SEL", // AON_GPIO_03
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+ "SD_PWR_ON", // AON_GPIO_04
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+ "SD_CDET_N", // AON_GPIO_05
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+ "SD_FLG_N", // AON_GPIO_06
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+ "", // AON_GPIO_07
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+ "2712_WAKE", // AON_GPIO_08
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+ "2712_STAT_LED", // AON_GPIO_09
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+ "", // AON_GPIO_10
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+ "", // AON_GPIO_11
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+ "PMIC_INT", // AON_GPIO_12
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+ "UART_TX_FS", // AON_GPIO_13
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+ "UART_RX_FS", // AON_GPIO_14
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+ "", // AON_GPIO_15
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+ "", // AON_GPIO_16
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+
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+ // Pad bank0 out to 32 entries
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+ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
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+
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+ "HDMI0_SCL", // AON_SGPIO_00
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+ "HDMI0_SDA", // AON_SGPIO_01
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+ "HDMI1_SCL", // AON_SGPIO_02
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+ "HDMI1_SDA", // AON_SGPIO_03
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+ "PMIC_SCL", // AON_SGPIO_04
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+ "PMIC_SDA"; // AON_SGPIO_05
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+};
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