8f9e91ad03
These patches were generated from: https://github.com/raspberrypi/linux/commits/rpi-6.12.y With the following command: git format-patch -N v6.12.27..HEAD (HEAD -> 8d3206ee456a5ecdf9ddbfd8e5e231e4f0cd716e) Exceptions: - (def)configs patches - github workflows patches - applied & reverted patches - readme patches - wireless patches Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
118 lines
3.5 KiB
Diff
118 lines
3.5 KiB
Diff
From eac8ddafad0684fda074d3d657079a5b1df825b9 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Fri, 1 Nov 2024 09:12:01 +0000
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Subject: [PATCH] dts: bcm2712-rpi: Add RP1 firmware and mailboxes
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Declare the communications channel to RP1.
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Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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---
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.../boot/dts/broadcom/bcm2712-rpi-5-b.dts | 4 +--
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.../boot/dts/broadcom/bcm2712-rpi-cm5.dtsi | 4 +--
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arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi | 4 +++
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arch/arm64/boot/dts/broadcom/rp1.dtsi | 27 +++++++++++++++++++
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4 files changed, 35 insertions(+), 4 deletions(-)
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--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
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+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts
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@@ -152,7 +152,7 @@ rp1_target: &pcie2 {
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// This is the RP1 peripheral space
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ranges = <0xc0 0x40000000
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0x02000000 0x00 0x00000000
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- 0x00 0x00400000>;
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+ 0x00 0x00410000>;
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dma-ranges =
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// inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
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@@ -164,7 +164,7 @@ rp1_target: &pcie2 {
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// This allows the RP1 DMA controller to address RP1 hardware
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<0xc0 0x40000000
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0x02000000 0x0 0x00000000
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- 0x0 0x00400000>,
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+ 0x0 0x00410000>,
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// inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
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<0x00 0x00000000
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--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi
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@@ -133,7 +133,7 @@ rp1_target: &pcie2 {
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// This is the RP1 peripheral space
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ranges = <0xc0 0x40000000
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0x02000000 0x00 0x00000000
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- 0x00 0x00400000>;
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+ 0x00 0x00410000>;
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dma-ranges =
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// inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx
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@@ -145,7 +145,7 @@ rp1_target: &pcie2 {
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// This allows the RP1 DMA controller to address RP1 hardware
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<0xc0 0x40000000
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0x02000000 0x0 0x00000000
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- 0x0 0x00400000>,
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+ 0x0 0x00410000>,
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// inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx
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<0x00 0x00000000
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--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi
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@@ -294,6 +294,10 @@ pciex4: &pcie2 { };
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status = "okay";
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};
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+&rp1_mbox {
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+ status = "okay";
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+};
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+
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/* Add some gpiomem nodes to make the devices accessible to userspace.
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* /dev/gpiomem<n> should expose the registers for the interface with DT alias
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* gpio<n>.
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--- a/arch/arm64/boot/dts/broadcom/rp1.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/rp1.dtsi
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@@ -13,6 +13,14 @@
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// ranges and dma-ranges must be provided by the includer
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+ rp1_mbox: mailbox@8000 {
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+ compatible = "raspberrypi,rp1-mbox";
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+ status = "disabled";
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+ reg = <0xc0 0x40008000 0x0 0x4000>; // SYSCFG
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+ interrupts = <RP1_INT_SYSCFG IRQ_TYPE_LEVEL_HIGH>;
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+ #mbox-cells = <1>;
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+ };
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+
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rp1_clocks: clocks@18000 {
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compatible = "raspberrypi,rp1-clocks";
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#clock-cells = <1>;
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@@ -1183,6 +1191,19 @@
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assigned-clocks = <&rp1_clocks RP1_CLK_DPI>;
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assigned-clock-parents = <&rp1_clocks RP1_PLL_VIDEO>;
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};
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+
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+ sram: sram@400000 {
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+ compatible = "mmio-sram";
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+ reg = <0xc0 0x40400000 0x0 0x10000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges = <0 0xc0 0x40400000 0x10000>;
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+
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+ rp1_fw_shmem: shmem@ff00 {
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+ compatible = "raspberrypi,rp1-shmem";
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+ reg = <0xff00 0x100>; // firmware mailbox buffer
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+ };
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+ };
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};
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};
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@@ -1281,6 +1302,12 @@
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};
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/ {
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+ rp1_firmware: rp1_firmware {
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+ compatible = "raspberrypi,rp1-firmware", "simple-mfd";
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+ mboxes = <&rp1_mbox 0>;
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+ shmem = <&rp1_fw_shmem>;
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+ };
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+
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rp1_vdd_3v3: rp1_vdd_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vdd-3v3";
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