57aa05e8e5
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.12.37 Manually rebased patch: generic/hack-6.12/902-debloat_proc.patch[1] New Kconfig symbol: x86: enable MITIGATION_TSA[2] All other patches are automatically refreshed. [1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.12.37&id=ead91de35d9cd5c4f80ec51e6020f342079170af [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.12.37&id=7a0395f6607a5d01e2b2a86355596b3f1224acbd Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Link: https://github.com/openwrt/openwrt/pull/19317 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
82 lines
3 KiB
Diff
82 lines
3 KiB
Diff
From 3eecda8f1b9f2cb03234208f06592bc88ededc37 Mon Sep 17 00:00:00 2001
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From: Phil Elwell <phil@raspberrypi.com>
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Date: Mon, 7 Mar 2022 16:18:55 +0000
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Subject: [PATCH] xhci: add quirk for host controllers that don't update
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endpoint DCS
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Seen on a VLI VL805 PCIe to USB controller. For non-stream endpoints
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at least, if the xHC halts on a particular TRB due to an error then
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the DCS field in the Out Endpoint Context maintained by the hardware
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is not updated with the current cycle state.
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Using the quirk XHCI_EP_CTX_BROKEN_DCS and instead fetch the DCS bit
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from the TRB that the xHC stopped on.
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[ bjorn: rebased to v5.14-rc2 ]
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Link: https://github.com/raspberrypi/linux/issues/3060
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Cc: stable@vger.kernel.org
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
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Signed-off-by: Bjørn Mork <bjorn@mork.no>
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Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
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Link: https://lore.kernel.org/r/20211008092547.3996295-3-mathias.nyman@linux.intel.com
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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drivers/usb/host/xhci-pci.c | 1 +
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drivers/usb/host/xhci-ring.c | 23 ++++++++++++++++++++++-
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2 files changed, 23 insertions(+), 1 deletion(-)
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--- a/drivers/usb/host/xhci-pci.c
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+++ b/drivers/usb/host/xhci-pci.c
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@@ -454,6 +454,7 @@ static void xhci_pci_quirks(struct devic
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if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == PCI_DEVICE_ID_VIA_VL805) {
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xhci->quirks |= XHCI_LPM_SUPPORT;
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xhci->quirks |= XHCI_TRB_OVERFETCH;
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+ xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS;
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}
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if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
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--- a/drivers/usb/host/xhci-ring.c
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+++ b/drivers/usb/host/xhci-ring.c
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@@ -637,8 +637,11 @@ static int xhci_move_dequeue_past_td(str
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struct xhci_ring *ep_ring;
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struct xhci_command *cmd;
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struct xhci_segment *new_seg;
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+ struct xhci_segment *halted_seg = NULL;
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union xhci_trb *new_deq;
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int new_cycle;
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+ union xhci_trb *halted_trb;
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+ int index = 0;
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dma_addr_t addr;
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u64 hw_dequeue;
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bool cycle_found = false;
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@@ -657,7 +660,25 @@ static int xhci_move_dequeue_past_td(str
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hw_dequeue = xhci_get_hw_deq(xhci, dev, ep_index, stream_id);
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new_seg = ep_ring->deq_seg;
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new_deq = ep_ring->dequeue;
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- new_cycle = hw_dequeue & 0x1;
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+
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+ /*
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+ * Quirk: xHC write-back of the DCS field in the hardware dequeue
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+ * pointer is wrong - use the cycle state of the TRB pointed to by
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+ * the dequeue pointer.
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+ */
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+ if (xhci->quirks & XHCI_EP_CTX_BROKEN_DCS &&
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+ !(ep->ep_state & EP_HAS_STREAMS))
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+ halted_seg = trb_in_td(xhci, td, hw_dequeue & ~0xf, false);
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+ if (halted_seg) {
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+ index = ((dma_addr_t)(hw_dequeue & ~0xf) - halted_seg->dma) /
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+ sizeof(*halted_trb);
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+ halted_trb = &halted_seg->trbs[index];
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+ new_cycle = halted_trb->generic.field[3] & 0x1;
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+ xhci_dbg(xhci, "Endpoint DCS = %d TRB index = %d cycle = %d\n",
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+ (u8)(hw_dequeue & 0x1), index, new_cycle);
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+ } else {
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+ new_cycle = hw_dequeue & 0x1;
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+ }
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/*
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* We want to find the pointer, segment and cycle state of the new trb
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