332645a610
- Backport upstream Winbond W25N04KV Flash support.
- Backport upstream GigaDevice series Flash support.
- Backport pending Airoha AN8855 switch TPID value fix.
- Backport Mediatek UART baudrate accuracy compensation support.
- Pull mtk patchset from MTK SDK mtksoc-20250711 branch:
Remove mt7622_rfb changes. The MTK SDK already dropped them.
Replace Airoha ethernet PHY driver with new version.
Split downstream snfi changes into independent patches.
Add new Marvell CUX3410 PHY driver.
Add new MediaTek built-in 2.5Gbps PHY driver.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
81 lines
2.7 KiB
Diff
81 lines
2.7 KiB
Diff
From 6952209ef220138189dd261d06441e1b2d50e994 Mon Sep 17 00:00:00 2001
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From: Weijie Gao <weijie.gao@mediatek.com>
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Date: Fri, 23 May 2025 17:26:02 +0800
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Subject: [PATCH] serial: mediatek: enable baudrate accuracy compensation
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The high-speed UART from MediaTek supports baudrate accuracy
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compensation when using high-speed mode 3.
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This is done by calculating the first digit of the fraction part of
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sample count value. The fraction value will be then used as the
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reference to insert 0 to 10 sample cycle(s) to one frame (assume
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that frame format is 8n1, i.e. 10 bits per frame).
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The fracdiv_[l/m] registers are used to determine whether a bit in one frame
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should be inserted with one sample cycle.
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With typical 40MHz source clock, the actual baudrates with/without
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accuracy compensation are:
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Ideal w/o compensation w/ compensation
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======== ================ ===============
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9600 9603 9600
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115200 114942 115207
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921600 930232 921659
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3000000 3076923 3007519
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Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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---
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drivers/serial/serial_mtk.c | 24 +++++++++++++++++++++---
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1 file changed, 21 insertions(+), 3 deletions(-)
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--- a/drivers/serial/serial_mtk.c
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+++ b/drivers/serial/serial_mtk.c
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@@ -99,10 +99,18 @@ struct mtk_serial_priv {
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bool upstream_highspeed_logic;
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};
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+static const unsigned short fraction_l_mapping[] = {
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+ 0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF
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+};
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+
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+static const unsigned short fraction_m_mapping[] = {
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+ 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3
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+};
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+
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static void _mtk_serial_setbrg(struct mtk_serial_priv *priv, int baud,
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uint clk_rate)
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{
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- u32 quot, realbaud, samplecount = 1;
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+ u32 quot, realbaud, samplecount = 1, fraction, frac_l = 0, frac_m = 0;
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/* Special case for low baud clock */
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if (baud <= 115200 && clk_rate == 12000000) {
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@@ -147,7 +155,13 @@ use_hs3:
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writel(3, &priv->regs->highspeed);
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quot = DIV_ROUND_UP(clk_rate, 256 * baud);
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- samplecount = DIV_ROUND_CLOSEST(clk_rate, quot * baud);
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+ samplecount = clk_rate / (quot * baud);
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+
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+ fraction = ((clk_rate * 100) / quot / baud) % 100;
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+ fraction = DIV_ROUND_CLOSEST(fraction, 10);
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+
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+ frac_l = fraction_l_mapping[fraction];
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+ frac_m = fraction_m_mapping[fraction];
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}
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set_baud:
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@@ -159,7 +173,11 @@ set_baud:
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/* set highspeed mode sample count & point */
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writel(samplecount - 1, &priv->regs->sample_count);
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- writel((samplecount - 2) >> 1, &priv->regs->sample_point);
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+ writel((samplecount >> 1) - 1, &priv->regs->sample_point);
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+
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+ /* set baudrate fraction compensation */
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+ writel(frac_l, &priv->regs->fracdiv_l);
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+ writel(frac_m, &priv->regs->fracdiv_m);
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}
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static int _mtk_serial_putc(struct mtk_serial_priv *priv, const char ch)
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