Enable and setup multi-cpu for qca8k switch for ipq806x based devices. Rework each DTS to enable the secondary CPU port on QCA8K switch and apply the required values originally set by the OEM in the old swconfig node. In original firmware the first CPU port was always assigned to the WAN port and the secondary CPU port was assigned to the rest of the LAN port. Follow this original implementation using an init.d script. To setup the CPU port ip tools is required. Add additional default package ip-tiny to correctly setup the CPU port. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
378 lines
5.9 KiB
Text
378 lines
5.9 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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#include "qcom-ipq8064-v2.0-smb208.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/soc/qcom,tcsr.h>
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/ {
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compatible = "asrock,g10", "qcom,ipq8064";
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model = "ASRock G10";
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aliases {
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ethernet0 = &gmac1;
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ethernet1 = &gmac0;
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led-boot = &led_status_blue;
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led-failsafe = &led_status_amber;
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led-running = &led_status_blue;
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led-upgrade = &led_status_amber;
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};
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chosen {
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bootargs-override = "console=ttyMSM0,115200n8";
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&led_pins>;
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pinctrl-names = "default";
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/*
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* this is a bit misleading. Because there are about seven
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* multicolor LEDs connected all wired together in parallel.
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*/
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status_yellow {
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label = "yellow:status";
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gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
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};
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led_status_amber: status_amber {
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label = "amber:status";
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gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
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};
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led_status_blue: status_blue {
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label = "blue:status";
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gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
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};
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/*
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* LED is declared in vendors boardfile but it's not
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* working and the manual doesn't mention anything
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* about the LED being white.
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status_white {
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label = "white:status";
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gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
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};
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*/
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};
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i2c-gpio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "i2c-gpio";
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gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>, /* sda */
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<&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; /* scl */
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i2c-gpio,delay-us = <5>;
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i2c-gpio,scl-output-only;
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mcu@50 {
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reg = <0x50>;
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compatible = "sonix,sn8f25e21";
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};
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};
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keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&button_pins>;
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pinctrl-names = "default";
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ir-remote {
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label = "ir-remote";
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gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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debounce-interval = <60>;
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wakeup-source;
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};
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reset {
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label = "reset";
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gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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debounce-interval = <60>;
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wakeup-source;
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};
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wps5g {
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label = "wps5g";
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gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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debounce-interval = <60>;
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wakeup-source;
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};
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wps2g {
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label = "wps2g";
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gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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debounce-interval = <60>;
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wakeup-source;
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};
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};
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};
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&adm_dma {
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status = "okay";
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};
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&gmac1 {
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status = "okay";
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pinctrl-0 = <&rgmii2_pins>;
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pinctrl-names = "default";
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phy-mode = "rgmii";
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qcom,id = <1>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&gmac2 {
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status = "okay";
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phy-mode = "sgmii";
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qcom,id = <2>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&gsbi4_serial {
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pinctrl-0 = <&uart0_pins>;
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pinctrl-names = "default";
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};
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&mdio0 {
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status = "okay";
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pinctrl-0 = <&mdio0_pins>;
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pinctrl-names = "default";
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switch@10 {
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compatible = "qca,qca8337";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "cpu";
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ethernet = <&gmac1>;
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phy-mode = "rgmii";
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tx-internal-delay-ps = <1000>;
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rx-internal-delay-ps = <1000>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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port@1 {
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reg = <1>;
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label = "wan";
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phy-mode = "internal";
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phy-handle = <&phy_port1>;
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};
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port@2 {
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reg = <2>;
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label = "lan1";
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phy-mode = "internal";
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phy-handle = <&phy_port2>;
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};
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port@3 {
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reg = <3>;
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label = "lan2";
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phy-mode = "internal";
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phy-handle = <&phy_port3>;
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};
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port@4 {
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reg = <4>;
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label = "lan3";
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phy-mode = "internal";
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phy-handle = <&phy_port4>;
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};
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port@5 {
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reg = <5>;
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label = "lan4";
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phy-mode = "internal";
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phy-handle = <&phy_port5>;
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac2>;
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phy-mode = "sgmii";
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qca,sgmii-enable-pll;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy_port1: phy@0 {
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reg = <0>;
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};
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phy_port2: phy@1 {
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reg = <1>;
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};
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phy_port3: phy@2 {
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reg = <2>;
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};
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phy_port4: phy@3 {
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reg = <3>;
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};
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phy_port5: phy@4 {
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reg = <4>;
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};
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};
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};
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};
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&nand {
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status = "okay";
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nand@0 {
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reg = <0>;
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compatible = "qcom,nandcs";
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nand-ecc-strength = <4>;
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nand-bus-width = <8>;
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nand-ecc-step-size = <512>;
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nand-is-boot-medium;
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qcom,boot-partitions = <0x0 0x1200000>;
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partitions {
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compatible = "qcom,smem-part";
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};
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};
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};
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&pcie0 {
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status = "okay";
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bridge@0,0 {
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reg = <0x00000000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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wifi5g: wifi@1,0 {
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reg = <0x00010000 0 0 0 0>;
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compatible = "qcom,ath10k";
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qcom,ath10k-calibration-variant = "ASRock-G10";
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};
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};
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};
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&pcie1 {
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status = "okay";
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bridge@0,0 {
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reg = <0x00000000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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wifi2g: wifi@1,0 {
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reg = <0x00010000 0 0 0 0>;
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compatible = "qcom,ath10k";
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qcom,ath10k-calibration-variant = "ASRock-G10";
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};
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};
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};
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&qcom_pinmux {
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led_pins: led_pins {
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mux {
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pins = "gpio7", "gpio8", "gpio9", "gpio26";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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button_pins: button_pins {
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mux {
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pins = "gpio15", "gpio16", "gpio64", "gpio65";
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function = "gpio";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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uart0_pins: uart0_pins {
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mux {
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pins = "gpio10", "gpio11";
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function = "gsbi4";
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drive-strength = <10>;
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bias-disable;
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};
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};
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};
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&rpm {
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pinctrl-0 = <&i2c4_pins>;
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pinctrl-names = "default";
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};
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&hs_phy_0 {
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status = "okay";
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};
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&ss_phy_0 {
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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};
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&hs_phy_1 {
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status = "okay";
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};
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&ss_phy_1 {
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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&tcsr {
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qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
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};
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/delete-node/ &pcie2_pins;
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/delete-node/ &pcie2;
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