From 8ea9ae21bde99c2c1832f364f973895e108a4851 Mon Sep 17 00:00:00 2001 From: Minda Chen Date: Thu, 18 Jul 2024 17:22:53 +0800 Subject: [PATCH 17/55] plic: irq: Set IRQCHIP_EOI_THREADED in PREEMPT_RT case In ipms can device or other device, interrupt is trigger by level. in PREEMPT_RT case. irq handle is in thread, If not set IRQCHIP_EOI_THREADED, device irq in PLIC is cleared first, but device irq reg is not clear, So the interrupt will be triggered again, IRQCHIP_EOI_THREADED will clear device PLIC IRQ status after clear device irq reg. Signed-off-by: Minda Chen --- drivers/irqchip/irq-sifive-plic.c | 6 ++++++ 1 file changed, 6 insertions(+) --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -202,6 +202,9 @@ static struct irq_chip plic_edge_chip = #endif .irq_set_type = plic_irq_set_type, .flags = IRQCHIP_SKIP_SET_WAKE | +#ifdef CONFIG_PREEMPT_RT + IRQCHIP_EOI_THREADED | +#endif IRQCHIP_AFFINITY_PRE_STARTUP, }; @@ -217,6 +220,9 @@ static struct irq_chip plic_chip = { #endif .irq_set_type = plic_irq_set_type, .flags = IRQCHIP_SKIP_SET_WAKE | +#ifdef CONFIG_PREEMPT_RT + IRQCHIP_EOI_THREADED | +#endif IRQCHIP_AFFINITY_PRE_STARTUP, };