// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "rtl838x.dtsi"
#include "rtl83xx_d-link_dgs-1210_common.dtsi"
#include "rtl83xx_d-link_dgs-1210_gpio.dtsi"

/ {
	compatible = "d-link,dgs-1210-26", "realtek,rtl838x-soc";
	model = "D-Link DGS-1210-26";

	/* Left SFP slot, port 25 */
	i2c0: i2c-gpio-0 {
		compatible = "i2c-gpio";
		sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		scl-gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		i2c-gpio,delay-us = <2>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	sfp0: sfp-p25 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c0>;
		los-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
		tx-disable-gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
	};

	/* Right SFP slot, port 26 */
	i2c1: i2c-gpio-1 {
		compatible = "i2c-gpio";
		sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		i2c-gpio,delay-us = <2>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	sfp1: sfp-p26 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c1>;
		los-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
		tx-disable-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
	};
};

&ethernet0 {
	mdio: mdio-bus {
		compatible = "realtek,rtl838x-mdio";
		regmap = <&ethernet0>;
		#address-cells = <1>;
		#size-cells = <0>;

		EXTERNAL_PHY(0)
		EXTERNAL_PHY(1)
		EXTERNAL_PHY(2)
		EXTERNAL_PHY(3)
		EXTERNAL_PHY(4)
		EXTERNAL_PHY(5)
		EXTERNAL_PHY(6)
		EXTERNAL_PHY(7)

		INTERNAL_PHY(8)
		INTERNAL_PHY(9)
		INTERNAL_PHY(10)
		INTERNAL_PHY(11)
		INTERNAL_PHY(12)
		INTERNAL_PHY(13)
		INTERNAL_PHY(14)
		INTERNAL_PHY(15)

		EXTERNAL_PHY(16)
		EXTERNAL_PHY(17)
		EXTERNAL_PHY(18)
		EXTERNAL_PHY(19)
		EXTERNAL_PHY(20)
		EXTERNAL_PHY(21)
		EXTERNAL_PHY(22)
		EXTERNAL_PHY(23)

		INTERNAL_PHY_SDS(24, 4)
		INTERNAL_PHY_SDS(26, 5)
	};
};

&switch0 {
	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		SWITCH_PORT(0, 1, qsgmii)
		SWITCH_PORT(1, 2, qsgmii)
		SWITCH_PORT(2, 3, qsgmii)
		SWITCH_PORT(3, 4, qsgmii)
		SWITCH_PORT(4, 5, qsgmii)
		SWITCH_PORT(5, 6, qsgmii)
		SWITCH_PORT(6, 7, qsgmii)
		SWITCH_PORT(7, 8, qsgmii)

		SWITCH_PORT(8, 9, internal)
		SWITCH_PORT(9, 10, internal)
		SWITCH_PORT(10, 11, internal)
		SWITCH_PORT(11, 12, internal)
		SWITCH_PORT(12, 13, internal)
		SWITCH_PORT(13, 14, internal)
		SWITCH_PORT(14, 15, internal)
		SWITCH_PORT(15, 16, internal)

		SWITCH_PORT(16, 17, qsgmii)
		SWITCH_PORT(17, 18, qsgmii)
		SWITCH_PORT(18, 19, qsgmii)
		SWITCH_PORT(19, 20, qsgmii)
		SWITCH_PORT(20, 21, qsgmii)
		SWITCH_PORT(21, 22, qsgmii)
		SWITCH_PORT(22, 23, qsgmii)
		SWITCH_PORT(23, 24, qsgmii)

		port@24 {
			reg = <24>;
			label = "lan25";
			phy-mode = "1000base-x";
			managed = "in-band-status";
			sfp = <&sfp0>;
		};

		port@26 {
			reg = <26>;
			label = "lan26";
			phy-mode = "1000base-x";
			managed = "in-band-status";
			sfp = <&sfp1>;
		};

		port@28 {
			ethernet = <&ethernet0>;
			reg = <28>;
			phy-mode = "internal";
			fixed-link {
				speed = <1000>;
				full-duplex;
			};
		};
	};
};