From 57bcfa6da45cec1329d72a95f3620255036b596d Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Mon, 17 Mar 2025 15:51:03 +0000 Subject: [PATCH] DT: bcm2711/bcm2712: use upstream property for controlling pcie clkreq L1 sub-state support and clkreq control are intermingled in the hardware, and upstream now have a tri-state property to control this. The default behaviour is now to enable clkreq control if the property is absent. Default Pi 5 PCIex1 to "safe" to avoid breaking expansion boards without the CLKREQ# line connected. Make this explicit in the pciex1-compat-pi5 overlay, and remove the obsolete CM4 property. Signed-off-by: Jonathan Bell --- arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts | 4 ---- arch/arm/boot/dts/overlays/README | 4 +++- arch/arm/boot/dts/overlays/pciex1-compat-pi5-overlay.dts | 2 +- arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts | 4 ++++ 4 files changed, 8 insertions(+), 6 deletions(-) --- a/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts +++ b/arch/arm/boot/dts/broadcom/bcm2711-rpi-cm4.dts @@ -422,10 +422,6 @@ // ============================================= // Board specific stuff here -&pcie0 { - brcm,enable-l1ss; -}; - &sdhost { status = "disabled"; }; --- a/arch/arm/boot/dts/overlays/README +++ b/arch/arm/boot/dts/overlays/README @@ -3703,7 +3703,9 @@ Params: Name: pciex1-compat-pi5 Info: Compatibility features for pciex1 on Pi 5. Load: dtoverlay=pciex1-compat-pi5,= -Params: l1ss Enable ASPM L1 sub-state support +Params: l1ss Enable RC ASPM L1 sub-state support. Requires + that the CLKREQ# pin is connected to the + endpoint. no-l0s Disable ASPM L0s no-mip Revert to the MSI target in the RC, instead of the MSI-MIP peripheral. Use if a) more than 8 --- a/arch/arm/boot/dts/overlays/pciex1-compat-pi5-overlay.dts +++ b/arch/arm/boot/dts/overlays/pciex1-compat-pi5-overlay.dts @@ -12,7 +12,7 @@ fragment@0 { target = <&pciex1>; __dormant__ { - brcm,enable-l1ss; + brcm,clkreq-mode = "default"; }; }; --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts @@ -713,6 +713,10 @@ spi10_cs_pins: &spi10_cs_gpio1 {}; clock-names = "hdmi", "bvb", "audio", "cec"; }; +&pcie1 { + brcm,clkreq-mode = "safe"; +}; + &pcie2 { status = "okay"; };