This commit adds support for the FriendlyElec NanoPi R3S.
CPU: Rockchip RK3566, Quad-core Cortex-A55
RAM: 2GB LPDDR4X
Ethernet: GMAC RTL8211F GbE, PCIe R8111H GbE
USB3.0 Host: Type-A x1
Storage: MicroSD Slot x 1, and optional on-board 32GB eMMC
Debug Serial Port: 3.3V TTL, 3-pin 2.54mm pitch connector, 1500000 bauds
LED: LED x 3
RTC: One low-power RTC, supports backup battery input
Both GbE controllers are working (WAN eth0, LAN eth1).
Appropriate LAN/WAN interface assignments and MAC address generation.
All three LEDs are working.
USB appears to be working and has been tested with mass storage.
Installation - microSD:
-Uncompress the OpenWRT sysupgrade.img.gz
-Write image to microSD card using dd or similar tool
Installation - eMMC:
-Boot from microSD
-Uncompress the OpenWRT sysupgrade.img.gz
-Flash to eMMC : dd if=x.img of=/dev/mmcblk0
-sync
-Remove microSD card
-Reboot
Signed-off-by: Kevin Zhang <kevin@kevinzhang.me>
Link: https://github.com/openwrt/openwrt/pull/16738
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hardware Spec
-SoC: Rockchip RK3588S
CPU: Quad-core ARM Cortex-A76(up to 2.4GHz) and quad-core Cortex-A55 CPU (up to 1.8GHz)
GPU: Mali-G610 MP4, compatible with OpenGLES 1.1, 2.0, and 3.2, OpenCL up to 2.2 and Vulkan1.2
VPU: 8K@60fps H.265 and VP9 decoder, 8K@30fps H.264 decoder, 4K@60fps AV1 decoder, 8K@30fps H.264 and H.265
NPU: 6TOPs, supports INT4/INT8/INT16/FP16
-RAM: 64-bit 4GB/8GB LPDDR4X at 2133MHz
-Flash: 32GB/None eMMC, at HS400 mode
-Ethernet: one Native Gigabit Ethernet, and one PCIe 2.5G Ethernet
-USB: one USB 3.0 Type-A and one USB 2.0 Type-A
-PCIe: one M.2 Key M connector with PCIe 2.1 x1
-HDMI:
compatible with HDMI2.1, HDMI2.0, and HDMI1.4 operation
support up to 7680x4320@60Hz
Support RGB/YUV(up to 10bit) format
-microSD: support up to SDR104 mode
-GPIO:
30-pin 2.54mm header connector
up to 1x SPI, 3x UARTs, 3x I2Cs, 2x SPDIFs, 1x I2Ss, 3x PWMs, 20x GPIOs
-Debug: UART via 3-Pin 2.54mm header, or on-board USB-C to UART
-LEDs: 4 x GPIO Controlled LED (SYS, WAN, LAN, LED1)
-others:
2 Pin 1.27/1.25mm RTC battery input connector for low power RTC IC HYM8563TS
MASK button for eMMC update
one user button
-Power supply: USB-C, support PD, 5V/9V/12V/20V input
-PCB: 8 Layer, 62x90x1.6mm
-Ambient Operating Temperature: 0℃ to 70℃
Installation:
Uncompress the OpenWrt sysupgrade and write image to the SD card using dd (dd if=*.img of=/*)
eMMC Installation:
Boot from the SD card
Uncompress the OpenWrt sysupgrade image
fash to eMMC : dd if=*.img of=/dev/mmcblk1
sync
remove SD card
reboot
Signed-off-by: Antonio Flores <antflores627@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16275
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
We need to configure the led and network config for this board on
start as per the others
Signed-off-by: Ben Whitten <ben.whitten@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15607
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now we support parsing the color and function properties.
Ref: e814acc599 ("base-files: support parse DT LED color and function")
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
FriendlyElec renamed the NanoPi R4S board with EEPROM (mac address)
to "enterprise" edition, and it was added as a "new" board in upstream
kernel.
This patch switched to use that upstreamed dts and removed local
EEPROM patch.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
The NanoPi R2C Plus is a small variant of NanoPi R2C with a on-board
eMMC flash (8G) included.
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
The OrangePi R1 Plus LTS is a minor variant of OrangePi R1 Plus with
the on-board NIC chip changed from rtl8211e to yt8531c, and otherwise
identical to OrangePi R1 Plus.
Tested-by: Volkan Yetik <no3iverson@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.
This device is similar to the NanoPi R2S, and has a 16MB
SPI NOR (mx25l12805d). The reset button is changed to
directly reset the power supply, another detail is that
both network ports have independent MAC addresses.
Note: booting from SPI is currently unsupported, you have to install
the image on a SD card.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
The NanoPi R2C is a minor variant of NanoPi R2S with the on-board NIC
chip changed from rtl8211e to yt8521s, and otherwise identical to R2S.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Hardware
--------
RockChip RK3399 ARM64 (6 cores)
4GB LPDDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
2x USB 3.0 Port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.
=====================================
NOTICE FOR USERS WHO USE 1GB VERSION:
BY NOW IT IS NOT SUPPORTED
====================================
[initialed target]
Co-developed-by: Marty Jones <mj8263788@gmail.com>
Signed-off-by: Marty Jones <mj8263788@gmail.com>
[fixed bootscript]
Co-developed-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
So far, board.d files were having execute bit set and contained a
shebang. However, they are just sourced in board_detect, with an
apparantly unnecessary check for execute permission beforehand.
Replace this check by one for existance and make the board.d files
"normal" files, as would be expected in /etc anyway.
Note:
This removes an apparantly unused '#!/bin/sh /etc/rc.common' in
target/linux/bcm47xx/base-files/etc/board.d/01_network
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Hardware
--------
RockChip RK3328 ARM64 (4 cores)
1GB DDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
USB 2.0 Port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.
MAC-address
-----------
The vendor code supports reading a MAC address from an EEPROM connected
via i2c0 of the SoC. The EEPROM (address 0x51) should contain the MAC
address in binary at offset 0xfa. However, my two units didn't come with
such an EEPROM soldered on. The EEPROM should be placed between the SoC
and the GPIO pins on the board. (U10)
Generating rendom MAC addresses works around this issue. Otherwise, all
boards running the same image have identical MAC addresses.
Signed-off-by: David Bauer <mail@david-bauer.net>
