Until now the timer management on the RTL931x devices depends
on the MIPS default timer. Looking at the clock progress on
these devices one can see that it is totally off. It is running
at half the required speed (e.g. if 1 minute passes the date
command shows that according to the timers only 30 seconds have
elapsed). This is a mix from wrong DTS and bad startup code.
This is not only a cosmetic issue but has effects on every
delay operation inside the kernel. Switch RTL931x to the proven
Otto timer.
Tested on LGS352C based on RTL9311.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19205
Signed-off-by: Robert Marko <robimarko@gmail.com>
Until now only the RTL930x devices make use of the following notation.
phy8: ethernet-phy@8 {
compatible = "ethernet-phy-ieee802.3-c22";
phy-is-integrated;
reg = <8>;
sds = <3>;
};
This indicates that the link is driven by a serdes directly without
external phy. As the devices have multiple serdes it must be clarified
what serdes is responsible for that port.
Nevertheless all other devices have the same requirements. E.g. RTL838x
usually drives port 24 from serdes 4 and port 26 from serdes 5. All this
currently works because the driver has a lot of hardcoded port/serdes
mapping.
Make the situation better by adding dts helpers that can describe the
topology as needed.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18851
Signed-off-by: Robert Marko <robimarko@gmail.com>
The SMP environment is prepared well for the RTL93X. Now describe the
power cluster controller in the DTS. Tested on RTL9311 based Linksys
LGS352C.
Without patch:
root@OpenWrt:~# dmesg | grep CPU
[ 0.140425] CPU1 revision is: 0001a120 (MIPS interAptiv (multi))
[ 0.191952] Synchronize counters for CPU 1: done.
[ 1.232191] CPU2: failed to start
[ 1.237863] No online CPU in core 1 to start CPU3
[ 2.273784] CPU3: failed to start
[ 2.277589] smp: Brought up 1 node, 2 CPUs
root@OpenWrt:~# cat /proc/cpuinfo | grep -E "model|proc"
processor : 0
cpu model : MIPS interAptiv (multi) V2.0
processor : 1
cpu model : MIPS interAptiv (multi) V2.0
With patch:
root@OpenWrt:~# dmesg | grep CPU
[ 0.000000] CPU0 revision is: 0001a120 (MIPS interAptiv (multi))
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] Failed to get CPU clock: -2
[ 0.000000] CPU frequency from device tree: 1000MHz
[ 0.133360] smp: Bringing up secondary CPUs ...
[ 0.140418] CPU1 revision is: 0001a120 (MIPS interAptiv (multi))
[ 0.191950] Synchronize counters for CPU 1: done.
[ 0.230103] CPU2 revision is: 0001a120 (MIPS interAptiv (multi))
[ 0.289220] Synchronize counters for CPU 2: done.
[ 0.326189] CPU3 revision is: 0001a120 (MIPS interAptiv (multi))
[ 0.378861] Synchronize counters for CPU 3: done.
[ 0.413829] smp: Brought up 1 node, 4 CPUs
processor : 0
cpu model : MIPS interAptiv (multi) V2.0
processor : 1
cpu model : MIPS interAptiv (multi) V2.0
processor : 2
cpu model : MIPS interAptiv (multi) V2.0
processor : 3
cpu model : MIPS interAptiv (multi) V2.0
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19110
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The switchcore node is the central location that describes the Realtek switch
register addresses starting at 0x1b000000. It will be used by current and
future regmap enabled device drivers. The upstream MDIO driver already makes
use of it by calling syscon_node_to_regmap(dev->parent->of_node);
In the current DTS base we have 3 issues that should be fixed:
- rtl838x.dtsi has a length of 0x20000 instead of 0x10000
- rtl839x.dtsi has a length of 0x20000 instead of 0x10000
- rtl931x.dtsi has no switchcore node at all
Align these mismatches with the "good" RTL930x template.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18642
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is no need to keep a version specific dts directory.
Rename the folder to its standard location.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
2024-09-14 16:56:37 +02:00
Renamed from target/linux/realtek/dts-5.15/rtl931x.dtsi (Browse further)
