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4 commits

Author SHA1 Message Date
Mieczyslaw Nalewaj
88f4c32060 mac80211: update to version 6.14.11
Update to version 6.14.11

Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
2025-07-05 14:43:08 +02:00
George Moussalem
aefdbf0edc wifi: ath11k: increase max ATH11K_QMI_CALDB_SIZE macro
QCN6122 wifi in fw-memory-mode 1 has a slightly larger caldb size than
currently defined in the ath11k driver. When coldboot calibration was
disabled, the fw mem mode was changed from 2 (256MB mem profile) to 1
(512MB mem profile), which is the correct setting for devices in scope.
However, in fw mem mode, the caldb size is 0x500000 instead of the max
0x480000 defined in the driver, causing QCN6122 wifi failing to boot:

ath11k b00a040.wifi1: qmi mem size is low to load caldata
ath11k b00a040.wifi1: failed to assign qmi target memory: -22

As such, change the max caldb memory size accordingly.

This macro is used by the driver only as a max size limit to validate
the requested caldb size returned by QMI. Different ath11k wifi chips
have different caldb sizes (for ex. the size for IPQ5018 is 0x200000).

Fixes: cf715a2305 ("wifi: ath11k: disable coldboot calibration for ipq5018")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19118
Signed-off-by: Robert Marko <robimarko@gmail.com>
2025-06-13 10:29:50 +02:00
George Moussalem
cf715a2305 wifi: ath11k: disable coldboot calibration for ipq5018 and qcn6122
Coldboot calibration does not work causes the firmware to crash during
wifi startup. So let's disable coldboot calibration until a solution is
found.

Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19083
Signed-off-by: Robert Marko <robimarko@gmail.com>
2025-06-12 10:47:44 +02:00
George Moussalem
f76b846eea mac80211: ath11k: add support for QCN6122 wifi
Add QCN6122 platform support.

QCN6122 is a PCIe based solution that is attached to and enumerated
by the WPSS (Wireless Processor SubSystem) Q6 processor.

Though it is a PCIe device, since it is not attached to APSS processor
(Application Processor SubSystem), APSS will be unaware of such a decice
and hence it is registered to the APSS processor as a platform device(AHB).
Because of this hybrid nature, it is called as a hybrid bus device.

As such, QCN6122 is a hybrid bus type device and follows the same codepath
as for WCN6750.

This is a reversed engineered and heavily simplified version of below
downstream patch:
https://git.codelinaro.org/clo/qsdk/oss/system/feeds/wlan-open/-/ \
blob/NHSS.QSDK.12.4.5.r2/mac80211/patches/232-ath11k-qcn6122-support.patch

Co-developed-by: George Moussalem <george.moussalem@outlook.com>
Signed-off-by: Sowmiya Sree Elavalagan <ssreeela@codeaurora.org>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/17182
Signed-off-by: Robert Marko <robimarko@gmail.com>
2025-02-06 09:51:13 +01:00