Commit graph

8 commits

Author SHA1 Message Date
Tianling Shen
4e09722a68 rockchip: add NanoPi R5C support
Hardware
--------
RockChip RK3568 ARM64 (4 cores)
1GB or 4GB LPDDR4X RAM
2x 2500 Base-T
4 LEDs (LAN / WAN / WIFI / POWER)
1 Button (Reset)
8GB or 32GB eMMC on-board
Micro-SD Slot
M.2 Slot
2x USB 3.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-11-26 19:44:56 +01:00
Tianling Shen
c06a71f0b3 rockchip: add NanoPi R5S support
Hardware
--------
RockChip RK3568 ARM64 (4 cores)
2GB or 4GB LPDDR4X RAM
1x 1000 Base-T
2x 2500 Base-T
4 LEDs (LAN1 / LAN2 / WAN / POWER)
8GB eMMC on-board
Micro-SD Slot
M.2 Slot
2x USB 3.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.

Tested-by: Packet Please <pktpls@systemli.org>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-11-26 19:44:56 +01:00
Tianling Shen
32d5921b8b rockchip: add Orange Pi R1 Plus LTS support
The OrangePi R1 Plus LTS is a minor variant of OrangePi R1 Plus with
the on-board NIC chip changed from rtl8211e to yt8531c, and otherwise
identical to OrangePi R1 Plus.

Tested-by: Volkan Yetik <no3iverson@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-05-31 21:41:46 +02:00
Tianling Shen
ab641efe69 rockchip: add Orange Pi R1 Plus support
Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.

This device is similar to the NanoPi R2S, and has a 16MB
SPI NOR (mx25l12805d). The reset button is changed to
directly reset the power supply, another detail is that
both network ports have independent MAC addresses.

Note: booting from SPI is currently unsupported, you have to install
the image on a SD card.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-05-31 21:41:46 +02:00
Tianling Shen
8f578c15b3 rockchip: add NanoPi R2C support
The NanoPi R2C is a minor variant of NanoPi R2S with the on-board NIC
chip changed from rtl8211e to yt8521s, and otherwise identical to R2S.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-05-18 17:42:53 +02:00
Tianling Shen
b721579842 rockchip: add NanoPi R4S support
Hardware
--------
RockChip RK3399 ARM64 (6 cores)
4GB LPDDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
2x USB 3.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.

=====================================
NOTICE FOR USERS WHO USE 1GB VERSION:
     BY NOW IT IS NOT SUPPORTED
====================================

[initialed target]
Co-developed-by: Marty Jones <mj8263788@gmail.com>
Signed-off-by: Marty Jones <mj8263788@gmail.com>
[fixed bootscript]
Co-developed-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2021-06-10 10:34:44 +02:00
Adrian Schmutzler
85b1f4d8ca treewide: remove execute bit and shebang from board.d files
So far, board.d files were having execute bit set and contained a
shebang. However, they are just sourced in board_detect, with an
apparantly unnecessary check for execute permission beforehand.

Replace this check by one for existance and make the board.d files
"normal" files, as would be expected in /etc anyway.

Note:

This removes an apparantly unused '#!/bin/sh /etc/rc.common' in
target/linux/bcm47xx/base-files/etc/board.d/01_network

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-03-06 11:30:06 +01:00
David Bauer
b7a9a183fb rockchip: add NanoPi R2S support
Hardware
--------
RockChip RK3328 ARM64 (4 cores)
1GB DDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
USB 2.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.

MAC-address
-----------
The vendor code supports reading a MAC address from an EEPROM connected
via i2c0 of the SoC. The EEPROM (address 0x51) should contain the MAC
address in binary at offset 0xfa. However, my two units didn't come with
such an EEPROM soldered on. The EEPROM should be placed between the SoC
and the GPIO pins on the board. (U10)

Generating rendom MAC addresses works around this issue. Otherwise, all
boards running the same image have identical MAC addresses.

Signed-off-by: David Bauer <mail@david-bauer.net>
2020-07-28 15:52:44 +02:00