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Merge branch 'openwrt:master' into master

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Hayzam Sherif 2022-12-02 21:36:55 +04:00 committed by GitHub
commit fefce24178
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GPG key ID: 4AEE18F83AFDEB23
10 changed files with 116 additions and 31 deletions
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3
target/linux/mvebu/Makefile
View file

@ -9,8 +9,7 @@ BOARDNAME:=Marvell EBU Armada
FEATURES:=fpu usb pci pcie gpio nand squashfs ramdisk boot-part rootfs-part legacy-sdcard targz FEATURES:=fpu usb pci pcie gpio nand squashfs ramdisk boot-part rootfs-part legacy-sdcard targz
SUBTARGETS:=cortexa9 cortexa53 cortexa72 SUBTARGETS:=cortexa9 cortexa53 cortexa72
KERNEL_PATCHVER:=5.10 KERNEL_PATCHVER:=5.15
KERNEL_TESTING_PATCHVER:=5.15
include $(INCLUDE_DIR)/target.mk include $(INCLUDE_DIR)/target.mk

6
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/common.c
View file

@ -1401,7 +1401,7 @@ static int rtl83xx_fib_event(struct notifier_block *this, unsigned long event, v
case FIB_EVENT_ENTRY_REPLACE: case FIB_EVENT_ENTRY_REPLACE:
case FIB_EVENT_ENTRY_APPEND: case FIB_EVENT_ENTRY_APPEND:
case FIB_EVENT_ENTRY_DEL: case FIB_EVENT_ENTRY_DEL:
pr_debug("%s: FIB_ENTRY ADD/DELL, event %ld\n", __func__, event); pr_debug("%s: FIB_ENTRY ADD/DEL, event %ld\n", __func__, event);
if (info->family == AF_INET) { if (info->family == AF_INET) {
struct fib_entry_notifier_info *fen_info = ptr; struct fib_entry_notifier_info *fen_info = ptr;
@ -1420,7 +1420,7 @@ static int rtl83xx_fib_event(struct notifier_block *this, unsigned long event, v
} else if (info->family == AF_INET6) { } else if (info->family == AF_INET6) {
struct fib6_entry_notifier_info *fen6_info = ptr; struct fib6_entry_notifier_info *fen6_info = ptr;
pr_warn("%s: FIB_RULE ADD/DELL for IPv6 not supported\n", __func__); pr_warn("%s: FIB_RULE ADD/DEL for IPv6 not supported\n", __func__);
kfree(fib_work); kfree(fib_work);
return NOTIFY_DONE; return NOTIFY_DONE;
} }
@ -1428,7 +1428,7 @@ static int rtl83xx_fib_event(struct notifier_block *this, unsigned long event, v
case FIB_EVENT_RULE_ADD: case FIB_EVENT_RULE_ADD:
case FIB_EVENT_RULE_DEL: case FIB_EVENT_RULE_DEL:
pr_debug("%s: FIB_RULE ADD/DELL, event: %ld\n", __func__, event); pr_debug("%s: FIB_RULE ADD/DEL, event: %ld\n", __func__, event);
memcpy(&fib_work->fr_info, ptr, sizeof(fib_work->fr_info)); memcpy(&fib_work->fr_info, ptr, sizeof(fib_work->fr_info));
fib_rule_get(fib_work->fr_info.rule); fib_rule_get(fib_work->fr_info.rule);
break; break;

8
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/debugfs.c
View file

@ -482,10 +482,6 @@ static int rtl838x_dbgfs_port_init(struct dentry *parent, struct rtl838x_switch_
debugfs_create_x32("storm_rate_bc", 0644, port_dir, debugfs_create_x32("storm_rate_bc", 0644, port_dir,
(u32 *)(RTL838X_SW_BASE + RTL838X_STORM_CTRL_PORT_BC(port))); (u32 *)(RTL838X_SW_BASE + RTL838X_STORM_CTRL_PORT_BC(port)));
debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
(u32 *)(RTL838X_SW_BASE + RTL838X_VLAN_PORT_TAG_STS_CTRL
+ (port << 2)));
} else { } else {
debugfs_create_x32("storm_rate_uc", 0644, port_dir, debugfs_create_x32("storm_rate_uc", 0644, port_dir,
(u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_UC_0(port))); (u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_UC_0(port)));
@ -495,10 +491,6 @@ static int rtl838x_dbgfs_port_init(struct dentry *parent, struct rtl838x_switch_
debugfs_create_x32("storm_rate_bc", 0644, port_dir, debugfs_create_x32("storm_rate_bc", 0644, port_dir,
(u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_BC_0(port))); (u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_BC_0(port)));
debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
(u32 *)(RTL838X_SW_BASE + RTL839X_VLAN_PORT_TAG_STS_CTRL
+ (port << 2)));
} }
debugfs_create_u32("id", 0444, port_dir, (u32 *)&priv->ports[port].dp->index); debugfs_create_u32("id", 0444, port_dir, (u32 *)&priv->ports[port].dp->index);

5
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c
View file

@ -1063,10 +1063,7 @@ static int rtl83xx_port_enable(struct dsa_switch *ds, int port,
priv->ports[port].enable = true; priv->ports[port].enable = true;
/* enable inner tagging on egress, do not keep any tags */ /* enable inner tagging on egress, do not keep any tags */
if (priv->family_id == RTL9310_FAMILY_ID) priv->r->vlan_port_keep_tag_set(port, 0, 1);
sw_w32(BIT(4), priv->r->vlan_port_tag_sts_ctrl + (port << 2));
else
sw_w32(1, priv->r->vlan_port_tag_sts_ctrl + (port << 2));
if (dsa_is_cpu_port(ds, port)) if (dsa_is_cpu_port(ds, port))
return 0; return 0;

27
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl838x.c
View file

@ -6,6 +6,22 @@
#include "rtl83xx.h" #include "rtl83xx.h"
#define RTL838X_VLAN_PORT_TAG_STS_UNTAG 0x0
#define RTL838X_VLAN_PORT_TAG_STS_TAGGED 0x1
#define RTL838X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED 0x2
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_BASE 0xA530
/* port 0-28 */
#define RTL838X_VLAN_PORT_TAG_STS_CTRL(port) \
RTL838X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(11,10)
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(9,8)
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(7,6)
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(5,4)
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK GENMASK(3,2)
#define RTL838X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK GENMASK(1,0)
extern struct mutex smi_lock; extern struct mutex smi_lock;
// see_dal_maple_acl_log2PhyTmplteField and src/app/diag_v2/src/diag_acl.c // see_dal_maple_acl_log2PhyTmplteField and src/app/diag_v2/src/diag_acl.c
@ -1612,6 +1628,15 @@ static int rtl838x_l3_setup(struct rtl838x_switch_priv *priv)
return 0; return 0;
} }
void rtl838x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
{
sw_w32(FIELD_PREP(RTL838X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK,
keep_outer ? RTL838X_VLAN_PORT_TAG_STS_TAGGED : RTL838X_VLAN_PORT_TAG_STS_UNTAG) |
FIELD_PREP(RTL838X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK,
keep_inner ? RTL838X_VLAN_PORT_TAG_STS_TAGGED : RTL838X_VLAN_PORT_TAG_STS_UNTAG),
RTL838X_VLAN_PORT_TAG_STS_CTRL(port));
}
void rtl838x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode) void rtl838x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
{ {
if (type == PBVLAN_TYPE_INNER) if (type == PBVLAN_TYPE_INNER)
@ -1742,7 +1767,7 @@ const struct rtl838x_reg rtl838x_reg = {
.write_l2_entry_using_hash = rtl838x_write_l2_entry_using_hash, .write_l2_entry_using_hash = rtl838x_write_l2_entry_using_hash,
.read_cam = rtl838x_read_cam, .read_cam = rtl838x_read_cam,
.write_cam = rtl838x_write_cam, .write_cam = rtl838x_write_cam,
.vlan_port_tag_sts_ctrl = RTL838X_VLAN_PORT_TAG_STS_CTRL, .vlan_port_keep_tag_set = rtl838x_vlan_port_keep_tag_set,
.vlan_port_pvidmode_set = rtl838x_vlan_port_pvidmode_set, .vlan_port_pvidmode_set = rtl838x_vlan_port_pvidmode_set,
.vlan_port_pvid_set = rtl838x_vlan_port_pvid_set, .vlan_port_pvid_set = rtl838x_vlan_port_pvid_set,
.trk_mbr_ctr = rtl838x_trk_mbr_ctr, .trk_mbr_ctr = rtl838x_trk_mbr_ctr,

8
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl838x.h
View file

@ -69,29 +69,24 @@
#define RTL838X_VLAN_PORT_EGR_FLTR (0x3A84) #define RTL838X_VLAN_PORT_EGR_FLTR (0x3A84)
#define RTL838X_VLAN_PORT_PB_VLAN (0x3C00) #define RTL838X_VLAN_PORT_PB_VLAN (0x3C00)
#define RTL838X_VLAN_PORT_IGR_FLTR (0x3A7C) #define RTL838X_VLAN_PORT_IGR_FLTR (0x3A7C)
#define RTL838X_VLAN_PORT_TAG_STS_CTRL (0xA530)
#define RTL839X_VLAN_PROFILE(idx) (0x25C0 + (((idx) << 3))) #define RTL839X_VLAN_PROFILE(idx) (0x25C0 + (((idx) << 3)))
#define RTL839X_VLAN_CTRL (0x26D4) #define RTL839X_VLAN_CTRL (0x26D4)
#define RTL839X_VLAN_PORT_PB_VLAN (0x26D8) #define RTL839X_VLAN_PORT_PB_VLAN (0x26D8)
#define RTL839X_VLAN_PORT_IGR_FLTR (0x27B4) #define RTL839X_VLAN_PORT_IGR_FLTR (0x27B4)
#define RTL839X_VLAN_PORT_EGR_FLTR (0x27C4) #define RTL839X_VLAN_PORT_EGR_FLTR (0x27C4)
#define RTL839X_VLAN_PORT_TAG_STS_CTRL (0x6828)
#define RTL839X_VLAN_PORT_TAG_STS_CTRL (0x6828)
#define RTL930X_VLAN_PROFILE_SET(idx) (0x9c60 + (((idx) * 20))) #define RTL930X_VLAN_PROFILE_SET(idx) (0x9c60 + (((idx) * 20)))
#define RTL930X_VLAN_CTRL (0x82D4) #define RTL930X_VLAN_CTRL (0x82D4)
#define RTL930X_VLAN_PORT_PB_VLAN (0x82D8) #define RTL930X_VLAN_PORT_PB_VLAN (0x82D8)
#define RTL930X_VLAN_PORT_IGR_FLTR (0x83C0) #define RTL930X_VLAN_PORT_IGR_FLTR (0x83C0)
#define RTL930X_VLAN_PORT_EGR_FLTR (0x83C8) #define RTL930X_VLAN_PORT_EGR_FLTR (0x83C8)
#define RTL930X_VLAN_PORT_TAG_STS_CTRL (0xCE24)
#define RTL931X_VLAN_PROFILE_SET(idx) (0x9800 + (((idx) * 28))) #define RTL931X_VLAN_PROFILE_SET(idx) (0x9800 + (((idx) * 28)))
#define RTL931X_VLAN_CTRL (0x94E4) #define RTL931X_VLAN_CTRL (0x94E4)
#define RTL931X_VLAN_PORT_IGR_CTRL (0x94E8) #define RTL931X_VLAN_PORT_IGR_CTRL (0x94E8)
#define RTL931X_VLAN_PORT_IGR_FLTR (0x96B4) #define RTL931X_VLAN_PORT_IGR_FLTR (0x96B4)
#define RTL931X_VLAN_PORT_EGR_FLTR (0x96C4) #define RTL931X_VLAN_PORT_EGR_FLTR (0x96C4)
#define RTL931X_VLAN_PORT_TAG_CTRL (0x4860)
/* Table access registers */ /* Table access registers */
#define RTL838X_TBL_ACCESS_CTRL_0 (0x6914) #define RTL838X_TBL_ACCESS_CTRL_0 (0x6914)
@ -980,6 +975,7 @@ struct rtl838x_reg {
void (*vlan_profile_setup)(int profile); void (*vlan_profile_setup)(int profile);
void (*vlan_port_pvidmode_set)(int port, enum pbvlan_type type, enum pbvlan_mode mode); void (*vlan_port_pvidmode_set)(int port, enum pbvlan_type type, enum pbvlan_mode mode);
void (*vlan_port_pvid_set)(int port, enum pbvlan_type type, int pvid); void (*vlan_port_pvid_set)(int port, enum pbvlan_type type, int pvid);
void (*vlan_port_keep_tag_set)(int port, bool keep_outer, bool keep_inner);
void (*set_vlan_igr_filter)(int port, enum igr_filter state); void (*set_vlan_igr_filter)(int port, enum igr_filter state);
void (*set_vlan_egr_filter)(int port, enum egr_filter state); void (*set_vlan_egr_filter)(int port, enum egr_filter state);
void (*enable_learning)(int port, bool enable); void (*enable_learning)(int port, bool enable);
@ -1005,8 +1001,6 @@ struct rtl838x_reg {
void (*write_l2_entry_using_hash)(u32 hash, u32 pos, struct rtl838x_l2_entry *e); void (*write_l2_entry_using_hash)(u32 hash, u32 pos, struct rtl838x_l2_entry *e);
u64 (*read_cam)(int idx, struct rtl838x_l2_entry *e); u64 (*read_cam)(int idx, struct rtl838x_l2_entry *e);
void (*write_cam)(int idx, struct rtl838x_l2_entry *e); void (*write_cam)(int idx, struct rtl838x_l2_entry *e);
int vlan_port_tag_sts_ctrl;
int (*rtl838x_vlan_port_tag_sts_ctrl)(int port);
int (*trk_mbr_ctr)(int group); int (*trk_mbr_ctr)(int group);
int rma_bpdu_fld_pmask; int rma_bpdu_fld_pmask;
int spcl_trap_eapol_ctrl; int spcl_trap_eapol_ctrl;

26
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl839x.c
View file

@ -3,6 +3,21 @@
#include <asm/mach-rtl838x/mach-rtl83xx.h> #include <asm/mach-rtl838x/mach-rtl83xx.h>
#include "rtl83xx.h" #include "rtl83xx.h"
#define RTL839X_VLAN_PORT_TAG_STS_UNTAG 0x0
#define RTL839X_VLAN_PORT_TAG_STS_TAGGED 0x1
#define RTL839X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED 0x2
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_BASE 0x6828
/* port 0-52 */
#define RTL839X_VLAN_PORT_TAG_STS_CTRL(port) \
RTL839X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK GENMASK(7,6)
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK GENMASK(5,4)
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(3,3)
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(2,2)
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(1,1)
#define RTL839X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(0,0)
extern struct mutex smi_lock; extern struct mutex smi_lock;
extern struct rtl83xx_soc_info soc_info; extern struct rtl83xx_soc_info soc_info;
@ -1755,6 +1770,15 @@ int rtl839x_l3_setup(struct rtl838x_switch_priv *priv)
return 0; return 0;
} }
void rtl839x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
{
sw_w32(FIELD_PREP(RTL839X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK,
keep_outer ? RTL839X_VLAN_PORT_TAG_STS_TAGGED : RTL839X_VLAN_PORT_TAG_STS_UNTAG) |
FIELD_PREP(RTL839X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK,
keep_inner ? RTL839X_VLAN_PORT_TAG_STS_TAGGED : RTL839X_VLAN_PORT_TAG_STS_UNTAG),
RTL839X_VLAN_PORT_TAG_STS_CTRL(port));
}
void rtl839x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode) void rtl839x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
{ {
if (type == PBVLAN_TYPE_INNER) if (type == PBVLAN_TYPE_INNER)
@ -1860,6 +1884,7 @@ const struct rtl838x_reg rtl839x_reg = {
.vlan_profile_dump = rtl839x_vlan_profile_dump, .vlan_profile_dump = rtl839x_vlan_profile_dump,
.vlan_profile_setup = rtl839x_vlan_profile_setup, .vlan_profile_setup = rtl839x_vlan_profile_setup,
.vlan_fwd_on_inner = rtl839x_vlan_fwd_on_inner, .vlan_fwd_on_inner = rtl839x_vlan_fwd_on_inner,
.vlan_port_keep_tag_set = rtl839x_vlan_port_keep_tag_set,
.vlan_port_pvidmode_set = rtl839x_vlan_port_pvidmode_set, .vlan_port_pvidmode_set = rtl839x_vlan_port_pvidmode_set,
.vlan_port_pvid_set = rtl839x_vlan_port_pvid_set, .vlan_port_pvid_set = rtl839x_vlan_port_pvid_set,
.set_vlan_igr_filter = rtl839x_set_igr_filter, .set_vlan_igr_filter = rtl839x_set_igr_filter,
@ -1886,7 +1911,6 @@ const struct rtl838x_reg rtl839x_reg = {
.write_l2_entry_using_hash = rtl839x_write_l2_entry_using_hash, .write_l2_entry_using_hash = rtl839x_write_l2_entry_using_hash,
.read_cam = rtl839x_read_cam, .read_cam = rtl839x_read_cam,
.write_cam = rtl839x_write_cam, .write_cam = rtl839x_write_cam,
.vlan_port_tag_sts_ctrl = RTL839X_VLAN_PORT_TAG_STS_CTRL,
.trk_mbr_ctr = rtl839x_trk_mbr_ctr, .trk_mbr_ctr = rtl839x_trk_mbr_ctr,
.rma_bpdu_fld_pmask = RTL839X_RMA_BPDU_FLD_PMSK, .rma_bpdu_fld_pmask = RTL839X_RMA_BPDU_FLD_PMSK,
.spcl_trap_eapol_ctrl = RTL839X_SPCL_TRAP_EAPOL_CTRL, .spcl_trap_eapol_ctrl = RTL839X_SPCL_TRAP_EAPOL_CTRL,

27
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl930x.c
View file

@ -5,6 +5,22 @@
#include "rtl83xx.h" #include "rtl83xx.h"
#define RTL930X_VLAN_PORT_TAG_STS_INTERNAL 0x0
#define RTL930X_VLAN_PORT_TAG_STS_UNTAG 0x1
#define RTL930X_VLAN_PORT_TAG_STS_TAGGED 0x2
#define RTL930X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED 0x3
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_BASE 0xCE24
/* port 0-28 */
#define RTL930X_VLAN_PORT_TAG_STS_CTRL(port) \
RTL930X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_OTAG_STS_MASK GENMASK(7,6)
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_ITAG_STS_MASK GENMASK(5,4)
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(3,3)
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(2,2)
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(1,1)
#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(0,0)
extern struct mutex smi_lock; extern struct mutex smi_lock;
extern struct rtl83xx_soc_info soc_info; extern struct rtl83xx_soc_info soc_info;
@ -2300,6 +2316,15 @@ static void rtl930x_packet_cntr_clear(int counter)
rtl_table_release(r); rtl_table_release(r);
} }
void rtl930x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
{
sw_w32(FIELD_PREP(RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_OTAG_STS_MASK,
keep_outer ? RTL930X_VLAN_PORT_TAG_STS_TAGGED : RTL930X_VLAN_PORT_TAG_STS_UNTAG) |
FIELD_PREP(RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_ITAG_STS_MASK,
keep_inner ? RTL930X_VLAN_PORT_TAG_STS_TAGGED : RTL930X_VLAN_PORT_TAG_STS_UNTAG),
RTL930X_VLAN_PORT_TAG_STS_CTRL(port));
}
void rtl930x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode) void rtl930x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
{ {
if (type == PBVLAN_TYPE_INNER) if (type == PBVLAN_TYPE_INNER)
@ -2498,7 +2523,7 @@ const struct rtl838x_reg rtl930x_reg = {
.write_l2_entry_using_hash = rtl930x_write_l2_entry_using_hash, .write_l2_entry_using_hash = rtl930x_write_l2_entry_using_hash,
.read_cam = rtl930x_read_cam, .read_cam = rtl930x_read_cam,
.write_cam = rtl930x_write_cam, .write_cam = rtl930x_write_cam,
.vlan_port_tag_sts_ctrl = RTL930X_VLAN_PORT_TAG_STS_CTRL, .vlan_port_keep_tag_set = rtl930x_vlan_port_keep_tag_set,
.vlan_port_pvidmode_set = rtl930x_vlan_port_pvidmode_set, .vlan_port_pvidmode_set = rtl930x_vlan_port_pvidmode_set,
.vlan_port_pvid_set = rtl930x_vlan_port_pvid_set, .vlan_port_pvid_set = rtl930x_vlan_port_pvid_set,
.trk_mbr_ctr = rtl930x_trk_mbr_ctr, .trk_mbr_ctr = rtl930x_trk_mbr_ctr,

31
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl931x.c
View file

@ -3,6 +3,26 @@
#include <asm/mach-rtl838x/mach-rtl83xx.h> #include <asm/mach-rtl838x/mach-rtl83xx.h>
#include "rtl83xx.h" #include "rtl83xx.h"
#define RTL931X_VLAN_PORT_TAG_STS_INTERNAL 0x0
#define RTL931X_VLAN_PORT_TAG_STS_UNTAG 0x1
#define RTL931X_VLAN_PORT_TAG_STS_TAGGED 0x2
#define RTL931X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED 0x3
#define RTL931X_VLAN_PORT_TAG_CTRL_BASE 0x4860
/* port 0-56 */
#define RTL931X_VLAN_PORT_TAG_CTRL(port) \
RTL931X_VLAN_PORT_TAG_CTRL_BASE + (port << 2)
#define RTL931X_VLAN_PORT_TAG_EGR_OTAG_STS_MASK GENMASK(13,12)
#define RTL931X_VLAN_PORT_TAG_EGR_ITAG_STS_MASK GENMASK(11,10)
#define RTL931X_VLAN_PORT_TAG_EGR_OTAG_KEEP_MASK GENMASK(9,9)
#define RTL931X_VLAN_PORT_TAG_EGR_ITAG_KEEP_MASK GENMASK(8,8)
#define RTL931X_VLAN_PORT_TAG_IGR_OTAG_KEEP_MASK GENMASK(7,7)
#define RTL931X_VLAN_PORT_TAG_IGR_ITAG_KEEP_MASK GENMASK(6,6)
#define RTL931X_VLAN_PORT_TAG_OTPID_IDX_MASK GENMASK(5,4)
#define RTL931X_VLAN_PORT_TAG_OTPID_KEEP_MASK GENMASK(3,3)
#define RTL931X_VLAN_PORT_TAG_ITPID_IDX_MASK GENMASK(2,1)
#define RTL931X_VLAN_PORT_TAG_ITPID_KEEP_MASK GENMASK(0,0)
extern struct mutex smi_lock; extern struct mutex smi_lock;
extern struct rtl83xx_soc_info soc_info; extern struct rtl83xx_soc_info soc_info;
@ -1470,6 +1490,15 @@ int rtl931x_l3_setup(struct rtl838x_switch_priv *priv)
return 0; return 0;
} }
void rtl931x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
{
sw_w32(FIELD_PREP(RTL931X_VLAN_PORT_TAG_EGR_OTAG_STS_MASK,
keep_outer ? RTL931X_VLAN_PORT_TAG_STS_TAGGED : RTL931X_VLAN_PORT_TAG_STS_UNTAG) |
FIELD_PREP(RTL931X_VLAN_PORT_TAG_EGR_ITAG_STS_MASK,
keep_inner ? RTL931X_VLAN_PORT_TAG_STS_TAGGED : RTL931X_VLAN_PORT_TAG_STS_UNTAG),
RTL931X_VLAN_PORT_TAG_CTRL(port));
}
void rtl931x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode) void rtl931x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
{ {
if (type == PBVLAN_TYPE_INNER) if (type == PBVLAN_TYPE_INNER)
@ -1651,7 +1680,7 @@ const struct rtl838x_reg rtl931x_reg = {
.write_l2_entry_using_hash = rtl931x_write_l2_entry_using_hash, .write_l2_entry_using_hash = rtl931x_write_l2_entry_using_hash,
.read_cam = rtl931x_read_cam, .read_cam = rtl931x_read_cam,
.write_cam = rtl931x_write_cam, .write_cam = rtl931x_write_cam,
.vlan_port_tag_sts_ctrl = RTL931X_VLAN_PORT_TAG_CTRL, .vlan_port_keep_tag_set = rtl931x_vlan_port_keep_tag_set,
.vlan_port_pvidmode_set = rtl931x_vlan_port_pvidmode_set, .vlan_port_pvidmode_set = rtl931x_vlan_port_pvidmode_set,
.vlan_port_pvid_set = rtl931x_vlan_port_pvid_set, .vlan_port_pvid_set = rtl931x_vlan_port_pvid_set,
.trk_mbr_ctr = rtl931x_trk_mbr_ctr, .trk_mbr_ctr = rtl931x_trk_mbr_ctr,

6
target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.h
View file

@ -348,11 +348,11 @@ inline u32 rtl839x_get_mac_link_spd_sts(int port)
inline u32 rtl930x_get_mac_link_spd_sts(int port) inline u32 rtl930x_get_mac_link_spd_sts(int port)
{ {
int r = RTL930X_MAC_LINK_SPD_STS + ((port / 10) << 2); int r = RTL930X_MAC_LINK_SPD_STS + ((port >> 3) << 2);
u32 speed = sw_r32(r); u32 speed = sw_r32(r);
speed >>= (port % 10) * 3; speed >>= (port % 8) << 2;
return (speed & 0x7); return (speed & 0xf);
} }
inline u32 rtl931x_get_mac_link_spd_sts(int port) inline u32 rtl931x_get_mac_link_spd_sts(int port)