Merge branch 'openwrt:master' into master

This commit is contained in:
Hayzam Sherif 2023-07-16 23:04:30 +05:30 committed by GitHub
commit f8190387a3
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
80 changed files with 3351 additions and 223 deletions

View file

@ -7,7 +7,7 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=grub
PKG_VERSION:=2.06
PKG_RELEASE:=5
PKG_RELEASE:=6
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@GNU/grub
@ -25,7 +25,7 @@ ifneq ($(BUILD_VARIANT),none)
endif
PKG_FLAGS:=nonshared
PKG_BUILD_FLAGS:=no-lto no-mold
PKG_BUILD_FLAGS:=no-gc-sections no-lto no-mold
include $(INCLUDE_DIR)/host-build.mk
include $(INCLUDE_DIR)/package.mk

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@ -0,0 +1,23 @@
#
# Copyright (C) 2023 OpenWrt.org
#
[ -e /etc/config/ubootenv ] && exit 0
touch /etc/config/ubootenv
. /lib/uboot-envtools.sh
. /lib/functions.sh
board=$(board_name)
case "$board" in
cisco,vedge1000)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000"
;;
esac
config_load ubootenv
config_foreach ubootenv_add_app_config ubootenv
exit 0

View file

@ -10,9 +10,9 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=perf
PKG_VERSION:=$(LINUX_VERSION)
PKG_RELEASE:=4
PKG_RELEASE:=5
PKG_BUILD_FLAGS:=no-mips16
PKG_BUILD_FLAGS:=no-mips16 no-lto
PKG_BUILD_PARALLEL:=1
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_FLAGS:=nonshared

View file

@ -8,9 +8,9 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=ath11k-firmware
PKG_SOURCE_DATE:=2023-03-31
PKG_SOURCE_VERSION:=a039049a9349722fa5c74185452ab04644a0d351
PKG_MIRROR_HASH:=ed401e3f6e91d70565b3396139193f7e815f410db93700697205ac8ed1b828c5
PKG_SOURCE_DATE:=2023-07-06
PKG_SOURCE_VERSION:=69f6b7346b64784188dba791a9cfb614eefa441f
PKG_MIRROR_HASH:=0f0203f755cb6713f6a1f41397dcd0f1a24e5cdbe75258af961343b927ebb3e9
PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
@ -60,14 +60,14 @@ $(eval $(call Download,qcn9074-board))
define Package/ath11k-firmware-ipq8074/install
$(INSTALL_DIR) $(1)/lib/firmware/IPQ8074
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/ath11k-firmware/IPQ8074/hw2.0/testing/2.9.0.1/WLAN.HK.2.9.0.1-01385-QCAHKSWPL_SILICONZ-1/* \
$(PKG_BUILD_DIR)/ath11k-firmware/IPQ8074/hw2.0/2.9.0.1/WLAN.HK.2.9.0.1-01837-QCAHKSWPL_SILICONZ-1/* \
$(1)/lib/firmware/IPQ8074/
endef
define Package/ath11k-firmware-qcn9074/install
$(INSTALL_DIR) $(1)/lib/firmware/ath11k/QCN9074/hw1.0
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/ath11k-firmware/QCN9074/hw1.0/testing/2.9.0.1/WLAN.HK.2.9.0.1-01385-QCAHKSWPL_SILICONZ-1/* \
$(PKG_BUILD_DIR)/ath11k-firmware/QCN9074/hw1.0/2.9.0.1/WLAN.HK.2.9.0.1-01837-QCAHKSWPL_SILICONZ-1/* \
$(1)/lib/firmware/ath11k/QCN9074/hw1.0/
$(INSTALL_BIN) \
$(DL_DIR)/$(QCN9074_BOARD_FILE) $(1)/lib/firmware/ath11k/QCN9074/hw1.0/board-2.bin

View file

@ -8,9 +8,9 @@ PKG_LICENSE_FILES:=
PKG_SOURCE_URL:=https://github.com/openwrt/mt76
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2023-07-04
PKG_SOURCE_VERSION:=f704e4f83c6fd21fb39046fa328efb51bee6383b
PKG_MIRROR_HASH:=651d2963a0d624943601dcad971e4942401274af81d39913c6d3d91be2f8d8b1
PKG_SOURCE_DATE:=2023-07-14
PKG_SOURCE_VERSION:=bb3937d5c3e0b13c0d08747ec0fc9726fb4fd870
PKG_MIRROR_HASH:=498d9cfdafe06572d0668d49e89f1014715100fa59c4f89b8495cd869c8c9b0b
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_USE_NINJA:=0

View file

@ -0,0 +1,141 @@
From d4c4ef302f98fd6bce173b8636e7e350d8b44981 Mon Sep 17 00:00:00 2001
From: P Praneesh <ppranees@codeaurora.org>
Date: Fri, 19 Mar 2021 12:17:27 +0530
Subject: [PATCH] hostapd: update cfs0 and cfs1 for 160MHz
As per standard Draft P802.11ax_D8.0,( Table 26-9—Setting
of the VHT Channel Width and VHT NSS at an HE STA
transmitting the OM Control subfield ), center frequency of
160MHz should be published in HT information subset 2 of
HT information when EXT NSS BW field is enabled.
If the supported number of NSS in 160MHz is at least max NSS
support, then center_freq_seg0 indicates the center frequency of 80MHz and
center_freq_seg1 indicates the center frequency of 160MHz.
If the supported number of NSS in 160MHz is less than max NSS
support, then center_freq_seg0 indicates the center frequency of 80MHz and
center_freq_seg1 is 0. The center frequency of 160MHz is published in HT
operation information element instead.
Signed-off-by: P Praneesh <ppranees@codeaurora.org>
---
hostapd/config_file.c | 2 ++
src/ap/ieee802_11_ht.c | 7 +++++++
src/ap/ieee802_11_vht.c | 16 ++++++++++++++++
src/common/hw_features_common.c | 1 +
src/common/ieee802_11_defs.h | 1 +
5 files changed, 27 insertions(+)
--- a/hostapd/config_file.c
+++ b/hostapd/config_file.c
@@ -1153,6 +1153,8 @@ static int hostapd_config_vht_capab(stru
conf->vht_capab |= VHT_CAP_RX_ANTENNA_PATTERN;
if (os_strstr(capab, "[TX-ANTENNA-PATTERN]"))
conf->vht_capab |= VHT_CAP_TX_ANTENNA_PATTERN;
+ if (os_strstr(capab, "[EXT-NSS-BW-SUPP]"))
+ conf->vht_capab |= VHT_CAP_EXTENDED_NSS_BW_SUPPORT;
return 0;
}
#endif /* CONFIG_IEEE80211AC */
--- a/src/ap/ieee802_11_ht.c
+++ b/src/ap/ieee802_11_ht.c
@@ -82,7 +82,9 @@ u8 * hostapd_eid_ht_capabilities(struct
u8 * hostapd_eid_ht_operation(struct hostapd_data *hapd, u8 *eid)
{
struct ieee80211_ht_operation *oper;
+ le32 vht_capabilities_info;
u8 *pos = eid;
+ u8 chwidth;
if (!hapd->iconf->ieee80211n || hapd->conf->disable_11n ||
is_6ghz_op_class(hapd->iconf->op_class))
@@ -103,6 +105,13 @@ u8 * hostapd_eid_ht_operation(struct hos
oper->ht_param |= HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW |
HT_INFO_HT_PARAM_STA_CHNL_WIDTH;
+ vht_capabilities_info = host_to_le32(hapd->iface->current_mode->vht_capab);
+ chwidth = hostapd_get_oper_chwidth(hapd->iconf);
+ if (vht_capabilities_info & VHT_CAP_EXTENDED_NSS_BW_SUPPORT
+ && ((chwidth == CHANWIDTH_160MHZ) || (chwidth == CHANWIDTH_80P80MHZ))) {
+ oper->operation_mode = host_to_le16(hapd->iconf->vht_oper_centr_freq_seg0_idx << 5);
+ }
+
pos += sizeof(*oper);
return pos;
--- a/src/ap/ieee802_11_vht.c
+++ b/src/ap/ieee802_11_vht.c
@@ -25,6 +25,7 @@ u8 * hostapd_eid_vht_capabilities(struct
struct ieee80211_vht_capabilities *cap;
struct hostapd_hw_modes *mode = hapd->iface->current_mode;
u8 *pos = eid;
+ u8 chwidth;
if (!mode || is_6ghz_op_class(hapd->iconf->op_class))
return eid;
@@ -62,6 +63,17 @@ u8 * hostapd_eid_vht_capabilities(struct
host_to_le32(nsts << VHT_CAP_BEAMFORMEE_STS_OFFSET);
}
+ chwidth = hostapd_get_oper_chwidth(hapd->iconf);
+ if (((host_to_le32(mode->vht_capab)) & VHT_CAP_EXTENDED_NSS_BW_SUPPORT)
+ && ((chwidth == CHANWIDTH_160MHZ) || (chwidth == CHANWIDTH_80P80MHZ))) {
+ cap->vht_capabilities_info |= VHT_CAP_EXTENDED_NSS_BW_SUPPORT;
+ cap->vht_capabilities_info &= ~(host_to_le32(VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ));
+ cap->vht_capabilities_info &= ~(host_to_le32(VHT_CAP_SUPP_CHAN_WIDTH_160MHZ));
+ cap->vht_capabilities_info &= ~(host_to_le32(VHT_CAP_SUPP_CHAN_WIDTH_MASK));
+ } else {
+ cap->vht_capabilities_info &= ~VHT_CAP_EXTENDED_NSS_BW_SUPPORT_MASK;
+ }
+
/* Supported MCS set comes from hw */
os_memcpy(&cap->vht_supported_mcs_set, mode->vht_mcs_set, 8);
@@ -74,6 +86,7 @@ u8 * hostapd_eid_vht_capabilities(struct
u8 * hostapd_eid_vht_operation(struct hostapd_data *hapd, u8 *eid)
{
struct ieee80211_vht_operation *oper;
+ le32 vht_capabilities_info;
u8 *pos = eid;
enum oper_chan_width oper_chwidth =
hostapd_get_oper_chwidth(hapd->iconf);
@@ -106,6 +119,7 @@ u8 * hostapd_eid_vht_operation(struct ho
oper->vht_op_info_chan_center_freq_seg1_idx = seg1;
oper->vht_op_info_chwidth = oper_chwidth;
+ vht_capabilities_info = host_to_le32(hapd->iface->current_mode->vht_capab);
if (oper_chwidth == CONF_OPER_CHWIDTH_160MHZ) {
/*
* Convert 160 MHz channel width to new style as interop
@@ -119,6 +133,9 @@ u8 * hostapd_eid_vht_operation(struct ho
oper->vht_op_info_chan_center_freq_seg0_idx -= 8;
else
oper->vht_op_info_chan_center_freq_seg0_idx += 8;
+
+ if (vht_capabilities_info & VHT_CAP_EXTENDED_NSS_BW_SUPPORT)
+ oper->vht_op_info_chan_center_freq_seg1_idx = 0;
} else if (oper_chwidth == CONF_OPER_CHWIDTH_80P80MHZ) {
/*
* Convert 80+80 MHz channel width to new style as interop
--- a/src/common/hw_features_common.c
+++ b/src/common/hw_features_common.c
@@ -808,6 +808,7 @@ int ieee80211ac_cap_check(u32 hw, u32 co
VHT_CAP_CHECK(VHT_CAP_VHT_LINK_ADAPTATION_VHT_MRQ_MFB);
VHT_CAP_CHECK(VHT_CAP_RX_ANTENNA_PATTERN);
VHT_CAP_CHECK(VHT_CAP_TX_ANTENNA_PATTERN);
+ VHT_CAP_CHECK(VHT_CAP_EXTENDED_NSS_BW_SUPPORT);
#undef VHT_CAP_CHECK
#undef VHT_CAP_CHECK_MAX
--- a/src/common/ieee802_11_defs.h
+++ b/src/common/ieee802_11_defs.h
@@ -1348,6 +1348,8 @@ struct ieee80211_ampe_ie {
#define VHT_CAP_VHT_LINK_ADAPTATION_VHT_MRQ_MFB ((u32) BIT(26) | BIT(27))
#define VHT_CAP_RX_ANTENNA_PATTERN ((u32) BIT(28))
#define VHT_CAP_TX_ANTENNA_PATTERN ((u32) BIT(29))
+#define VHT_CAP_EXTENDED_NSS_BW_SUPPORT ((u32) BIT(30))
+#define VHT_CAP_EXTENDED_NSS_BW_SUPPORT_MASK ((u32) BIT(30) | BIT(31))
#define VHT_OPMODE_CHANNEL_WIDTH_MASK ((u8) BIT(0) | BIT(1))
#define VHT_OPMODE_CHANNEL_RxNSS_MASK ((u8) BIT(4) | BIT(5) | \

View file

@ -1,6 +1,6 @@
--- a/hostapd/config_file.c
+++ b/hostapd/config_file.c
@@ -3446,6 +3446,10 @@ static int hostapd_config_fill(struct ho
@@ -3448,6 +3448,10 @@ static int hostapd_config_fill(struct ho
if (bss->ocv && !bss->ieee80211w)
bss->ieee80211w = 1;
#endif /* CONFIG_OCV */
@ -36,7 +36,7 @@
hostapd_set_state(iface, HAPD_IFACE_HT_SCAN);
--- a/src/ap/ieee802_11_ht.c
+++ b/src/ap/ieee802_11_ht.c
@@ -230,6 +230,9 @@ void hostapd_2040_coex_action(struct hos
@@ -239,6 +239,9 @@ void hostapd_2040_coex_action(struct hos
return;
}
@ -46,7 +46,7 @@
if (len < IEEE80211_HDRLEN + 2 + sizeof(*bc_ie)) {
wpa_printf(MSG_DEBUG,
"Ignore too short 20/40 BSS Coexistence Management frame");
@@ -390,6 +393,9 @@ void ht40_intolerant_add(struct hostapd_
@@ -399,6 +402,9 @@ void ht40_intolerant_add(struct hostapd_
if (iface->current_mode->mode != HOSTAPD_MODE_IEEE80211G)
return;

View file

@ -13,7 +13,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/hostapd/config_file.c
+++ b/hostapd/config_file.c
@@ -3498,6 +3498,8 @@ static int hostapd_config_fill(struct ho
@@ -3500,6 +3500,8 @@ static int hostapd_config_fill(struct ho
} else if (os_strcmp(buf, "he_bss_color") == 0) {
conf->he_op.he_bss_color = atoi(pos) & 0x3f;
conf->he_op.he_bss_color_disabled = 0;

View file

@ -1,6 +1,6 @@
--- a/hostapd/config_file.c
+++ b/hostapd/config_file.c
@@ -2418,6 +2418,8 @@ static int hostapd_config_fill(struct ho
@@ -2420,6 +2420,8 @@ static int hostapd_config_fill(struct ho
bss->isolate = atoi(pos);
} else if (os_strcmp(buf, "ap_max_inactivity") == 0) {
bss->ap_max_inactivity = atoi(pos);
@ -9,7 +9,7 @@
} else if (os_strcmp(buf, "skip_inactivity_poll") == 0) {
bss->skip_inactivity_poll = atoi(pos);
} else if (os_strcmp(buf, "config_id") == 0) {
@@ -3128,6 +3130,8 @@ static int hostapd_config_fill(struct ho
@@ -3130,6 +3132,8 @@ static int hostapd_config_fill(struct ho
}
} else if (os_strcmp(buf, "acs_exclude_dfs") == 0) {
conf->acs_exclude_dfs = atoi(pos);

View file

@ -30,7 +30,7 @@
--- a/hostapd/config_file.c
+++ b/hostapd/config_file.c
@@ -3353,6 +3353,8 @@ static int hostapd_config_fill(struct ho
@@ -3355,6 +3355,8 @@ static int hostapd_config_fill(struct ho
#ifndef CONFIG_NO_VLAN
} else if (os_strcmp(buf, "dynamic_vlan") == 0) {
bss->ssid.dynamic_vlan = atoi(pos);

View file

@ -1,6 +1,6 @@
--- a/hostapd/config_file.c
+++ b/hostapd/config_file.c
@@ -2316,6 +2316,8 @@ static int hostapd_config_fill(struct ho
@@ -2318,6 +2318,8 @@ static int hostapd_config_fill(struct ho
sizeof(conf->bss[0]->iface));
} else if (os_strcmp(buf, "bridge") == 0) {
os_strlcpy(bss->bridge, pos, sizeof(bss->bridge));

View file

@ -1,6 +1,6 @@
--- a/hostapd/config_file.c
+++ b/hostapd/config_file.c
@@ -2848,6 +2848,14 @@ static int hostapd_config_fill(struct ho
@@ -2850,6 +2850,14 @@ static int hostapd_config_fill(struct ho
line, bss->max_num_sta, MAX_STA_COUNT);
return 1;
}

View file

@ -1,6 +1,6 @@
--- a/hostapd/config_file.c
+++ b/hostapd/config_file.c
@@ -3007,6 +3007,8 @@ static int hostapd_config_fill(struct ho
@@ -3009,6 +3009,8 @@ static int hostapd_config_fill(struct ho
wpa_printf(MSG_INFO,
"Line %d: Obsolete peerkey parameter ignored", line);
#ifdef CONFIG_IEEE80211R_AP

View file

@ -55,7 +55,7 @@
"x_snoop: Failed to initialize L2 packet processing %s",
--- a/hostapd/config_file.c
+++ b/hostapd/config_file.c
@@ -2320,6 +2320,8 @@ static int hostapd_config_fill(struct ho
@@ -2322,6 +2322,8 @@ static int hostapd_config_fill(struct ho
os_strlcpy(bss->wds_bridge, pos, sizeof(bss->wds_bridge));
} else if (os_strcmp(buf, "bridge_hairpin") == 0) {
bss->bridge_hairpin = atoi(pos);

View file

@ -1,6 +1,6 @@
--- a/hostapd/config_file.c
+++ b/hostapd/config_file.c
@@ -1602,6 +1602,8 @@ static int parse_anqp_elem(struct hostap
@@ -1604,6 +1604,8 @@ static int parse_anqp_elem(struct hostap
return 0;
}
@ -9,7 +9,7 @@
static int parse_qos_map_set(struct hostapd_bss_config *bss,
char *buf, int line)
@@ -1643,8 +1645,6 @@ static int parse_qos_map_set(struct host
@@ -1645,8 +1647,6 @@ static int parse_qos_map_set(struct host
return 0;
}
@ -18,7 +18,7 @@
#ifdef CONFIG_HS20
static int hs20_parse_conn_capab(struct hostapd_bss_config *bss, char *buf,
@@ -4064,10 +4064,10 @@ static int hostapd_config_fill(struct ho
@@ -4066,10 +4066,10 @@ static int hostapd_config_fill(struct ho
bss->gas_frag_limit = val;
} else if (os_strcmp(buf, "gas_comeback_delay") == 0) {
bss->gas_comeback_delay = atoi(pos);

View file

@ -98,7 +98,7 @@
hapd->conf->own_ip_addr.af == AF_INET &&
--- a/hostapd/config_file.c
+++ b/hostapd/config_file.c
@@ -2688,6 +2688,8 @@ static int hostapd_config_fill(struct ho
@@ -2690,6 +2690,8 @@ static int hostapd_config_fill(struct ho
} else if (os_strcmp(buf, "iapp_interface") == 0) {
wpa_printf(MSG_INFO, "DEPRECATED: iapp_interface not used");
#endif /* CONFIG_IAPP */

View file

@ -13,7 +13,6 @@ if len(argv) != 2:
json_path = Path(argv[1])
file_path = Path(getenv("FILE_DIR")) / getenv("FILE_NAME")
if not file_path.is_file():
print("Skip JSON creation for non existing file", file_path)
exit(0)
@ -37,7 +36,14 @@ def get_titles():
device_id = getenv("DEVICE_ID")
hash_file = hashlib.sha256(file_path.read_bytes()).hexdigest()
sha256_hash = hashlib.sha256()
with open(str(file_path),"rb") as f:
# Read and update hash string value in blocks of 4K
for byte_block in iter(lambda: f.read(4096),b""):
sha256_hash.update(byte_block)
hash_file = sha256_hash.hexdigest()
if file_path.with_suffix(file_path.suffix + ".sha256sum").exists():
hash_unsigned = (

View file

@ -127,9 +127,11 @@ _call_info: FORCE
echo 'Available Profiles:'
echo; $(PROFILE_LIST)
BUILD_PACKAGES:=$(USER_PACKAGES) $(sort $(DEFAULT_PACKAGES) $($(USER_PROFILE)_PACKAGES) kernel)
BUILD_PACKAGES:=$(sort $(DEFAULT_PACKAGES) $($(USER_PROFILE)_PACKAGES) kernel)
# "-pkgname" in the package list means remove "pkgname" from the package list
BUILD_PACKAGES:=$(filter-out $(filter -%,$(BUILD_PACKAGES)) $(patsubst -%,%,$(filter -%,$(BUILD_PACKAGES))),$(BUILD_PACKAGES))
BUILD_PACKAGES:=$(USER_PACKAGES) $(BUILD_PACKAGES)
BUILD_PACKAGES:=$(filter-out $(filter -%,$(BUILD_PACKAGES)) $(patsubst -%,%,$(filter -%,$(BUILD_PACKAGES))),$(BUILD_PACKAGES))
PACKAGES:=
_call_image: staging_dir/host/.prereq-build

View file

@ -10,6 +10,7 @@ CPU_TYPE:=cortex-a53
SUBTARGETS:=generic
KERNEL_PATCHVER:=5.15
KERNEL_TESTING_PATCHVER:=6.1
define Target/Description
Build firmware images for Broadcom BCM4908 SoC family routers.

View file

@ -0,0 +1,244 @@
CONFIG_64BIT=y
CONFIG_ARCH_BCM=y
CONFIG_ARCH_BCMBCA=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_PROC_KCORE_TEXT=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANTS_NO_INSTR=y
CONFIG_ARM64=y
CONFIG_ARM64_4K_PAGES=y
CONFIG_ARM64_CRYPTO=y
CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y
CONFIG_ARM64_PAGE_SHIFT=12
CONFIG_ARM64_PA_BITS=48
CONFIG_ARM64_PA_BITS_48=y
CONFIG_ARM64_PTR_AUTH=y
CONFIG_ARM64_PTR_AUTH_KERNEL=y
CONFIG_ARM64_SVE=y
CONFIG_ARM64_TAGGED_ADDR_ABI=y
CONFIG_ARM64_VA_BITS=39
CONFIG_ARM64_VA_BITS_39=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_PSCI_FW=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_B53=y
CONFIG_BCM4908_ENET=y
CONFIG_BCM7038_WDT=y
CONFIG_BCM7XXX_PHY=y
CONFIG_BCM_NET_PHYLIB=y
CONFIG_BCM_PMB=y
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_BLK_PM=y
CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
CONFIG_CLK_BCM_63XX=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="earlycon=bcm63xx_uart,0xff800640 console=ttyS0,115200"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
CONFIG_COMMON_CLK=y
# CONFIG_COMPAT_32BIT_TIME is not set
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_RMAP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_AES_ARM64=y
CONFIG_CRYPTO_AES_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_CRYPTD=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_SIMD=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DMA_REMAP=y
CONFIG_DTC=y
CONFIG_EDAC_SUPPORT=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FRAME_POINTER=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_FIND_FIRST_BIT=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GRO_CELLS=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_BRCMSTB=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_LEDS_BCM63138=y
CONFIG_LEDS_GPIO=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MDIO_BCM_UNIMAC=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEMFD_CREATE=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_MTD_BRCM_U_BOOT=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND_BRCMNAND=y
CONFIG_MTD_NAND_BRCMNAND_BCMBCA=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_OF_PARTS_BCM4908=y
# CONFIG_MTD_OF_PARTS_LINKSYS_NS is not set
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPLIT_CFE_BOOTFS=y
# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_BCM_SF2=y
CONFIG_NET_DSA_TAG_BRCM=y
CONFIG_NET_DSA_TAG_BRCM_COMMON=y
CONFIG_NET_DSA_TAG_BRCM_LEGACY=y
CONFIG_NET_DSA_TAG_BRCM_PREPEND=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NO_IOPORT_MAP=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_NVMEM_SYSFS=y
CONFIG_NVMEM_U_BOOT_ENV=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_PADATA=y
CONFIG_PARTITION_PERCPU=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
CONFIG_PHYS_ADDR_T_64BIT=y
# CONFIG_PHY_BRCM_SATA is not set
CONFIG_PHY_BRCM_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_BCM4908=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_GENERIC_DOMAINS=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_SUPPLY=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_RELOCATABLE=y
CONFIG_RFS_ACCEL=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
CONFIG_RPS=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_BCM63XX=y
CONFIG_SERIAL_BCM63XX_CONSOLE=y
CONFIG_SGL_ALLOC=y
CONFIG_SMP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSE_IRQ=y
CONFIG_SRCU=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UNMAP_KERNEL_AT_EL0=y
CONFIG_USB_SUPPORT=y
CONFIG_VMAP_STACK=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZONE_DMA32=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

View file

@ -0,0 +1,31 @@
From 68064196cffea33f090bd2e8d81cd5e20107ecf1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 3 Nov 2022 11:53:16 +0100
Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add TWD block timer
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 TWD contains block with 4 timers. Add binding for it.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20221103105316.21294-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 5 +++++
1 file changed, 5 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -283,6 +283,11 @@
#address-cells = <1>;
#size-cells = <1>;
+ timer@0 {
+ compatible = "brcm,bcm63138-timer";
+ reg = <0x0 0x28>;
+ };
+
watchdog@28 {
compatible = "brcm,bcm6345-wdt";
reg = <0x28 0x8>;

View file

@ -0,0 +1,46 @@
From 4f9fb09175e87a233787a2dee1e5dabb14deb022 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 3 Nov 2022 12:00:15 +0100
Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm6858: add TWD block
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM6858 contains TWD block with timers, watchdog, and reset subblocks.
Describe it.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20221103110015.21761-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -109,6 +109,25 @@
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x62000>;
+ twd: timer-mfd@400 {
+ compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
+ reg = <0x400 0x4c>;
+ ranges = <0x0 0x400 0x4c>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ timer@0 {
+ compatible = "brcm,bcm63138-timer";
+ reg = <0x0 0x28>;
+ };
+
+ watchdog@28 {
+ compatible = "brcm,bcm6345-wdt";
+ reg = <0x28 0x8>;
+ };
+ };
+
uart0: serial@640 {
compatible = "brcm,bcm6345-uart";
reg = <0x640 0x18>;

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@ -0,0 +1,134 @@
From e567e58d6819adc002c57b81e16b88da24d3b4aa Mon Sep 17 00:00:00 2001
From: Pierre Gondois <pierre.gondois@arm.com>
Date: Tue, 22 Nov 2022 17:32:07 +0100
Subject: [PATCH] arm64: dts: Update cache properties for broadcom
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).
Update the Device Trees accordingly.
Acked-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Link: https://lore.kernel.org/r/20221122163208.3810985-3-pierre.gondois@arm.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 1 +
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 1 +
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 4 ++++
9 files changed, 12 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -63,6 +63,7 @@
l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
@@ -51,6 +51,7 @@
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
@@ -35,6 +35,7 @@
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
@@ -51,6 +51,7 @@
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
@@ -51,6 +51,7 @@
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
@@ -35,6 +35,7 @@
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -50,6 +50,7 @@
};
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
--- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
@@ -79,6 +79,7 @@
CLUSTER0_L2: l2-cache@0 {
compatible = "cache";
+ cache-level = <2>;
};
};
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
@@ -108,18 +108,22 @@
CLUSTER0_L2: l2-cache@0 {
compatible = "cache";
+ cache-level = <2>;
};
CLUSTER1_L2: l2-cache@100 {
compatible = "cache";
+ cache-level = <2>;
};
CLUSTER2_L2: l2-cache@200 {
compatible = "cache";
+ cache-level = <2>;
};
CLUSTER3_L2: l2-cache@300 {
compatible = "cache";
+ cache-level = <2>;
};
};

View file

@ -0,0 +1,367 @@
From f5d83b714e304d5f3229da434af2eeea033c4f5d Mon Sep 17 00:00:00 2001
From: William Zhang <william.zhang@broadcom.com>
Date: Mon, 6 Feb 2023 22:58:15 -0800
Subject: [PATCH] arm64: dts: broadcom: bcmbca: Add spi controller node
Add support for HSSPI controller in ARMv8 chip dts files.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-5-william.zhang@broadcom.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../boot/dts/broadcom/bcmbca/bcm4908.dtsi | 18 +++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm4912.dtsi | 20 +++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm63146.dtsi | 19 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm63158.dtsi | 19 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm6813.dtsi | 20 +++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm6856.dtsi | 18 +++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 18 +++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm94908.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm94912.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm963146.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm963158.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm96813.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm96856.dts | 4 ++++
.../boot/dts/broadcom/bcmbca/bcm96858.dts | 4 ++++
14 files changed, 160 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -107,6 +107,12 @@
clock-frequency = <50000000>;
clock-output-names = "periph";
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <400000000>;
+ };
};
soc {
@@ -531,6 +537,18 @@
#size-cells = <0>;
};
+ hsspi: spi@1000{
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0";
+ reg = <0x1000 0x600>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
+
nand-controller@1800 {
#address-cells = <1>;
#size-cells = <0>;
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
@@ -79,6 +79,7 @@
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
uart_clk: uart-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
@@ -86,6 +87,12 @@
clock-div = <4>;
clock-mult = <1>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
};
psci {
@@ -117,6 +124,19 @@
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
+ hsspi: spi@1000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm4912-hsspi", "brcm,bcmbca-hsspi-v1.1";
+ reg = <0x1000 0x600>, <0x2610 0x4>;
+ reg-names = "hsspi", "spim-ctrl";
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
@@ -60,6 +60,7 @@
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
uart_clk: uart-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
@@ -67,6 +68,12 @@
clock-div = <4>;
clock-mult = <1>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
};
psci {
@@ -99,6 +106,18 @@
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
+ hsspi: spi@1000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm63146-hsspi", "brcm,bcmbca-hsspi-v1.0";
+ reg = <0x1000 0x600>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
@@ -79,6 +79,7 @@
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
uart_clk: uart-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
@@ -86,6 +87,12 @@
clock-div = <4>;
clock-mult = <1>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <400000000>;
+ };
};
psci {
@@ -117,6 +124,18 @@
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
+ hsspi: spi@1000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm63158-hsspi", "brcm,bcmbca-hsspi-v1.0";
+ reg = <0x1000 0x600>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
@@ -79,6 +79,7 @@
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
uart_clk: uart-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
@@ -86,6 +87,12 @@
clock-div = <4>;
clock-mult = <1>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
};
psci {
@@ -117,6 +124,19 @@
#size-cells = <1>;
ranges = <0x0 0x0 0xff800000 0x800000>;
+ hsspi: spi@1000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6813-hsspi", "brcm,bcmbca-hsspi-v1.1";
+ reg = <0x1000 0x600>, <0x2610 0x4>;
+ reg-names = "hsspi", "spim-ctrl";
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
+
uart0: serial@12000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x12000 0x1000>;
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
@@ -60,6 +60,12 @@
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <400000000>;
+ };
};
psci {
@@ -100,5 +106,17 @@
clock-names = "refclk";
status = "disabled";
};
+
+ hsspi: spi@1000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6856-hsspi", "brcm,bcmbca-hsspi-v1.0";
+ reg = <0x1000 0x600>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
};
};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -78,6 +78,12 @@
#clock-cells = <0>;
clock-frequency = <200000000>;
};
+
+ hsspi_pll: hsspi-pll {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <400000000>;
+ };
};
psci {
@@ -137,5 +143,17 @@
clock-names = "refclk";
status = "disabled";
};
+
+ hsspi: spi@1000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6858-hsspi", "brcm,bcmbca-hsspi-v1.0";
+ reg = <0x1000 0x600>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&hsspi_pll &hsspi_pll>;
+ clock-names = "hsspi", "pll";
+ num-cs = <8>;
+ status = "disabled";
+ };
};
};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dts
@@ -28,3 +28,7 @@
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
@@ -28,3 +28,7 @@
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963146.dts
@@ -28,3 +28,7 @@
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
@@ -28,3 +28,7 @@
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96813.dts
@@ -28,3 +28,7 @@
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96856.dts
@@ -28,3 +28,7 @@
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
@@ -28,3 +28,7 @@
&uart0 {
status = "okay";
};
+
+&hsspi {
+ status = "okay";
+};

View file

@ -0,0 +1,81 @@
From 477cad715de1dfc256a20da3ed83b62f3cb2944d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 28 Feb 2023 15:45:18 +0100
Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add on-SoC USB ports
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 has 3 USB controllers each with 2 USB ports. Home routers often
have LEDs indicating state of selected USB ports. Describe those SoC USB
ports to allow using them as LED trigger sources.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/all/20230228144520.21816-1-zajec5@gmail.com/
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../boot/dts/broadcom/bcmbca/bcm4908.dtsi | 39 +++++++++++++++++++
1 file changed, 39 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -148,6 +148,19 @@
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb_phy PHY_TYPE_USB2>;
status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ehci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
+
+ ehci_port2: port@2 {
+ reg = <2>;
+ #trigger-source-cells = <0>;
+ };
};
ohci: usb@c400 {
@@ -156,6 +169,19 @@
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb_phy PHY_TYPE_USB2>;
status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ohci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
+
+ ohci_port2: port@2 {
+ reg = <2>;
+ #trigger-source-cells = <0>;
+ };
};
xhci: usb@d000 {
@@ -164,6 +190,19 @@
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb_phy PHY_TYPE_USB3>;
status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ xhci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
+
+ xhci_port2: port@2 {
+ reg = <2>;
+ #trigger-source-cells = <0>;
+ };
};
bus@80000 {

View file

@ -0,0 +1,38 @@
From 889e53ccccc29ff4bf8d4c89cca34e8768845747 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 28 Feb 2023 15:45:19 +0100
Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add Netgear R8000P USB
LED triggers
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This device has 2 USB LEDs meant to be triggered by devices in relevant
USB ports.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/all/20230228144520.21816-2-zajec5@gmail.com/
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts | 4 ++++
1 file changed, 4 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts
@@ -58,12 +58,16 @@
function = "usb2";
color = <LED_COLOR_ID_WHITE>;
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&ohci_port1>, <&ehci_port1>;
+ linux,default-trigger = "usbport";
};
led-usb3 {
function = "usb3";
color = <LED_COLOR_ID_WHITE>;
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&ohci_port2>, <&ehci_port2>, <&xhci_port2>;
+ linux,default-trigger = "usbport";
};
led-wifi {

View file

@ -0,0 +1,41 @@
From e6d356b146b75f1f77621aab7950a1eb550859f9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 28 Feb 2023 15:45:20 +0100
Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add TP-Link C2300 USB
LED triggers
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This device has 2 USB LEDs meant to be triggered by devices in relevant
USB ports.
While at it fix typo in USB LED name.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/all/20230228144520.21816-3-zajec5@gmail.com/
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts
@@ -64,12 +64,16 @@
function = "usb2";
color = <LED_COLOR_ID_BLUE>;
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&ohci_port1>, <&ehci_port1>;
+ linux,default-trigger = "usbport";
};
led-usb3 {
- function = "usbd3";
+ function = "usb3";
color = <LED_COLOR_ID_BLUE>;
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&ohci_port2>, <&ehci_port2>, <&xhci_port2>;
+ linux,default-trigger = "usbport";
};
led-brightness {

View file

@ -0,0 +1,36 @@
From 085679b15b5af65f9610f619afde41da0f966194 Mon Sep 17 00:00:00 2001
From: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Date: Wed, 16 Nov 2022 13:49:32 +0100
Subject: [PATCH] mtd: parsers: refer to ARCH_BCMBCA instead of ARCH_BCM4908
Commit dd5c672d7ca9 ("arm64: bcmbca: Merge ARCH_BCM4908 to ARCH_BCMBCA")
removes config ARCH_BCM4908 as config ARCH_BCMBCA has the same intent.
Probably due to concurrent development, commit 002181f5b150 ("mtd: parsers:
add Broadcom's U-Boot parser") introduces 'Broadcom's U-Boot partition
parser' that depends on ARCH_BCM4908, but this use was not visible during
the config refactoring from the commit above. Hence, these two changes
create a reference to a non-existing config symbol.
Adjust the MTD_BRCM_U_BOOT definition to refer to ARCH_BCMBCA instead of
ARCH_BCM4908 to remove the reference to the non-existing config symbol
ARCH_BCM4908.
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20221116124932.4748-1-lukas.bulwahn@gmail.com
---
drivers/mtd/parsers/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/mtd/parsers/Kconfig
+++ b/drivers/mtd/parsers/Kconfig
@@ -22,7 +22,7 @@ config MTD_BCM63XX_PARTS
config MTD_BRCM_U_BOOT
tristate "Broadcom's U-Boot partition parser"
- depends on ARCH_BCM4908 || COMPILE_TEST
+ depends on ARCH_BCMBCA || COMPILE_TEST
help
Broadcom uses a custom way of storing U-Boot environment variables.
They are placed inside U-Boot partition itself at unspecified offset.

View file

@ -0,0 +1,152 @@
From 3a1cc23a75abcd9cea585eb84846507363d58397 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 25 Oct 2022 15:22:45 +0200
Subject: [PATCH] net: broadcom: bcm4908_enet: use build_skb()
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
RX code can be more efficient with the build_skb(). Allocating actual
SKB around eth packet buffer - right before passing it up - results in
a better cache usage.
Without RPS (echo 0 > rps_cpus) BCM4908 NAT masq performance "jumps"
between two speeds: ~900 Mbps and 940 Mbps (it's a 4 CPUs SoC). This
change bumps the lower speed from 905 Mb/s to 918 Mb/s (tested using
single stream iperf 2.0.5 traffic).
There are more optimizations to consider. One obvious to try is GRO
however as BCM4908 doesn't do hw csum is may actually lower performance.
Sometimes. Some early testing:
┌─────────────────────────────────┬─────────────────────┬────────────────────┐
│ │ netif_receive_skb() │ napi_gro_receive() │
├─────────────────────────────────┼─────────────────────┼────────────────────┤
│ netdev_alloc_skb() │ 905 Mb/s │ 892 Mb/s │
│ napi_alloc_frag() + build_skb() │ 918 Mb/s │ 917 Mb/s │
└─────────────────────────────────┴─────────────────────┴────────────────────┘
Another ideas:
1. napi_build_skb()
2. skb_copy_from_linear_data() for small packets
Those need proper testing first though. That can be done later.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20221025132245.22871-1-zajec5@gmail.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 53 +++++++++++++-------
1 file changed, 36 insertions(+), 17 deletions(-)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -36,13 +36,24 @@
#define ENET_MAX_ETH_OVERHEAD (ETH_HLEN + BRCM_MAX_TAG_LEN + VLAN_HLEN + \
ETH_FCS_LEN + 4) /* 32 */
+#define ENET_RX_SKB_BUF_SIZE (NET_SKB_PAD + NET_IP_ALIGN + \
+ ETH_HLEN + BRCM_MAX_TAG_LEN + VLAN_HLEN + \
+ ENET_MTU_MAX + ETH_FCS_LEN + 4)
+#define ENET_RX_SKB_BUF_ALLOC_SIZE (SKB_DATA_ALIGN(ENET_RX_SKB_BUF_SIZE) + \
+ SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
+#define ENET_RX_BUF_DMA_OFFSET (NET_SKB_PAD + NET_IP_ALIGN)
+#define ENET_RX_BUF_DMA_SIZE (ENET_RX_SKB_BUF_SIZE - ENET_RX_BUF_DMA_OFFSET)
+
struct bcm4908_enet_dma_ring_bd {
__le32 ctl;
__le32 addr;
} __packed;
struct bcm4908_enet_dma_ring_slot {
- struct sk_buff *skb;
+ union {
+ void *buf; /* RX */
+ struct sk_buff *skb; /* TX */
+ };
unsigned int len;
dma_addr_t dma_addr;
};
@@ -260,22 +271,21 @@ static int bcm4908_enet_dma_alloc_rx_buf
u32 tmp;
int err;
- slot->len = ENET_MTU_MAX + ENET_MAX_ETH_OVERHEAD;
-
- slot->skb = netdev_alloc_skb(enet->netdev, slot->len);
- if (!slot->skb)
+ slot->buf = napi_alloc_frag(ENET_RX_SKB_BUF_ALLOC_SIZE);
+ if (!slot->buf)
return -ENOMEM;
- slot->dma_addr = dma_map_single(dev, slot->skb->data, slot->len, DMA_FROM_DEVICE);
+ slot->dma_addr = dma_map_single(dev, slot->buf + ENET_RX_BUF_DMA_OFFSET,
+ ENET_RX_BUF_DMA_SIZE, DMA_FROM_DEVICE);
err = dma_mapping_error(dev, slot->dma_addr);
if (err) {
dev_err(dev, "Failed to map DMA buffer: %d\n", err);
- kfree_skb(slot->skb);
- slot->skb = NULL;
+ skb_free_frag(slot->buf);
+ slot->buf = NULL;
return err;
}
- tmp = slot->len << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT;
+ tmp = ENET_RX_BUF_DMA_SIZE << DMA_CTL_LEN_DESC_BUFLENGTH_SHIFT;
tmp |= DMA_CTL_STATUS_OWN;
if (idx == enet->rx_ring.length - 1)
tmp |= DMA_CTL_STATUS_WRAP;
@@ -315,11 +325,11 @@ static void bcm4908_enet_dma_uninit(stru
for (i = rx_ring->length - 1; i >= 0; i--) {
slot = &rx_ring->slots[i];
- if (!slot->skb)
+ if (!slot->buf)
continue;
dma_unmap_single(dev, slot->dma_addr, slot->len, DMA_FROM_DEVICE);
- kfree_skb(slot->skb);
- slot->skb = NULL;
+ skb_free_frag(slot->buf);
+ slot->buf = NULL;
}
}
@@ -575,6 +585,7 @@ static int bcm4908_enet_poll_rx(struct n
while (handled < weight) {
struct bcm4908_enet_dma_ring_bd *buf_desc;
struct bcm4908_enet_dma_ring_slot slot;
+ struct sk_buff *skb;
u32 ctl;
int len;
int err;
@@ -598,16 +609,24 @@ static int bcm4908_enet_poll_rx(struct n
if (len < ETH_ZLEN ||
(ctl & (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) != (DMA_CTL_STATUS_SOP | DMA_CTL_STATUS_EOP)) {
- kfree_skb(slot.skb);
+ skb_free_frag(slot.buf);
enet->netdev->stats.rx_dropped++;
break;
}
- dma_unmap_single(dev, slot.dma_addr, slot.len, DMA_FROM_DEVICE);
+ dma_unmap_single(dev, slot.dma_addr, ENET_RX_BUF_DMA_SIZE, DMA_FROM_DEVICE);
+
+ skb = build_skb(slot.buf, ENET_RX_SKB_BUF_ALLOC_SIZE);
+ if (unlikely(!skb)) {
+ skb_free_frag(slot.buf);
+ enet->netdev->stats.rx_dropped++;
+ break;
+ }
+ skb_reserve(skb, ENET_RX_BUF_DMA_OFFSET);
+ skb_put(skb, len - ETH_FCS_LEN);
+ skb->protocol = eth_type_trans(skb, enet->netdev);
- skb_put(slot.skb, len - ETH_FCS_LEN);
- slot.skb->protocol = eth_type_trans(slot.skb, enet->netdev);
- netif_receive_skb(slot.skb);
+ netif_receive_skb(skb);
enet->netdev->stats.rx_packets++;
enet->netdev->stats.rx_bytes += len;

View file

@ -0,0 +1,45 @@
From 471ef777ec79baadc5cd9773d08f95f49cf5e2b1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 31 Oct 2022 11:48:56 +0100
Subject: [PATCH] net: broadcom: bcm4908_enet: report queued and transmitted
bytes
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This allows BQL to operate avoiding buffer bloat and reducing latency.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20221031104856.32388-1-zajec5@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/broadcom/bcm4908_enet.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/net/ethernet/broadcom/bcm4908_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm4908_enet.c
@@ -505,6 +505,7 @@ static int bcm4908_enet_stop(struct net_
netif_carrier_off(netdev);
napi_disable(&rx_ring->napi);
napi_disable(&tx_ring->napi);
+ netdev_reset_queue(netdev);
bcm4908_enet_dma_rx_ring_disable(enet, &enet->rx_ring);
bcm4908_enet_dma_tx_ring_disable(enet, &enet->tx_ring);
@@ -564,6 +565,8 @@ static netdev_tx_t bcm4908_enet_start_xm
if (ring->write_idx + 1 == ring->length - 1)
tmp |= DMA_CTL_STATUS_WRAP;
+ netdev_sent_queue(enet->netdev, skb->len);
+
buf_desc->addr = cpu_to_le32((uint32_t)slot->dma_addr);
buf_desc->ctl = cpu_to_le32(tmp);
@@ -671,6 +674,7 @@ static int bcm4908_enet_poll_tx(struct n
tx_ring->read_idx = 0;
}
+ netdev_completed_queue(enet->netdev, handled, bytes);
enet->netdev->stats.tx_packets += handled;
enet->netdev->stats.tx_bytes += bytes;

View file

@ -0,0 +1,32 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 14 Jul 2023 08:28:41 +0200
Subject: [PATCH] leds: bcm63138: rename dependency symbol ARCH_BCM4908 to
ARCH_BCMBCA
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Symbol ARCH_BCM4908 has been merged/removed without updating leds
Kconfig.
Fixes: dd5c672d7ca9 ("arm64: bcmbca: Merge ARCH_BCM4908 to ARCH_BCMBCA")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/leds/blink/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/leds/blink/Kconfig
+++ b/drivers/leds/blink/Kconfig
@@ -1,10 +1,10 @@
config LEDS_BCM63138
tristate "LED Support for Broadcom BCM63138 SoC"
depends on LEDS_CLASS
- depends on ARCH_BCM4908 || ARCH_BCM_5301X || BCM63XX || COMPILE_TEST
+ depends on ARCH_BCMBCA || ARCH_BCM_5301X || BCM63XX || COMPILE_TEST
depends on HAS_IOMEM
depends on OF
- default ARCH_BCM4908
+ default ARCH_BCMBCA
help
This option enables support for LED controller that is part of
BCM63138 SoC. The same hardware block is known to be also used

View file

@ -0,0 +1,23 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 Feb 2021 22:01:03 +0100
Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: limit amount of GPIOs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Linux driver can't handle more than 64 GPIOs
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -343,7 +343,7 @@
gpio0: gpio-controller@500 {
compatible = "brcm,bcm6345-gpio";
reg-names = "dirout", "dat";
- reg = <0x500 0x28>, <0x528 0x28>;
+ reg = <0x500 0x8>, <0x528 0x8>;
#gpio-cells = <2>;
gpio-controller;

View file

@ -0,0 +1,30 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 12 Aug 2021 11:52:42 +0200
Subject: [PATCH] arm64: don't issue HVC on boot
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Broadcom's CFE loader seems to miss setting SCR_EL3.HCE which results in
generating an UNDEF and kernel panic on the first HVC.
HVC gets issued by kernels 5.12+ while booting, by kexec and KVM. Until
someone finds a workaround we have to avoid all above.
Workarounds: 0c93df9622d4 ("arm64: Initialise as nVHE before switching to VHE")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
arch/arm64/kernel/hyp-stub.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/kernel/hyp-stub.S
+++ b/arch/arm64/kernel/hyp-stub.S
@@ -301,7 +301,7 @@ SYM_FUNC_START(finalise_el2)
b.ne 1f
mov x0, #HVC_FINALISE_EL2
- hvc #0
+// hvc #0
1:
ret
SYM_FUNC_END(finalise_el2)

View file

@ -0,0 +1,34 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 21 Jan 2021 10:44:53 +0100
Subject: [PATCH] mtd: rawnand: brcmnand: disable WP on BCM4908
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 contains NAND controller version 0x0701 (v7.1). It means that
NAND_WP should be available.
For some reason setting #WP on doesn't result in clearing NAND_STATUS_WP
status bit:
[ 1.077857] bcm63138_nand ff801800.nand: timeout on status poll (expected c0000040 got c00000c0)
[ 1.086832] bcm63138_nand ff801800.nand: nand #WP expected on
For now try working without touching #WP.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -39,7 +39,11 @@
* 1: NAND_WP is set by default, cleared for erase/write operations
* 2: NAND_WP is always cleared
*/
+#if IS_ENABLED(CONFIG_ARCH_BCMBCA)
+static int wp_on = 0;
+#else
static int wp_on = 1;
+#endif
module_param(wp_on, int, 0444);
/***********************************************************************

View file

@ -0,0 +1,46 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 Feb 2021 23:59:26 +0100
Subject: [PATCH] net: dsa: bcm_sf2: enable GPHY for switch probing
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
GPHY needs to be enabled to succesfully probe & setup switch port
connected to it. Otherwise hardcoding PHY OUI would be required.
Before:
brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch wan (uninitialized): error -5 setting up PHY for tree 0, switch 0, port 7
After:
brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch wan (uninitialized): PHY [800c05c0.mdio--1:0c] driver [Generic PHY] (irq=POLL)
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/net/dsa/bcm_sf2.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -1512,10 +1512,14 @@ static int bcm_sf2_sw_probe(struct platf
rev = reg_readl(priv, REG_PHY_REVISION);
priv->hw_params.gphy_rev = rev & PHY_REVISION_MASK;
+ bcm_sf2_gphy_enable_set(priv->dev->ds, true);
+
ret = b53_switch_register(dev);
if (ret)
goto out_mdio;
+ bcm_sf2_gphy_enable_set(priv->dev->ds, false);
+
dev_info(&pdev->dev,
"Starfighter 2 top: %x.%02x, core: %x.%02x, IRQs: %d, %d\n",
priv->hw_params.top_rev >> 8, priv->hw_params.top_rev & 0xff,

View file

@ -0,0 +1,30 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 16 Feb 2021 00:06:35 +0100
Subject: [PATCH] net: dsa: bcm_sf2: keep GPHY enabled on the BCM4908
Trying to access disabled PHY results in MDIO_READ_FAIL and:
[ 11.962886] brcm-sf2 80080000.switch wan: configuring for phy/internal link mode
[ 11.972500] 8021q: adding VLAN 0 to HW filter on device wan
[ 11.980205] ------------[ cut here ]------------
[ 11.984885] WARNING: CPU: 0 PID: 7 at phy_error+0x10/0x58
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/net/dsa/bcm_sf2.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -1526,6 +1526,12 @@ static int bcm_sf2_sw_probe(struct platf
priv->hw_params.core_rev >> 8, priv->hw_params.core_rev & 0xff,
priv->irq0, priv->irq1);
+ /* BCM4908 has 5 GPHYs which means bcm_sf2_port_setup() will not enable
+ * GPHY when needed. Leave it enabled here.
+ */
+ if (priv->type == BCM4908_DEVICE_ID)
+ bcm_sf2_gphy_enable_set(priv->dev->ds, true);
+
return 0;
out_mdio:

View file

@ -0,0 +1,37 @@
From 4b8e16de053fc88eac406ad63da2693dd8279043 Mon Sep 17 00:00:00 2001
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Date: Wed, 5 Jul 2023 17:01:07 +0200
Subject: [PATCH] ARM: dts: broadcom: add missing space before {
Add missing whitespace between node name/label and opening {.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230705150108.293999-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm47094-linksys-panamera.dts | 2 +-
arch/arm/boot/dts/broadcom/bcm47094-phicomm-k3.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -279,7 +279,7 @@
reg = <0x080000 0x0100000>;
};
- partition@180000{
+ partition@180000 {
label = "devinfo";
reg = <0x0180000 0x080000>;
};
--- a/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
+++ b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
@@ -55,7 +55,7 @@
reg = <0x0080000 0x0100000>;
};
- partition@180000{
+ partition@180000 {
label = "phicomm";
reg = <0x0180000 0x0280000>;
read-only;

View file

@ -0,0 +1,107 @@
From 8960f095de3b80beb3639075f0c8161b6ea98c61 Mon Sep 17 00:00:00 2001
From: Dan Haab <dan.haab@luxul.com>
Date: Wed, 5 Jul 2023 09:32:51 -0600
Subject: [PATCH] ARM: dts: BCM5301X: Add Wi-Fi regulatory mappings for Luxul
devices
This allows setting FullMAC firmware regulatory domain.
Signed-off-by: Dan Haab <dan.haab@luxul.com>
Link: https://lore.kernel.org/r/20230705153251.739236-1-riproute@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
.../dts/broadcom/bcm47094-luxul-xap-1610.dts | 37 +++++++++++++++++++
.../broadcom/bcm47094-luxul-xwr-3150-v1.dts | 36 ++++++++++++++++++
2 files changed, 73 insertions(+)
--- a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
@@ -64,6 +64,43 @@
nvmem-cell-names = "mac-address";
};
+
+&pcie0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bridge@0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825";
+ };
+ };
+};
+
+&pcie1 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bridge@0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825";
+ };
+ };
+};
+
&spi_nor {
status = "okay";
};
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
@@ -81,6 +81,42 @@
nvmem-cell-names = "mac-address";
};
+&pcie0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bridge@0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "AU-AU-953", "CA-CA-946", "GB-E0-846", "NZ-AU-953", "US-Q2-930";
+ };
+ };
+};
+
+&pcie1 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bridge@0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "AU-AU-953", "CA-CA-946", "GB-E0-846", "NZ-AU-953", "US-Q2-930";
+ };
+ };
+};
+
&usb3 {
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};

View file

@ -0,0 +1,53 @@
From 2ce61fa62183cf994666fcc911da34075c7183b5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 11:15:19 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Add Ethernet interfaces links
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Northstar SoCs have 3 usable Ethernet interfaces each connected to one
of switch ports. They all use fixed links.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707091519.21673-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm-ns.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
--- a/arch/arm/boot/dts/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -272,14 +272,32 @@
gmac0: ethernet@24000 {
reg = <0x24000 0x800>;
+ phy-mode = "internal";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
gmac1: ethernet@25000 {
reg = <0x25000 0x800>;
+ phy-mode = "internal";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
gmac2: ethernet@26000 {
reg = <0x26000 0x800>;
+ phy-mode = "internal";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
gmac3: ethernet@27000 {

View file

@ -0,0 +1,57 @@
From be7e1e5b0f67c58ec4be0a54db23b6a4fa6e2116 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:01 +0200
Subject: [PATCH] ARM: dts: BCM53573: Drop nonexistent "default-off" LED
trigger
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
There is no such trigger documented or implemented in Linux. It was a
copy & paste mistake.
This fixes:
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: leds: led-wlan:linux,default-trigger: 'oneOf' conditional failed, one must be fixed:
'default-off' is not one of ['backlight', 'default-on', 'heartbeat', 'disk-activity', 'disk-read', 'disk-write', 'timer', 'pattern', 'audio-micmute', 'audio-mute', 'bluetooth-power', 'flash', 'kbd-capslock', 'mtd', 'nand-disk', 'none', 'torch', 'usb-gadget', 'usb-host', 'usbport']
'default-off' does not match '^cpu[0-9]*$'
'default-off' does not match '^hci[0-9]+-power$'
'default-off' does not match '^mmc[0-9]+$'
'default-off' does not match '^phy[0-9]+tx$'
From schema: Documentation/devicetree/bindings/leds/leds-gpio.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts | 1 -
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-810.dts | 2 --
2 files changed, 3 deletions(-)
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
@@ -26,7 +26,6 @@
led-wlan {
label = "bcm53xx:blue:wlan";
gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "default-off";
};
led-system {
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
@@ -26,7 +26,6 @@
led-5ghz {
label = "bcm53xx:blue:5ghz";
gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-off";
};
led-system {
@@ -42,7 +41,6 @@
led-2ghz {
label = "bcm53xx:blue:2ghz";
gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-off";
};
};

View file

@ -0,0 +1,32 @@
From 05d2c3d552b8c92fc397377d9d1112fc58e2cd59 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:02 +0200
Subject: [PATCH] ARM: dts: BCM53573: Drop nonexistent #usb-cells
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Such property simply doesn't exist (is not documented or used anywhere).
This fixes:
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: usb@d000: Unevaluated properties are not allowed ('#usb-cells' was unexpected)
From schema: Documentation/devicetree/bindings/usb/generic-ohci.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm53573.dtsi | 2 --
1 file changed, 2 deletions(-)
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -156,8 +156,6 @@
};
ohci: usb@d000 {
- #usb-cells = <0>;
-
compatible = "generic-ohci";
reg = <0xd000 0x1000>;
interrupt-parent = <&gic>;

View file

@ -0,0 +1,37 @@
From 3392ef368d9b04622fe758b1079b512664b6110a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:03 +0200
Subject: [PATCH] ARM: dts: BCM53573: Add cells sizes to PCIe node
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This fixes:
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: pcie@2000: '#address-cells' is a required property
From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: pcie@2000: '#size-cells' is a required property
From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
Two properties that need to be added later are "device_type" and
"ranges". Adding "device_type" on its own causes a new warning and the
value of "ranges" needs to be determined yet.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-3-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm53573.dtsi | 3 +++
1 file changed, 3 insertions(+)
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -127,6 +127,9 @@
pcie0: pcie@2000 {
reg = <0x00002000 0x1000>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
};
usb2: usb2@4000 {

View file

@ -0,0 +1,44 @@
From 2c0fd6b3d0778ceab40205315ccef74568490f17 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:04 +0200
Subject: [PATCH] ARM: dts: BCM53573: Use updated "spi-gpio" binding properties
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Switch away from deprecated properties.
This fixes:
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: gpio-sck: False schema does not allow [[3, 21, 0]]
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: gpio-miso: False schema does not allow [[3, 22, 0]]
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: gpio-mosi: False schema does not allow [[3, 23, 0]]
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: 'sck-gpios' is a required property
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: Unevaluated properties are not allowed ('gpio-miso', 'gpio-mosi', 'gpio-sck' were unexpected)
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-4-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/arch/arm/boot/dts/bcm947189acdbmr.dts
+++ b/arch/arm/boot/dts/bcm947189acdbmr.dts
@@ -60,9 +60,9 @@
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
- gpio-sck = <&chipcommon 21 0>;
- gpio-miso = <&chipcommon 22 0>;
- gpio-mosi = <&chipcommon 23 0>;
+ sck-gpios = <&chipcommon 21 0>;
+ miso-gpios = <&chipcommon 22 0>;
+ mosi-gpios = <&chipcommon 23 0>;
cs-gpios = <&chipcommon 24 0>;
#address-cells = <1>;
#size-cells = <0>;

View file

@ -1,16 +1,23 @@
From e492f69e4da879db7b3e9a2290e5b6620f1335b5 Mon Sep 17 00:00:00 2001
From: Aleksey Nasibulin <alealexpro100@ya.ru>
Date: Thu, 13 Oct 2022 08:16:51 +0000
Date: Wed, 12 Jul 2023 03:40:17 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Extend RAM to full 256MB for Linksys
EA6500 V2
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Linksys ea6500-v2 have 256MB of ram. Currently we only use 128MB.
Expand the definition to use all the available RAM.
Fixes: 03e96644d7a8 ("ARM: dts: BCM5301X: Add basic DT for Linksys EA6500 V2")
Signed-off-by: Aleksey Nasibulin <alealexpro100@ya.ru>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Cc: stable@vger.kernel.org
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230712014017.28123-1-ansuelsmth@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts | 3 ++-
arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts

View file

@ -0,0 +1,72 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 13 Jul 2023 13:05:44 +0200
Subject: [PATCH] ARM: dts: BCM53573: Fix Ethernet info for Luxul devices
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Both Luxul's XAP devices (XAP-810 and XAP-1440) are access points that
use a non-default design. They don't include switch but have a single
Ethernet port and BCM54210E PHY connected to the Ethernet controller's
MDIO bus.
Support for those devices regressed due to two changes:
1. Describing MDIO bus with switch
After commit 9fb90ae6cae7 ("ARM: dts: BCM53573: Describe on-SoC BCM53125
rev 4 switch") Linux stopped probing for MDIO devices.
2. Dropping hardcoded BCM54210E delays
In commit fea7fda7f50a ("net: phy: broadcom: Fix RGMII delays
configuration for BCM54210E") support for other PHY modes was added but
that requires a proper "phy-mode" value in DT.
Both above changes are correct (they don't need to be reverted or
anything) but they need this fix for DT data to be correct and for Linux
to work properly.
Fixes: 9fb90ae6cae7 ("ARM: dts: BCM53573: Describe on-SoC BCM53125 rev 4 switch")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
.../boot/dts/broadcom/bcm47189-luxul-xap-1440.dts | 13 +++++++++++++
.../boot/dts/broadcom/bcm47189-luxul-xap-810.dts | 13 +++++++++++++
2 files changed, 26 insertions(+)
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
@@ -45,3 +45,16 @@
};
};
};
+
+&gmac0 {
+ phy-mode = "rgmii";
+ phy-handle = <&bcm54210e>;
+
+ mdio {
+ /delete-node/ switch@1e;
+
+ bcm54210e: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
@@ -81,3 +81,16 @@
};
};
};
+
+&gmac0 {
+ phy-mode = "rgmii";
+ phy-handle = <&bcm54210e>;
+
+ mdio {
+ /delete-node/ switch@1e;
+
+ bcm54210e: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};

View file

@ -182,7 +182,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+};
--- a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
@@ -42,3 +42,40 @@
@@ -43,3 +43,40 @@
&usb3_phy {
status = "okay";
};

View file

@ -0,0 +1,37 @@
From 4b8e16de053fc88eac406ad63da2693dd8279043 Mon Sep 17 00:00:00 2001
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Date: Wed, 5 Jul 2023 17:01:07 +0200
Subject: [PATCH] ARM: dts: broadcom: add missing space before {
Add missing whitespace between node name/label and opening {.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230705150108.293999-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm47094-linksys-panamera.dts | 2 +-
arch/arm/boot/dts/broadcom/bcm47094-phicomm-k3.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
--- a/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
+++ b/arch/arm/boot/dts/bcm47094-linksys-panamera.dts
@@ -279,7 +279,7 @@
reg = <0x080000 0x0100000>;
};
- partition@180000{
+ partition@180000 {
label = "devinfo";
reg = <0x0180000 0x080000>;
};
--- a/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
+++ b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
@@ -55,7 +55,7 @@
reg = <0x0080000 0x0100000>;
};
- partition@180000{
+ partition@180000 {
label = "phicomm";
reg = <0x0180000 0x0280000>;
read-only;

View file

@ -0,0 +1,107 @@
From 8960f095de3b80beb3639075f0c8161b6ea98c61 Mon Sep 17 00:00:00 2001
From: Dan Haab <dan.haab@luxul.com>
Date: Wed, 5 Jul 2023 09:32:51 -0600
Subject: [PATCH] ARM: dts: BCM5301X: Add Wi-Fi regulatory mappings for Luxul
devices
This allows setting FullMAC firmware regulatory domain.
Signed-off-by: Dan Haab <dan.haab@luxul.com>
Link: https://lore.kernel.org/r/20230705153251.739236-1-riproute@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
.../dts/broadcom/bcm47094-luxul-xap-1610.dts | 37 +++++++++++++++++++
.../broadcom/bcm47094-luxul-xwr-3150-v1.dts | 36 ++++++++++++++++++
2 files changed, 73 insertions(+)
--- a/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
@@ -64,6 +64,43 @@
nvmem-cell-names = "mac-address";
};
+
+&pcie0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bridge@0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825";
+ };
+ };
+};
+
+&pcie1 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bridge@0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825";
+ };
+ };
+};
+
&spi_nor {
status = "okay";
};
--- a/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
@@ -81,6 +81,42 @@
nvmem-cell-names = "mac-address";
};
+&pcie0 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bridge@0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "AU-AU-953", "CA-CA-946", "GB-E0-846", "NZ-AU-953", "US-Q2-930";
+ };
+ };
+};
+
+&pcie1 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bridge@0,0 {
+ reg = <0x0000 0 0 0 0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ wifi@0,0 {
+ compatible = "brcm,bcm4366-fmac", "brcm,bcm4329-fmac";
+ reg = <0x0000 0 0 0 0>;
+ brcm,ccode-map = "AU-AU-953", "CA-CA-946", "GB-E0-846", "NZ-AU-953", "US-Q2-930";
+ };
+ };
+};
+
&usb3 {
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};

View file

@ -0,0 +1,53 @@
From 2ce61fa62183cf994666fcc911da34075c7183b5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 11:15:19 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Add Ethernet interfaces links
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Northstar SoCs have 3 usable Ethernet interfaces each connected to one
of switch ports. They all use fixed links.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707091519.21673-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm-ns.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
--- a/arch/arm/boot/dts/bcm-ns.dtsi
+++ b/arch/arm/boot/dts/bcm-ns.dtsi
@@ -272,14 +272,32 @@
gmac0: ethernet@24000 {
reg = <0x24000 0x800>;
+ phy-mode = "internal";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
gmac1: ethernet@25000 {
reg = <0x25000 0x800>;
+ phy-mode = "internal";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
gmac2: ethernet@26000 {
reg = <0x26000 0x800>;
+ phy-mode = "internal";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
gmac3: ethernet@27000 {

View file

@ -0,0 +1,57 @@
From be7e1e5b0f67c58ec4be0a54db23b6a4fa6e2116 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:01 +0200
Subject: [PATCH] ARM: dts: BCM53573: Drop nonexistent "default-off" LED
trigger
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
There is no such trigger documented or implemented in Linux. It was a
copy & paste mistake.
This fixes:
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: leds: led-wlan:linux,default-trigger: 'oneOf' conditional failed, one must be fixed:
'default-off' is not one of ['backlight', 'default-on', 'heartbeat', 'disk-activity', 'disk-read', 'disk-write', 'timer', 'pattern', 'audio-micmute', 'audio-mute', 'bluetooth-power', 'flash', 'kbd-capslock', 'mtd', 'nand-disk', 'none', 'torch', 'usb-gadget', 'usb-host', 'usbport']
'default-off' does not match '^cpu[0-9]*$'
'default-off' does not match '^hci[0-9]+-power$'
'default-off' does not match '^mmc[0-9]+$'
'default-off' does not match '^phy[0-9]+tx$'
From schema: Documentation/devicetree/bindings/leds/leds-gpio.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts | 1 -
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-810.dts | 2 --
2 files changed, 3 deletions(-)
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
@@ -26,7 +26,6 @@
led-wlan {
label = "bcm53xx:blue:wlan";
gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "default-off";
};
led-system {
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
@@ -26,7 +26,6 @@
led-5ghz {
label = "bcm53xx:blue:5ghz";
gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-off";
};
led-system {
@@ -42,7 +41,6 @@
led-2ghz {
label = "bcm53xx:blue:2ghz";
gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-off";
};
};

View file

@ -0,0 +1,32 @@
From 05d2c3d552b8c92fc397377d9d1112fc58e2cd59 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:02 +0200
Subject: [PATCH] ARM: dts: BCM53573: Drop nonexistent #usb-cells
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Such property simply doesn't exist (is not documented or used anywhere).
This fixes:
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: usb@d000: Unevaluated properties are not allowed ('#usb-cells' was unexpected)
From schema: Documentation/devicetree/bindings/usb/generic-ohci.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm53573.dtsi | 2 --
1 file changed, 2 deletions(-)
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -156,8 +156,6 @@
};
ohci: usb@d000 {
- #usb-cells = <0>;
-
compatible = "generic-ohci";
reg = <0xd000 0x1000>;
interrupt-parent = <&gic>;

View file

@ -0,0 +1,37 @@
From 3392ef368d9b04622fe758b1079b512664b6110a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:03 +0200
Subject: [PATCH] ARM: dts: BCM53573: Add cells sizes to PCIe node
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This fixes:
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: pcie@2000: '#address-cells' is a required property
From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: pcie@2000: '#size-cells' is a required property
From schema: /lib/python3.10/site-packages/dtschema/schemas/pci/pci-bus.yaml
Two properties that need to be added later are "device_type" and
"ranges". Adding "device_type" on its own causes a new warning and the
value of "ranges" needs to be determined yet.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-3-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm53573.dtsi | 3 +++
1 file changed, 3 insertions(+)
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -127,6 +127,9 @@
pcie0: pcie@2000 {
reg = <0x00002000 0x1000>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
};
usb2: usb2@4000 {

View file

@ -0,0 +1,44 @@
From 2c0fd6b3d0778ceab40205315ccef74568490f17 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:04 +0200
Subject: [PATCH] ARM: dts: BCM53573: Use updated "spi-gpio" binding properties
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Switch away from deprecated properties.
This fixes:
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: gpio-sck: False schema does not allow [[3, 21, 0]]
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: gpio-miso: False schema does not allow [[3, 22, 0]]
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: gpio-mosi: False schema does not allow [[3, 23, 0]]
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: 'sck-gpios' is a required property
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dtb: spi: Unevaluated properties are not allowed ('gpio-miso', 'gpio-mosi', 'gpio-sck' were unexpected)
From schema: Documentation/devicetree/bindings/spi/spi-gpio.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-4-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm947189acdbmr.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/arch/arm/boot/dts/bcm947189acdbmr.dts
+++ b/arch/arm/boot/dts/bcm947189acdbmr.dts
@@ -60,9 +60,9 @@
spi {
compatible = "spi-gpio";
num-chipselects = <1>;
- gpio-sck = <&chipcommon 21 0>;
- gpio-miso = <&chipcommon 22 0>;
- gpio-mosi = <&chipcommon 23 0>;
+ sck-gpios = <&chipcommon 21 0>;
+ miso-gpios = <&chipcommon 22 0>;
+ mosi-gpios = <&chipcommon 23 0>;
cs-gpios = <&chipcommon 24 0>;
#address-cells = <1>;
#size-cells = <0>;

View file

@ -0,0 +1,35 @@
From 91994e59079dcb455783d3f9ea338eea6f671af3 Mon Sep 17 00:00:00 2001
From: Aleksey Nasibulin <alealexpro100@ya.ru>
Date: Wed, 12 Jul 2023 03:40:17 +0200
Subject: [PATCH] ARM: dts: BCM5301X: Extend RAM to full 256MB for Linksys
EA6500 V2
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Linksys ea6500-v2 have 256MB of ram. Currently we only use 128MB.
Expand the definition to use all the available RAM.
Fixes: 03e96644d7a8 ("ARM: dts: BCM5301X: Add basic DT for Linksys EA6500 V2")
Signed-off-by: Aleksey Nasibulin <alealexpro100@ya.ru>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Cc: stable@vger.kernel.org
Acked-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230712014017.28123-1-ansuelsmth@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm4708-linksys-ea6500-v2.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
@@ -19,7 +19,8 @@
memory@0 {
device_type = "memory";
- reg = <0x00000000 0x08000000>;
+ reg = <0x00000000 0x08000000>,
+ <0x88000000 0x08000000>;
};
gpio-keys {

View file

@ -0,0 +1,72 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 13 Jul 2023 13:05:44 +0200
Subject: [PATCH] ARM: dts: BCM53573: Fix Ethernet info for Luxul devices
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Both Luxul's XAP devices (XAP-810 and XAP-1440) are access points that
use a non-default design. They don't include switch but have a single
Ethernet port and BCM54210E PHY connected to the Ethernet controller's
MDIO bus.
Support for those devices regressed due to two changes:
1. Describing MDIO bus with switch
After commit 9fb90ae6cae7 ("ARM: dts: BCM53573: Describe on-SoC BCM53125
rev 4 switch") Linux stopped probing for MDIO devices.
2. Dropping hardcoded BCM54210E delays
In commit fea7fda7f50a ("net: phy: broadcom: Fix RGMII delays
configuration for BCM54210E") support for other PHY modes was added but
that requires a proper "phy-mode" value in DT.
Both above changes are correct (they don't need to be reverted or
anything) but they need this fix for DT data to be correct and for Linux
to work properly.
Fixes: 9fb90ae6cae7 ("ARM: dts: BCM53573: Describe on-SoC BCM53125 rev 4 switch")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
.../boot/dts/broadcom/bcm47189-luxul-xap-1440.dts | 13 +++++++++++++
.../boot/dts/broadcom/bcm47189-luxul-xap-810.dts | 13 +++++++++++++
2 files changed, 26 insertions(+)
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
@@ -45,3 +45,16 @@
};
};
};
+
+&gmac0 {
+ phy-mode = "rgmii";
+ phy-handle = <&bcm54210e>;
+
+ mdio {
+ /delete-node/ switch@1e;
+
+ bcm54210e: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
@@ -81,3 +81,16 @@
};
};
};
+
+&gmac0 {
+ phy-mode = "rgmii";
+ phy-handle = <&bcm54210e>;
+
+ mdio {
+ /delete-node/ switch@1e;
+
+ bcm54210e: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+};

View file

@ -182,7 +182,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+};
--- a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
@@ -42,3 +42,40 @@
@@ -43,3 +43,40 @@
&usb3_phy {
status = "okay";
};

View file

@ -31,7 +31,7 @@ config MTD_SPLIT_BCM_WFI_FW
config MTD_SPLIT_CFE_BOOTFS
bool "Parser finding rootfs appended to the CFE bootfs"
depends on MTD_SPLIT_SUPPORT && ARCH_BCM4908
depends on MTD_SPLIT_SUPPORT && (ARCH_BCM4908 || ARCH_BCMBCA)
select MTD_SPLIT
help
cferom on BCM4908 (and bcm63xx) uses JFFS2 bootfs partition

View file

@ -0,0 +1,40 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 13 Jul 2023 17:30:59 +0200
Subject: [PATCH] nvmem: core: fix support for fixed cells NVMEM layout
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Returning -EPROBE_DEFER for "fixed-layout" makes nvmem_register() always
fail (that layout is supported internally with no external module). That
makes callers (e.g. mtd_nvmem_add()) fail as well and prevents booting
on devices with "fixed-layout" in DT.
Add a quick workaround for it.
Fixes: 6468a6f45148 ("nvmem: core: handle the absence of expected layouts")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -794,6 +794,19 @@ static struct nvmem_layout *nvmem_layout
return NULL;
/*
+ * We should return -EPROBE_DEFER only when layout driver is expected to
+ * become available later. Otherwise NVMEM will never probe successfully
+ * for unsupported layouts. There is no known solution for that right
+ * now.
+ *
+ * This problem also affects "fixed-layout". It's supported in NVMEM
+ * core code so there never will be layout for it. We shouldn't return
+ * -EPROBE_DEFER in such case. Add a quick workaround for that.
+ */
+ if (of_device_is_compatible(layout_np, "fixed-layout"))
+ return NULL;
+
+ /*
* In case the nvmem device was built-in while the layout was built as a
* module, we shall manually request the layout driver loading otherwise
* we'll never have any match.

View file

@ -0,0 +1,93 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 13 Jul 2023 18:29:19 +0200
Subject: [PATCH] nvmem: core: support "mac-base" fixed layout cells
Fixed layout binding allows specifying "mac-base" NVMEM cells. It's used
for base MAC address (that can be used for calculating relative
addresses). It can be stored in a raw binary format or as an ASCII
string.
---
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
menuconfig NVMEM
bool "NVMEM Support"
+ select GENERIC_NET_UTILS
help
Support for NVMEM(Non Volatile Memory) devices like EEPROM, EFUSES...
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -7,9 +7,11 @@
*/
#include <linux/device.h>
+#include <linux/etherdevice.h>
#include <linux/export.h>
#include <linux/fs.h>
#include <linux/idr.h>
+#include <linux/if_ether.h>
#include <linux/init.h>
#include <linux/kref.h>
#include <linux/module.h>
@@ -696,6 +698,37 @@ static int nvmem_validate_keepouts(struc
return 0;
}
+static int nvmem_mac_base_raw_read(void *context, const char *id, int index, unsigned int offset,
+ void *buf, size_t bytes)
+{
+ if (WARN_ON(bytes != ETH_ALEN))
+ return -EINVAL;
+
+ if (index)
+ eth_addr_add(buf, index);
+
+ return 0;
+}
+
+static int nvmem_mac_base_ascii_read(void *context, const char *id, int index, unsigned int offset,
+ void *buf, size_t bytes)
+{
+ u8 mac[ETH_ALEN];
+
+ if (WARN_ON(bytes != 3 * ETH_ALEN - 1))
+ return -EINVAL;
+
+ if (!mac_pton(buf, mac))
+ return -EINVAL;
+
+ if (index)
+ eth_addr_add(mac, index);
+
+ ether_addr_copy(buf, mac);
+
+ return 0;
+}
+
static int nvmem_add_cells_from_dt(struct nvmem_device *nvmem, struct device_node *np)
{
struct nvmem_layout *layout = nvmem->layout;
@@ -731,6 +764,20 @@ static int nvmem_add_cells_from_dt(struc
if (layout && layout->fixup_cell_info)
layout->fixup_cell_info(nvmem, layout, &info);
+ if (of_device_is_compatible(np, "fixed-layout")) {
+ if (of_device_is_compatible(child, "mac-base")) {
+ if (info.bytes == 6) {
+ info.raw_len = info.bytes;
+ info.bytes = ETH_ALEN;
+ info.read_post_process = nvmem_mac_base_raw_read;
+ } else if (info.bytes == 3 * ETH_ALEN - 1) {
+ info.raw_len = info.bytes;
+ info.bytes = ETH_ALEN;
+ info.read_post_process = nvmem_mac_base_ascii_read;
+ }
+ }
+ }
+
ret = nvmem_add_one_cell(nvmem, &info);
kfree(info.name);
if (ret) {

View file

@ -0,0 +1,40 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 13 Jul 2023 17:30:59 +0200
Subject: [PATCH] nvmem: core: fix support for fixed cells NVMEM layout
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Returning -EPROBE_DEFER for "fixed-layout" makes nvmem_register() always
fail (that layout is supported internally with no external module). That
makes callers (e.g. mtd_nvmem_add()) fail as well and prevents booting
on devices with "fixed-layout" in DT.
Add a quick workaround for it.
Fixes: 6468a6f45148 ("nvmem: core: handle the absence of expected layouts")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -794,6 +794,19 @@ static struct nvmem_layout *nvmem_layout
return NULL;
/*
+ * We should return -EPROBE_DEFER only when layout driver is expected to
+ * become available later. Otherwise NVMEM will never probe successfully
+ * for unsupported layouts. There is no known solution for that right
+ * now.
+ *
+ * This problem also affects "fixed-layout". It's supported in NVMEM
+ * core code so there never will be layout for it. We shouldn't return
+ * -EPROBE_DEFER in such case. Add a quick workaround for that.
+ */
+ if (of_device_is_compatible(layout_np, "fixed-layout"))
+ return NULL;
+
+ /*
* In case the nvmem device was built-in while the layout was built as a
* module, we shall manually request the layout driver loading otherwise
* we'll never have any match.

View file

@ -0,0 +1,93 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Thu, 13 Jul 2023 18:29:19 +0200
Subject: [PATCH] nvmem: core: support "mac-base" fixed layout cells
Fixed layout binding allows specifying "mac-base" NVMEM cells. It's used
for base MAC address (that can be used for calculating relative
addresses). It can be stored in a raw binary format or as an ASCII
string.
---
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
menuconfig NVMEM
bool "NVMEM Support"
+ select GENERIC_NET_UTILS
help
Support for NVMEM(Non Volatile Memory) devices like EEPROM, EFUSES...
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -7,9 +7,11 @@
*/
#include <linux/device.h>
+#include <linux/etherdevice.h>
#include <linux/export.h>
#include <linux/fs.h>
#include <linux/idr.h>
+#include <linux/if_ether.h>
#include <linux/init.h>
#include <linux/kref.h>
#include <linux/module.h>
@@ -696,6 +698,37 @@ static int nvmem_validate_keepouts(struc
return 0;
}
+static int nvmem_mac_base_raw_read(void *context, const char *id, int index, unsigned int offset,
+ void *buf, size_t bytes)
+{
+ if (WARN_ON(bytes != ETH_ALEN))
+ return -EINVAL;
+
+ if (index)
+ eth_addr_add(buf, index);
+
+ return 0;
+}
+
+static int nvmem_mac_base_ascii_read(void *context, const char *id, int index, unsigned int offset,
+ void *buf, size_t bytes)
+{
+ u8 mac[ETH_ALEN];
+
+ if (WARN_ON(bytes != 3 * ETH_ALEN - 1))
+ return -EINVAL;
+
+ if (!mac_pton(buf, mac))
+ return -EINVAL;
+
+ if (index)
+ eth_addr_add(mac, index);
+
+ ether_addr_copy(buf, mac);
+
+ return 0;
+}
+
static int nvmem_add_cells_from_dt(struct nvmem_device *nvmem, struct device_node *np)
{
struct nvmem_layout *layout = nvmem->layout;
@@ -731,6 +764,20 @@ static int nvmem_add_cells_from_dt(struc
if (layout && layout->fixup_cell_info)
layout->fixup_cell_info(nvmem, layout, &info);
+ if (of_device_is_compatible(np, "fixed-layout")) {
+ if (of_device_is_compatible(child, "mac-base")) {
+ if (info.bytes == 6) {
+ info.raw_len = info.bytes;
+ info.bytes = ETH_ALEN;
+ info.read_post_process = nvmem_mac_base_raw_read;
+ } else if (info.bytes == 3 * ETH_ALEN - 1) {
+ info.raw_len = info.bytes;
+ info.bytes = ETH_ALEN;
+ info.read_post_process = nvmem_mac_base_ascii_read;
+ }
+ }
+ }
+
ret = nvmem_add_one_cell(nvmem, &info);
kfree(info.name);
if (ret) {

View file

@ -17,6 +17,9 @@ ubnt,edgerouter-4)
ubnt,edgerouter-6p)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" "lan0"
;;
cisco,vedge1000)
ucidef_set_interfaces_lan_wan "mgmt0" "lan0"
;;
*)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
;;

View file

@ -3,6 +3,15 @@ do_sysinfo_octeon() {
local name
machine=$(grep "^system type" /proc/cpuinfo | sed "s/system type.*: \(.*\)/\1/g")
of_machine=$(head -n1 /sys/firmware/devicetree/base/compatible)
# Sadly for whatever reason the N821 (Cisco Viptela vEdge 1000) uses the
# same supposedly unique board ID as the EdgeRouter. This is bad, so
# we override what cpuinfo gives us using the device tree as a hint.
case "$of_machine" in
"cisco,vedge1000"*)
return 0
esac
case "$machine" in
"UBNT_E100"*)

View file

@ -65,6 +65,7 @@ CONFIG_EDAC_OCTEON_LMC=y
CONFIG_EDAC_OCTEON_PC=y
CONFIG_EDAC_OCTEON_PCI=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_AT24=y
CONFIG_EXT4_FS=y
CONFIG_F2FS_FS=y
CONFIG_FAT_FS=y
@ -158,6 +159,7 @@ CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NR_CPUS=16
CONFIG_NR_CPUS_DEFAULT_64=y
CONFIG_NVMEM=y
CONFIG_NVMEM_SYSFS=y
CONFIG_OCTEON_ETHERNET=y
CONFIG_OCTEON_ILM=y
CONFIG_OCTEON_MGMT_ETHERNET=y
@ -191,6 +193,8 @@ CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RAS=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_RELAY=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y

View file

@ -0,0 +1,293 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/include/ "octeon_3xxx.dtsi"
/ {
compatible = "cisco,vedge1000", "cavium,cn6130";
model = "Cisco/Viptela vEdge 1000";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&ciu>;
soc@0 {
smi0: mdio@1180000001800 {
mgmtphy: ethernet-phy@0 {
reg = <0x00>;
};
};
mgmt0: ethernet@1070000100000 {
compatible = "cavium,octeon-5750-mix";
reg = <0x10700 0x100000 0x00 0x100>,
<0x11800 0xe0000000 0x00 0x300>,
<0x11800 0xe0000400 0x00 0x400>,
<0x11800 0xe0002000 0x00 0x08>;
cell-index = <0x00>;
interrupts = <0x00 0x3e 0x01 0x2e>;
nvmem-cells = <&macaddr_eeprom>;
nvmem-cell-names = "mac-address";
phy-handle = <&mgmtphy>;
};
pip: pip@11800a0000000 {
interface@0 {
ethernet@0 {
nvmem-cells = <&macaddr_eeprom>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(3)>;
label = "lan2";
/delete-property/ local-mac-address;
};
ethernet@1 {
nvmem-cells = <&macaddr_eeprom>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(4)>;
label = "lan3";
/delete-property/ local-mac-address;
};
ethernet@2 {
nvmem-cells = <&macaddr_eeprom>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(1)>;
label = "lan0";
/delete-property/ local-mac-address;
};
ethernet@3 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x3>;
nvmem-cells = <&macaddr_eeprom>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(2)>;
label = "lan1";
};
};
interface@1 {
ethernet@0 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x0>;
nvmem-cells = <&macaddr_eeprom>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(7)>;
label = "lan6";
};
ethernet@1 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x1>;
nvmem-cells = <&macaddr_eeprom>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(8)>;
label = "lan7";
};
ethernet@2 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x2>;
nvmem-cells = <&macaddr_eeprom>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(5)>;
label = "lan4";
};
ethernet@3 {
compatible = "cavium,octeon-3860-pip-port";
reg = <0x3>;
nvmem-cells = <&macaddr_eeprom>;
nvmem-cell-names = "mac-address";
mac-address-increment = <(6)>;
label = "lan5";
};
};
};
twsi0: i2c@1180000001000 {
clock-frequency = <400000>;
jc42@18 {
compatible = "jedec,jc-42.4-temp";
reg = <0x18>;
};
};
twsi2: i2c@1180000001200 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "cavium,octeon-3860-twsi";
reg = <0x11800 0x1200 0x00 0x200>;
interrupts = <0x00 0x3b>;
clock-frequency = <400000>;
tmp@4c {
compatible = "maxim,max6699";
reg = <0x4c>;
};
rtc@6f {
compatible = "microchip,mcp7941x";
reg = <0x6f>;
};
tlv-eeprom@54 {
compatible = "atmel,24c512";
reg = <0x54>;
pagesize = <0x80>;
#address-cells = <1>;
#size-cells = <1>;
macaddr_eeprom: mac-address@8 {
reg = <0x8 6>;
};
};
};
uart0: serial@1180000000800 {
clock-frequency = <600000000>;
current-speed = <115200>;
};
uart1: serial@1180000000c00 {
compatible = "cavium,octeon-3860-uart", "ns16550";
reg = <0x11800 0xc00 0x00 0x400>;
reg-shift = <0x03>;
interrupts = <0x00 0x23>;
clock-frequency = <600000000>;
current-speed = <115200>;
};
mmc0: mmc@1180000002000 {
compatible = "cavium,octeon-6130-mmc";
reg = <0x11800 0x2000 0x00 0x100 0x11800 0x168 0x00 0x20>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0x01 0x13 0x00 0x3f>;
mmc-slot@0 {
compatible = "cavium,octeon-6130-mmc-slot";
reg = <0x00>;
voltage-ranges = <0xce4 0xce4>;
max-frequency = <0x3197500>;
wp-gpios = <&gpio 0x02 0x00>;
cd-gpios = <&gpio 0x03 0x01>;
cavium,bus-max-width = <0x04>;
};
};
bootbus: bootbus@1180000000000 {
compatible = "cavium,octeon-3860-bootbus";
reg = <0x11800 0x00 0x00 0x200>;
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0x00 0x1ec00000 0x1400000>,
<1 0 0x10000 0x20000000 0x00>,
<2 0 0x10000 0x30000000 0x00>,
<3 0 0x10000 0x40000000 0x00>,
<4 0 0x10000 0x50000000 0x00>,
<5 0 0x10000 0x60000000 0x00>,
<6 0 0x00 0x1e000000 0x10000>,
<7 0 0x10000 0x80000000 0x00>;
cavium,cs-config@0 {
compatible = "cavium,octeon-3860-bootbus-config";
cavium,cs-index = <0x00>;
cavium,t-adr = <0x0a>;
cavium,t-ce = <0x32>;
cavium,t-oe = <0x32>;
cavium,t-we = <0x23>;
cavium,t-rd-hld = <0x19>;
cavium,t-wr-hld = <0x23>;
cavium,t-pause = <0x00>;
cavium,t-wait = <0x12c>;
cavium,t-page = <0x19>;
cavium,t-rd-dly = <0x00>;
cavium,t-ale = <0x03>;
cavium,pages = <0x00>;
cavium,bus-width = <0x10>;
};
/delete-node/ cavium,cs-config@1;
/delete-node/ cavium,cs-config@2;
/delete-node/ cavium,cs-config@3;
/delete-node/ cavium,cs-config@4;
/delete-node/ cavium,cs-config@5;
cavium,cs-config@6 {
compatible = "cavium,octeon-3860-bootbus-config";
cavium,cs-index = <0x06>;
cavium,t-adr = <0x0a>;
cavium,t-ce = <0x0a>;
cavium,t-oe = <0xa0>;
cavium,t-we = <0x64>;
cavium,t-rd-hld = <0x00>;
cavium,t-wr-hld = <0x00>;
cavium,t-pause = <0x32>;
cavium,t-wait = <0x12c>;
cavium,t-page = <0x12c>;
cavium,t-rd-dly = <0x0a>;
cavium,t-ale = <0x3f>;
cavium,pages = <0x00>;
cavium,bus-width = <0x08>;
/delete-property/ cavium,wait-mode;
};
flash0: nor@0,0 {
compatible = "cfi-flash";
reg = <0x00 0x00 0x1000000>;
bank-width = <2>;
device-width = <1>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bootloader";
reg = <0x00 0x200000>;
read-only;
};
partition@fe0000 {
label = "environment";
reg = <0xfe0000 0x20000>;
};
};
cpld: cpld@6,0 {
compatible = "cisco,n821-cpld", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg-io-width = <1>; // Syscon uses 4-byte accesses by default
reg = <0x06 0x00 0x28>; // This is the regmap to be defined for syscon devices..
ranges = <0 0x06 0x0 0x50>; // .. and this is the addresses to map general subdevices on
};
};
uctl@118006f000000 {
compatible = "cavium,octeon-6335-uctl";
reg = <0x11800 0x6f000000 0x00 0x100>;
ranges;
#address-cells = <2>;
#size-cells = <2>;
refclk-frequency = <0xb71b00>;
refclk-type = "crystal";
ehci@16f0000000000 {
compatible = "cavium,octeon-6335-ehci", "usb-ehci";
reg = <0x16f00 0x00 0x00 0x100>;
interrupts = <0x00 0x38>;
big-endian-regs;
};
ohci@16f0000000400 {
compatible = "cavium,octeon-6335-ohci", "usb-ohci";
reg = <0x16f00 0x400 0x00 0x100>;
interrupts = <0x00 0x38>;
big-endian-regs;
};
};
};
};

View file

@ -19,13 +19,3 @@
};
};
};
&eeprom {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_eeprom_0: macaddr@0 {
reg = <0x0 0x6>;
};
};

View file

@ -62,12 +62,3 @@
};
};
&eeprom {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_eeprom_0: macaddr@0 {
reg = <0x0 0x6>;
};
};

View file

@ -33,12 +33,12 @@
led_power_blue: power_blue {
label = "blue:power";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
};
led_power_white: power_white {
label = "white:power";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
};
};
@ -99,22 +99,36 @@
reg = <0>;
spi-max-frequency = <25000000>;
partition@0 {
label = "boot0";
read-only;
reg = <0x000000 0x300000>;
};
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@300000 {
label = "dummy";
read-only;
reg = <0x300000 0x100000>;
};
partition@0 {
label = "boot0";
read-only;
reg = <0x000000 0x300000>;
};
eeprom: partition@400000 {
label = "eeprom";
read-only;
reg = <0x400000 0x10000>;
partition@300000 {
label = "dummy";
read-only;
reg = <0x300000 0x100000>;
};
partition@400000 {
compatible = "nvmem-cells";
reg = <0x400000 0x10000>;
label = "eeprom";
read-only;
#address-cells = <1>;
#size-cells = <1>;
macaddr_eeprom_0: macaddr@0 {
reg = <0x0 0x6>;
};
};
};
};
};
@ -207,12 +221,3 @@
};
};
&eeprom {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_eeprom_0: macaddr@0 {
reg = <0x0 0x6>;
};
};

View file

@ -94,4 +94,22 @@ define Device/ubnt_unifi-usg
endef
TARGET_DEVICES += ubnt_unifi-usg
define Device/cisco_vedge1000
DEVICE_VENDOR := Cisco Viptela
DEVICE_MODEL := vEdge 1000
BOARD_NAME := cisco,vedge1000
DEVICE_PACKAGES += \
kmod-hwmon-jc42 \
kmod-hwmon-max6697 \
kmod-of-mdio \
kmod-rtc-ds1307 \
kmod-usb-dwc3 \
kmod-usb-storage-uas \
kmod-usb3
KERNEL := kernel-bin | append-dtb-elf
KERNEL_DEPENDS := $$(wildcard $(DTS_DIR)/$(DEVICE_DTS).dts)
DEVICE_DTS := cn6130_cisco_vedge1000
endef
TARGET_DEVICES += cisco_vedge1000
$(eval $(call BuildImage))

View file

@ -42,9 +42,22 @@
};
factory: partition@2e00000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x2e00000 0x100000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
compatible = "mac-base";
reg = <0x4 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@4200000 {
@ -56,22 +69,11 @@
};
&gmac0 {
nvmem-cells = <&macaddr_factory_4>;
nvmem-cells = <&macaddr_factory_4 0>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
nvmem-cells = <&macaddr_factory_4>;
nvmem-cells = <&macaddr_factory_4 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};

View file

@ -72,9 +72,8 @@
label = "eth5";
phy-handle = <&ephy7>;
phy-mode = "rgmii-rxid";
nvmem-cells = <&macaddr_factory_22>;
nvmem-cells = <&macaddr_factory_22 5>;
nvmem-cell-names = "mac-address";
mac-address-increment = <5>;
};
};
};

View file

@ -20,7 +20,7 @@
};
&gmac0 {
nvmem-cells = <&macaddr_factory_22>;
nvmem-cells = <&macaddr_factory_22 0>;
nvmem-cell-names = "mac-address";
label = "dsa";
};
@ -35,33 +35,29 @@
port@1 {
status = "okay";
label = "eth1";
nvmem-cells = <&macaddr_factory_22>;
nvmem-cells = <&macaddr_factory_22 1>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
};
port@2 {
status = "okay";
label = "eth2";
nvmem-cells = <&macaddr_factory_22>;
nvmem-cells = <&macaddr_factory_22 2>;
nvmem-cell-names = "mac-address";
mac-address-increment = <2>;
};
port@3 {
status = "okay";
label = "eth3";
nvmem-cells = <&macaddr_factory_22>;
nvmem-cells = <&macaddr_factory_22 3>;
nvmem-cell-names = "mac-address";
mac-address-increment = <3>;
};
port@4 {
status = "okay";
label = "eth4";
nvmem-cells = <&macaddr_factory_22>;
nvmem-cells = <&macaddr_factory_22 4>;
nvmem-cell-names = "mac-address";
mac-address-increment = <4>;
};
};
};
@ -87,8 +83,21 @@
};
factory: partition@e0000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0xe0000 0x60000>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_22: macaddr@22 {
compatible = "mac-base";
reg = <0x22 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@140000 {
@ -146,13 +155,3 @@
&xhci {
status = "disabled";
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_22: macaddr@22 {
reg = <0x22 0x6>;
};
};

View file

@ -21,6 +21,7 @@ board=$(board_name)
board_config_update
lan_list=$(ls -1 -v -d /sys/class/net/lan* | xargs -n1 basename | xargs)
lan_list_rev=$(ls -1 -v -d -r /sys/class/net/lan* | xargs -n1 basename | xargs)
ucidef_set_bridge_device switch
ucidef_set_interface_lan "$lan_list"
@ -30,6 +31,7 @@ lan_mac_end=""
label_mac=""
case $board in
hpe,1920-8g|\
hpe,1920-8g-poe|\
hpe,1920-16g|\
hpe,1920-24g)
label_mac=$(mtd_get_mac_binary factory 0x68)
@ -65,6 +67,9 @@ done
[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
case $board in
hpe,1920-8g-poe)
ucidef_set_poe 180 "$lan_list_rev" "lan9 lan10"
;;
netgear,gs110tpp-v1)
ucidef_set_poe 130 "$lan_list" "lan9 lan10"
;;

View file

@ -0,0 +1,16 @@
. /lib/functions/uci-defaults.sh
board_config_update
board=$(board_name)
case "$board" in
hpe,1920-8g-poe)
ucidef_add_gpio_switch "fan_ctrl" "Fan control" "456" "0"
;;
esac
board_config_flush
exit 0

View file

@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "rtl8380_hpe_1920-8g.dtsi"
/ {
compatible = "hpe,1920-8g-poe", "realtek,rtl838x-soc";
model = "HPE 1920-8G-PoE+ (JG922A)";
};
&uart1 {
status = "okay";
};

View file

@ -1,115 +1,8 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "rtl838x.dtsi"
#include "rtl838x_hpe_1920.dtsi"
#include "rtl8380_hpe_1920-8g.dtsi"
/ {
compatible = "hpe,1920-8g", "realtek,rtl838x-soc";
model = "HPE 1920-8G (JG920A)";
gpio1: rtl8231-gpio {
compatible = "realtek,rtl8231-gpio";
#gpio-cells = <2>;
gpio-controller;
indirect-access-bus-id = <0>;
};
i2c0: i2c-gpio-0 {
compatible = "i2c-gpio";
sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
sfp0: sfp-0 {
compatible = "sff,sfp";
i2c-bus = <&i2c0>;
los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
// tx-fault and tx-disable unconnected
};
i2c1: i2c-gpio-1 {
compatible = "i2c-gpio";
sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
sfp1: sfp-1 {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
// tx-fault and tx-disable unconnected
};
};
&ethernet0 {
mdio: mdio-bus {
compatible = "realtek,rtl838x-mdio";
regmap = <&ethernet0>;
#address-cells = <1>;
#size-cells = <0>;
INTERNAL_PHY(8)
INTERNAL_PHY(9)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY(24)
INTERNAL_PHY(26)
};
};
&switch0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
SWITCH_PORT(8, 1, internal)
SWITCH_PORT(9, 2, internal)
SWITCH_PORT(10, 3, internal)
SWITCH_PORT(11, 4, internal)
SWITCH_PORT(12, 5, internal)
SWITCH_PORT(13, 6, internal)
SWITCH_PORT(14, 7, internal)
SWITCH_PORT(15, 8, internal)
port@24 {
reg = <24>;
label = "lan9";
phy-handle = <&phy24>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp0>;
};
port@26 {
reg = <26>;
label = "lan10";
phy-handle = <&phy26>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp1>;
};
port@28 {
ethernet = <&ethernet0>;
reg = <28>;
phy-mode = "internal";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};

View file

@ -0,0 +1,112 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "rtl838x.dtsi"
#include "rtl838x_hpe_1920.dtsi"
/ {
gpio1: rtl8231-gpio {
compatible = "realtek,rtl8231-gpio";
#gpio-cells = <2>;
gpio-controller;
indirect-access-bus-id = <0>;
};
i2c0: i2c-gpio-0 {
compatible = "i2c-gpio";
sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
sfp0: sfp-0 {
compatible = "sff,sfp";
i2c-bus = <&i2c0>;
los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
// tx-fault and tx-disable unconnected
};
i2c1: i2c-gpio-1 {
compatible = "i2c-gpio";
sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
sfp1: sfp-1 {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
// tx-fault and tx-disable unconnected
};
};
&ethernet0 {
mdio: mdio-bus {
compatible = "realtek,rtl838x-mdio";
regmap = <&ethernet0>;
#address-cells = <1>;
#size-cells = <0>;
INTERNAL_PHY(8)
INTERNAL_PHY(9)
INTERNAL_PHY(10)
INTERNAL_PHY(11)
INTERNAL_PHY(12)
INTERNAL_PHY(13)
INTERNAL_PHY(14)
INTERNAL_PHY(15)
INTERNAL_PHY(24)
INTERNAL_PHY(26)
};
};
&switch0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
SWITCH_PORT(8, 1, internal)
SWITCH_PORT(9, 2, internal)
SWITCH_PORT(10, 3, internal)
SWITCH_PORT(11, 4, internal)
SWITCH_PORT(12, 5, internal)
SWITCH_PORT(13, 6, internal)
SWITCH_PORT(14, 7, internal)
SWITCH_PORT(15, 8, internal)
port@24 {
reg = <24>;
label = "lan9";
phy-handle = <&phy24>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp0>;
};
port@26 {
reg = <26>;
label = "lan10";
phy-handle = <&phy26>;
phy-mode = "1000base-x";
managed = "in-band-status";
sfp = <&sfp1>;
};
port@28 {
ethernet = <&ethernet0>;
reg = <28>;
phy-mode = "internal";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};

View file

@ -99,6 +99,14 @@ define Device/hpe_1920-8g
endef
TARGET_DEVICES += hpe_1920-8g
define Device/hpe_1920-8g-poe
$(Device/hpe_1920)
SOC := rtl8380
DEVICE_MODEL := 1920-8G-PoE+ (JG922A)
H3C_DEVICE_ID := 0x00010025
endef
TARGET_DEVICES += hpe_1920-8g-poe
define Device/hpe_1920-16g
$(Device/hpe_1920)
SOC := rtl8382

View file

@ -145,7 +145,7 @@ $(BIN_DIR)/$(SDK_NAME).tar.xz: clean
./files/Config.in \
./files/Makefile \
./files/include/prepare.mk \
./files/README.SDK \
./files/README.md \
$(SDK_BUILD_DIR)/
mkdir -p $(SDK_BUILD_DIR)/package/kernel
$(CP) \