From 150e6d28f2659b0614e87cc7822e93f488e11ede Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Wed, 2 Aug 2023 13:18:03 +0200 Subject: [PATCH 01/27] hostapd: fix undeclared variable in common.uc Fixes: https://github.com/openwrt/openwrt/issues/13210 Signed-off-by: Felix Fietkau --- package/network/services/hostapd/files/common.uc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/network/services/hostapd/files/common.uc b/package/network/services/hostapd/files/common.uc index 2002572cf1a..9ece3b1af2e 100644 --- a/package/network/services/hostapd/files/common.uc +++ b/package/network/services/hostapd/files/common.uc @@ -34,7 +34,7 @@ function find_reusable_wdev(phyidx) if (!__phy_is_fullmac(phyidx)) return null; - data = nl80211.request( + let data = nl80211.request( nl80211.const.NL80211_CMD_GET_INTERFACE, nl80211.const.NLM_F_DUMP, { wiphy: phyidx }); From 1874a7cfb0589862614aff74d4fd49d499da641f Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Tue, 1 Aug 2023 17:56:00 -0700 Subject: [PATCH 02/27] tools/cmake: update to 3.27.1 Fix zstd linking again. Signed-off-by: Rosen Penev --- tools/cmake/Makefile | 4 ++-- tools/cmake/patches/100-no-testing.patch | 8 ++++---- .../120-curl-fix-libressl-linking.patch | 2 +- .../130-bootstrap_parallel_make_flag.patch | 2 +- tools/cmake/patches/150-zstd-libarchive.patch | 19 ++++++------------- 5 files changed, 14 insertions(+), 21 deletions(-) diff --git a/tools/cmake/Makefile b/tools/cmake/Makefile index 0c96b017e37..2a0d06d7a7f 100644 --- a/tools/cmake/Makefile +++ b/tools/cmake/Makefile @@ -7,7 +7,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=cmake -PKG_VERSION:=3.26.4 +PKG_VERSION:=3.27.1 PKG_VERSION_MAJOR:=$(word 1,$(subst ., ,$(PKG_VERSION))).$(word 2,$(subst ., ,$(PKG_VERSION))) PKG_RELEASE:=1 PKG_CPE_ID:=cpe:/a:kitware:cmake @@ -15,7 +15,7 @@ PKG_CPE_ID:=cpe:/a:kitware:cmake PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://github.com/Kitware/CMake/releases/download/v$(PKG_VERSION)/ \ https://cmake.org/files/v$(PKG_VERSION_MAJOR)/ -PKG_HASH:=313b6880c291bd4fe31c0aa51d6e62659282a521e695f30d5cc0d25abbd5c208 +PKG_HASH:=b1a6b0135fa11b94476e90f5b32c4c8fad480bf91cf22d0ded98ce22c5132004 HOST_BUILD_PARALLEL:=1 HOST_CONFIGURE_PARALLEL:=1 diff --git a/tools/cmake/patches/100-no-testing.patch b/tools/cmake/patches/100-no-testing.patch index 44452ce39ec..736a365e874 100644 --- a/tools/cmake/patches/100-no-testing.patch +++ b/tools/cmake/patches/100-no-testing.patch @@ -11,15 +11,15 @@ # like vs9 or vs10 --- a/Modules/Dart.cmake +++ b/Modules/Dart.cmake -@@ -33,7 +33,7 @@ whether testing support should be enable - # - # +@@ -47,7 +47,7 @@ if(cmp0145 STREQUAL "") + message(AUTHOR_WARNING "${_cmp0145_warning}") + endif() -option(BUILD_TESTING "Build the testing tree." ON) +option(BUILD_TESTING "Build the testing tree." OFF) if(BUILD_TESTING) - find_package(Dart QUIET) + # We only get here if a project already ran include(Dart), --- a/Tests/Contracts/VTK/Dashboard.cmake.in +++ b/Tests/Contracts/VTK/Dashboard.cmake.in @@ -25,7 +25,7 @@ ctest_empty_binary_directory(${CTEST_BIN diff --git a/tools/cmake/patches/120-curl-fix-libressl-linking.patch b/tools/cmake/patches/120-curl-fix-libressl-linking.patch index 1744fe5b04c..b899d1d7ef4 100644 --- a/tools/cmake/patches/120-curl-fix-libressl-linking.patch +++ b/tools/cmake/patches/120-curl-fix-libressl-linking.patch @@ -20,7 +20,7 @@ Signed-off-by: Jo-Philipp Wich --- --- a/Utilities/cmcurl/CMakeLists.txt +++ b/Utilities/cmcurl/CMakeLists.txt -@@ -611,6 +611,14 @@ if(CURL_USE_OPENSSL) +@@ -590,6 +590,14 @@ if(CURL_USE_OPENSSL) endif() set(SSL_ENABLED ON) set(USE_OPENSSL ON) diff --git a/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch b/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch index 70d122c9d9e..983f3762547 100644 --- a/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch +++ b/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch @@ -1,6 +1,6 @@ --- a/bootstrap +++ b/bootstrap -@@ -1449,7 +1449,10 @@ int main(){ printf("1%c", (char)0x0a); r +@@ -1486,7 +1486,10 @@ int main(){ printf("1%c", (char)0x0a); r ' > "test.c" cmake_original_make_flags="${cmake_make_flags}" if test "x${cmake_parallel_make}" != "x"; then diff --git a/tools/cmake/patches/150-zstd-libarchive.patch b/tools/cmake/patches/150-zstd-libarchive.patch index 34f7240fe41..4ed099fbfeb 100644 --- a/tools/cmake/patches/150-zstd-libarchive.patch +++ b/tools/cmake/patches/150-zstd-libarchive.patch @@ -1,18 +1,11 @@ --- a/Utilities/cmlibarchive/CMakeLists.txt +++ b/Utilities/cmlibarchive/CMakeLists.txt -@@ -632,8 +632,13 @@ IF(ENABLE_ZSTD) +@@ -636,7 +636,7 @@ IF(ENABLE_ZSTD) SET(ZSTD_FIND_QUIETLY TRUE) ENDIF (ZSTD_INCLUDE_DIR) -- FIND_PATH(ZSTD_INCLUDE_DIR zstd.h) -- FIND_LIBRARY(ZSTD_LIBRARY NAMES zstd libzstd) -+ IF(UNIX) -+ FIND_PACKAGE(PkgConfig QUIET) -+ PKG_SEARCH_MODULE(PC_ZSTD libzstd) -+ ENDIF() -+ -+ FIND_PATH(ZSTD_INCLUDE_DIR zstd.h HINTS ${PC_ZSTD_INCLUDEDIR} ${PC_ZSTD_INCLUDE_DIRS}) -+ FIND_LIBRARY(ZSTD_LIBRARY NAMES zstd HINTS ${PC_ZSTD_LIBDIR} ${PC_ZSTD_LIBRARY_DIRS}) - INCLUDE(FindPackageHandleStandardArgs) - FIND_PACKAGE_HANDLE_STANDARD_ARGS(ZSTD DEFAULT_MSG ZSTD_LIBRARY ZSTD_INCLUDE_DIR) - ELSE(ENABLE_ZSTD) +- IF(0) # CMake does not let pkg-config override its search paths. ++ IF(1) # CMake does not let pkg-config override its search paths. + IF(UNIX) + FIND_PACKAGE(PkgConfig QUIET) + PKG_SEARCH_MODULE(PC_ZSTD libzstd) From 04f6d674f633398e56141097e9e7fa7c53bf461a Mon Sep 17 00:00:00 2001 From: Stefan Kalscheuer Date: Sun, 18 Jun 2023 16:55:50 +0200 Subject: [PATCH 03/27] mvebu: copy 5.15 patches to 6.1 To start migration to Kernel 6.1 we copy all existing patches from 5.15. Signed-off-by: Stefan Kalscheuer --- ...mnia-configure-LED-0-pin-function-to.patch | 38 + .../100-aardvark-workaround-PCIe.patch | 81 ++ ...ris-omnia-enable-LED-controller-node.patch | 48 + ...a-support-HW-controlled-mode-via-pri.patch | 118 ++ ...a-initialize-multi-intensity-to-full.patch | 33 + ...a-change-max-brightness-from-255-to-.patch | 31 + ...set-linkstation-poweroff-add-ls220de.patch | 15 + ...Mangle-bootloader-s-kernel-arguments.patch | 279 +++++ ...-mvebu-armada-38x-enable-libata-leds.patch | 10 + .../patches-6.1/302-add_powertables.patch | 770 ++++++++++++ .../patches-6.1/304-revert_i2c_delay.patch | 15 + .../305-armada-385-rd-mtd-partitions.patch | 19 + .../306-ARM-mvebu-385-ap-Add-partitions.patch | 35 + ...-armada-xp-linksys-mamba-broken-idle.patch | 10 + .../308-armada-xp-linksys-mamba-wan.patch | 11 + .../patches-6.1/309-linksys-status-led.patch | 50 + .../310-linksys-use-eth0-as-cpu-port.patch | 25 + .../311-adjust-compatible-for-linksys.patch | 68 ++ ...da388-clearfog-emmc-on-clearfog-base.patch | 87 ++ .../313-helios4-dts-status-led-alias.patch | 28 + ...rmada-xp-linksys-mamba-resize-kernel.patch | 37 + ...316-armada-370-dts-fix-crypto-engine.patch | 29 + .../patches-6.1/400-find_active_root.patch | 60 + .../700-mvneta-tx-queue-workaround.patch | 38 + ...ethernet-marvell-mvnetaMQPrioOffload.patch | 66 ++ ...xt-ethernet-marvell-mvnetaMQPrioFlag.patch | 30 + ...t-ethernet-marvell-mvnetaMQPrioQueue.patch | 97 ++ ...hernet-marvell-mvnetaMQPrioTCOffload.patch | 182 +++ ...mvebu-a3700-comphy-Reset-COMPHY-regi.patch | 50 + ...dicate-failure-to-enter-deeper-sleep.patch | 40 + ...-pci-mvebu-time-out-reset-on-link-up.patch | 60 + ...IEI-vendor-prefix-and-IEI-WT61P803-P.patch | 218 ++++ ...a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch | 1034 +++++++++++++++++ ...d-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch | 501 ++++++++ ...d-the-IEI-WT61P803-PUZZLE-LED-driver.patch | 207 ++++ ...I-Add-iei-wt61p803-puzzle-driver-sys.patch | 82 ++ ...mon-Add-iei-wt61p803-puzzle-hwmon-dr.patch | 74 ++ ...an-entry-for-the-IEI-WT61P803-PUZZLE.patch | 41 + ...rs-leds-wt61p803-puzzle-improvements.patch | 271 +++++ ...ivers-leds-wt61p803-puzzle-mcu-retry.patch | 63 + 40 files changed, 4951 insertions(+) create mode 100644 target/linux/mvebu/patches-6.1/100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to.patch create mode 100644 target/linux/mvebu/patches-6.1/100-aardvark-workaround-PCIe.patch create mode 100644 target/linux/mvebu/patches-6.1/101-ARM-dts-turris-omnia-enable-LED-controller-node.patch create mode 100644 target/linux/mvebu/patches-6.1/102-leds-turris-omnia-support-HW-controlled-mode-via-pri.patch create mode 100644 target/linux/mvebu/patches-6.1/103-leds-turris-omnia-initialize-multi-intensity-to-full.patch create mode 100644 target/linux/mvebu/patches-6.1/104-leds-turris-omnia-change-max-brightness-from-255-to-.patch create mode 100644 target/linux/mvebu/patches-6.1/105-power-reset-linkstation-poweroff-add-ls220de.patch create mode 100644 target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch create mode 100644 target/linux/mvebu/patches-6.1/301-mvebu-armada-38x-enable-libata-leds.patch create mode 100644 target/linux/mvebu/patches-6.1/302-add_powertables.patch create mode 100644 target/linux/mvebu/patches-6.1/304-revert_i2c_delay.patch create mode 100644 target/linux/mvebu/patches-6.1/305-armada-385-rd-mtd-partitions.patch create mode 100644 target/linux/mvebu/patches-6.1/306-ARM-mvebu-385-ap-Add-partitions.patch create mode 100644 target/linux/mvebu/patches-6.1/307-armada-xp-linksys-mamba-broken-idle.patch create mode 100644 target/linux/mvebu/patches-6.1/308-armada-xp-linksys-mamba-wan.patch create mode 100644 target/linux/mvebu/patches-6.1/309-linksys-status-led.patch create mode 100644 target/linux/mvebu/patches-6.1/310-linksys-use-eth0-as-cpu-port.patch create mode 100644 target/linux/mvebu/patches-6.1/311-adjust-compatible-for-linksys.patch create mode 100644 target/linux/mvebu/patches-6.1/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch create mode 100644 target/linux/mvebu/patches-6.1/313-helios4-dts-status-led-alias.patch create mode 100644 target/linux/mvebu/patches-6.1/315-armada-xp-linksys-mamba-resize-kernel.patch create mode 100644 target/linux/mvebu/patches-6.1/316-armada-370-dts-fix-crypto-engine.patch create mode 100644 target/linux/mvebu/patches-6.1/400-find_active_root.patch create mode 100644 target/linux/mvebu/patches-6.1/700-mvneta-tx-queue-workaround.patch create mode 100644 target/linux/mvebu/patches-6.1/702-net-next-ethernet-marvell-mvnetaMQPrioOffload.patch create mode 100644 target/linux/mvebu/patches-6.1/703-net-next-ethernet-marvell-mvnetaMQPrioFlag.patch create mode 100644 target/linux/mvebu/patches-6.1/704-net-next-ethernet-marvell-mvnetaMQPrioQueue.patch create mode 100644 target/linux/mvebu/patches-6.1/705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload.patch create mode 100644 target/linux/mvebu/patches-6.1/710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi.patch create mode 100644 target/linux/mvebu/patches-6.1/800-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch create mode 100644 target/linux/mvebu/patches-6.1/801-pci-mvebu-time-out-reset-on-link-up.patch create mode 100644 target/linux/mvebu/patches-6.1/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch create mode 100644 target/linux/mvebu/patches-6.1/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch create mode 100644 target/linux/mvebu/patches-6.1/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch create mode 100644 target/linux/mvebu/patches-6.1/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch create mode 100644 target/linux/mvebu/patches-6.1/905-Documentation-ABI-Add-iei-wt61p803-puzzle-driver-sys.patch create mode 100644 target/linux/mvebu/patches-6.1/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch create mode 100644 target/linux/mvebu/patches-6.1/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch create mode 100644 target/linux/mvebu/patches-6.1/910-drivers-leds-wt61p803-puzzle-improvements.patch create mode 100644 target/linux/mvebu/patches-6.1/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch diff --git a/target/linux/mvebu/patches-6.1/100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to.patch b/target/linux/mvebu/patches-6.1/100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to.patch new file mode 100644 index 00000000000..67beb065416 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to.patch @@ -0,0 +1,38 @@ +From 81c0004a6433ff90fa6129418802c3c367e453c2 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Beh=C3=BAn?= +Date: Mon, 4 Jul 2022 13:36:21 +0200 +Subject: [PATCH 1/5] ARM: dts: turris-omnia: configure LED[0] pin function to + link/activity +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The marvell PHY driver changes the LED[0] pin function to "On - 1000 +Mbps Link, Off - Else". + +Turris Omnia expects that the function is "On - Link, Blink - Activity, +Off - No link". + +Use the `marvell,reg-init` DT property to change the function. + +In the future, once netdev trigger will support HW offloading, we will +be able to have this configured via the combination of PHY driver and +leds-turris-omnia driver. + +Signed-off-by: Marek Behún +--- + arch/arm/boot/dts/armada-385-turris-omnia.dts | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts ++++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts +@@ -396,7 +396,8 @@ + phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; +- marvell,reg-init = <3 18 0 0x4985>; ++ marvell,reg-init = <3 18 0 0x4985>, ++ <3 16 0xfff0 0x0001>; + + /* irq is connected to &pcawan pin 7 */ + }; diff --git a/target/linux/mvebu/patches-6.1/100-aardvark-workaround-PCIe.patch b/target/linux/mvebu/patches-6.1/100-aardvark-workaround-PCIe.patch new file mode 100644 index 00000000000..975eadb80e2 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/100-aardvark-workaround-PCIe.patch @@ -0,0 +1,81 @@ +Subject: [PATCH v2] PCI: aardvark: Implement workaround for PCIe Completion Timeout +Date: Tue, 2 Aug 2022 14:38:16 +0200 +Message-Id: <20220802123816.21817-1-pali@kernel.org> +X-Mailer: git-send-email 2.20.1 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit +Precedence: bulk +List-ID: +X-Mailing-List: linux-pci@vger.kernel.org + +Marvell Armada 3700 Functional Errata, Guidelines, and Restrictions +document describes in erratum 3.12 PCIe Completion Timeout (Ref #: 251), +that PCIe IP does not support a strong-ordered model for inbound posted vs. +outbound completion. + +As a workaround for this erratum, DIS_ORD_CHK flag in Debug Mux Control +register must be set. It disables the ordering check in the core between +Completions and Posted requests received from the link. + +Marvell also suggests to do full memory barrier at the beginning of +aardvark summary interrupt handler before calling interrupt handlers of +endpoint drivers in order to minimize the risk for the race condition +documented in the Erratum between the DMA done status reading and the +completion of writing to the host memory. + +More details about this issue and suggested workarounds are in discussion: +https://lore.kernel.org/linux-pci/BN9PR18MB425154FE5019DCAF2028A1D5DB8D9@BN9PR18MB4251.namprd18.prod.outlook.com/t/#u + +It was reported that enabling this workaround fixes instability issues and +"Unhandled fault" errors when using 60 GHz WiFi 802.11ad card with Qualcomm +QCA6335 chip under significant load which were caused by interrupt status +stuck in the outbound CMPLT queue traced back to this erratum. + +This workaround fixes also kernel panic triggered after some minutes of +usage 5 GHz WiFi 802.11ax card with Mediatek MT7915 chip: + + Internal error: synchronous external abort: 96000210 [#1] SMP + Kernel panic - not syncing: Fatal exception in interrupt + +Signed-off-by: Thomas Petazzoni +Signed-off-by: Pali Rohár +Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver") +Cc: stable@vger.kernel.org +--- + drivers/pci/controller/pci-aardvark.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -210,6 +210,8 @@ enum { + }; + + #define VENDOR_ID_REG (LMI_BASE_ADDR + 0x44) ++#define DEBUG_MUX_CTRL_REG (LMI_BASE_ADDR + 0x208) ++#define DIS_ORD_CHK BIT(30) + + /* PCIe core controller registers */ + #define CTRL_CORE_BASE_ADDR 0x18000 +@@ -558,6 +560,11 @@ static void advk_pcie_setup_hw(struct ad + PCIE_CORE_CTRL2_TD_ENABLE; + advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); + ++ /* Disable ordering checks, workaround for erratum 3.12 "PCIe completion timeout" */ ++ reg = advk_readl(pcie, DEBUG_MUX_CTRL_REG); ++ reg |= DIS_ORD_CHK; ++ advk_writel(pcie, reg, DEBUG_MUX_CTRL_REG); ++ + /* Set lane X1 */ + reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); + reg &= ~LANE_CNT_MSK; +@@ -1580,6 +1587,9 @@ static irqreturn_t advk_pcie_irq_handler + struct advk_pcie *pcie = arg; + u32 status; + ++ /* Full memory barrier (ARM dsb sy), workaround for erratum 3.12 "PCIe completion timeout" */ ++ mb(); ++ + status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG); + if (!(status & PCIE_IRQ_CORE_INT)) + return IRQ_NONE; diff --git a/target/linux/mvebu/patches-6.1/101-ARM-dts-turris-omnia-enable-LED-controller-node.patch b/target/linux/mvebu/patches-6.1/101-ARM-dts-turris-omnia-enable-LED-controller-node.patch new file mode 100644 index 00000000000..ecfb43553f5 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/101-ARM-dts-turris-omnia-enable-LED-controller-node.patch @@ -0,0 +1,48 @@ +From fed7cef5e4f2df8c6a79bebf5da1fdd3783ff6f3 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Beh=C3=BAn?= +Date: Mon, 4 Jul 2022 13:36:22 +0200 +Subject: [PATCH] ARM: dts: turris-omnia: enable LED controller node +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The LED controller node is disabled because the leds-turris-omnia driver +does not support setting the LED blinking to be controlled by the MCU. + +The patches for that have now been sent [1], so let's enable the node. + +[1] https://lore.kernel.org/linux-leds/20220704105955.15474-1-kabel@kernel.org/T/ + +Signed-off-by: Marek Behún +--- + arch/arm/boot/dts/armada-385-turris-omnia.dts | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts ++++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts +@@ -194,15 +194,13 @@ + reg = <0x2b>; + #address-cells = <1>; + #size-cells = <0>; ++ status = "okay"; + + /* + * LEDs are controlled by MCU (STM32F0) at + * address 0x2b. + * +- * The driver does not support HW control mode +- * for the LEDs yet. Disable the LEDs for now. +- * +- * Also LED functions are not stable yet: ++ * LED functions are not stable yet: + * - there are 3 LEDs connected via MCU to PCIe + * ports. One of these ports supports mSATA. + * There is no mSATA nor PCIe function. +@@ -213,7 +211,6 @@ + * B. Again there is no such function defined. + * For now we use LED_FUNCTION_INDICATOR + */ +- status = "disabled"; + + multi-led@0 { + reg = <0x0>; diff --git a/target/linux/mvebu/patches-6.1/102-leds-turris-omnia-support-HW-controlled-mode-via-pri.patch b/target/linux/mvebu/patches-6.1/102-leds-turris-omnia-support-HW-controlled-mode-via-pri.patch new file mode 100644 index 00000000000..c14469460a7 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/102-leds-turris-omnia-support-HW-controlled-mode-via-pri.patch @@ -0,0 +1,118 @@ +From 80e643510cb14f116f687e992210c0008a09d869 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Beh=C3=BAn?= +Date: Mon, 4 Jul 2022 12:59:53 +0200 +Subject: [PATCH] leds: turris-omnia: support HW controlled mode via + private trigger +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Add support for enabling MCU controlled mode of the Turris Omnia LEDs +via a LED private trigger called "omnia-mcu". + +When in MCU controlled mode, the user can still set LED color, but the +blinking is done by MCU, which does different things for various LEDs: +- WAN LED is blinked according to the LED[0] pin of the WAN PHY +- LAN LEDs are blinked according to the LED[0] output of corresponding + port of the LAN switch +- PCIe LEDs are blinked according to the logical OR of the MiniPCIe port + LED pins + +For a long time I wanted to actually do this differently: I wanted to +make the netdev trigger to transparently offload the blinking to the HW +if user set compatible settings for the netdev trigger. +There was some work on this, and hopefully we will be able to complete +it sometime, but since there are various complications, it will probably +not be soon. + +In the meantime let's support HW controlled mode via this private LED +trigger. If, in the future, we manage to complete the netdev trigger +offloading, we can still keep this private trigger for backwards +compatiblity, if needed. + +We also set "omnia-mcu" to cdev->default_trigger, so that the MCU keeps +control until the user first wants to take over it. If a different +default trigger is specified in device-tree via the +`linux,default-trigger` property, LED class will overwrite +cdev->default_trigger, and so the DT property will be respected. + +Signed-off-by: Marek Behún +--- + drivers/leds/Kconfig | 1 + + drivers/leds/leds-turris-omnia.c | 41 ++++++++++++++++++++++++++++++++ + 2 files changed, 42 insertions(+) + +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -163,6 +163,7 @@ config LEDS_TURRIS_OMNIA + depends on I2C + depends on MACH_ARMADA_38X || COMPILE_TEST + depends on OF ++ select LEDS_TRIGGERS + help + This option enables basic support for the LEDs found on the front + side of CZ.NIC's Turris Omnia router. There are 12 RGB LEDs on the +--- a/drivers/leds/leds-turris-omnia.c ++++ b/drivers/leds/leds-turris-omnia.c +@@ -41,6 +41,39 @@ struct omnia_leds { + struct omnia_led leds[]; + }; + ++static struct led_hw_trigger_type omnia_hw_trigger_type; ++ ++static int omnia_hwtrig_activate(struct led_classdev *cdev) ++{ ++ struct omnia_leds *leds = dev_get_drvdata(cdev->dev->parent); ++ struct omnia_led *led = to_omnia_led(lcdev_to_mccdev(cdev)); ++ ++ /* put the LED into MCU controlled mode */ ++ return i2c_smbus_write_byte_data(leds->client, CMD_LED_MODE, ++ CMD_LED_MODE_LED(led->reg)); ++} ++ ++static void omnia_hwtrig_deactivate(struct led_classdev *cdev) ++{ ++ struct omnia_leds *leds = dev_get_drvdata(cdev->dev->parent); ++ struct omnia_led *led = to_omnia_led(lcdev_to_mccdev(cdev)); ++ int ret; ++ ++ /* put the LED into software mode */ ++ ret = i2c_smbus_write_byte_data(leds->client, CMD_LED_MODE, ++ CMD_LED_MODE_LED(led->reg) | ++ CMD_LED_MODE_USER); ++ if (ret < 0) ++ dev_err(cdev->dev, "Cannot put to software mode: %i\n", ret); ++} ++ ++static struct led_trigger omnia_hw_trigger = { ++ .name = "omnia-mcu", ++ .activate = omnia_hwtrig_activate, ++ .deactivate = omnia_hwtrig_deactivate, ++ .trigger_type = &omnia_hw_trigger_type, ++}; ++ + static int omnia_led_brightness_set_blocking(struct led_classdev *cdev, + enum led_brightness brightness) + { +@@ -112,6 +145,8 @@ static int omnia_led_register(struct i2c + cdev = &led->mc_cdev.led_cdev; + cdev->max_brightness = 255; + cdev->brightness_set_blocking = omnia_led_brightness_set_blocking; ++ cdev->trigger_type = &omnia_hw_trigger_type; ++ cdev->default_trigger = omnia_hw_trigger.name; + + /* put the LED into software mode */ + ret = i2c_smbus_write_byte_data(client, CMD_LED_MODE, +@@ -228,6 +263,12 @@ static int omnia_leds_probe(struct i2c_c + + mutex_init(&leds->lock); + ++ ret = devm_led_trigger_register(dev, &omnia_hw_trigger); ++ if (ret < 0) { ++ dev_err(dev, "Cannot register private LED trigger: %d\n", ret); ++ return ret; ++ } ++ + led = &leds->leds[0]; + for_each_available_child_of_node(np, child) { + ret = omnia_led_register(client, led, child); diff --git a/target/linux/mvebu/patches-6.1/103-leds-turris-omnia-initialize-multi-intensity-to-full.patch b/target/linux/mvebu/patches-6.1/103-leds-turris-omnia-initialize-multi-intensity-to-full.patch new file mode 100644 index 00000000000..1fe76b8f2cf --- /dev/null +++ b/target/linux/mvebu/patches-6.1/103-leds-turris-omnia-initialize-multi-intensity-to-full.patch @@ -0,0 +1,33 @@ +From bda176cceb735b9b46c1900658b6486c34e13ae6 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Beh=C3=BAn?= +Date: Mon, 4 Jul 2022 12:59:54 +0200 +Subject: [PATCH] leds: turris-omnia: initialize multi-intensity to full +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The default color of each LED before driver probe (255, 255, 255). +Initialize multi_intensity to this value, so that it corresponds to the +reality. + +Signed-off-by: Marek Behún +--- + drivers/leds/leds-turris-omnia.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/leds/leds-turris-omnia.c ++++ b/drivers/leds/leds-turris-omnia.c +@@ -131,10 +131,13 @@ static int omnia_led_register(struct i2c + } + + led->subled_info[0].color_index = LED_COLOR_ID_RED; ++ led->subled_info[0].intensity = 255; + led->subled_info[0].channel = 0; + led->subled_info[1].color_index = LED_COLOR_ID_GREEN; ++ led->subled_info[1].intensity = 255; + led->subled_info[1].channel = 1; + led->subled_info[2].color_index = LED_COLOR_ID_BLUE; ++ led->subled_info[2].intensity = 255; + led->subled_info[2].channel = 2; + + led->mc_cdev.subled_info = led->subled_info; diff --git a/target/linux/mvebu/patches-6.1/104-leds-turris-omnia-change-max-brightness-from-255-to-.patch b/target/linux/mvebu/patches-6.1/104-leds-turris-omnia-change-max-brightness-from-255-to-.patch new file mode 100644 index 00000000000..fb8864dfd1d --- /dev/null +++ b/target/linux/mvebu/patches-6.1/104-leds-turris-omnia-change-max-brightness-from-255-to-.patch @@ -0,0 +1,31 @@ +From 349cbe949b9622cc05b148ecfa6268cbbae35b45 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Beh=C3=BAn?= +Date: Mon, 4 Jul 2022 12:59:55 +0200 +Subject: [PATCH] leds: turris-omnia: change max brightness from 255 to 1 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Using binary brightness makes more sense for this controller, because +internally in the MCU it works that way: the LED has a color, and a +state whether it is ON or OFF. + +The resulting brightness computation with led_mc_calc_color_components() +will now always result in either (0, 0, 0) or the multi_intensity value. + +Signed-off-by: Marek Behún +--- + drivers/leds/leds-turris-omnia.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/leds/leds-turris-omnia.c ++++ b/drivers/leds/leds-turris-omnia.c +@@ -146,7 +146,7 @@ static int omnia_led_register(struct i2c + init_data.fwnode = &np->fwnode; + + cdev = &led->mc_cdev.led_cdev; +- cdev->max_brightness = 255; ++ cdev->max_brightness = 1; + cdev->brightness_set_blocking = omnia_led_brightness_set_blocking; + cdev->trigger_type = &omnia_hw_trigger_type; + cdev->default_trigger = omnia_hw_trigger.name; diff --git a/target/linux/mvebu/patches-6.1/105-power-reset-linkstation-poweroff-add-ls220de.patch b/target/linux/mvebu/patches-6.1/105-power-reset-linkstation-poweroff-add-ls220de.patch new file mode 100644 index 00000000000..32238612344 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/105-power-reset-linkstation-poweroff-add-ls220de.patch @@ -0,0 +1,15 @@ +--- a/drivers/power/reset/linkstation-poweroff.c ++++ b/drivers/power/reset/linkstation-poweroff.c +@@ -142,6 +142,12 @@ static void linkstation_poweroff(void) + } + + static const struct of_device_id ls_poweroff_of_match[] = { ++ { .compatible = "buffalo,ls220d", ++ .data = &linkstation_power_off_cfg, ++ }, ++ { .compatible = "buffalo,ls220de", ++ .data = &linkstation_power_off_cfg, ++ }, + { .compatible = "buffalo,ls421d", + .data = &linkstation_power_off_cfg, + }, diff --git a/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch new file mode 100644 index 00000000000..9069de16146 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch @@ -0,0 +1,279 @@ +From 71270226b14733a4b1f2cde58ea9265caa50b38d Mon Sep 17 00:00:00 2001 +From: Adrian Panella +Date: Thu, 9 Mar 2017 09:37:17 +0100 +Subject: [PATCH 67/69] generic: Mangle bootloader's kernel arguments + +The command-line arguments provided by the boot loader will be +appended to a new device tree property: bootloader-args. +If there is a property "append-rootblock" in DT under /chosen +and a root= option in bootloaders command line it will be parsed +and added to DT bootargs with the form: XX. +Only command line ATAG will be processed, the rest of the ATAGs +sent by bootloader will be ignored. +This is usefull in dual boot systems, to get the current root partition +without afecting the rest of the system. + +Signed-off-by: Adrian Panella + +This patch has been modified to be mvebu specific. The original patch +did not pass the bootloader cmdline on if no append-rootblock stanza +was found, resulting in blank cmdline and failure to boot. + +Signed-off-by: Michael Gray +--- + arch/arm/Kconfig | 11 ++++ + arch/arm/boot/compressed/atags_to_fdt.c | 85 ++++++++++++++++++++++++- + init/main.c | 16 +++++ + 3 files changed, 111 insertions(+), 1 deletion(-) + +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -1727,6 +1727,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN + The command-line arguments provided by the boot loader will be + appended to the the device tree bootargs property. + ++config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE ++ bool "Append rootblock parsing bootloader's kernel arguments" ++ help ++ The command-line arguments provided by the boot loader will be ++ appended to a new device tree property: bootloader-args. ++ If there is a property "append-rootblock" in DT under /chosen ++ and a root= option in bootloaders command line it will be parsed ++ and added to DT bootargs with the form: XX. ++ Only command line ATAG will be processed, the rest of the ATAGs ++ sent by bootloader will be ignored. ++ + endchoice + + config CMDLINE +--- a/arch/arm/boot/compressed/atags_to_fdt.c ++++ b/arch/arm/boot/compressed/atags_to_fdt.c +@@ -5,6 +5,8 @@ + + #if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND) + #define do_extend_cmdline 1 ++#elif defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) ++#define do_extend_cmdline 1 + #else + #define do_extend_cmdline 0 + #endif +@@ -20,6 +22,7 @@ static int node_offset(void *fdt, const + return offset; + } + ++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE + static int setprop(void *fdt, const char *node_path, const char *property, + void *val_array, int size) + { +@@ -28,6 +31,7 @@ static int setprop(void *fdt, const char + return offset; + return fdt_setprop(fdt, offset, property, val_array, size); + } ++#endif + + static int setprop_string(void *fdt, const char *node_path, + const char *property, const char *string) +@@ -38,6 +42,7 @@ static int setprop_string(void *fdt, con + return fdt_setprop_string(fdt, offset, property, string); + } + ++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE + static int setprop_cell(void *fdt, const char *node_path, + const char *property, uint32_t val) + { +@@ -46,6 +51,7 @@ static int setprop_cell(void *fdt, const + return offset; + return fdt_setprop_cell(fdt, offset, property, val); + } ++#endif + + static const void *getprop(const void *fdt, const char *node_path, + const char *property, int *len) +@@ -58,6 +64,7 @@ static const void *getprop(const void *f + return fdt_getprop(fdt, offset, property, len); + } + ++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE + static uint32_t get_cell_size(const void *fdt) + { + int len; +@@ -69,6 +76,74 @@ static uint32_t get_cell_size(const void + return cell_size; + } + ++#endif ++ ++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) ++ ++static char *append_rootblock(char *dest, const char *str, int len, void *fdt) ++{ ++ const char *ptr, *end; ++ const char *root="root="; ++ int i, l; ++ const char *rootblock; ++ ++ //ARM doesn't have __HAVE_ARCH_STRSTR, so search manually ++ ptr = str - 1; ++ ++ do { ++ //first find an 'r' at the begining or after a space ++ do { ++ ptr++; ++ ptr = strchr(ptr, 'r'); ++ if (!ptr) ++ goto no_append; ++ ++ } while (ptr != str && *(ptr-1) != ' '); ++ ++ //then check for the rest ++ for(i = 1; i <= 4; i++) ++ if(*(ptr+i) != *(root+i)) break; ++ ++ } while (i != 5); ++ ++ end = strchr(ptr, ' '); ++ end = end ? (end - 1) : (strchr(ptr, 0) - 1); ++ ++ //find partition number (assumes format root=/dev/mtdXX | /dev/mtdblockXX | yy:XX ) ++ for( i = 0; end >= ptr && *end >= '0' && *end <= '9'; end--, i++); ++ ptr = end + 1; ++ ++ /* if append-rootblock property is set use it to append to command line */ ++ rootblock = getprop(fdt, "/chosen", "append-rootblock", &l); ++ if (rootblock == NULL) ++ goto no_append; ++ ++ if (*dest != ' ') { ++ *dest = ' '; ++ dest++; ++ len++; ++ } ++ ++ if (len + l + i <= COMMAND_LINE_SIZE) { ++ memcpy(dest, rootblock, l); ++ dest += l - 1; ++ memcpy(dest, ptr, i); ++ dest += i; ++ } ++ ++ return dest; ++ ++no_append: ++ len = strlen(str); ++ if (len + 1 < COMMAND_LINE_SIZE) { ++ memcpy(dest, str, len); ++ dest += len; ++ } ++ ++ return dest; ++} ++#endif ++ + static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline) + { + char cmdline[COMMAND_LINE_SIZE]; +@@ -88,18 +163,28 @@ static void merge_fdt_bootargs(void *fdt + + /* and append the ATAG_CMDLINE */ + if (fdt_cmdline) { ++ ++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) ++ //save original bootloader args ++ //and append ubi.mtd with root partition number to current cmdline ++ setprop_string(fdt, "/chosen", "bootloader-args", fdt_cmdline); ++ ptr = append_rootblock(ptr, fdt_cmdline, len, fdt); ++ ++#else + len = strlen(fdt_cmdline); + if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) { + *ptr++ = ' '; + memcpy(ptr, fdt_cmdline, len); + ptr += len; + } ++#endif + } + *ptr = '\0'; + + setprop_string(fdt, "/chosen", "bootargs", cmdline); + } + ++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE + static void hex_str(char *out, uint32_t value) + { + uint32_t digit; +@@ -117,6 +202,7 @@ static void hex_str(char *out, uint32_t + } + *out = '\0'; + } ++#endif + + /* + * Convert and fold provided ATAGs into the provided FDT. +@@ -131,9 +217,11 @@ int atags_to_fdt(void *atag_list, void * + struct tag *atag = atag_list; + /* In the case of 64 bits memory size, need to reserve 2 cells for + * address and size for each bank */ ++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE + __be32 mem_reg_property[2 * 2 * NR_BANKS]; +- int memcount = 0; +- int ret, memsize; ++ int memsize, memcount = 0; ++#endif ++ int ret; + + /* make sure we've got an aligned pointer */ + if ((u32)atag_list & 0x3) +@@ -168,7 +256,9 @@ int atags_to_fdt(void *atag_list, void * + else + setprop_string(fdt, "/chosen", "bootargs", + atag->u.cmdline.cmdline); +- } else if (atag->hdr.tag == ATAG_MEM) { ++ } ++#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE ++ else if (atag->hdr.tag == ATAG_MEM) { + if (memcount >= sizeof(mem_reg_property)/4) + continue; + if (!atag->u.mem.size) +@@ -212,6 +302,10 @@ int atags_to_fdt(void *atag_list, void * + setprop(fdt, "/memory", "reg", mem_reg_property, + 4 * memcount * memsize); + } ++#else ++ ++ } ++#endif + + return fdt_pack(fdt); + } +--- a/init/main.c ++++ b/init/main.c +@@ -114,6 +114,10 @@ + + #include + ++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) ++#include ++#endif ++ + static int kernel_init(void *); + + extern void init_IRQ(void); +@@ -991,6 +995,18 @@ asmlinkage __visible void __init __no_sa + page_alloc_init(); + + pr_notice("Kernel command line: %s\n", saved_command_line); ++ ++#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) ++ //Show bootloader's original command line for reference ++ if(of_chosen) { ++ const char *prop = of_get_property(of_chosen, "bootloader-args", NULL); ++ if(prop) ++ pr_notice("Bootloader command line (ignored): %s\n", prop); ++ else ++ pr_notice("Bootloader command line not present\n"); ++ } ++#endif ++ + /* parameters may set static keys */ + jump_label_init(); + parse_early_param(); diff --git a/target/linux/mvebu/patches-6.1/301-mvebu-armada-38x-enable-libata-leds.patch b/target/linux/mvebu/patches-6.1/301-mvebu-armada-38x-enable-libata-leds.patch new file mode 100644 index 00000000000..615caac24f4 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/301-mvebu-armada-38x-enable-libata-leds.patch @@ -0,0 +1,10 @@ +--- a/arch/arm/mach-mvebu/Kconfig ++++ b/arch/arm/mach-mvebu/Kconfig +@@ -67,6 +67,7 @@ config MACH_ARMADA_38X + select HAVE_ARM_TWD if SMP + select MACH_MVEBU_V7 + select PINCTRL_ARMADA_38X ++ select ARCH_WANT_LIBATA_LEDS + help + Say 'Y' here if you want your kernel to support boards based + on the Marvell Armada 380/385 SoC with device tree. diff --git a/target/linux/mvebu/patches-6.1/302-add_powertables.patch b/target/linux/mvebu/patches-6.1/302-add_powertables.patch new file mode 100644 index 00000000000..93ad5de2cc4 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/302-add_powertables.patch @@ -0,0 +1,770 @@ +--- a/arch/arm/boot/dts/armada-385-linksys.dtsi ++++ b/arch/arm/boot/dts/armada-385-linksys.dtsi +@@ -214,11 +214,19 @@ + &pcie1 { + /* Marvell 88W8864, 5GHz-only */ + status = "okay"; ++ ++ mwlwifi { ++ marvell,2ghz = <0>; ++ }; + }; + + &pcie2 { + /* Marvell 88W8864, 2GHz-only */ + status = "okay"; ++ ++ mwlwifi { ++ marvell,5ghz = <0>; ++ }; + }; + + &pinctrl { +--- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts ++++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts +@@ -142,3 +142,205 @@ + }; + }; + }; ++ ++&pcie1 { ++ mwlwifi { ++ marvell,chainmask = <2 2>; ++ marvell,powertable { ++ AU = ++ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <100 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <104 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <108 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <112 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <116 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <120 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <124 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <128 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <132 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <136 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <140 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, ++ <149 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, ++ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, ++ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, ++ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, ++ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>; ++ CA = ++ <36 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, ++ <40 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, ++ <44 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, ++ <48 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>; ++ CN = ++ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <149 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x11 0x11 0x11 0x11 0 0xf>, ++ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, ++ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, ++ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, ++ <165 0 0x15 0x15 0x15 0x15 0x16 0x16 0x16 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>; ++ ETSI = ++ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, ++ <149 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>; ++ FCC = ++ <36 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <40 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <44 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <48 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, ++ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>; ++ }; ++ }; ++}; ++ ++&pcie2 { ++ mwlwifi { ++ marvell,chainmask = <2 2>; ++ marvell,powertable { ++ AU = ++ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; ++ CA = ++ <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x00 0x00 0x00 0x00 0 0xf>, ++ <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, ++ <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x00 0x00 0x00 0x00 0 0xf>; ++ CN = ++ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <14 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; ++ ETSI = ++ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; ++ FCC = ++ <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x0 0x0 0x0 0x0 0 0xf>; ++ }; ++ }; ++}; +--- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts ++++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts +@@ -142,3 +142,205 @@ + }; + }; + }; ++ ++&pcie1 { ++ mwlwifi { ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ AU = ++ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>; ++ CA = ++ <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; ++ CN = ++ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>; ++ ETSI = ++ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>; ++ FCC = ++ <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>, ++ <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, ++ <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, ++ <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; ++ }; ++ }; ++}; ++ ++&pcie2 { ++ mwlwifi { ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ AU = ++ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; ++ CA = ++ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; ++ CN = ++ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; ++ ETSI = ++ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; ++ FCC = ++ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; ++ }; ++ }; ++}; +--- a/arch/arm/boot/dts/armada-385-linksys-shelby.dts ++++ b/arch/arm/boot/dts/armada-385-linksys-shelby.dts +@@ -142,3 +142,205 @@ + }; + }; + }; ++ ++&pcie1 { ++ mwlwifi { ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ AU = ++ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, ++ <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>; ++ CA = ++ <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; ++ CN = ++ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, ++ <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>; ++ ETSI = ++ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, ++ <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>; ++ FCC = ++ <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>, ++ <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, ++ <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, ++ <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, ++ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, ++ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, ++ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, ++ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; ++ }; ++ }; ++}; ++ ++&pcie2 { ++ mwlwifi { ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ AU = ++ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; ++ CA = ++ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; ++ CN = ++ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; ++ ETSI = ++ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; ++ FCC = ++ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; ++ }; ++ }; ++}; +--- a/arch/arm/boot/dts/armada-385-linksys-rango.dts ++++ b/arch/arm/boot/dts/armada-385-linksys-rango.dts +@@ -157,6 +157,18 @@ + }; + }; + ++&pcie1 { ++ mwlwifi { ++ marvell,chainmask = <4 4>; ++ }; ++}; ++ ++&pcie2 { ++ mwlwifi { ++ marvell,chainmask = <4 4>; ++ }; ++}; ++ + &sdhci { + pinctrl-names = "default"; + pinctrl-0 = <&sdhci_pins>; +--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +@@ -225,12 +225,100 @@ + pcie@2,0 { + /* Port 0, Lane 1 */ + status = "okay"; ++ ++ mwlwifi { ++ marvell,5ghz = <0>; ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ FCC = ++ <1 0 0x17 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0x17 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>; ++ ++ ETSI = ++ <1 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <2 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <3 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <4 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <5 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <6 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <7 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <8 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <9 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <10 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <11 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <12 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, ++ <13 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>; ++ }; ++ }; + }; + + /* Second mini-PCIe port */ + pcie@3,0 { + /* Port 0, Lane 3 */ + status = "okay"; ++ ++ mwlwifi { ++ marvell,2ghz = <0>; ++ marvell,chainmask = <4 4>; ++ marvell,powertable { ++ FCC = ++ <36 0 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <40 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <44 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <48 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, ++ <52 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, ++ <56 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, ++ <60 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, ++ <64 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, ++ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, ++ <149 0 0x16 0x16 0x16 0x16 0x14 0x14 0x14 0x14 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, ++ <153 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, ++ <157 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, ++ <161 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, ++ <165 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>; ++ ++ ETSI = ++ <36 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <40 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <44 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <48 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <52 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <56 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <60 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <64 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <100 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <104 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <108 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <112 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <116 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <120 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <124 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <128 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <132 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <136 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <140 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, ++ <149 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>; ++ }; ++ }; + }; + }; + diff --git a/target/linux/mvebu/patches-6.1/304-revert_i2c_delay.patch b/target/linux/mvebu/patches-6.1/304-revert_i2c_delay.patch new file mode 100644 index 00000000000..930c0f94942 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/304-revert_i2c_delay.patch @@ -0,0 +1,15 @@ +--- a/arch/arm/boot/dts/armada-xp.dtsi ++++ b/arch/arm/boot/dts/armada-xp.dtsi +@@ -237,12 +237,10 @@ + }; + + &i2c0 { +- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; + reg = <0x11000 0x100>; + }; + + &i2c1 { +- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; + reg = <0x11100 0x100>; + }; + diff --git a/target/linux/mvebu/patches-6.1/305-armada-385-rd-mtd-partitions.patch b/target/linux/mvebu/patches-6.1/305-armada-385-rd-mtd-partitions.patch new file mode 100644 index 00000000000..31bd53b1f3b --- /dev/null +++ b/target/linux/mvebu/patches-6.1/305-armada-385-rd-mtd-partitions.patch @@ -0,0 +1,19 @@ +--- a/arch/arm/boot/dts/armada-388-rd.dts ++++ b/arch/arm/boot/dts/armada-388-rd.dts +@@ -103,6 +103,16 @@ + compatible = "st,m25p128", "jedec,spi-nor"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <108000000>; ++ ++ partition@0 { ++ label = "uboot"; ++ reg = <0 0x400000>; ++ }; ++ ++ partition@1 { ++ label = "firmware"; ++ reg = <0x400000 0xc00000>; ++ }; + }; + }; + diff --git a/target/linux/mvebu/patches-6.1/306-ARM-mvebu-385-ap-Add-partitions.patch b/target/linux/mvebu/patches-6.1/306-ARM-mvebu-385-ap-Add-partitions.patch new file mode 100644 index 00000000000..2057e31c7e9 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/306-ARM-mvebu-385-ap-Add-partitions.patch @@ -0,0 +1,35 @@ +From 9861f93a59142a3131870df2521eb2deb73026d7 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Tue, 13 Jan 2015 11:14:09 +0100 +Subject: [PATCH 2/2] ARM: mvebu: 385-ap: Add partitions + +Signed-off-by: Maxime Ripard +--- + arch/arm/boot/dts/armada-385-db-ap.dts | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +--- a/arch/arm/boot/dts/armada-385-db-ap.dts ++++ b/arch/arm/boot/dts/armada-385-db-ap.dts +@@ -218,19 +218,19 @@ + #size-cells = <1>; + + partition@0 { +- label = "U-Boot"; ++ label = "u-boot"; + reg = <0x00000000 0x00800000>; + read-only; + }; + + partition@800000 { +- label = "uImage"; ++ label = "kernel"; + reg = <0x00800000 0x00400000>; + read-only; + }; + + partition@c00000 { +- label = "Root"; ++ label = "ubi"; + reg = <0x00c00000 0x3f400000>; + }; + }; diff --git a/target/linux/mvebu/patches-6.1/307-armada-xp-linksys-mamba-broken-idle.patch b/target/linux/mvebu/patches-6.1/307-armada-xp-linksys-mamba-broken-idle.patch new file mode 100644 index 00000000000..16112d53fc9 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/307-armada-xp-linksys-mamba-broken-idle.patch @@ -0,0 +1,10 @@ +--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +@@ -485,3 +485,7 @@ + }; + }; + }; ++ ++&coherencyfab { ++ broken-idle; ++}; diff --git a/target/linux/mvebu/patches-6.1/308-armada-xp-linksys-mamba-wan.patch b/target/linux/mvebu/patches-6.1/308-armada-xp-linksys-mamba-wan.patch new file mode 100644 index 00000000000..4315abc7d22 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/308-armada-xp-linksys-mamba-wan.patch @@ -0,0 +1,11 @@ +--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +@@ -387,7 +387,7 @@ + + port@4 { + reg = <4>; +- label = "internet"; ++ label = "wan"; + }; + + port@5 { diff --git a/target/linux/mvebu/patches-6.1/309-linksys-status-led.patch b/target/linux/mvebu/patches-6.1/309-linksys-status-led.patch new file mode 100644 index 00000000000..e5e83572c9e --- /dev/null +++ b/target/linux/mvebu/patches-6.1/309-linksys-status-led.patch @@ -0,0 +1,50 @@ +--- a/arch/arm/boot/dts/armada-385-linksys.dtsi ++++ b/arch/arm/boot/dts/armada-385-linksys.dtsi +@@ -14,6 +14,13 @@ + compatible = "linksys,armada385", "marvell,armada385", + "marvell,armada380"; + ++ aliases { ++ led-boot = &led_power; ++ led-failsafe = &led_power; ++ led-running = &led_power; ++ led-upgrade = &led_power; ++ }; ++ + chosen { + stdout-path = "serial0:115200n8"; + }; +@@ -71,7 +78,7 @@ + pinctrl-0 = <&gpio_leds_pins>; + pinctrl-names = "default"; + +- power { ++ led_power: power { + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; +--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +@@ -26,6 +26,13 @@ + compatible = "linksys,mamba", "marvell,armadaxp-mv78230", + "marvell,armadaxp", "marvell,armada-370-xp"; + ++ aliases { ++ led-boot = &led_power; ++ led-failsafe = &led_power; ++ led-running = &led_power; ++ led-upgrade = &led_power; ++ }; ++ + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = &uart0; +@@ -197,7 +204,7 @@ + pinctrl-0 = <&power_led_pin>; + pinctrl-names = "default"; + +- power { ++ led_power: power { + label = "mamba:white:power"; + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + default-state = "on"; diff --git a/target/linux/mvebu/patches-6.1/310-linksys-use-eth0-as-cpu-port.patch b/target/linux/mvebu/patches-6.1/310-linksys-use-eth0-as-cpu-port.patch new file mode 100644 index 00000000000..84d49a004b8 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/310-linksys-use-eth0-as-cpu-port.patch @@ -0,0 +1,25 @@ +--- a/arch/arm/boot/dts/armada-385-linksys.dtsi ++++ b/arch/arm/boot/dts/armada-385-linksys.dtsi +@@ -116,7 +116,7 @@ + }; + + ð2 { +- status = "okay"; ++ status = "disabled"; + phy-mode = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <2>; +@@ -200,10 +200,10 @@ + label = "wan"; + }; + +- port@5 { +- reg = <5>; ++ port@6 { ++ reg = <6>; + label = "cpu"; +- ethernet = <ð2>; ++ ethernet = <ð0>; + + fixed-link { + speed = <1000>; diff --git a/target/linux/mvebu/patches-6.1/311-adjust-compatible-for-linksys.patch b/target/linux/mvebu/patches-6.1/311-adjust-compatible-for-linksys.patch new file mode 100644 index 00000000000..a5d3e638106 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/311-adjust-compatible-for-linksys.patch @@ -0,0 +1,68 @@ +--- a/arch/arm/boot/dts/armada-385-linksys-rango.dts ++++ b/arch/arm/boot/dts/armada-385-linksys-rango.dts +@@ -12,8 +12,8 @@ + + / { + model = "Linksys WRT3200ACM"; +- compatible = "linksys,rango", "linksys,armada385", "marvell,armada385", +- "marvell,armada380"; ++ compatible = "linksys,wrt3200acm", "linksys,rango", "linksys,armada385", ++ "marvell,armada385", "marvell,armada380"; + }; + + &expander0 { +--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +@@ -22,9 +22,10 @@ + #include "armada-xp-mv78230.dtsi" + + / { +- model = "Linksys WRT1900AC"; +- compatible = "linksys,mamba", "marvell,armadaxp-mv78230", +- "marvell,armadaxp", "marvell,armada-370-xp"; ++ model = "Linksys WRT1900AC v1"; ++ compatible = "linksys,wrt1900ac-v1", "linksys,mamba", ++ "marvell,armadaxp-mv78230", "marvell,armadaxp", ++ "marvell,armada-370-xp"; + + aliases { + led-boot = &led_power; +--- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts ++++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts +@@ -9,8 +9,9 @@ + #include "armada-385-linksys.dtsi" + + / { +- model = "Linksys WRT1900ACv2"; +- compatible = "linksys,cobra", "linksys,armada385", "marvell,armada385", ++ model = "Linksys WRT1900AC v2"; ++ compatible = "linksys,wrt1900ac-v2", "linksys,cobra", ++ "linksys,armada385", "marvell,armada385", + "marvell,armada380"; + }; + +--- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts ++++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts +@@ -10,8 +10,8 @@ + + / { + model = "Linksys WRT1200AC"; +- compatible = "linksys,caiman", "linksys,armada385", "marvell,armada385", +- "marvell,armada380"; ++ compatible = "linksys,wrt1200ac", "linksys,caiman", "linksys,armada385", ++ "marvell,armada385", "marvell,armada380"; + }; + + &expander0 { +--- a/arch/arm/boot/dts/armada-385-linksys-shelby.dts ++++ b/arch/arm/boot/dts/armada-385-linksys-shelby.dts +@@ -10,7 +10,8 @@ + + / { + model = "Linksys WRT1900ACS"; +- compatible = "linksys,shelby", "linksys,armada385", "marvell,armada385", ++ compatible = "linksys,wrt1900acs", "linksys,shelby", ++ "linksys,armada385", "marvell,armada385", + "marvell,armada380"; + }; + diff --git a/target/linux/mvebu/patches-6.1/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch b/target/linux/mvebu/patches-6.1/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch new file mode 100644 index 00000000000..dd2bef7f632 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch @@ -0,0 +1,87 @@ +From 8137da20701c776ad3481115305a5e8e410871ba Mon Sep 17 00:00:00 2001 +From: Russell King +Date: Tue, 29 Nov 2016 10:15:45 +0000 +Subject: ARM: dts: armada388-clearfog: emmc on clearfog base + +Signed-off-by: Russell King +--- + arch/arm/boot/dts/armada-388-clearfog-base.dts | 1 + + .../dts/armada-38x-solidrun-microsom-emmc.dtsi | 62 ++++++++++++++++++++++ + 2 files changed, 63 insertions(+) + create mode 100644 arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi + +--- a/arch/arm/boot/dts/armada-388-clearfog-base.dts ++++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts +@@ -7,6 +7,7 @@ + + /dts-v1/; + #include "armada-388-clearfog.dtsi" ++#include "armada-38x-solidrun-microsom-emmc.dtsi" + + / { + model = "SolidRun Clearfog Base A1"; +--- /dev/null ++++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi +@@ -0,0 +1,62 @@ ++/* ++ * Device Tree file for SolidRun Armada 38x Microsom add-on for eMMC ++ * ++ * Copyright (C) 2015 Russell King ++ * ++ * This board is in development; the contents of this file work with ++ * the A1 rev 2.0 of the board, which does not represent final ++ * production board. Things will change, don't expect this file to ++ * remain compatible info the future. ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This file is distributed in the hope that it will be useful ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++/ { ++ soc { ++ internal-regs { ++ sdhci@d8000 { ++ bus-width = <4>; ++ no-1-8-v; ++ non-removable; ++ pinctrl-0 = <µsom_sdhci_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ wp-inverted; ++ }; ++ }; ++ }; ++}; diff --git a/target/linux/mvebu/patches-6.1/313-helios4-dts-status-led-alias.patch b/target/linux/mvebu/patches-6.1/313-helios4-dts-status-led-alias.patch new file mode 100644 index 00000000000..607f4362971 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/313-helios4-dts-status-led-alias.patch @@ -0,0 +1,28 @@ +--- a/arch/arm/boot/dts/armada-388-helios4.dts ++++ b/arch/arm/boot/dts/armada-388-helios4.dts +@@ -15,6 +15,13 @@ + model = "Helios4"; + compatible = "kobol,helios4", "marvell,armada388", + "marvell,armada385", "marvell,armada380"; ++ ++ aliases { ++ led-boot = &led_status; ++ led-failsafe = &led_status; ++ led-running = &led_status; ++ led-upgrade = &led_status; ++ }; + + memory { + device_type = "memory"; +@@ -73,10 +80,9 @@ + pinctrl-names = "default"; + pinctrl-0 = <&helios_system_led_pins>; + +- status-led { ++ led_status: status-led { + label = "helios4:green:status"; + gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; +- linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + diff --git a/target/linux/mvebu/patches-6.1/315-armada-xp-linksys-mamba-resize-kernel.patch b/target/linux/mvebu/patches-6.1/315-armada-xp-linksys-mamba-resize-kernel.patch new file mode 100644 index 00000000000..f1fddceff4b --- /dev/null +++ b/target/linux/mvebu/patches-6.1/315-armada-xp-linksys-mamba-resize-kernel.patch @@ -0,0 +1,37 @@ +From 258233f00bcd013050efee00c5d9128ef8cd62dd Mon Sep 17 00:00:00 2001 +From: Tad +Date: Fri, 5 Feb 2021 22:32:11 -0500 +Subject: [PATCH] ARM: dts: armada-xp-linksys-mamba: Increase kernel + partition to 4MB + +Signed-off-by: Tad Davanzo +--- + arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts ++++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +@@ -456,9 +456,9 @@ + reg = <0xa00000 0x2800000>; /* 40MB */ + }; + +- partition@d00000 { ++ partition@e00000 { + label = "rootfs1"; +- reg = <0xd00000 0x2500000>; /* 37MB */ ++ reg = <0xe00000 0x2400000>; /* 36MB */ + }; + + /* kernel2 overlaps with rootfs2 by design */ +@@ -467,9 +467,9 @@ + reg = <0x3200000 0x2800000>; /* 40MB */ + }; + +- partition@3500000 { ++ partition@3600000 { + label = "rootfs2"; +- reg = <0x3500000 0x2500000>; /* 37MB */ ++ reg = <0x3600000 0x2400000>; /* 36MB */ + }; + + /* diff --git a/target/linux/mvebu/patches-6.1/316-armada-370-dts-fix-crypto-engine.patch b/target/linux/mvebu/patches-6.1/316-armada-370-dts-fix-crypto-engine.patch new file mode 100644 index 00000000000..19378870ef7 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/316-armada-370-dts-fix-crypto-engine.patch @@ -0,0 +1,29 @@ +--- a/arch/arm/boot/dts/armada-370.dtsi ++++ b/arch/arm/boot/dts/armada-370.dtsi +@@ -234,7 +234,7 @@ + clocks = <&gateclk 23>; + clock-names = "cesa0"; + marvell,crypto-srams = <&crypto_sram>; +- marvell,crypto-sram-size = <0x7e0>; ++ marvell,crypto-sram-size = <0x800>; + }; + }; + +@@ -255,12 +255,17 @@ + * cpuidle workaround. + */ + idle-sram@0 { ++ status = "disabled"; + reg = <0x0 0x20>; + }; + }; + }; + }; + ++&coherencyfab { ++ broken-idle; ++}; ++ + /* + * Default UART pinctrl setting without RTS/CTS, can be overwritten on + * board level if a different configuration is used. diff --git a/target/linux/mvebu/patches-6.1/400-find_active_root.patch b/target/linux/mvebu/patches-6.1/400-find_active_root.patch new file mode 100644 index 00000000000..5582d20c682 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/400-find_active_root.patch @@ -0,0 +1,60 @@ +The WRT1900AC among other Linksys routers uses a dual-firmware layout. +Dynamically rename the active partition to "ubi". + +Signed-off-by: Imre Kaloz + +--- a/drivers/mtd/parsers/ofpart_core.c ++++ b/drivers/mtd/parsers/ofpart_core.c +@@ -38,6 +38,8 @@ static bool node_has_compatible(struct d + return of_get_property(pp, "compatible", NULL); + } + ++static int mangled_rootblock; ++ + static int parse_fixed_partitions(struct mtd_info *master, + const struct mtd_partition **pparts, + struct mtd_part_parser_data *data) +@@ -48,6 +50,7 @@ static int parse_fixed_partitions(struct + struct device_node *mtd_node; + struct device_node *ofpart_node; + const char *partname; ++ const char *owrtpart = "ubi"; + struct device_node *pp; + int nr_parts, i, ret = 0; + bool dedicated = true; +@@ -133,9 +136,13 @@ static int parse_fixed_partitions(struct + parts[i].size = of_read_number(reg + a_cells, s_cells); + parts[i].of_node = pp; + +- partname = of_get_property(pp, "label", &len); +- if (!partname) +- partname = of_get_property(pp, "name", &len); ++ if (mangled_rootblock && (i == mangled_rootblock)) { ++ partname = owrtpart; ++ } else { ++ partname = of_get_property(pp, "label", &len); ++ if (!partname) ++ partname = of_get_property(pp, "name", &len); ++ } + parts[i].name = partname; + + if (of_get_property(pp, "read-only", &len)) +@@ -252,6 +259,18 @@ static int __init ofpart_parser_init(voi + return 0; + } + ++static int __init active_root(char *str) ++{ ++ get_option(&str, &mangled_rootblock); ++ ++ if (!mangled_rootblock) ++ return 1; ++ ++ return 1; ++} ++ ++__setup("mangled_rootblock=", active_root); ++ + static void __exit ofpart_parser_exit(void) + { + deregister_mtd_parser(&ofpart_parser); diff --git a/target/linux/mvebu/patches-6.1/700-mvneta-tx-queue-workaround.patch b/target/linux/mvebu/patches-6.1/700-mvneta-tx-queue-workaround.patch new file mode 100644 index 00000000000..32e8ef4b7d8 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/700-mvneta-tx-queue-workaround.patch @@ -0,0 +1,38 @@ +The hardware queue scheduling is apparently configured with fixed +priorities, which creates a nasty fairness issue where traffic from one +CPU can starve traffic from all other CPUs. + +Work around this issue by forcing all tx packets to go through one CPU, +until this issue is fixed properly. + +Signed-off-by: Felix Fietkau +--- +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -5006,6 +5006,16 @@ static int mvneta_setup_tc(struct net_de + } + } + ++#ifndef CONFIG_ARM64 ++static u16 mvneta_select_queue(struct net_device *dev, struct sk_buff *skb, ++ struct net_device *sb_dev) ++{ ++ /* XXX: hardware queue scheduling is broken, ++ * use only one queue until it is fixed */ ++ return 0; ++} ++#endif ++ + static const struct net_device_ops mvneta_netdev_ops = { + .ndo_open = mvneta_open, + .ndo_stop = mvneta_stop, +@@ -5016,6 +5026,9 @@ static const struct net_device_ops mvnet + .ndo_fix_features = mvneta_fix_features, + .ndo_get_stats64 = mvneta_get_stats64, + .ndo_eth_ioctl = mvneta_ioctl, ++#ifndef CONFIG_ARM64 ++ .ndo_select_queue = mvneta_select_queue, ++#endif + .ndo_bpf = mvneta_xdp, + .ndo_xdp_xmit = mvneta_xdp_xmit, + .ndo_setup_tc = mvneta_setup_tc, diff --git a/target/linux/mvebu/patches-6.1/702-net-next-ethernet-marvell-mvnetaMQPrioOffload.patch b/target/linux/mvebu/patches-6.1/702-net-next-ethernet-marvell-mvnetaMQPrioOffload.patch new file mode 100644 index 00000000000..019b9528c36 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/702-net-next-ethernet-marvell-mvnetaMQPrioOffload.patch @@ -0,0 +1,66 @@ +From 75fa71e3acadbb4ab5eda18505277eb9a1f69b23 Mon Sep 17 00:00:00 2001 +From: Maxime Chevallier +Date: Fri, 26 Nov 2021 12:20:53 +0100 +Subject: net: mvneta: Use struct tc_mqprio_qopt_offload for MQPrio + configuration + +The struct tc_mqprio_qopt_offload is a container for struct tc_mqprio_qopt, +that allows passing extra parameters, such as traffic shaping. This commit +converts the current mqprio code to that new struct. + +Signed-off-by: Maxime Chevallier +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/marvell/mvneta.c | 17 ++++++++++------- + 1 file changed, 10 insertions(+), 7 deletions(-) + +(limited to 'drivers/net/ethernet/marvell/mvneta.c') + +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -38,6 +38,7 @@ + #include + #include + #include ++#include + #include + + /* Registers */ +@@ -4966,14 +4967,14 @@ static void mvneta_setup_rx_prio_map(str + } + + static int mvneta_setup_mqprio(struct net_device *dev, +- struct tc_mqprio_qopt *qopt) ++ struct tc_mqprio_qopt_offload *mqprio) + { + struct mvneta_port *pp = netdev_priv(dev); + u8 num_tc; + int i; + +- qopt->hw = TC_MQPRIO_HW_OFFLOAD_TCS; +- num_tc = qopt->num_tc; ++ mqprio->qopt.hw = TC_MQPRIO_HW_OFFLOAD_TCS; ++ num_tc = mqprio->qopt.num_tc; + + if (num_tc > rxq_number) + return -EINVAL; +@@ -4984,13 +4985,15 @@ static int mvneta_setup_mqprio(struct ne + return 0; + } + +- memcpy(pp->prio_tc_map, qopt->prio_tc_map, sizeof(pp->prio_tc_map)); ++ memcpy(pp->prio_tc_map, mqprio->qopt.prio_tc_map, ++ sizeof(pp->prio_tc_map)); + + mvneta_setup_rx_prio_map(pp); + +- netdev_set_num_tc(dev, qopt->num_tc); +- for (i = 0; i < qopt->num_tc; i++) +- netdev_set_tc_queue(dev, i, qopt->count[i], qopt->offset[i]); ++ netdev_set_num_tc(dev, mqprio->qopt.num_tc); ++ for (i = 0; i < mqprio->qopt.num_tc; i++) ++ netdev_set_tc_queue(dev, i, mqprio->qopt.count[i], ++ mqprio->qopt.offset[i]); + + return 0; + } diff --git a/target/linux/mvebu/patches-6.1/703-net-next-ethernet-marvell-mvnetaMQPrioFlag.patch b/target/linux/mvebu/patches-6.1/703-net-next-ethernet-marvell-mvnetaMQPrioFlag.patch new file mode 100644 index 00000000000..c878a288439 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/703-net-next-ethernet-marvell-mvnetaMQPrioFlag.patch @@ -0,0 +1,30 @@ +From e7ca75fe6662f78bfeb0112671c812e4c7b8e214 Mon Sep 17 00:00:00 2001 +From: Maxime Chevallier +Date: Fri, 26 Nov 2021 12:20:54 +0100 +Subject: net: mvneta: Don't force-set the offloading flag + +The qopt->hw flag is set by the TC code according to the offloading mode +asked by user. Don't force-set it in the driver, but instead read it to +make sure we do what's asked. + +Signed-off-by: Maxime Chevallier +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/marvell/mvneta.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +(limited to 'drivers/net/ethernet/marvell/mvneta.c') + +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -4973,7 +4973,9 @@ static int mvneta_setup_mqprio(struct ne + u8 num_tc; + int i; + +- mqprio->qopt.hw = TC_MQPRIO_HW_OFFLOAD_TCS; ++ if (mqprio->qopt.hw != TC_MQPRIO_HW_OFFLOAD_TCS) ++ return 0; ++ + num_tc = mqprio->qopt.num_tc; + + if (num_tc > rxq_number) diff --git a/target/linux/mvebu/patches-6.1/704-net-next-ethernet-marvell-mvnetaMQPrioQueue.patch b/target/linux/mvebu/patches-6.1/704-net-next-ethernet-marvell-mvnetaMQPrioQueue.patch new file mode 100644 index 00000000000..546a8486ef0 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/704-net-next-ethernet-marvell-mvnetaMQPrioQueue.patch @@ -0,0 +1,97 @@ +From e9f7099d0730341b24c057acbf545dd019581db6 Mon Sep 17 00:00:00 2001 +From: Maxime Chevallier +Date: Fri, 26 Nov 2021 12:20:55 +0100 +Subject: net: mvneta: Allow having more than one queue per TC + +The current mqprio implementation assumed that we are only using one +queue per TC. Use the offset and count parameters to allow using +multiple queues per TC. In that case, the controller will use a standard +round-robin algorithm to pick queues assigned to the same TC, with the +same priority. + +This only applies to VLAN priorities in ingress traffic, each TC +corresponding to a vlan priority. + +Signed-off-by: Maxime Chevallier +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/marvell/mvneta.c | 35 ++++++++++++++++++++--------------- + 1 file changed, 20 insertions(+), 15 deletions(-) + +(limited to 'drivers/net/ethernet/marvell/mvneta.c') + +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -498,7 +498,6 @@ struct mvneta_port { + u8 mcast_count[256]; + u16 tx_ring_size; + u16 rx_ring_size; +- u8 prio_tc_map[8]; + + phy_interface_t phy_interface; + struct device_node *dn; +@@ -4955,13 +4954,12 @@ static void mvneta_clear_rx_prio_map(str + mvreg_write(pp, MVNETA_VLAN_PRIO_TO_RXQ, 0); + } + +-static void mvneta_setup_rx_prio_map(struct mvneta_port *pp) ++static void mvneta_map_vlan_prio_to_rxq(struct mvneta_port *pp, u8 pri, u8 rxq) + { +- u32 val = 0; +- int i; ++ u32 val = mvreg_read(pp, MVNETA_VLAN_PRIO_TO_RXQ); + +- for (i = 0; i < rxq_number; i++) +- val |= MVNETA_VLAN_PRIO_RXQ_MAP(i, pp->prio_tc_map[i]); ++ val &= ~MVNETA_VLAN_PRIO_RXQ_MAP(pri, 0x7); ++ val |= MVNETA_VLAN_PRIO_RXQ_MAP(pri, rxq); + + mvreg_write(pp, MVNETA_VLAN_PRIO_TO_RXQ, val); + } +@@ -4970,8 +4968,8 @@ static int mvneta_setup_mqprio(struct ne + struct tc_mqprio_qopt_offload *mqprio) + { + struct mvneta_port *pp = netdev_priv(dev); ++ int rxq, tc; + u8 num_tc; +- int i; + + if (mqprio->qopt.hw != TC_MQPRIO_HW_OFFLOAD_TCS) + return 0; +@@ -4981,21 +4979,28 @@ static int mvneta_setup_mqprio(struct ne + if (num_tc > rxq_number) + return -EINVAL; + ++ mvneta_clear_rx_prio_map(pp); ++ + if (!num_tc) { +- mvneta_clear_rx_prio_map(pp); + netdev_reset_tc(dev); + return 0; + } + +- memcpy(pp->prio_tc_map, mqprio->qopt.prio_tc_map, +- sizeof(pp->prio_tc_map)); ++ netdev_set_num_tc(dev, mqprio->qopt.num_tc); + +- mvneta_setup_rx_prio_map(pp); ++ for (tc = 0; tc < mqprio->qopt.num_tc; tc++) { ++ netdev_set_tc_queue(dev, tc, mqprio->qopt.count[tc], ++ mqprio->qopt.offset[tc]); ++ ++ for (rxq = mqprio->qopt.offset[tc]; ++ rxq < mqprio->qopt.count[tc] + mqprio->qopt.offset[tc]; ++ rxq++) { ++ if (rxq >= rxq_number) ++ return -EINVAL; + +- netdev_set_num_tc(dev, mqprio->qopt.num_tc); +- for (i = 0; i < mqprio->qopt.num_tc; i++) +- netdev_set_tc_queue(dev, i, mqprio->qopt.count[i], +- mqprio->qopt.offset[i]); ++ mvneta_map_vlan_prio_to_rxq(pp, tc, rxq); ++ } ++ } + + return 0; + } diff --git a/target/linux/mvebu/patches-6.1/705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload.patch b/target/linux/mvebu/patches-6.1/705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload.patch new file mode 100644 index 00000000000..1d4a055a719 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload.patch @@ -0,0 +1,182 @@ +From 2551dc9e398c37a15e52122d385c29a8b06be45f Mon Sep 17 00:00:00 2001 +From: Maxime Chevallier +Date: Fri, 26 Nov 2021 12:20:56 +0100 +Subject: net: mvneta: Add TC traffic shaping offload + +The mvneta controller is able to do some tocken-bucket per-queue traffic +shaping. This commit adds support for setting these using the TC mqprio +interface. + +The token-bucket parameters are customisable, but the current +implementation configures them to have a 10kbps resolution for the +rate limitation, since it allows to cover the whole range of max_rate +values from 10kbps to 5Gbps with 10kbps increments. + +Signed-off-by: Maxime Chevallier +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/marvell/mvneta.c | 120 +++++++++++++++++++++++++++++++++- + 1 file changed, 119 insertions(+), 1 deletion(-) + +(limited to 'drivers/net/ethernet/marvell/mvneta.c') + +--- a/drivers/net/ethernet/marvell/mvneta.c ++++ b/drivers/net/ethernet/marvell/mvneta.c +@@ -248,12 +248,39 @@ + #define MVNETA_TXQ_SENT_DESC_MASK 0x3fff0000 + #define MVNETA_PORT_TX_RESET 0x3cf0 + #define MVNETA_PORT_TX_DMA_RESET BIT(0) ++#define MVNETA_TXQ_CMD1_REG 0x3e00 ++#define MVNETA_TXQ_CMD1_BW_LIM_SEL_V1 BIT(3) ++#define MVNETA_TXQ_CMD1_BW_LIM_EN BIT(0) ++#define MVNETA_REFILL_NUM_CLK_REG 0x3e08 ++#define MVNETA_REFILL_MAX_NUM_CLK 0x0000ffff + #define MVNETA_TX_MTU 0x3e0c + #define MVNETA_TX_TOKEN_SIZE 0x3e14 + #define MVNETA_TX_TOKEN_SIZE_MAX 0xffffffff ++#define MVNETA_TXQ_BUCKET_REFILL_REG(q) (0x3e20 + ((q) << 2)) ++#define MVNETA_TXQ_BUCKET_REFILL_PERIOD_MASK 0x3ff00000 ++#define MVNETA_TXQ_BUCKET_REFILL_PERIOD_SHIFT 20 ++#define MVNETA_TXQ_BUCKET_REFILL_VALUE_MAX 0x0007ffff + #define MVNETA_TXQ_TOKEN_SIZE_REG(q) (0x3e40 + ((q) << 2)) + #define MVNETA_TXQ_TOKEN_SIZE_MAX 0x7fffffff + ++/* The values of the bucket refill base period and refill period are taken from ++ * the reference manual, and adds up to a base resolution of 10Kbps. This allows ++ * to cover all rate-limit values from 10Kbps up to 5Gbps ++ */ ++ ++/* Base period for the rate limit algorithm */ ++#define MVNETA_TXQ_BUCKET_REFILL_BASE_PERIOD_NS 100 ++ ++/* Number of Base Period to wait between each bucket refill */ ++#define MVNETA_TXQ_BUCKET_REFILL_PERIOD 1000 ++ ++/* The base resolution for rate limiting, in bps. Any max_rate value should be ++ * a multiple of that value. ++ */ ++#define MVNETA_TXQ_RATE_LIMIT_RESOLUTION (NSEC_PER_SEC / \ ++ (MVNETA_TXQ_BUCKET_REFILL_BASE_PERIOD_NS * \ ++ MVNETA_TXQ_BUCKET_REFILL_PERIOD)) ++ + #define MVNETA_LPI_CTRL_0 0x2cc0 + #define MVNETA_LPI_CTRL_1 0x2cc4 + #define MVNETA_LPI_REQUEST_ENABLE BIT(0) +@@ -4964,11 +4991,74 @@ static void mvneta_map_vlan_prio_to_rxq( + mvreg_write(pp, MVNETA_VLAN_PRIO_TO_RXQ, val); + } + ++static int mvneta_enable_per_queue_rate_limit(struct mvneta_port *pp) ++{ ++ unsigned long core_clk_rate; ++ u32 refill_cycles; ++ u32 val; ++ ++ core_clk_rate = clk_get_rate(pp->clk); ++ if (!core_clk_rate) ++ return -EINVAL; ++ ++ refill_cycles = MVNETA_TXQ_BUCKET_REFILL_BASE_PERIOD_NS / ++ (NSEC_PER_SEC / core_clk_rate); ++ ++ if (refill_cycles > MVNETA_REFILL_MAX_NUM_CLK) ++ return -EINVAL; ++ ++ /* Enable bw limit algorithm version 3 */ ++ val = mvreg_read(pp, MVNETA_TXQ_CMD1_REG); ++ val &= ~(MVNETA_TXQ_CMD1_BW_LIM_SEL_V1 | MVNETA_TXQ_CMD1_BW_LIM_EN); ++ mvreg_write(pp, MVNETA_TXQ_CMD1_REG, val); ++ ++ /* Set the base refill rate */ ++ mvreg_write(pp, MVNETA_REFILL_NUM_CLK_REG, refill_cycles); ++ ++ return 0; ++} ++ ++static void mvneta_disable_per_queue_rate_limit(struct mvneta_port *pp) ++{ ++ u32 val = mvreg_read(pp, MVNETA_TXQ_CMD1_REG); ++ ++ val |= (MVNETA_TXQ_CMD1_BW_LIM_SEL_V1 | MVNETA_TXQ_CMD1_BW_LIM_EN); ++ mvreg_write(pp, MVNETA_TXQ_CMD1_REG, val); ++} ++ ++static int mvneta_setup_queue_rates(struct mvneta_port *pp, int queue, ++ u64 min_rate, u64 max_rate) ++{ ++ u32 refill_val, rem; ++ u32 val = 0; ++ ++ /* Convert to from Bps to bps */ ++ max_rate *= 8; ++ ++ if (min_rate) ++ return -EINVAL; ++ ++ refill_val = div_u64_rem(max_rate, MVNETA_TXQ_RATE_LIMIT_RESOLUTION, ++ &rem); ++ ++ if (rem || !refill_val || ++ refill_val > MVNETA_TXQ_BUCKET_REFILL_VALUE_MAX) ++ return -EINVAL; ++ ++ val = refill_val; ++ val |= (MVNETA_TXQ_BUCKET_REFILL_PERIOD << ++ MVNETA_TXQ_BUCKET_REFILL_PERIOD_SHIFT); ++ ++ mvreg_write(pp, MVNETA_TXQ_BUCKET_REFILL_REG(queue), val); ++ ++ return 0; ++} ++ + static int mvneta_setup_mqprio(struct net_device *dev, + struct tc_mqprio_qopt_offload *mqprio) + { + struct mvneta_port *pp = netdev_priv(dev); +- int rxq, tc; ++ int rxq, txq, tc, ret; + u8 num_tc; + + if (mqprio->qopt.hw != TC_MQPRIO_HW_OFFLOAD_TCS) +@@ -4982,6 +5072,7 @@ static int mvneta_setup_mqprio(struct ne + mvneta_clear_rx_prio_map(pp); + + if (!num_tc) { ++ mvneta_disable_per_queue_rate_limit(pp); + netdev_reset_tc(dev); + return 0; + } +@@ -5002,6 +5093,33 @@ static int mvneta_setup_mqprio(struct ne + } + } + ++ if (mqprio->shaper != TC_MQPRIO_SHAPER_BW_RATE) { ++ mvneta_disable_per_queue_rate_limit(pp); ++ return 0; ++ } ++ ++ if (mqprio->qopt.num_tc > txq_number) ++ return -EINVAL; ++ ++ ret = mvneta_enable_per_queue_rate_limit(pp); ++ if (ret) ++ return ret; ++ ++ for (tc = 0; tc < mqprio->qopt.num_tc; tc++) { ++ for (txq = mqprio->qopt.offset[tc]; ++ txq < mqprio->qopt.count[tc] + mqprio->qopt.offset[tc]; ++ txq++) { ++ if (txq >= txq_number) ++ return -EINVAL; ++ ++ ret = mvneta_setup_queue_rates(pp, txq, ++ mqprio->min_rate[tc], ++ mqprio->max_rate[tc]); ++ if (ret) ++ return ret; ++ } ++ } ++ + return 0; + } + diff --git a/target/linux/mvebu/patches-6.1/710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi.patch b/target/linux/mvebu/patches-6.1/710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi.patch new file mode 100644 index 00000000000..a852dc1fc11 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi.patch @@ -0,0 +1,50 @@ +From b01d622d76134e9401970ffd3fbbb9a7051f976a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 20 Sep 2022 14:11:54 +0200 +Subject: [PATCH] phy: marvell: phy-mvebu-a3700-comphy: Reset COMPHY registers + before USB 3.0 power on +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Turris MOX board with older ARM Trusted Firmware version v1.5 is not able +to detect any USB 3.0 device connected to USB-A port on Mox-A module after +commit 0a6fc70d76bd ("phy: marvell: phy-mvebu-a3700-comphy: Remove broken +reset support"). On the other hand USB 2.0 devices connected to the same +USB-A port are working fine. + +It looks as if the older firmware configures COMPHY registers for USB 3.0 +somehow incompatibly for kernel driver. Experiments show that resetting +COMPHY registers via setting SFT_RST auto-clearing bit in COMPHY_SFT_RESET +register fixes this issue. + +Reset the COMPHY in mvebu_a3700_comphy_usb3_power_on() function as a first +step after selecting COMPHY lane and USB 3.0 function. With this change +Turris MOX board can successfully detect USB 3.0 devices again. + +Before the above mentioned commit this reset was implemented in PHY reset +method, so this is the reason why there was no issue with older firmware +version then. + +Fixes: 0a6fc70d76bd ("phy: marvell: phy-mvebu-a3700-comphy: Remove broken reset support") +Reported-by: Marek Behún +Signed-off-by: Pali Rohár +Tested-by: Shin'ichiro Kawasaki +Link: https://lore.kernel.org/r/20220920121154.30115-1-pali@kernel.org +Signed-off-by: Vinod Koul +--- + drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c ++++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c +@@ -826,6 +826,9 @@ mvebu_a3700_comphy_usb3_power_on(struct + if (ret) + return ret; + ++ /* COMPHY register reset (cleared automatically) */ ++ comphy_lane_reg_set(lane, COMPHY_SFT_RESET, SFT_RST, SFT_RST); ++ + /* + * 0. Set PHY OTG Control(0x5d034), bit 4, Power up OTG module The + * register belong to UTMI module, so it is set in UTMI phy driver. diff --git a/target/linux/mvebu/patches-6.1/800-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch b/target/linux/mvebu/patches-6.1/800-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch new file mode 100644 index 00000000000..29f36be460d --- /dev/null +++ b/target/linux/mvebu/patches-6.1/800-cpuidle-mvebu-indicate-failure-to-enter-deeper-sleep.patch @@ -0,0 +1,40 @@ +From c28b2d367da8a471482e6a4aa8337ab6369a80c2 Mon Sep 17 00:00:00 2001 +From: Russell King +Date: Sat, 3 Oct 2015 09:13:05 +0100 +Subject: cpuidle: mvebu: indicate failure to enter deeper sleep states + +The cpuidle ->enter method expects the return value to be the sleep +state we entered. Returning negative numbers or other codes is not +permissible since coupled CPU idle was merged. + +At least some of the mvebu_v7_cpu_suspend() implementations return the +value from cpu_suspend(), which returns zero if the CPU vectors back +into the kernel via cpu_resume() (the success case), or the non-zero +return value of the suspend actor, or one (failure cases). + +We do not want to be returning the failure case value back to CPU idle +as that indicates that we successfully entered one of the deeper idle +states. Always return zero instead, indicating that we slept for the +shortest amount of time. + +Signed-off-by: Russell King +--- + drivers/cpuidle/cpuidle-mvebu-v7.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/cpuidle/cpuidle-mvebu-v7.c ++++ b/drivers/cpuidle/cpuidle-mvebu-v7.c +@@ -39,8 +39,12 @@ static int mvebu_v7_enter_idle(struct cp + ret = mvebu_v7_cpu_suspend(deepidle); + cpu_pm_exit(); + ++ /* ++ * If we failed to enter the desired state, indicate that we ++ * slept lightly. ++ */ + if (ret) +- return ret; ++ return 0; + + return index; + } diff --git a/target/linux/mvebu/patches-6.1/801-pci-mvebu-time-out-reset-on-link-up.patch b/target/linux/mvebu/patches-6.1/801-pci-mvebu-time-out-reset-on-link-up.patch new file mode 100644 index 00000000000..dba12536993 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/801-pci-mvebu-time-out-reset-on-link-up.patch @@ -0,0 +1,60 @@ +From 287b9df160b6159f8d385424904f8bac501280c1 Mon Sep 17 00:00:00 2001 +From: Russell King +Date: Sat, 9 Jul 2016 10:58:16 +0100 +Subject: pci: mvebu: time out reset on link up + +If the port reports that the link is up while we are resetting, there's +little point in waiting for the full duration. + +Signed-off-by: Russell King +--- + drivers/pci/controller/pci-mvebu.c | 20 ++++++++++++++------ + 1 file changed, 14 insertions(+), 6 deletions(-) + +--- a/drivers/pci/controller/pci-mvebu.c ++++ b/drivers/pci/controller/pci-mvebu.c +@@ -1023,6 +1023,7 @@ static int mvebu_pcie_powerup(struct mve + + if (port->reset_gpio) { + u32 reset_udelay = PCI_PM_D3COLD_WAIT * 1000; ++ unsigned int i; + + of_property_read_u32(port->dn, "reset-delay-us", + &reset_udelay); +@@ -1030,7 +1031,13 @@ static int mvebu_pcie_powerup(struct mve + udelay(100); + + gpiod_set_value_cansleep(port->reset_gpio, 0); +- msleep(reset_udelay / 1000); ++ for (i = 0; i < reset_udelay; i += 1000) { ++ if (mvebu_pcie_link_up(port)) ++ break; ++ msleep(1); ++ } ++ ++ printk("%s: reset completed in %dus\n", port->name, i); + } + + return 0; +@@ -1190,15 +1197,16 @@ static int mvebu_pcie_probe(struct platf + if (!child) + continue; + +- ret = mvebu_pcie_powerup(port); +- if (ret < 0) +- continue; +- + port->base = mvebu_pcie_map_registers(pdev, child, port); + if (IS_ERR(port->base)) { + dev_err(dev, "%s: cannot map registers\n", port->name); + port->base = NULL; +- mvebu_pcie_powerdown(port); ++ continue; ++ } ++ ++ ret = mvebu_pcie_powerup(port); ++ if (ret < 0) { ++ port->base = NULL; + continue; + } + diff --git a/target/linux/mvebu/patches-6.1/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch b/target/linux/mvebu/patches-6.1/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch new file mode 100644 index 00000000000..3446086cadf --- /dev/null +++ b/target/linux/mvebu/patches-6.1/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch @@ -0,0 +1,218 @@ +From aa4a0ccc41997f2da172165c92803abace43bd1c Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:32 +0000 +Subject: [PATCH 1/7] dt-bindings: Add IEI vendor prefix and IEI WT61P803 + PUZZLE driver bindings + +Add the IEI WT61P803 PUZZLE Device Tree bindings for MFD, HWMON and LED +drivers. A new vendor prefix is also added accordingly for +IEI Integration Corp. + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Cc: Luka Perkov +Cc: Robert Marko +--- + .../hwmon/iei,wt61p803-puzzle-hwmon.yaml | 53 ++++++++++++ + .../leds/iei,wt61p803-puzzle-leds.yaml | 39 +++++++++ + .../bindings/mfd/iei,wt61p803-puzzle.yaml | 82 +++++++++++++++++++ + .../devicetree/bindings/vendor-prefixes.yaml | 2 + + 4 files changed, 176 insertions(+) + create mode 100644 Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml + create mode 100644 Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml + create mode 100644 Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml + +--- /dev/null ++++ b/Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml +@@ -0,0 +1,53 @@ ++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/hwmon/iei,wt61p803-puzzle-hwmon.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: IEI WT61P803 PUZZLE MCU HWMON module from IEI Integration Corp. ++ ++maintainers: ++ - Luka Kovacic ++ ++description: | ++ This module is a part of the IEI WT61P803 PUZZLE MFD device. For more details ++ see Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml. ++ ++ The HWMON module is a sub-node of the MCU node in the Device Tree. ++ ++properties: ++ compatible: ++ const: iei,wt61p803-puzzle-hwmon ++ ++ "#address-cells": ++ const: 1 ++ ++ "#size-cells": ++ const: 0 ++ ++patternProperties: ++ "^fan-group@[0-1]$": ++ type: object ++ properties: ++ reg: ++ minimum: 0 ++ maximum: 1 ++ description: ++ Fan group ID ++ ++ cooling-levels: ++ minItems: 1 ++ maxItems: 255 ++ description: ++ Cooling levels for the fans (PWM value mapping) ++ description: | ++ Properties for each fan group. ++ required: ++ - reg ++ ++required: ++ - compatible ++ - "#address-cells" ++ - "#size-cells" ++ ++additionalProperties: false +--- /dev/null ++++ b/Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml +@@ -0,0 +1,39 @@ ++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/leds/iei,wt61p803-puzzle-leds.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: IEI WT61P803 PUZZLE MCU LED module from IEI Integration Corp. ++ ++maintainers: ++ - Luka Kovacic ++ ++description: | ++ This module is a part of the IEI WT61P803 PUZZLE MFD device. For more details ++ see Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml. ++ ++ The LED module is a sub-node of the MCU node in the Device Tree. ++ ++properties: ++ compatible: ++ const: iei,wt61p803-puzzle-leds ++ ++ "#address-cells": ++ const: 1 ++ ++ "#size-cells": ++ const: 0 ++ ++ led@0: ++ type: object ++ $ref: common.yaml ++ description: | ++ Properties for a single LED. ++ ++required: ++ - compatible ++ - "#address-cells" ++ - "#size-cells" ++ ++additionalProperties: false +--- /dev/null ++++ b/Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml +@@ -0,0 +1,82 @@ ++# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/mfd/iei,wt61p803-puzzle.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: IEI WT61P803 PUZZLE MCU from IEI Integration Corp. ++ ++maintainers: ++ - Luka Kovacic ++ ++description: | ++ IEI WT61P803 PUZZLE MCU is embedded in some IEI Puzzle series boards. ++ It's used for controlling system power states, fans, LEDs and temperature ++ sensors. ++ ++ For Device Tree bindings of other sub-modules (HWMON, LEDs) refer to the ++ binding documents under the respective subsystem directories. ++ ++properties: ++ compatible: ++ const: iei,wt61p803-puzzle ++ ++ current-speed: ++ description: ++ Serial bus speed in bps ++ maxItems: 1 ++ ++ enable-beep: true ++ ++ hwmon: ++ $ref: /schemas/hwmon/iei,wt61p803-puzzle-hwmon.yaml ++ ++ leds: ++ $ref: /schemas/leds/iei,wt61p803-puzzle-leds.yaml ++ ++required: ++ - compatible ++ - current-speed ++ ++additionalProperties: false ++ ++examples: ++ - | ++ #include ++ serial { ++ mcu { ++ compatible = "iei,wt61p803-puzzle"; ++ current-speed = <115200>; ++ enable-beep; ++ ++ leds { ++ compatible = "iei,wt61p803-puzzle-leds"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ led@0 { ++ reg = <0>; ++ function = LED_FUNCTION_POWER; ++ color = ; ++ }; ++ }; ++ ++ hwmon { ++ compatible = "iei,wt61p803-puzzle-hwmon"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ fan-group@0 { ++ #cooling-cells = <2>; ++ reg = <0x00>; ++ cooling-levels = <64 102 170 230 250>; ++ }; ++ ++ fan-group@1 { ++ #cooling-cells = <2>; ++ reg = <0x01>; ++ cooling-levels = <64 102 170 230 250>; ++ }; ++ }; ++ }; ++ }; +--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml ++++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml +@@ -519,6 +519,8 @@ patternProperties: + description: IC Plus Corp. + "^idt,.*": + description: Integrated Device Technologies, Inc. ++ "^iei,.*": ++ description: IEI Integration Corp. + "^ifi,.*": + description: Ingenieurburo Fur Ic-Technologie (I/F/I) + "^ilitek,.*": diff --git a/target/linux/mvebu/patches-6.1/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch b/target/linux/mvebu/patches-6.1/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch new file mode 100644 index 00000000000..0e546b426ed --- /dev/null +++ b/target/linux/mvebu/patches-6.1/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch @@ -0,0 +1,1034 @@ +From 692cfa85272dd12995b427c0a7a585ced5d54f32 Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:33 +0000 +Subject: [PATCH 2/7] drivers: mfd: Add a driver for IEI WT61P803 PUZZLE MCU + +Add a driver for the IEI WT61P803 PUZZLE microcontroller, used in some +IEI Puzzle series devices. The microcontroller controls system power, +temperature sensors, fans and LEDs. + +This driver implements the core functionality for device communication +over the system serial (serdev bus). It handles MCU messages and the +internal MCU properties. Some properties can be managed over sysfs. + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Cc: Luka Perkov +Cc: Robert Marko +--- + drivers/mfd/Kconfig | 8 + + drivers/mfd/Makefile | 1 + + drivers/mfd/iei-wt61p803-puzzle.c | 908 ++++++++++++++++++++++++ + include/linux/mfd/iei-wt61p803-puzzle.h | 66 ++ + 4 files changed, 983 insertions(+) + create mode 100644 drivers/mfd/iei-wt61p803-puzzle.c + create mode 100644 include/linux/mfd/iei-wt61p803-puzzle.h + +--- a/drivers/mfd/Kconfig ++++ b/drivers/mfd/Kconfig +@@ -2189,6 +2189,15 @@ config SGI_MFD_IOC3 + If you have an SGI Origin, Octane, or a PCI IOC3 card, + then say Y. Otherwise say N. + ++config MFD_IEI_WT61P803_PUZZLE ++ tristate "IEI WT61P803 PUZZLE MCU driver" ++ depends on SERIAL_DEV_BUS ++ select MFD_CORE ++ help ++ IEI WT61P803 PUZZLE is a system power management microcontroller ++ used for fan control, temperature sensor reading, LED control ++ and system identification. ++ + config MFD_INTEL_M10_BMC + tristate "Intel MAX 10 Board Management Controller" + depends on SPI_MASTER +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -237,6 +237,7 @@ obj-$(CONFIG_MFD_DLN2) += dln2.o + obj-$(CONFIG_MFD_RT4831) += rt4831.o + obj-$(CONFIG_MFD_RT5033) += rt5033.o + obj-$(CONFIG_MFD_SKY81452) += sky81452.o ++obj-$(CONFIG_MFD_IEI_WT61P803_PUZZLE) += iei-wt61p803-puzzle.o + + intel-soc-pmic-objs := intel_soc_pmic_core.o intel_soc_pmic_crc.o + obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o +--- /dev/null ++++ b/drivers/mfd/iei-wt61p803-puzzle.c +@@ -0,0 +1,908 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* IEI WT61P803 PUZZLE MCU Driver ++ * System management microcontroller for fan control, temperature sensor reading, ++ * LED control and system identification on IEI Puzzle series ARM-based appliances. ++ * ++ * Copyright (C) 2020 Sartura Ltd. ++ * Author: Luka Kovacic ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* start, payload and XOR checksum at end */ ++#define IEI_WT61P803_PUZZLE_MAX_COMMAND_LENGTH (1 + 20 + 1) ++#define IEI_WT61P803_PUZZLE_RESP_BUF_SIZE 512 ++ ++#define IEI_WT61P803_PUZZLE_MAC_LENGTH 17 ++#define IEI_WT61P803_PUZZLE_SN_LENGTH 36 ++#define IEI_WT61P803_PUZZLE_VERSION_LENGTH 6 ++#define IEI_WT61P803_PUZZLE_BUILD_INFO_LENGTH 16 ++#define IEI_WT61P803_PUZZLE_PROTOCOL_VERSION_LENGTH 8 ++#define IEI_WT61P803_PUZZLE_NB_MAC 8 ++ ++/* Use HZ as a timeout value throughout the driver */ ++#define IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT HZ ++ ++enum iei_wt61p803_puzzle_attribute_type { ++ IEI_WT61P803_PUZZLE_VERSION, ++ IEI_WT61P803_PUZZLE_BUILD_INFO, ++ IEI_WT61P803_PUZZLE_BOOTLOADER_MODE, ++ IEI_WT61P803_PUZZLE_PROTOCOL_VERSION, ++ IEI_WT61P803_PUZZLE_SERIAL_NUMBER, ++ IEI_WT61P803_PUZZLE_MAC_ADDRESS, ++ IEI_WT61P803_PUZZLE_AC_RECOVERY_STATUS, ++ IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY, ++ IEI_WT61P803_PUZZLE_POWER_STATUS, ++}; ++ ++struct iei_wt61p803_puzzle_device_attribute { ++ struct device_attribute dev_attr; ++ enum iei_wt61p803_puzzle_attribute_type type; ++ u8 index; ++}; ++ ++/** ++ * struct iei_wt61p803_puzzle_mcu_status - MCU flags state ++ * @ac_recovery_status_flag: AC Recovery Status Flag ++ * @power_loss_recovery: System recovery after power loss ++ * @power_status: System Power-on Method ++ */ ++struct iei_wt61p803_puzzle_mcu_status { ++ u8 ac_recovery_status_flag; ++ u8 power_loss_recovery; ++ u8 power_status; ++}; ++ ++/** ++ * struct iei_wt61p803_puzzle_reply - MCU reply ++ * @size: Size of the MCU reply ++ * @data: Full MCU reply buffer ++ * @state: Current state of the packet ++ * @received: Was the response fullfilled ++ */ ++struct iei_wt61p803_puzzle_reply { ++ size_t size; ++ unsigned char data[IEI_WT61P803_PUZZLE_RESP_BUF_SIZE]; ++ struct completion received; ++}; ++ ++/** ++ * struct iei_wt61p803_puzzle_mcu_version - MCU version status ++ * @version: Primary firmware version ++ * @build_info: Build date and time ++ * @bootloader_mode: Status of the MCU operation ++ * @protocol_version: MCU communication protocol version ++ * @serial_number: Device factory serial number ++ * @mac_address: Device factory MAC addresses ++ * ++ * Last element of arrays is reserved for '\0'. ++ */ ++struct iei_wt61p803_puzzle_mcu_version { ++ char version[IEI_WT61P803_PUZZLE_VERSION_LENGTH + 1]; ++ char build_info[IEI_WT61P803_PUZZLE_BUILD_INFO_LENGTH + 1]; ++ bool bootloader_mode; ++ char protocol_version[IEI_WT61P803_PUZZLE_PROTOCOL_VERSION_LENGTH + 1]; ++ char serial_number[IEI_WT61P803_PUZZLE_SN_LENGTH + 1]; ++ char mac_address[IEI_WT61P803_PUZZLE_NB_MAC][IEI_WT61P803_PUZZLE_MAC_LENGTH + 1]; ++}; ++ ++/** ++ * struct iei_wt61p803_puzzle - IEI WT61P803 PUZZLE MCU Driver ++ * @serdev: Pointer to underlying serdev device ++ * @dev: Pointer to underlying dev device ++ * @reply_lock: Reply mutex lock ++ * @reply: Pointer to the iei_wt61p803_puzzle_reply struct ++ * @version: MCU version related data ++ * @status: MCU status related data ++ * @response_buffer Command response buffer allocation ++ * @lock General member mutex lock ++ */ ++struct iei_wt61p803_puzzle { ++ struct serdev_device *serdev; ++ struct device *dev; ++ struct mutex reply_lock; /* lock to prevent multiple firmware calls */ ++ struct iei_wt61p803_puzzle_reply *reply; ++ struct iei_wt61p803_puzzle_mcu_version version; ++ struct iei_wt61p803_puzzle_mcu_status status; ++ unsigned char response_buffer[IEI_WT61P803_PUZZLE_BUF_SIZE]; ++ struct mutex lock; /* lock to protect response buffer */ ++}; ++ ++static unsigned char iei_wt61p803_puzzle_checksum(unsigned char *buf, size_t len) ++{ ++ unsigned char checksum = 0; ++ size_t i; ++ ++ for (i = 0; i < len; i++) ++ checksum ^= buf[i]; ++ return checksum; ++} ++ ++static int iei_wt61p803_puzzle_process_resp(struct iei_wt61p803_puzzle *mcu, ++ const unsigned char *raw_resp_data, size_t size) ++{ ++ unsigned char checksum; ++ ++ /* Check the incoming frame header */ ++ if (!(raw_resp_data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START || ++ raw_resp_data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER || ++ (raw_resp_data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM && ++ raw_resp_data[1] == IEI_WT61P803_PUZZLE_CMD_EEPROM_READ))) { ++ if (mcu->reply->size + size >= sizeof(mcu->reply->data)) ++ return -EIO; ++ ++ /* Append the frame to existing data */ ++ memcpy(mcu->reply->data + mcu->reply->size, raw_resp_data, size); ++ mcu->reply->size += size; ++ } else { ++ if (size >= sizeof(mcu->reply->data)) ++ return -EIO; ++ ++ /* Start processing a new frame */ ++ memcpy(mcu->reply->data, raw_resp_data, size); ++ mcu->reply->size = size; ++ } ++ ++ checksum = iei_wt61p803_puzzle_checksum(mcu->reply->data, mcu->reply->size - 1); ++ if (checksum != mcu->reply->data[mcu->reply->size - 1]) { ++ /* The checksum isn't matched yet, wait for new frames */ ++ return size; ++ } ++ ++ /* Received all the data */ ++ complete(&mcu->reply->received); ++ ++ return size; ++} ++ ++static int iei_wt61p803_puzzle_recv_buf(struct serdev_device *serdev, ++ const unsigned char *data, size_t size) ++{ ++ struct iei_wt61p803_puzzle *mcu = serdev_device_get_drvdata(serdev); ++ int ret; ++ ++ ret = iei_wt61p803_puzzle_process_resp(mcu, data, size); ++ /* Return the number of processed bytes if function returns error, ++ * discard the remaining incoming data, since the frame this data ++ * belongs to is broken anyway ++ */ ++ if (ret < 0) ++ return size; ++ ++ return ret; ++} ++ ++static const struct serdev_device_ops iei_wt61p803_puzzle_serdev_device_ops = { ++ .receive_buf = iei_wt61p803_puzzle_recv_buf, ++ .write_wakeup = serdev_device_write_wakeup, ++}; ++ ++/** ++ * iei_wt61p803_puzzle_write_command_watchdog() - Watchdog of the normal cmd ++ * @mcu: Pointer to the iei_wt61p803_puzzle core MFD struct ++ * @cmd: Pointer to the char array to send (size should be content + 1 (xor)) ++ * @size: Size of the cmd char array ++ * @reply_data: Pointer to the reply/response data array (should be allocated) ++ * @reply_size: Pointer to size_t (size of reply_data) ++ * @retry_count: Number of times to retry sending the command to the MCU ++ */ ++int iei_wt61p803_puzzle_write_command_watchdog(struct iei_wt61p803_puzzle *mcu, ++ unsigned char *cmd, size_t size, ++ unsigned char *reply_data, ++ size_t *reply_size, int retry_count) ++{ ++ struct device *dev = &mcu->serdev->dev; ++ int ret, i; ++ ++ for (i = 0; i < retry_count; i++) { ++ ret = iei_wt61p803_puzzle_write_command(mcu, cmd, size, ++ reply_data, reply_size); ++ if (ret != -ETIMEDOUT) ++ return ret; ++ } ++ ++ dev_err(dev, "Command response timed out. Retries: %d\n", retry_count); ++ ++ return -ETIMEDOUT; ++} ++EXPORT_SYMBOL_GPL(iei_wt61p803_puzzle_write_command_watchdog); ++ ++/** ++ * iei_wt61p803_puzzle_write_command() - Send a structured command to the MCU ++ * @mcu: Pointer to the iei_wt61p803_puzzle core MFD struct ++ * @cmd: Pointer to the char array to send (size should be content + 1 (xor)) ++ * @size: Size of the cmd char array ++ * @reply_data: Pointer to the reply/response data array (should be allocated) ++ * ++ * Sends a structured command to the MCU. ++ */ ++int iei_wt61p803_puzzle_write_command(struct iei_wt61p803_puzzle *mcu, ++ unsigned char *cmd, size_t size, ++ unsigned char *reply_data, ++ size_t *reply_size) ++{ ++ struct device *dev = &mcu->serdev->dev; ++ int ret; ++ ++ if (size <= 1 || size > IEI_WT61P803_PUZZLE_MAX_COMMAND_LENGTH) ++ return -EINVAL; ++ ++ mutex_lock(&mcu->reply_lock); ++ ++ cmd[size - 1] = iei_wt61p803_puzzle_checksum(cmd, size - 1); ++ ++ /* Initialize reply struct */ ++ reinit_completion(&mcu->reply->received); ++ mcu->reply->size = 0; ++ usleep_range(2000, 10000); ++ serdev_device_write_flush(mcu->serdev); ++ ret = serdev_device_write_buf(mcu->serdev, cmd, size); ++ if (ret < 0) ++ goto exit; ++ ++ serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); ++ ret = wait_for_completion_timeout(&mcu->reply->received, ++ IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); ++ if (ret == 0) { ++ dev_err(dev, "Command reply receive timeout\n"); ++ ret = -ETIMEDOUT; ++ goto exit; ++ } ++ ++ *reply_size = mcu->reply->size; ++ /* Copy the received data, as it will not be available after a new frame is received */ ++ memcpy(reply_data, mcu->reply->data, mcu->reply->size); ++ ret = 0; ++exit: ++ mutex_unlock(&mcu->reply_lock); ++ return ret; ++} ++EXPORT_SYMBOL_GPL(iei_wt61p803_puzzle_write_command); ++ ++static int iei_wt61p803_puzzle_buzzer(struct iei_wt61p803_puzzle *mcu, bool long_beep) ++{ ++ unsigned char *resp_buf = mcu->response_buffer; ++ unsigned char buzzer_cmd[4] = {}; ++ size_t reply_size; ++ int ret; ++ ++ buzzer_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ buzzer_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FUNCTION_SINGLE; ++ buzzer_cmd[2] = long_beep ? '3' : '2'; /* Buzzer 1.5 / 0.5 second beep */ ++ ++ mutex_lock(&mcu->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu, buzzer_cmd, sizeof(buzzer_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto exit; ++ ++ if (reply_size != 3) { ++ ret = -EIO; ++ goto exit; ++ } ++ ++ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && ++ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) { ++ ret = -EPROTO; ++ goto exit; ++ } ++exit: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_get_version(struct iei_wt61p803_puzzle *mcu) ++{ ++ unsigned char version_cmd[3] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER, ++ IEI_WT61P803_PUZZLE_CMD_OTHER_VERSION, ++ }; ++ unsigned char build_info_cmd[3] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER, ++ IEI_WT61P803_PUZZLE_CMD_OTHER_BUILD, ++ }; ++ unsigned char bootloader_mode_cmd[3] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER, ++ IEI_WT61P803_PUZZLE_CMD_OTHER_BOOTLOADER_MODE, ++ }; ++ unsigned char protocol_version_cmd[3] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER, ++ IEI_WT61P803_PUZZLE_CMD_OTHER_PROTOCOL_VERSION, ++ }; ++ unsigned char *rb = mcu->response_buffer; ++ size_t reply_size; ++ int ret; ++ ++ mutex_lock(&mcu->lock); ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu, version_cmd, sizeof(version_cmd), ++ rb, &reply_size); ++ if (ret) ++ goto err; ++ if (reply_size < 7) { ++ ret = -EIO; ++ goto err; ++ } ++ sprintf(mcu->version.version, "v%c.%.3s", rb[2], &rb[3]); ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu, build_info_cmd, ++ sizeof(build_info_cmd), rb, ++ &reply_size); ++ if (ret) ++ goto err; ++ if (reply_size < 15) { ++ ret = -EIO; ++ goto err; ++ } ++ sprintf(mcu->version.build_info, "%c%c/%c%c/%.4s %c%c:%c%c", ++ rb[8], rb[9], rb[6], rb[7], &rb[2], rb[10], rb[11], ++ rb[12], rb[13]); ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu, bootloader_mode_cmd, ++ sizeof(bootloader_mode_cmd), rb, ++ &reply_size); ++ if (ret) ++ goto err; ++ if (reply_size < 4) { ++ ret = -EIO; ++ goto err; ++ } ++ if (rb[2] == IEI_WT61P803_PUZZLE_CMD_OTHER_MODE_APPS) ++ mcu->version.bootloader_mode = false; ++ else if (rb[2] == IEI_WT61P803_PUZZLE_CMD_OTHER_MODE_BOOTLOADER) ++ mcu->version.bootloader_mode = true; ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu, protocol_version_cmd, ++ sizeof(protocol_version_cmd), rb, ++ &reply_size); ++ if (ret) ++ goto err; ++ if (reply_size < 9) { ++ ret = -EIO; ++ goto err; ++ } ++ sprintf(mcu->version.protocol_version, "v%c.%c%c%c%c%c", ++ rb[7], rb[6], rb[5], rb[4], rb[3], rb[2]); ++err: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_get_mcu_status(struct iei_wt61p803_puzzle *mcu) ++{ ++ unsigned char mcu_status_cmd[5] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_START, ++ IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER, ++ IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS, ++ IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS, ++ }; ++ unsigned char *resp_buf = mcu->response_buffer; ++ size_t reply_size; ++ int ret; ++ ++ mutex_lock(&mcu->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu, mcu_status_cmd, sizeof(mcu_status_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto exit; ++ if (reply_size < 20) { ++ ret = -EIO; ++ goto exit; ++ } ++ ++ /* Response format: ++ * (IDX RESPONSE) ++ * 0 @ ++ * 1 O ++ * 2 S ++ * 3 S ++ * ... ++ * 5 AC Recovery Status Flag ++ * ... ++ * 10 Power Loss Recovery ++ * ... ++ * 19 Power Status (system power on method) ++ * 20 XOR checksum ++ */ ++ if (resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER && ++ resp_buf[2] == IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS && ++ resp_buf[3] == IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS) { ++ mcu->status.ac_recovery_status_flag = resp_buf[5]; ++ mcu->status.power_loss_recovery = resp_buf[10]; ++ mcu->status.power_status = resp_buf[19]; ++ } ++exit: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_get_serial_number(struct iei_wt61p803_puzzle *mcu) ++{ ++ unsigned char *resp_buf = mcu->response_buffer; ++ unsigned char serial_number_cmd[5] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM, ++ IEI_WT61P803_PUZZLE_CMD_EEPROM_READ, ++ 0x00, /* EEPROM read address */ ++ 0x24, /* Data length */ ++ }; ++ size_t reply_size; ++ int ret; ++ ++ mutex_lock(&mcu->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu, serial_number_cmd, ++ sizeof(serial_number_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto err; ++ ++ if (reply_size < IEI_WT61P803_PUZZLE_SN_LENGTH + 4) { ++ ret = -EIO; ++ goto err; ++ } ++ ++ sprintf(mcu->version.serial_number, "%.*s", ++ IEI_WT61P803_PUZZLE_SN_LENGTH, resp_buf + 4); ++err: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_write_serial_number(struct iei_wt61p803_puzzle *mcu, ++ unsigned char serial_number[36]) ++{ ++ unsigned char *resp_buf = mcu->response_buffer; ++ unsigned char serial_number_header[4] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM, ++ IEI_WT61P803_PUZZLE_CMD_EEPROM_WRITE, ++ 0x00, /* EEPROM write address */ ++ 0xC, /* Data length */ ++ }; ++ unsigned char serial_number_cmd[4 + 12 + 1]; /* header, serial number, XOR checksum */ ++ int ret, sn_counter; ++ size_t reply_size; ++ ++ /* The MCU can only handle 22 byte messages, send the S/N in 12 byte chunks */ ++ mutex_lock(&mcu->lock); ++ for (sn_counter = 0; sn_counter < 3; sn_counter++) { ++ serial_number_header[2] = 0x0 + 0xC * sn_counter; ++ ++ memcpy(serial_number_cmd, serial_number_header, sizeof(serial_number_header)); ++ memcpy(serial_number_cmd + sizeof(serial_number_header), ++ serial_number + 0xC * sn_counter, 0xC); ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu, serial_number_cmd, ++ sizeof(serial_number_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto err; ++ if (reply_size != 3) { ++ ret = -EIO; ++ goto err; ++ } ++ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && ++ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) { ++ ret = -EPROTO; ++ goto err; ++ } ++ } ++ ++ sprintf(mcu->version.serial_number, "%.*s", ++ IEI_WT61P803_PUZZLE_SN_LENGTH, serial_number); ++err: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_get_mac_address(struct iei_wt61p803_puzzle *mcu, int index) ++{ ++ unsigned char *resp_buf = mcu->response_buffer; ++ unsigned char mac_address_cmd[5] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM, ++ IEI_WT61P803_PUZZLE_CMD_EEPROM_READ, ++ 0x00, /* EEPROM read address */ ++ 0x11, /* Data length */ ++ }; ++ size_t reply_size; ++ int ret; ++ ++ mutex_lock(&mcu->lock); ++ mac_address_cmd[2] = 0x24 + 0x11 * index; ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu, mac_address_cmd, ++ sizeof(mac_address_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto err; ++ ++ if (reply_size < 22) { ++ ret = -EIO; ++ goto err; ++ } ++ ++ sprintf(mcu->version.mac_address[index], "%.*s", ++ IEI_WT61P803_PUZZLE_MAC_LENGTH, resp_buf + 4); ++err: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int ++iei_wt61p803_puzzle_write_mac_address(struct iei_wt61p803_puzzle *mcu, ++ unsigned char mac_address[IEI_WT61P803_PUZZLE_MAC_LENGTH], ++ int mac_address_idx) ++{ ++ unsigned char mac_address_cmd[4 + IEI_WT61P803_PUZZLE_MAC_LENGTH + 1]; ++ unsigned char *resp_buf = mcu->response_buffer; ++ unsigned char mac_address_header[4] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM, ++ IEI_WT61P803_PUZZLE_CMD_EEPROM_WRITE, ++ 0x00, /* EEPROM write address */ ++ 0x11, /* Data length */ ++ }; ++ size_t reply_size; ++ int ret; ++ ++ if (mac_address_idx < 0 || mac_address_idx >= IEI_WT61P803_PUZZLE_NB_MAC) ++ return -EINVAL; ++ ++ mac_address_header[2] = 0x24 + 0x11 * mac_address_idx; ++ ++ /* Concat mac_address_header, mac_address to mac_address_cmd */ ++ memcpy(mac_address_cmd, mac_address_header, sizeof(mac_address_header)); ++ memcpy(mac_address_cmd + sizeof(mac_address_header), mac_address, ++ IEI_WT61P803_PUZZLE_MAC_LENGTH); ++ ++ mutex_lock(&mcu->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu, mac_address_cmd, ++ sizeof(mac_address_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto err; ++ if (reply_size != 3) { ++ ret = -EIO; ++ goto err; ++ } ++ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && ++ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) { ++ ret = -EPROTO; ++ goto err; ++ } ++ ++ sprintf(mcu->version.mac_address[mac_address_idx], "%.*s", ++ IEI_WT61P803_PUZZLE_MAC_LENGTH, mac_address); ++err: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_write_power_loss_recovery(struct iei_wt61p803_puzzle *mcu, ++ int power_loss_recovery_action) ++{ ++ unsigned char *resp_buf = mcu->response_buffer; ++ unsigned char power_loss_recovery_cmd[5] = {}; ++ size_t reply_size; ++ int ret; ++ ++ if (power_loss_recovery_action < 0 || power_loss_recovery_action > 4) ++ return -EINVAL; ++ ++ power_loss_recovery_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ power_loss_recovery_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER; ++ power_loss_recovery_cmd[2] = IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_POWER_LOSS; ++ power_loss_recovery_cmd[3] = hex_asc[power_loss_recovery_action]; ++ ++ mutex_lock(&mcu->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu, power_loss_recovery_cmd, ++ sizeof(power_loss_recovery_cmd), ++ resp_buf, &reply_size); ++ if (ret) ++ goto exit; ++ mcu->status.power_loss_recovery = power_loss_recovery_action; ++exit: ++ mutex_unlock(&mcu->lock); ++ return ret; ++} ++ ++#define to_puzzle_dev_attr(_attr) \ ++ container_of(_attr, struct iei_wt61p803_puzzle_device_attribute, dev_attr) ++ ++static ssize_t show_output(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev); ++ struct iei_wt61p803_puzzle_device_attribute *pattr = to_puzzle_dev_attr(attr); ++ int ret; ++ ++ switch (pattr->type) { ++ case IEI_WT61P803_PUZZLE_VERSION: ++ return scnprintf(buf, PAGE_SIZE, "%s\n", mcu->version.version); ++ case IEI_WT61P803_PUZZLE_BUILD_INFO: ++ return scnprintf(buf, PAGE_SIZE, "%s\n", mcu->version.build_info); ++ case IEI_WT61P803_PUZZLE_BOOTLOADER_MODE: ++ return scnprintf(buf, PAGE_SIZE, "%d\n", mcu->version.bootloader_mode); ++ case IEI_WT61P803_PUZZLE_PROTOCOL_VERSION: ++ return scnprintf(buf, PAGE_SIZE, "%s\n", mcu->version.protocol_version); ++ case IEI_WT61P803_PUZZLE_SERIAL_NUMBER: ++ ret = iei_wt61p803_puzzle_get_serial_number(mcu); ++ if (!ret) ++ ret = scnprintf(buf, PAGE_SIZE, "%s\n", mcu->version.serial_number); ++ else ++ ret = 0; ++ return ret; ++ case IEI_WT61P803_PUZZLE_MAC_ADDRESS: ++ ret = iei_wt61p803_puzzle_get_mac_address(mcu, pattr->index); ++ if (!ret) ++ ret = scnprintf(buf, PAGE_SIZE, "%s\n", ++ mcu->version.mac_address[pattr->index]); ++ else ++ ret = 0; ++ return ret; ++ case IEI_WT61P803_PUZZLE_AC_RECOVERY_STATUS: ++ case IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY: ++ case IEI_WT61P803_PUZZLE_POWER_STATUS: ++ ret = iei_wt61p803_puzzle_get_mcu_status(mcu); ++ if (ret) ++ return ret; ++ ++ mutex_lock(&mcu->lock); ++ switch (pattr->type) { ++ case IEI_WT61P803_PUZZLE_AC_RECOVERY_STATUS: ++ ret = scnprintf(buf, PAGE_SIZE, "%x\n", ++ mcu->status.ac_recovery_status_flag); ++ break; ++ case IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY: ++ ret = scnprintf(buf, PAGE_SIZE, "%x\n", mcu->status.power_loss_recovery); ++ break; ++ case IEI_WT61P803_PUZZLE_POWER_STATUS: ++ ret = scnprintf(buf, PAGE_SIZE, "%x\n", mcu->status.power_status); ++ break; ++ default: ++ ret = 0; ++ break; ++ } ++ mutex_unlock(&mcu->lock); ++ return ret; ++ default: ++ return 0; ++ } ++ ++ return 0; ++} ++ ++static ssize_t store_output(struct device *dev, ++ struct device_attribute *attr, ++ const char *buf, size_t len) ++{ ++ unsigned char serial_number[IEI_WT61P803_PUZZLE_SN_LENGTH]; ++ unsigned char mac_address[IEI_WT61P803_PUZZLE_MAC_LENGTH]; ++ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev); ++ struct iei_wt61p803_puzzle_device_attribute *pattr = to_puzzle_dev_attr(attr); ++ int power_loss_recovery_action = 0; ++ int ret; ++ ++ switch (pattr->type) { ++ case IEI_WT61P803_PUZZLE_SERIAL_NUMBER: ++ if (len != (size_t)(IEI_WT61P803_PUZZLE_SN_LENGTH + 1)) ++ return -EINVAL; ++ memcpy(serial_number, buf, sizeof(serial_number)); ++ ret = iei_wt61p803_puzzle_write_serial_number(mcu, serial_number); ++ if (ret) ++ return ret; ++ return len; ++ case IEI_WT61P803_PUZZLE_MAC_ADDRESS: ++ if (len != (size_t)(IEI_WT61P803_PUZZLE_MAC_LENGTH + 1)) ++ return -EINVAL; ++ ++ memcpy(mac_address, buf, sizeof(mac_address)); ++ ++ if (strlen(attr->attr.name) != 13) ++ return -EIO; ++ ++ ret = iei_wt61p803_puzzle_write_mac_address(mcu, mac_address, pattr->index); ++ if (ret) ++ return ret; ++ return len; ++ case IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY: ++ ret = kstrtoint(buf, 10, &power_loss_recovery_action); ++ if (ret) ++ return ret; ++ ret = iei_wt61p803_puzzle_write_power_loss_recovery(mcu, ++ power_loss_recovery_action); ++ if (ret) ++ return ret; ++ return len; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++#define IEI_WT61P803_PUZZLE_ATTR(_name, _mode, _show, _store, _type, _index) \ ++ struct iei_wt61p803_puzzle_device_attribute dev_attr_##_name = \ ++ { .dev_attr = __ATTR(_name, _mode, _show, _store), \ ++ .type = _type, \ ++ .index = _index } ++ ++#define IEI_WT61P803_PUZZLE_ATTR_RO(_name, _type, _id) \ ++ IEI_WT61P803_PUZZLE_ATTR(_name, 0444, show_output, NULL, _type, _id) ++ ++#define IEI_WT61P803_PUZZLE_ATTR_RW(_name, _type, _id) \ ++ IEI_WT61P803_PUZZLE_ATTR(_name, 0644, show_output, store_output, _type, _id) ++ ++static IEI_WT61P803_PUZZLE_ATTR_RO(version, IEI_WT61P803_PUZZLE_VERSION, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RO(build_info, IEI_WT61P803_PUZZLE_BUILD_INFO, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RO(bootloader_mode, IEI_WT61P803_PUZZLE_BOOTLOADER_MODE, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RO(protocol_version, IEI_WT61P803_PUZZLE_PROTOCOL_VERSION, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RW(serial_number, IEI_WT61P803_PUZZLE_SERIAL_NUMBER, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_0, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_1, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 1); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_2, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 2); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_3, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 3); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_4, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 4); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_5, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 5); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_6, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 6); ++static IEI_WT61P803_PUZZLE_ATTR_RW(mac_address_7, IEI_WT61P803_PUZZLE_MAC_ADDRESS, 7); ++static IEI_WT61P803_PUZZLE_ATTR_RO(ac_recovery_status, IEI_WT61P803_PUZZLE_AC_RECOVERY_STATUS, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RW(power_loss_recovery, IEI_WT61P803_PUZZLE_POWER_LOSS_RECOVERY, 0); ++static IEI_WT61P803_PUZZLE_ATTR_RO(power_status, IEI_WT61P803_PUZZLE_POWER_STATUS, 0); ++ ++static struct attribute *iei_wt61p803_puzzle_attrs[] = { ++ &dev_attr_version.dev_attr.attr, ++ &dev_attr_build_info.dev_attr.attr, ++ &dev_attr_bootloader_mode.dev_attr.attr, ++ &dev_attr_protocol_version.dev_attr.attr, ++ &dev_attr_serial_number.dev_attr.attr, ++ &dev_attr_mac_address_0.dev_attr.attr, ++ &dev_attr_mac_address_1.dev_attr.attr, ++ &dev_attr_mac_address_2.dev_attr.attr, ++ &dev_attr_mac_address_3.dev_attr.attr, ++ &dev_attr_mac_address_4.dev_attr.attr, ++ &dev_attr_mac_address_5.dev_attr.attr, ++ &dev_attr_mac_address_6.dev_attr.attr, ++ &dev_attr_mac_address_7.dev_attr.attr, ++ &dev_attr_ac_recovery_status.dev_attr.attr, ++ &dev_attr_power_loss_recovery.dev_attr.attr, ++ &dev_attr_power_status.dev_attr.attr, ++ NULL ++}; ++ATTRIBUTE_GROUPS(iei_wt61p803_puzzle); ++ ++static int iei_wt61p803_puzzle_sysfs_create(struct device *dev, ++ struct iei_wt61p803_puzzle *mcu) ++{ ++ int ret; ++ ++ ret = sysfs_create_groups(&mcu->dev->kobj, iei_wt61p803_puzzle_groups); ++ if (ret) ++ mfd_remove_devices(mcu->dev); ++ ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_sysfs_remove(struct device *dev, ++ struct iei_wt61p803_puzzle *mcu) ++{ ++ /* Remove sysfs groups */ ++ sysfs_remove_groups(&mcu->dev->kobj, iei_wt61p803_puzzle_groups); ++ mfd_remove_devices(mcu->dev); ++ ++ return 0; ++} ++ ++static int iei_wt61p803_puzzle_probe(struct serdev_device *serdev) ++{ ++ struct device *dev = &serdev->dev; ++ struct iei_wt61p803_puzzle *mcu; ++ u32 baud; ++ int ret; ++ ++ /* Read the baud rate from 'current-speed', because the MCU supports different rates */ ++ if (device_property_read_u32(dev, "current-speed", &baud)) { ++ dev_err(dev, ++ "'current-speed' is not specified in device node\n"); ++ return -EINVAL; ++ } ++ dev_dbg(dev, "Driver baud rate: %d\n", baud); ++ ++ /* Allocate the memory */ ++ mcu = devm_kzalloc(dev, sizeof(*mcu), GFP_KERNEL); ++ if (!mcu) ++ return -ENOMEM; ++ ++ mcu->reply = devm_kzalloc(dev, sizeof(*mcu->reply), GFP_KERNEL); ++ if (!mcu->reply) ++ return -ENOMEM; ++ ++ /* Initialize device struct data */ ++ mcu->serdev = serdev; ++ mcu->dev = dev; ++ init_completion(&mcu->reply->received); ++ mutex_init(&mcu->reply_lock); ++ mutex_init(&mcu->lock); ++ ++ /* Setup UART interface */ ++ serdev_device_set_drvdata(serdev, mcu); ++ serdev_device_set_client_ops(serdev, &iei_wt61p803_puzzle_serdev_device_ops); ++ ret = devm_serdev_device_open(dev, serdev); ++ if (ret) ++ return ret; ++ serdev_device_set_baudrate(serdev, baud); ++ serdev_device_set_flow_control(serdev, false); ++ ret = serdev_device_set_parity(serdev, SERDEV_PARITY_NONE); ++ if (ret) { ++ dev_err(dev, "Failed to set parity\n"); ++ return ret; ++ } ++ ++ ret = iei_wt61p803_puzzle_get_version(mcu); ++ if (ret) ++ return ret; ++ ++ dev_dbg(dev, "MCU version: %s\n", mcu->version.version); ++ dev_dbg(dev, "MCU firmware build info: %s\n", mcu->version.build_info); ++ dev_dbg(dev, "MCU in bootloader mode: %s\n", ++ mcu->version.bootloader_mode ? "true" : "false"); ++ dev_dbg(dev, "MCU protocol version: %s\n", mcu->version.protocol_version); ++ ++ if (device_property_read_bool(dev, "enable-beep")) { ++ ret = iei_wt61p803_puzzle_buzzer(mcu, false); ++ if (ret) ++ return ret; ++ } ++ ++ ret = iei_wt61p803_puzzle_sysfs_create(dev, mcu); ++ if (ret) ++ return ret; ++ ++ return devm_of_platform_populate(dev); ++} ++ ++static void iei_wt61p803_puzzle_remove(struct serdev_device *serdev) ++{ ++ struct device *dev = &serdev->dev; ++ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev); ++ ++ iei_wt61p803_puzzle_sysfs_remove(dev, mcu); ++} ++ ++static const struct of_device_id iei_wt61p803_puzzle_dt_ids[] = { ++ { .compatible = "iei,wt61p803-puzzle" }, ++ { } ++}; ++ ++MODULE_DEVICE_TABLE(of, iei_wt61p803_puzzle_dt_ids); ++ ++static struct serdev_device_driver iei_wt61p803_puzzle_drv = { ++ .probe = iei_wt61p803_puzzle_probe, ++ .remove = iei_wt61p803_puzzle_remove, ++ .driver = { ++ .name = "iei-wt61p803-puzzle", ++ .of_match_table = iei_wt61p803_puzzle_dt_ids, ++ }, ++}; ++ ++module_serdev_device_driver(iei_wt61p803_puzzle_drv); ++ ++MODULE_LICENSE("GPL v2"); ++MODULE_AUTHOR("Luka Kovacic "); ++MODULE_DESCRIPTION("IEI WT61P803 PUZZLE MCU Driver"); +--- /dev/null ++++ b/include/linux/mfd/iei-wt61p803-puzzle.h +@@ -0,0 +1,66 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++/* IEI WT61P803 PUZZLE MCU Driver ++ * System management microcontroller for fan control, temperature sensor reading, ++ * LED control and system identification on IEI Puzzle series ARM-based appliances. ++ * ++ * Copyright (C) 2020 Sartura Ltd. ++ * Author: Luka Kovacic ++ */ ++ ++#ifndef _MFD_IEI_WT61P803_PUZZLE_H_ ++#define _MFD_IEI_WT61P803_PUZZLE_H_ ++ ++#define IEI_WT61P803_PUZZLE_BUF_SIZE 512 ++ ++/* Command magic numbers */ ++#define IEI_WT61P803_PUZZLE_CMD_HEADER_START 0x40 /* @ */ ++#define IEI_WT61P803_PUZZLE_CMD_HEADER_START_OTHER 0x25 /* % */ ++#define IEI_WT61P803_PUZZLE_CMD_HEADER_EEPROM 0xF7 ++ ++#define IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK 0x30 /* 0 */ ++#define IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK 0x70 ++ ++#define IEI_WT61P803_PUZZLE_CMD_EEPROM_READ 0xA1 ++#define IEI_WT61P803_PUZZLE_CMD_EEPROM_WRITE 0xA0 ++ ++#define IEI_WT61P803_PUZZLE_CMD_OTHER_VERSION 0x56 /* V */ ++#define IEI_WT61P803_PUZZLE_CMD_OTHER_BUILD 0x42 /* B */ ++#define IEI_WT61P803_PUZZLE_CMD_OTHER_BOOTLOADER_MODE 0x4D /* M */ ++#define IEI_WT61P803_PUZZLE_CMD_OTHER_MODE_BOOTLOADER 0x30 ++#define IEI_WT61P803_PUZZLE_CMD_OTHER_MODE_APPS 0x31 ++#define IEI_WT61P803_PUZZLE_CMD_OTHER_PROTOCOL_VERSION 0x50 /* P */ ++ ++#define IEI_WT61P803_PUZZLE_CMD_FUNCTION_SINGLE 0x43 /* C */ ++#define IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER 0x4F /* O */ ++#define IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_STATUS 0x53 /* S */ ++#define IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_POWER_LOSS 0x41 /* A */ ++ ++#define IEI_WT61P803_PUZZLE_CMD_LED 0x52 /* R */ ++#define IEI_WT61P803_PUZZLE_CMD_LED_POWER 0x31 /* 1 */ ++ ++#define IEI_WT61P803_PUZZLE_CMD_TEMP 0x54 /* T */ ++#define IEI_WT61P803_PUZZLE_CMD_TEMP_ALL 0x41 /* A */ ++ ++#define IEI_WT61P803_PUZZLE_CMD_FAN 0x46 /* F */ ++#define IEI_WT61P803_PUZZLE_CMD_FAN_PWM_READ 0x5A /* Z */ ++#define IEI_WT61P803_PUZZLE_CMD_FAN_PWM_WRITE 0x57 /* W */ ++#define IEI_WT61P803_PUZZLE_CMD_FAN_PWM_BASE 0x30 ++#define IEI_WT61P803_PUZZLE_CMD_FAN_RPM_BASE 0x41 /* A */ ++ ++#define IEI_WT61P803_PUZZLE_CMD_FAN_PWM(x) (IEI_WT61P803_PUZZLE_CMD_FAN_PWM_BASE + (x)) /* 0 - 1 */ ++#define IEI_WT61P803_PUZZLE_CMD_FAN_RPM(x) (IEI_WT61P803_PUZZLE_CMD_FAN_RPM_BASE + (x)) /* 0 - 5 */ ++ ++struct iei_wt61p803_puzzle_mcu_version; ++struct iei_wt61p803_puzzle_reply; ++struct iei_wt61p803_puzzle; ++ ++int iei_wt61p803_puzzle_write_command_watchdog(struct iei_wt61p803_puzzle *mcu, ++ unsigned char *cmd, size_t size, ++ unsigned char *reply_data, size_t *reply_size, ++ int retry_count); ++ ++int iei_wt61p803_puzzle_write_command(struct iei_wt61p803_puzzle *mcu, ++ unsigned char *cmd, size_t size, ++ unsigned char *reply_data, size_t *reply_size); ++ ++#endif /* _MFD_IEI_WT61P803_PUZZLE_H_ */ diff --git a/target/linux/mvebu/patches-6.1/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch b/target/linux/mvebu/patches-6.1/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch new file mode 100644 index 00000000000..023495373b8 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch @@ -0,0 +1,501 @@ +From e3310a638cd310bfd93dbbc6d2732ab6aea18dd2 Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:34 +0000 +Subject: [PATCH 3/7] drivers: hwmon: Add the IEI WT61P803 PUZZLE HWMON driver + +Add the IEI WT61P803 PUZZLE HWMON driver, that handles the fan speed +control via PWM, reading fan speed and reading on-board temperature +sensors. + +The driver registers a HWMON device and a simple thermal cooling device to +enable in-kernel fan management. + +This driver depends on the IEI WT61P803 PUZZLE MFD driver. + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Acked-by: Guenter Roeck +Cc: Luka Perkov +Cc: Robert Marko +--- + drivers/hwmon/Kconfig | 8 + + drivers/hwmon/Makefile | 1 + + drivers/hwmon/iei-wt61p803-puzzle-hwmon.c | 413 ++++++++++++++++++++++ + 3 files changed, 422 insertions(+) + create mode 100644 drivers/hwmon/iei-wt61p803-puzzle-hwmon.c + +--- a/drivers/hwmon/Kconfig ++++ b/drivers/hwmon/Kconfig +@@ -732,6 +732,14 @@ config SENSORS_IBMPOWERNV + This driver can also be built as a module. If so, the module + will be called ibmpowernv. + ++config SENSORS_IEI_WT61P803_PUZZLE_HWMON ++ tristate "IEI WT61P803 PUZZLE MFD HWMON Driver" ++ depends on MFD_IEI_WT61P803_PUZZLE ++ help ++ The IEI WT61P803 PUZZLE MFD HWMON Driver handles reading fan speed ++ and writing fan PWM values. It also supports reading on-board ++ temperature sensors. ++ + config SENSORS_IIO_HWMON + tristate "Hwmon driver that uses channels specified via iio maps" + depends on IIO +--- a/drivers/hwmon/Makefile ++++ b/drivers/hwmon/Makefile +@@ -84,6 +84,7 @@ obj-$(CONFIG_SENSORS_HIH6130) += hih6130 + obj-$(CONFIG_SENSORS_ULTRA45) += ultra45_env.o + obj-$(CONFIG_SENSORS_I5500) += i5500_temp.o + obj-$(CONFIG_SENSORS_I5K_AMB) += i5k_amb.o ++obj-$(CONFIG_SENSORS_IEI_WT61P803_PUZZLE_HWMON) += iei-wt61p803-puzzle-hwmon.o + obj-$(CONFIG_SENSORS_IBMAEM) += ibmaem.o + obj-$(CONFIG_SENSORS_IBMPEX) += ibmpex.o + obj-$(CONFIG_SENSORS_IBMPOWERNV)+= ibmpowernv.o +--- /dev/null ++++ b/drivers/hwmon/iei-wt61p803-puzzle-hwmon.c +@@ -0,0 +1,445 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* IEI WT61P803 PUZZLE MCU HWMON Driver ++ * ++ * Copyright (C) 2020 Sartura Ltd. ++ * Author: Luka Kovacic ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define IEI_WT61P803_PUZZLE_HWMON_MAX_PWM 2 ++#define IEI_WT61P803_PUZZLE_HWMON_MAX_PWM_VAL 255 ++ ++/** ++ * struct iei_wt61p803_puzzle_thermal_cooling_device - Thermal cooling device instance ++ * @mcu_hwmon: Parent driver struct pointer ++ * @tcdev: Thermal cooling device pointer ++ * @name: Thermal cooling device name ++ * @pwm_channel: Controlled PWM channel (0 or 1) ++ * @cooling_levels: Thermal cooling device cooling levels (DT) ++ * @cur_level: Current cooling level ++ * @num_levels: Number of cooling levels ++ */ ++struct iei_wt61p803_puzzle_thermal_cooling_device { ++ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon; ++ struct thermal_cooling_device *tcdev; ++ char name[THERMAL_NAME_LENGTH]; ++ int pwm_channel; ++ u32 *cooling_levels; ++ int cur_level; ++ u8 num_levels; ++}; ++ ++/** ++ * struct iei_wt61p803_puzzle_hwmon - MCU HWMON Driver ++ * @mcu: MCU struct pointer ++ * @response_buffer Global MCU response buffer ++ * @thermal_cooling_dev_present: Per-channel thermal cooling device control indicator ++ * @cdev: Per-channel thermal cooling device private structure ++ */ ++struct iei_wt61p803_puzzle_hwmon { ++ struct iei_wt61p803_puzzle *mcu; ++ unsigned char response_buffer[IEI_WT61P803_PUZZLE_BUF_SIZE]; ++ bool thermal_cooling_dev_present[IEI_WT61P803_PUZZLE_HWMON_MAX_PWM]; ++ struct iei_wt61p803_puzzle_thermal_cooling_device ++ *cdev[IEI_WT61P803_PUZZLE_HWMON_MAX_PWM]; ++ struct mutex lock; /* mutex to protect response_buffer array */ ++}; ++ ++#define raw_temp_to_milidegree_celsius(x) (((x) - 0x80) * 1000) ++static int iei_wt61p803_puzzle_read_temp_sensor(struct iei_wt61p803_puzzle_hwmon *mcu_hwmon, ++ int channel, long *value) ++{ ++ unsigned char *resp_buf = mcu_hwmon->response_buffer; ++ unsigned char temp_sensor_ntc_cmd[4] = { ++ IEI_WT61P803_PUZZLE_CMD_HEADER_START, ++ IEI_WT61P803_PUZZLE_CMD_TEMP, ++ IEI_WT61P803_PUZZLE_CMD_TEMP_ALL, ++ }; ++ size_t reply_size; ++ int ret; ++ ++ mutex_lock(&mcu_hwmon->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu_hwmon->mcu, temp_sensor_ntc_cmd, ++ sizeof(temp_sensor_ntc_cmd), resp_buf, ++ &reply_size); ++ if (ret) ++ goto exit; ++ ++ if (reply_size != 7) { ++ ret = -EIO; ++ goto exit; ++ } ++ ++ /* Check the number of NTC values */ ++ if (resp_buf[3] != '2') { ++ ret = -EIO; ++ goto exit; ++ } ++ ++ *value = raw_temp_to_milidegree_celsius(resp_buf[4 + channel]); ++exit: ++ mutex_unlock(&mcu_hwmon->lock); ++ return ret; ++} ++ ++#define raw_fan_val_to_rpm(x, y) ((((x) << 8 | (y)) / 2) * 60) ++static int iei_wt61p803_puzzle_read_fan_speed(struct iei_wt61p803_puzzle_hwmon *mcu_hwmon, ++ int channel, long *value) ++{ ++ unsigned char *resp_buf = mcu_hwmon->response_buffer; ++ unsigned char fan_speed_cmd[4] = {}; ++ size_t reply_size; ++ int ret; ++ ++ fan_speed_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ fan_speed_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FAN; ++ fan_speed_cmd[2] = IEI_WT61P803_PUZZLE_CMD_FAN_RPM(channel); ++ ++ mutex_lock(&mcu_hwmon->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu_hwmon->mcu, fan_speed_cmd, ++ sizeof(fan_speed_cmd), resp_buf, ++ &reply_size); ++ if (ret) ++ goto exit; ++ ++ if (reply_size != 7) { ++ ret = -EIO; ++ goto exit; ++ } ++ ++ *value = raw_fan_val_to_rpm(resp_buf[3], resp_buf[4]); ++exit: ++ mutex_unlock(&mcu_hwmon->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_write_pwm_channel(struct iei_wt61p803_puzzle_hwmon *mcu_hwmon, ++ int channel, long pwm_set_val) ++{ ++ unsigned char *resp_buf = mcu_hwmon->response_buffer; ++ unsigned char pwm_set_cmd[6] = {}; ++ size_t reply_size; ++ int ret; ++ ++ pwm_set_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ pwm_set_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FAN; ++ pwm_set_cmd[2] = IEI_WT61P803_PUZZLE_CMD_FAN_PWM_WRITE; ++ pwm_set_cmd[3] = IEI_WT61P803_PUZZLE_CMD_FAN_PWM(channel); ++ pwm_set_cmd[4] = pwm_set_val; ++ ++ mutex_lock(&mcu_hwmon->lock); ++ ret = iei_wt61p803_puzzle_write_command(mcu_hwmon->mcu, pwm_set_cmd, ++ sizeof(pwm_set_cmd), resp_buf, ++ &reply_size); ++ if (ret) ++ goto exit; ++ ++ if (reply_size != 3) { ++ ret = -EIO; ++ goto exit; ++ } ++ ++ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && ++ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) { ++ ret = -EIO; ++ goto exit; ++ } ++exit: ++ mutex_unlock(&mcu_hwmon->lock); ++ return ret; ++} ++ ++static int iei_wt61p803_puzzle_read_pwm_channel(struct iei_wt61p803_puzzle_hwmon *mcu_hwmon, ++ int channel, long *value) ++{ ++ unsigned char *resp_buf = mcu_hwmon->response_buffer; ++ unsigned char pwm_get_cmd[5] = {}; ++ size_t reply_size; ++ int ret; ++ ++ pwm_get_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ pwm_get_cmd[1] = IEI_WT61P803_PUZZLE_CMD_FAN; ++ pwm_get_cmd[2] = IEI_WT61P803_PUZZLE_CMD_FAN_PWM_READ; ++ pwm_get_cmd[3] = IEI_WT61P803_PUZZLE_CMD_FAN_PWM(channel); ++ ++ ret = iei_wt61p803_puzzle_write_command(mcu_hwmon->mcu, pwm_get_cmd, ++ sizeof(pwm_get_cmd), resp_buf, ++ &reply_size); ++ if (ret) ++ return ret; ++ ++ if (reply_size != 5) ++ return -EIO; ++ ++ if (resp_buf[2] != IEI_WT61P803_PUZZLE_CMD_FAN_PWM_READ) ++ return -EIO; ++ ++ *value = resp_buf[3]; ++ ++ return 0; ++} ++ ++static int iei_wt61p803_puzzle_read(struct device *dev, enum hwmon_sensor_types type, ++ u32 attr, int channel, long *val) ++{ ++ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon = dev_get_drvdata(dev->parent); ++ ++ switch (type) { ++ case hwmon_pwm: ++ return iei_wt61p803_puzzle_read_pwm_channel(mcu_hwmon, channel, val); ++ case hwmon_fan: ++ return iei_wt61p803_puzzle_read_fan_speed(mcu_hwmon, channel, val); ++ case hwmon_temp: ++ return iei_wt61p803_puzzle_read_temp_sensor(mcu_hwmon, channel, val); ++ default: ++ return -EINVAL; ++ } ++} ++ ++static int iei_wt61p803_puzzle_write(struct device *dev, enum hwmon_sensor_types type, ++ u32 attr, int channel, long val) ++{ ++ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon = dev_get_drvdata(dev->parent); ++ ++ return iei_wt61p803_puzzle_write_pwm_channel(mcu_hwmon, channel, val); ++} ++ ++static umode_t iei_wt61p803_puzzle_is_visible(const void *data, enum hwmon_sensor_types type, ++ u32 attr, int channel) ++{ ++ const struct iei_wt61p803_puzzle_hwmon *mcu_hwmon = data; ++ ++ switch (type) { ++ case hwmon_pwm: ++ if (mcu_hwmon->thermal_cooling_dev_present[channel]) ++ return 0444; ++ if (attr == hwmon_pwm_input) ++ return 0644; ++ break; ++ case hwmon_fan: ++ if (attr == hwmon_fan_input) ++ return 0444; ++ break; ++ case hwmon_temp: ++ if (attr == hwmon_temp_input) ++ return 0444; ++ break; ++ default: ++ return 0; ++ } ++ ++ return 0; ++} ++ ++static const struct hwmon_ops iei_wt61p803_puzzle_hwmon_ops = { ++ .is_visible = iei_wt61p803_puzzle_is_visible, ++ .read = iei_wt61p803_puzzle_read, ++ .write = iei_wt61p803_puzzle_write, ++}; ++ ++static const struct hwmon_channel_info *iei_wt61p803_puzzle_info[] = { ++ HWMON_CHANNEL_INFO(pwm, ++ HWMON_PWM_INPUT, ++ HWMON_PWM_INPUT), ++ HWMON_CHANNEL_INFO(fan, ++ HWMON_F_INPUT, ++ HWMON_F_INPUT, ++ HWMON_F_INPUT, ++ HWMON_F_INPUT, ++ HWMON_F_INPUT), ++ HWMON_CHANNEL_INFO(temp, ++ HWMON_T_INPUT, ++ HWMON_T_INPUT), ++ NULL ++}; ++ ++static const struct hwmon_chip_info iei_wt61p803_puzzle_chip_info = { ++ .ops = &iei_wt61p803_puzzle_hwmon_ops, ++ .info = iei_wt61p803_puzzle_info, ++}; ++ ++static int iei_wt61p803_puzzle_get_max_state(struct thermal_cooling_device *tcdev, ++ unsigned long *state) ++{ ++ struct iei_wt61p803_puzzle_thermal_cooling_device *cdev = tcdev->devdata; ++ ++ if (!cdev) ++ return -EINVAL; ++ ++ *state = cdev->num_levels - 1; ++ return 0; ++} ++ ++static int iei_wt61p803_puzzle_get_cur_state(struct thermal_cooling_device *tcdev, ++ unsigned long *state) ++{ ++ struct iei_wt61p803_puzzle_thermal_cooling_device *cdev = tcdev->devdata; ++ ++ if (!cdev) ++ return -EINVAL; ++ ++ if (cdev->cur_level < 0) ++ return -EAGAIN; ++ ++ *state = cdev->cur_level; ++ return 0; ++} ++ ++static int iei_wt61p803_puzzle_set_cur_state(struct thermal_cooling_device *tcdev, ++ unsigned long state) ++{ ++ struct iei_wt61p803_puzzle_thermal_cooling_device *cdev = tcdev->devdata; ++ u8 pwm_level; ++ ++ if (!cdev) ++ return -EINVAL; ++ ++ if (state >= cdev->num_levels) ++ return -EINVAL; ++ ++ if (state == cdev->cur_level) ++ return 0; ++ ++ cdev->cur_level = state; ++ pwm_level = cdev->cooling_levels[state]; ++ ++ return iei_wt61p803_puzzle_write_pwm_channel(cdev->mcu_hwmon, cdev->pwm_channel, pwm_level); ++} ++ ++static const struct thermal_cooling_device_ops iei_wt61p803_puzzle_cooling_ops = { ++ .get_max_state = iei_wt61p803_puzzle_get_max_state, ++ .get_cur_state = iei_wt61p803_puzzle_get_cur_state, ++ .set_cur_state = iei_wt61p803_puzzle_set_cur_state, ++}; ++ ++static int ++iei_wt61p803_puzzle_enable_thermal_cooling_dev(struct device *dev, ++ struct fwnode_handle *child, ++ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon) ++{ ++ struct iei_wt61p803_puzzle_thermal_cooling_device *cdev; ++ u32 pwm_channel; ++ u8 num_levels; ++ int i, ret; ++ ++ ret = fwnode_property_read_u32(child, "reg", &pwm_channel); ++ if (ret) ++ return ret; ++ ++ mcu_hwmon->thermal_cooling_dev_present[pwm_channel] = true; ++ ++ num_levels = fwnode_property_count_u32(child, "cooling-levels"); ++ if (!num_levels) ++ return -EINVAL; ++ ++ cdev = devm_kzalloc(dev, sizeof(*cdev), GFP_KERNEL); ++ if (!cdev) ++ return -ENOMEM; ++ ++ cdev->cooling_levels = devm_kmalloc_array(dev, num_levels, sizeof(u32), GFP_KERNEL); ++ if (!cdev->cooling_levels) ++ return -ENOMEM; ++ ++ ret = fwnode_property_read_u32_array(child, "cooling-levels", ++ cdev->cooling_levels, ++ num_levels); ++ if (ret) { ++ dev_err(dev, "Couldn't read property 'cooling-levels'\n"); ++ return ret; ++ } ++ ++ for (i = 0; i < num_levels; i++) { ++ if (cdev->cooling_levels[i] > ++ IEI_WT61P803_PUZZLE_HWMON_MAX_PWM_VAL) { ++ dev_err(dev, "iei_wt61p803_fan state[%d]:%d > %d\n", i, ++ cdev->cooling_levels[i], ++ IEI_WT61P803_PUZZLE_HWMON_MAX_PWM_VAL); ++ return -EINVAL; ++ } ++ } ++ ++ cdev->mcu_hwmon = mcu_hwmon; ++ cdev->pwm_channel = pwm_channel; ++ cdev->num_levels = num_levels; ++ cdev->cur_level = -1; ++ mcu_hwmon->cdev[pwm_channel] = cdev; ++ ++ snprintf(cdev->name, THERMAL_NAME_LENGTH, "wt61p803_puzzle_%d", pwm_channel); ++ cdev->tcdev = devm_thermal_of_cooling_device_register(dev, to_of_node(child), cdev->name, ++ cdev, &iei_wt61p803_puzzle_cooling_ops); ++ if (IS_ERR(cdev->tcdev)) ++ return PTR_ERR(cdev->tcdev); ++ ++ return 0; ++} ++ ++static int iei_wt61p803_puzzle_hwmon_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev->parent); ++ struct iei_wt61p803_puzzle_hwmon *mcu_hwmon; ++ struct fwnode_handle *child; ++ struct device *hwmon_dev; ++ int ret; ++ ++ mcu_hwmon = devm_kzalloc(dev, sizeof(*mcu_hwmon), GFP_KERNEL); ++ if (!mcu_hwmon) ++ return -ENOMEM; ++ ++ mcu_hwmon->mcu = mcu; ++ platform_set_drvdata(pdev, mcu_hwmon); ++ mutex_init(&mcu_hwmon->lock); ++ ++ hwmon_dev = devm_hwmon_device_register_with_info(dev, "iei_wt61p803_puzzle", ++ mcu_hwmon, ++ &iei_wt61p803_puzzle_chip_info, ++ NULL); ++ if (IS_ERR(hwmon_dev)) ++ return PTR_ERR(hwmon_dev); ++ ++ /* Control fans via PWM lines via Linux Kernel */ ++ if (IS_ENABLED(CONFIG_THERMAL)) { ++ device_for_each_child_node(dev, child) { ++ ret = iei_wt61p803_puzzle_enable_thermal_cooling_dev(dev, child, mcu_hwmon); ++ if (ret) { ++ dev_err(dev, "Enabling the PWM fan failed\n"); ++ fwnode_handle_put(child); ++ return ret; ++ } ++ } ++ } ++ return 0; ++} ++ ++static const struct of_device_id iei_wt61p803_puzzle_hwmon_id_table[] = { ++ { .compatible = "iei,wt61p803-puzzle-hwmon" }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, iei_wt61p803_puzzle_hwmon_id_table); ++ ++static struct platform_driver iei_wt61p803_puzzle_hwmon_driver = { ++ .driver = { ++ .name = "iei-wt61p803-puzzle-hwmon", ++ .of_match_table = iei_wt61p803_puzzle_hwmon_id_table, ++ }, ++ .probe = iei_wt61p803_puzzle_hwmon_probe, ++}; ++ ++module_platform_driver(iei_wt61p803_puzzle_hwmon_driver); ++ ++MODULE_DESCRIPTION("IEI WT61P803 PUZZLE MCU HWMON Driver"); ++MODULE_AUTHOR("Luka Kovacic "); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/mvebu/patches-6.1/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch b/target/linux/mvebu/patches-6.1/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch new file mode 100644 index 00000000000..a3fc731c471 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch @@ -0,0 +1,207 @@ +From f3b44eb69cc561cf05d00506dcec0dd9be003ed8 Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:35 +0000 +Subject: [PATCH 4/7] drivers: leds: Add the IEI WT61P803 PUZZLE LED driver + +Add support for the IEI WT61P803 PUZZLE LED driver. +Currently only the front panel power LED is supported, +since it is the only LED on this board wired through the +MCU. + +The LED is wired directly to the on-board MCU controller +and is toggled using an MCU command. + +Support for more LEDs is going to be added in case more +boards implement this microcontroller, as LEDs use many +different GPIOs. + +This driver depends on the IEI WT61P803 PUZZLE MFD driver. + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Cc: Luka Perkov +Cc: Robert Marko +--- + drivers/leds/Kconfig | 8 ++ + drivers/leds/Makefile | 1 + + drivers/leds/leds-iei-wt61p803-puzzle.c | 147 ++++++++++++++++++++++++ + 3 files changed, 156 insertions(+) + create mode 100644 drivers/leds/leds-iei-wt61p803-puzzle.c + +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -306,6 +306,14 @@ config LEDS_IPAQ_MICRO + Choose this option if you want to use the notification LED on + Compaq/HP iPAQ h3100 and h3600. + ++config LEDS_IEI_WT61P803_PUZZLE ++ tristate "LED Support for the IEI WT61P803 PUZZLE MCU" ++ depends on LEDS_CLASS ++ depends on MFD_IEI_WT61P803_PUZZLE ++ help ++ This option enables support for LEDs controlled by the IEI WT61P803 ++ M801 MCU. ++ + config LEDS_HP6XX + tristate "LED Support for the HP Jornada 6xx" + depends on LEDS_CLASS +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -33,6 +33,7 @@ obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx. + obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o + obj-$(CONFIG_LEDS_IP30) += leds-ip30.o + obj-$(CONFIG_LEDS_IPAQ_MICRO) += leds-ipaq-micro.o ++obj-$(CONFIG_LEDS_IEI_WT61P803_PUZZLE) += leds-iei-wt61p803-puzzle.o + obj-$(CONFIG_LEDS_IS31FL319X) += leds-is31fl319x.o + obj-$(CONFIG_LEDS_IS31FL32XX) += leds-is31fl32xx.o + obj-$(CONFIG_LEDS_LM3530) += leds-lm3530.o +--- /dev/null ++++ b/drivers/leds/leds-iei-wt61p803-puzzle.c +@@ -0,0 +1,147 @@ ++// SPDX-License-Identifier: GPL-2.0-only ++/* IEI WT61P803 PUZZLE MCU LED Driver ++ * ++ * Copyright (C) 2020 Sartura Ltd. ++ * Author: Luka Kovacic ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++enum iei_wt61p803_puzzle_led_state { ++ IEI_LED_OFF = 0x30, ++ IEI_LED_ON = 0x31, ++ IEI_LED_BLINK_5HZ = 0x32, ++ IEI_LED_BLINK_1HZ = 0x33, ++}; ++ ++/** ++ * struct iei_wt61p803_puzzle_led - MCU LED Driver ++ * @cdev: LED classdev ++ * @mcu: MCU struct pointer ++ * @response_buffer Global MCU response buffer ++ * @lock: General mutex lock to protect simultaneous R/W access to led_power_state ++ * @led_power_state: State of the front panel power LED ++ */ ++struct iei_wt61p803_puzzle_led { ++ struct led_classdev cdev; ++ struct iei_wt61p803_puzzle *mcu; ++ unsigned char response_buffer[IEI_WT61P803_PUZZLE_BUF_SIZE]; ++ struct mutex lock; /* mutex to protect led_power_state */ ++ int led_power_state; ++}; ++ ++static inline struct iei_wt61p803_puzzle_led *cdev_to_iei_wt61p803_puzzle_led ++ (struct led_classdev *led_cdev) ++{ ++ return container_of(led_cdev, struct iei_wt61p803_puzzle_led, cdev); ++} ++ ++static int iei_wt61p803_puzzle_led_brightness_set_blocking(struct led_classdev *cdev, ++ enum led_brightness brightness) ++{ ++ struct iei_wt61p803_puzzle_led *priv = cdev_to_iei_wt61p803_puzzle_led(cdev); ++ unsigned char *resp_buf = priv->response_buffer; ++ unsigned char led_power_cmd[5] = {}; ++ size_t reply_size; ++ int ret; ++ ++ led_power_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ led_power_cmd[1] = IEI_WT61P803_PUZZLE_CMD_LED; ++ led_power_cmd[2] = IEI_WT61P803_PUZZLE_CMD_LED_POWER; ++ led_power_cmd[3] = brightness == LED_OFF ? IEI_LED_OFF : IEI_LED_ON; ++ ++ ret = iei_wt61p803_puzzle_write_command(priv->mcu, led_power_cmd, ++ sizeof(led_power_cmd), ++ resp_buf, ++ &reply_size); ++ if (ret) ++ return ret; ++ ++ if (reply_size != 3) ++ return -EIO; ++ ++ if (!(resp_buf[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ resp_buf[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && ++ resp_buf[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK)) ++ return -EIO; ++ ++ mutex_lock(&priv->lock); ++ priv->led_power_state = brightness; ++ mutex_unlock(&priv->lock); ++ ++ return 0; ++} ++ ++static enum led_brightness iei_wt61p803_puzzle_led_brightness_get(struct led_classdev *cdev) ++{ ++ struct iei_wt61p803_puzzle_led *priv = cdev_to_iei_wt61p803_puzzle_led(cdev); ++ int led_state; ++ ++ mutex_lock(&priv->lock); ++ led_state = priv->led_power_state; ++ mutex_unlock(&priv->lock); ++ ++ return led_state; ++} ++ ++static int iei_wt61p803_puzzle_led_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev->parent); ++ struct iei_wt61p803_puzzle_led *priv; ++ struct led_init_data init_data = {}; ++ struct fwnode_handle *child; ++ int ret; ++ ++ if (device_get_child_node_count(dev) != 1) ++ return -EINVAL; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ priv->mcu = mcu; ++ priv->led_power_state = 1; ++ mutex_init(&priv->lock); ++ dev_set_drvdata(dev, priv); ++ ++ child = device_get_next_child_node(dev, NULL); ++ init_data.fwnode = child; ++ ++ priv->cdev.brightness_set_blocking = iei_wt61p803_puzzle_led_brightness_set_blocking; ++ priv->cdev.brightness_get = iei_wt61p803_puzzle_led_brightness_get; ++ priv->cdev.max_brightness = 1; ++ ++ ret = devm_led_classdev_register_ext(dev, &priv->cdev, &init_data); ++ if (ret) ++ dev_err(dev, "Could not register LED\n"); ++ ++ fwnode_handle_put(child); ++ return ret; ++} ++ ++static const struct of_device_id iei_wt61p803_puzzle_led_of_match[] = { ++ { .compatible = "iei,wt61p803-puzzle-leds" }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, iei_wt61p803_puzzle_led_of_match); ++ ++static struct platform_driver iei_wt61p803_puzzle_led_driver = { ++ .driver = { ++ .name = "iei-wt61p803-puzzle-led", ++ .of_match_table = iei_wt61p803_puzzle_led_of_match, ++ }, ++ .probe = iei_wt61p803_puzzle_led_probe, ++}; ++module_platform_driver(iei_wt61p803_puzzle_led_driver); ++ ++MODULE_DESCRIPTION("IEI WT61P803 PUZZLE front panel LED driver"); ++MODULE_AUTHOR("Luka Kovacic "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:leds-iei-wt61p803-puzzle"); diff --git a/target/linux/mvebu/patches-6.1/905-Documentation-ABI-Add-iei-wt61p803-puzzle-driver-sys.patch b/target/linux/mvebu/patches-6.1/905-Documentation-ABI-Add-iei-wt61p803-puzzle-driver-sys.patch new file mode 100644 index 00000000000..b1d420ef0a9 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/905-Documentation-ABI-Add-iei-wt61p803-puzzle-driver-sys.patch @@ -0,0 +1,82 @@ +From 2fab3b4956c5b2f83c1e1abffc1df39de2933d83 Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:36 +0000 +Subject: [PATCH 5/7] Documentation/ABI: Add iei-wt61p803-puzzle driver sysfs + interface documentation + +Add the iei-wt61p803-puzzle driver sysfs interface documentation to allow +monitoring and control of the microcontroller from user space. + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Cc: Luka Perkov +Cc: Robert Marko +--- + .../testing/sysfs-driver-iei-wt61p803-puzzle | 61 +++++++++++++++++++ + 1 file changed, 61 insertions(+) + create mode 100644 Documentation/ABI/testing/sysfs-driver-iei-wt61p803-puzzle + +--- /dev/null ++++ b/Documentation/ABI/testing/sysfs-driver-iei-wt61p803-puzzle +@@ -0,0 +1,61 @@ ++What: /sys/bus/serial/devices/.../mac_address_* ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RW) Internal factory assigned MAC address values ++ ++What: /sys/bus/serial/devices/.../serial_number ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RW) Internal factory assigned serial number ++ ++What: /sys/bus/serial/devices/.../version ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RO) Internal MCU firmware version ++ ++What: /sys/bus/serial/devices/.../protocol_version ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RO) Internal MCU communication protocol version ++ ++What: /sys/bus/serial/devices/.../power_loss_recovery ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RW) Host platform power loss recovery settings ++ Value mapping: 0 - Always-On, 1 - Always-Off, 2 - Always-AC, 3 - Always-WA ++ ++What: /sys/bus/serial/devices/.../bootloader_mode ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RO) Internal MCU bootloader mode status ++ Value mapping: ++ 0 - normal mode ++ 1 - bootloader mode ++ ++What: /sys/bus/serial/devices/.../power_status ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RO) Power status indicates the host platform power on method. ++ Value mapping (bitwise list): ++ 0x80 - Null ++ 0x40 - Firmware flag ++ 0x20 - Power loss detection flag (powered off) ++ 0x10 - Power loss detection flag (AC mode) ++ 0x08 - Button power on ++ 0x04 - Wake-on-LAN power on ++ 0x02 - RTC alarm power on ++ 0x01 - AC recover power on ++ ++What: /sys/bus/serial/devices/.../build_info ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RO) Internal MCU firmware build date ++ Format: yyyy/mm/dd hh:mm ++ ++What: /sys/bus/serial/devices/.../ac_recovery_status ++Date: September 2020 ++Contact: Luka Kovacic ++Description: (RO) Host platform AC recovery status value ++ Value mapping: ++ 0 - board has not been recovered from power down ++ 1 - board has been recovered from power down diff --git a/target/linux/mvebu/patches-6.1/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch b/target/linux/mvebu/patches-6.1/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch new file mode 100644 index 00000000000..9015436f6a4 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch @@ -0,0 +1,74 @@ +From 0aff3e5923fecc6842473ad07a688d6e2f2c2d55 Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:37 +0000 +Subject: [PATCH 6/7] Documentation/hwmon: Add iei-wt61p803-puzzle hwmon driver + documentation + +Add the iei-wt61p803-puzzle driver hwmon driver interface documentation. + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Cc: Luka Perkov +Cc: Robert Marko +--- + .../hwmon/iei-wt61p803-puzzle-hwmon.rst | 43 +++++++++++++++++++ + Documentation/hwmon/index.rst | 1 + + 2 files changed, 44 insertions(+) + create mode 100644 Documentation/hwmon/iei-wt61p803-puzzle-hwmon.rst + +--- /dev/null ++++ b/Documentation/hwmon/iei-wt61p803-puzzle-hwmon.rst +@@ -0,0 +1,43 @@ ++.. SPDX-License-Identifier: GPL-2.0-only ++ ++Kernel driver iei-wt61p803-puzzle-hwmon ++======================================= ++ ++Supported chips: ++ * IEI WT61P803 PUZZLE for IEI Puzzle M801 ++ ++ Prefix: 'iei-wt61p803-puzzle-hwmon' ++ ++Author: Luka Kovacic ++ ++ ++Description ++----------- ++ ++This driver adds fan and temperature sensor reading for some IEI Puzzle ++series boards. ++ ++Sysfs attributes ++---------------- ++ ++The following attributes are supported: ++ ++- IEI WT61P803 PUZZLE for IEI Puzzle M801 ++ ++/sys files in hwmon subsystem ++----------------------------- ++ ++================= == ===================================================== ++fan[1-5]_input RO files for fan speed (in RPM) ++pwm[1-2] RW files for fan[1-2] target duty cycle (0..255) ++temp[1-2]_input RO files for temperature sensors, in millidegree Celsius ++================= == ===================================================== ++ ++/sys files in thermal subsystem ++------------------------------- ++ ++================= == ===================================================== ++cur_state RW file for current cooling state of the cooling device ++ (0..max_state) ++max_state RO file for maximum cooling state of the cooling device ++================= == ===================================================== +--- a/Documentation/hwmon/index.rst ++++ b/Documentation/hwmon/index.rst +@@ -74,6 +74,7 @@ Hardware Monitoring Kernel Drivers + ibmaem + ibm-cffps + ibmpowernv ++ iei-wt61p803-puzzle-hwmon + ina209 + ina2xx + ina3221 diff --git a/target/linux/mvebu/patches-6.1/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch b/target/linux/mvebu/patches-6.1/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch new file mode 100644 index 00000000000..b8accf180bb --- /dev/null +++ b/target/linux/mvebu/patches-6.1/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch @@ -0,0 +1,41 @@ +From 12479baad28d2a08c6cb9e83471057635fa1635c Mon Sep 17 00:00:00 2001 +From: Luka Kovacic +Date: Tue, 24 Aug 2021 12:44:38 +0000 +Subject: [PATCH 7/7] MAINTAINERS: Add an entry for the IEI WT61P803 PUZZLE + driver + +Add an entry for the IEI WT61P803 PUZZLE driver (MFD, HWMON, LED drivers). + +Signed-off-by: Luka Kovacic +Signed-off-by: Pavo Banicevic +Cc: Luka Perkov +Cc: Robert Marko +--- + MAINTAINERS | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -9063,6 +9063,22 @@ F: include/net/nl802154.h + F: net/ieee802154/ + F: net/mac802154/ + ++IEI WT61P803 M801 MFD DRIVER ++M: Luka Kovacic ++M: Luka Perkov ++M: Goran Medic ++L: linux-kernel@vger.kernel.org ++S: Maintained ++F: Documentation/ABI/stable/sysfs-driver-iei-wt61p803-puzzle ++F: Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml ++F: Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml ++F: Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml ++F: Documentation/hwmon/iei-wt61p803-puzzle-hwmon.rst ++F: drivers/hwmon/iei-wt61p803-puzzle-hwmon.c ++F: drivers/leds/leds-iei-wt61p803-puzzle.c ++F: drivers/mfd/iei-wt61p803-puzzle.c ++F: include/linux/mfd/iei-wt61p803-puzzle.h ++ + IFE PROTOCOL + M: Yotam Gigi + M: Jamal Hadi Salim diff --git a/target/linux/mvebu/patches-6.1/910-drivers-leds-wt61p803-puzzle-improvements.patch b/target/linux/mvebu/patches-6.1/910-drivers-leds-wt61p803-puzzle-improvements.patch new file mode 100644 index 00000000000..150a65498cd --- /dev/null +++ b/target/linux/mvebu/patches-6.1/910-drivers-leds-wt61p803-puzzle-improvements.patch @@ -0,0 +1,271 @@ +--- a/drivers/leds/leds-iei-wt61p803-puzzle.c ++++ b/drivers/leds/leds-iei-wt61p803-puzzle.c +@@ -9,9 +9,13 @@ + #include + #include + #include ++#include + #include + #include + #include ++#include ++ ++#define IEI_LEDS_MAX 4 + + enum iei_wt61p803_puzzle_led_state { + IEI_LED_OFF = 0x30, +@@ -33,7 +37,11 @@ struct iei_wt61p803_puzzle_led { + struct iei_wt61p803_puzzle *mcu; + unsigned char response_buffer[IEI_WT61P803_PUZZLE_BUF_SIZE]; + struct mutex lock; /* mutex to protect led_power_state */ ++ struct work_struct work; + int led_power_state; ++ int id; ++ u8 blinking; ++ bool active_low; + }; + + static inline struct iei_wt61p803_puzzle_led *cdev_to_iei_wt61p803_puzzle_led +@@ -51,10 +59,18 @@ static int iei_wt61p803_puzzle_led_brigh + size_t reply_size; + int ret; + ++ if (priv->blinking) { ++ if (brightness == LED_OFF) ++ priv->blinking = 0; ++ else ++ return 0; ++ } ++ + led_power_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; + led_power_cmd[1] = IEI_WT61P803_PUZZLE_CMD_LED; +- led_power_cmd[2] = IEI_WT61P803_PUZZLE_CMD_LED_POWER; +- led_power_cmd[3] = brightness == LED_OFF ? IEI_LED_OFF : IEI_LED_ON; ++ led_power_cmd[2] = IEI_WT61P803_PUZZLE_CMD_LED_SET(priv->id); ++ led_power_cmd[3] = ((brightness == LED_OFF) ^ priv->active_low) ? ++ IEI_LED_OFF : priv->blinking?priv->blinking:IEI_LED_ON; + + ret = iei_wt61p803_puzzle_write_command(priv->mcu, led_power_cmd, + sizeof(led_power_cmd), +@@ -90,39 +106,166 @@ static enum led_brightness iei_wt61p803_ + return led_state; + } + ++static void iei_wt61p803_puzzle_led_apply_blink(struct work_struct *work) ++{ ++ struct iei_wt61p803_puzzle_led *priv = container_of(work, struct iei_wt61p803_puzzle_led, work); ++ unsigned char led_blink_cmd[5] = {}; ++ unsigned char resp_buf[IEI_WT61P803_PUZZLE_BUF_SIZE]; ++ size_t reply_size; ++ ++ led_blink_cmd[0] = IEI_WT61P803_PUZZLE_CMD_HEADER_START; ++ led_blink_cmd[1] = IEI_WT61P803_PUZZLE_CMD_LED; ++ led_blink_cmd[2] = IEI_WT61P803_PUZZLE_CMD_LED_SET(priv->id); ++ led_blink_cmd[3] = priv->blinking; ++ ++ iei_wt61p803_puzzle_write_command(priv->mcu, led_blink_cmd, ++ sizeof(led_blink_cmd), ++ resp_buf, ++ &reply_size); ++ ++ return; ++} ++ ++static int iei_wt61p803_puzzle_led_set_blink(struct led_classdev *cdev, ++ unsigned long *delay_on, ++ unsigned long *delay_off) ++{ ++ struct iei_wt61p803_puzzle_led *priv = cdev_to_iei_wt61p803_puzzle_led(cdev); ++ u8 blink_mode = 0; ++ int ret = 0; ++ ++ /* set defaults */ ++ if (!*delay_on && !*delay_off) { ++ *delay_on = 500; ++ *delay_off = 500; ++ } ++ ++ /* minimum delay for soft-driven blinking is 100ms to keep load low */ ++ if (*delay_on < 100) ++ *delay_on = 100; ++ ++ if (*delay_off < 100) ++ *delay_off = 100; ++ ++ /* offload blinking to hardware, if possible */ ++ if (*delay_on != *delay_off) { ++ ret = -EINVAL; ++ } else if (*delay_on == 100) { ++ blink_mode = IEI_LED_BLINK_5HZ; ++ *delay_on = 100; ++ *delay_off = 100; ++ } else if (*delay_on <= 500) { ++ blink_mode = IEI_LED_BLINK_1HZ; ++ *delay_on = 500; ++ *delay_off = 500; ++ } else { ++ ret = -EINVAL; ++ } ++ ++ mutex_lock(&priv->lock); ++ priv->blinking = blink_mode; ++ mutex_unlock(&priv->lock); ++ ++ if (blink_mode) ++ schedule_work(&priv->work); ++ ++ return ret; ++} ++ ++ ++static int iei_wt61p803_puzzle_led_set_dt_default(struct led_classdev *cdev, ++ struct device_node *np) ++{ ++ const char *state; ++ int ret = 0; ++ ++ state = of_get_property(np, "default-state", NULL); ++ if (state) { ++ if (!strcmp(state, "on")) { ++ ret = ++ iei_wt61p803_puzzle_led_brightness_set_blocking( ++ cdev, cdev->max_brightness); ++ } else { ++ ret = iei_wt61p803_puzzle_led_brightness_set_blocking( ++ cdev, LED_OFF); ++ } ++ } ++ ++ return ret; ++} ++ + static int iei_wt61p803_puzzle_led_probe(struct platform_device *pdev) + { + struct device *dev = &pdev->dev; ++ struct device_node *np = dev_of_node(dev); ++ struct device_node *child; + struct iei_wt61p803_puzzle *mcu = dev_get_drvdata(dev->parent); + struct iei_wt61p803_puzzle_led *priv; +- struct led_init_data init_data = {}; +- struct fwnode_handle *child; + int ret; ++ u32 reg; + +- if (device_get_child_node_count(dev) != 1) ++ if (device_get_child_node_count(dev) > IEI_LEDS_MAX) + return -EINVAL; + +- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); +- if (!priv) +- return -ENOMEM; +- +- priv->mcu = mcu; +- priv->led_power_state = 1; +- mutex_init(&priv->lock); +- dev_set_drvdata(dev, priv); +- +- child = device_get_next_child_node(dev, NULL); +- init_data.fwnode = child; +- +- priv->cdev.brightness_set_blocking = iei_wt61p803_puzzle_led_brightness_set_blocking; +- priv->cdev.brightness_get = iei_wt61p803_puzzle_led_brightness_get; +- priv->cdev.max_brightness = 1; ++ for_each_available_child_of_node(np, child) { ++ struct led_init_data init_data = {}; + +- ret = devm_led_classdev_register_ext(dev, &priv->cdev, &init_data); +- if (ret) +- dev_err(dev, "Could not register LED\n"); ++ ret = of_property_read_u32(child, "reg", ®); ++ if (ret) { ++ dev_err(dev, "Failed to read led 'reg' property\n"); ++ goto put_child_node; ++ } ++ ++ if (reg > IEI_LEDS_MAX) { ++ dev_err(dev, "Invalid led reg %u\n", reg); ++ ret = -EINVAL; ++ goto put_child_node; ++ } ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) { ++ ret = -ENOMEM; ++ goto put_child_node; ++ } ++ ++ mutex_init(&priv->lock); ++ ++ dev_set_drvdata(dev, priv); ++ ++ if (of_property_read_bool(child, "active-low")) ++ priv->active_low = true; ++ ++ priv->mcu = mcu; ++ priv->id = reg; ++ priv->led_power_state = 1; ++ priv->blinking = 0; ++ init_data.fwnode = of_fwnode_handle(child); ++ ++ priv->cdev.brightness_set_blocking = iei_wt61p803_puzzle_led_brightness_set_blocking; ++ priv->cdev.brightness_get = iei_wt61p803_puzzle_led_brightness_get; ++ priv->cdev.blink_set = iei_wt61p803_puzzle_led_set_blink; ++ ++ priv->cdev.max_brightness = 1; ++ ++ INIT_WORK(&priv->work, iei_wt61p803_puzzle_led_apply_blink); ++ ++ ret = iei_wt61p803_puzzle_led_set_dt_default(&priv->cdev, child); ++ if (ret) { ++ dev_err(dev, "Could apply default from DT\n"); ++ goto put_child_node; ++ } ++ ++ ret = devm_led_classdev_register_ext(dev, &priv->cdev, &init_data); ++ if (ret) { ++ dev_err(dev, "Could not register LED\n"); ++ goto put_child_node; ++ } ++ } ++ ++ return ret; + +- fwnode_handle_put(child); ++put_child_node: ++ of_node_put(child); + return ret; + } + +--- a/include/linux/mfd/iei-wt61p803-puzzle.h ++++ b/include/linux/mfd/iei-wt61p803-puzzle.h +@@ -36,7 +36,7 @@ + #define IEI_WT61P803_PUZZLE_CMD_FUNCTION_OTHER_POWER_LOSS 0x41 /* A */ + + #define IEI_WT61P803_PUZZLE_CMD_LED 0x52 /* R */ +-#define IEI_WT61P803_PUZZLE_CMD_LED_POWER 0x31 /* 1 */ ++#define IEI_WT61P803_PUZZLE_CMD_LED_SET(n) (0x30 | (n)) + + #define IEI_WT61P803_PUZZLE_CMD_TEMP 0x54 /* T */ + #define IEI_WT61P803_PUZZLE_CMD_TEMP_ALL 0x41 /* A */ +--- a/drivers/mfd/iei-wt61p803-puzzle.c ++++ b/drivers/mfd/iei-wt61p803-puzzle.c +@@ -176,6 +176,9 @@ static int iei_wt61p803_puzzle_recv_buf( + struct iei_wt61p803_puzzle *mcu = serdev_device_get_drvdata(serdev); + int ret; + ++ print_hex_dump_debug("puzzle-mcu rx: ", DUMP_PREFIX_NONE, ++ 16, 1, data, size, false); ++ + ret = iei_wt61p803_puzzle_process_resp(mcu, data, size); + /* Return the number of processed bytes if function returns error, + * discard the remaining incoming data, since the frame this data +@@ -246,6 +249,9 @@ int iei_wt61p803_puzzle_write_command(st + + cmd[size - 1] = iei_wt61p803_puzzle_checksum(cmd, size - 1); + ++ print_hex_dump_debug("puzzle-mcu tx: ", DUMP_PREFIX_NONE, ++ 16, 1, cmd, size, false); ++ + /* Initialize reply struct */ + reinit_completion(&mcu->reply->received); + mcu->reply->size = 0; diff --git a/target/linux/mvebu/patches-6.1/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch b/target/linux/mvebu/patches-6.1/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch new file mode 100644 index 00000000000..2f0b1788ff6 --- /dev/null +++ b/target/linux/mvebu/patches-6.1/911-drivers-leds-wt61p803-puzzle-mcu-retry.patch @@ -0,0 +1,63 @@ +--- a/drivers/mfd/iei-wt61p803-puzzle.c ++++ b/drivers/mfd/iei-wt61p803-puzzle.c +@@ -241,6 +241,7 @@ int iei_wt61p803_puzzle_write_command(st + { + struct device *dev = &mcu->serdev->dev; + int ret; ++ int retries; + + if (size <= 1 || size > IEI_WT61P803_PUZZLE_MAX_COMMAND_LENGTH) + return -EINVAL; +@@ -252,24 +253,36 @@ int iei_wt61p803_puzzle_write_command(st + print_hex_dump_debug("puzzle-mcu tx: ", DUMP_PREFIX_NONE, + 16, 1, cmd, size, false); + ++ retries = 3; + /* Initialize reply struct */ +- reinit_completion(&mcu->reply->received); +- mcu->reply->size = 0; +- usleep_range(2000, 10000); +- serdev_device_write_flush(mcu->serdev); +- ret = serdev_device_write_buf(mcu->serdev, cmd, size); +- if (ret < 0) +- goto exit; +- +- serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); +- ret = wait_for_completion_timeout(&mcu->reply->received, +- IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); +- if (ret == 0) { +- dev_err(dev, "Command reply receive timeout\n"); +- ret = -ETIMEDOUT; +- goto exit; ++ while (retries) { ++ reinit_completion(&mcu->reply->received); ++ mcu->reply->size = 0; ++ usleep_range(2000, 10000); ++ serdev_device_write_flush(mcu->serdev); ++ ret = serdev_device_write_buf(mcu->serdev, cmd, size); ++ if (ret < 0) ++ goto exit; ++ ++ serdev_device_wait_until_sent(mcu->serdev, IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); ++ ret = wait_for_completion_timeout(&mcu->reply->received, ++ IEI_WT61P803_PUZZLE_GENERAL_TIMEOUT); ++ retries--; ++ if (ret == 0) { ++ if (retries == 0) { ++ dev_err(dev, "Command reply receive timeout\n"); ++ ret = -ETIMEDOUT; ++ goto exit; ++ } ++ } ++ else { ++ if (mcu->reply->data[0] == IEI_WT61P803_PUZZLE_CMD_HEADER_START && ++ mcu->reply->data[1] == IEI_WT61P803_PUZZLE_CMD_RESPONSE_OK && ++ mcu->reply->data[2] == IEI_WT61P803_PUZZLE_CHECKSUM_RESPONSE_OK) { ++ break; ++ } ++ } + } +- + *reply_size = mcu->reply->size; + /* Copy the received data, as it will not be available after a new frame is received */ + memcpy(reply_data, mcu->reply->data, mcu->reply->size); From 7f257296ec2a71c26e753a8416d08e387b2557bd Mon Sep 17 00:00:00 2001 From: Stefan Kalscheuer Date: Sun, 18 Jun 2023 17:01:00 +0200 Subject: [PATCH 04/27] mvebu: refresh patches for 6.1 Remove the following patches: 100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to [1] 101-ARM-dts-turris-omnia-enable-LED-controller-node [2] 702-net-next-ethernet-marvell-mvnetaMQPrioOffload [3] 703-net-next-ethernet-marvell-mvnetaMQPrioFlag [4] 704-net-next-ethernet-marvell-mvnetaMQPrioQueue [5] 705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload [6] 710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi [7] Manually rebased: 902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU All other patches automatically rebased [1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=94a29bffdd59498382131fd428fed221f5c96def [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=40624346b7ae0c2b1209fc9993ea30699e512c50 [3] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=75fa71e3acadbb4ab5eda18505277eb9a1f69b23 [4] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=e7ca75fe6662f78bfeb0112671c812e4c7b8e214 [5] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=e9f7099d0730341b24c057acbf545dd019581db6 [6] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=2551dc9e398c37a15e52122d385c29a8b06be45f [7] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=cd1e1735aeab49abc679218a79ee764c0d394880 Signed-off-by: Stefan Kalscheuer --- ...mnia-configure-LED-0-pin-function-to.patch | 38 ---- .../100-aardvark-workaround-PCIe.patch | 6 +- ...ris-omnia-enable-LED-controller-node.patch | 48 ----- ...Mangle-bootloader-s-kernel-arguments.patch | 4 +- ...-mvebu-armada-38x-enable-libata-leds.patch | 2 +- .../patches-6.1/302-add_powertables.patch | 2 +- .../306-ARM-mvebu-385-ap-Add-partitions.patch | 4 +- ...-armada-xp-linksys-mamba-broken-idle.patch | 2 +- .../308-armada-xp-linksys-mamba-wan.patch | 2 +- .../patches-6.1/309-linksys-status-led.patch | 2 +- ...da388-clearfog-emmc-on-clearfog-base.patch | 4 +- ...rmada-xp-linksys-mamba-resize-kernel.patch | 4 +- ...316-armada-370-dts-fix-crypto-engine.patch | 4 +- .../700-mvneta-tx-queue-workaround.patch | 4 +- ...ethernet-marvell-mvnetaMQPrioOffload.patch | 66 ------- ...xt-ethernet-marvell-mvnetaMQPrioFlag.patch | 30 --- ...t-ethernet-marvell-mvnetaMQPrioQueue.patch | 97 ---------- ...hernet-marvell-mvnetaMQPrioTCOffload.patch | 182 ------------------ ...mvebu-a3700-comphy-Reset-COMPHY-regi.patch | 50 ----- ...-pci-mvebu-time-out-reset-on-link-up.patch | 6 +- ...IEI-vendor-prefix-and-IEI-WT61P803-P.patch | 2 +- ...a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch | 16 +- ...d-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch | 8 +- ...d-the-IEI-WT61P803-PUZZLE-LED-driver.patch | 4 +- ...mon-Add-iei-wt61p803-puzzle-hwmon-dr.patch | 4 +- ...an-entry-for-the-IEI-WT61P803-PUZZLE.patch | 2 +- 26 files changed, 41 insertions(+), 552 deletions(-) delete mode 100644 target/linux/mvebu/patches-6.1/100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to.patch delete mode 100644 target/linux/mvebu/patches-6.1/101-ARM-dts-turris-omnia-enable-LED-controller-node.patch delete mode 100644 target/linux/mvebu/patches-6.1/702-net-next-ethernet-marvell-mvnetaMQPrioOffload.patch delete mode 100644 target/linux/mvebu/patches-6.1/703-net-next-ethernet-marvell-mvnetaMQPrioFlag.patch delete mode 100644 target/linux/mvebu/patches-6.1/704-net-next-ethernet-marvell-mvnetaMQPrioQueue.patch delete mode 100644 target/linux/mvebu/patches-6.1/705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload.patch delete mode 100644 target/linux/mvebu/patches-6.1/710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi.patch diff --git a/target/linux/mvebu/patches-6.1/100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to.patch b/target/linux/mvebu/patches-6.1/100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to.patch deleted file mode 100644 index 67beb065416..00000000000 --- a/target/linux/mvebu/patches-6.1/100-ARM-dts-turris-omnia-configure-LED-0-pin-function-to.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 81c0004a6433ff90fa6129418802c3c367e453c2 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Marek=20Beh=C3=BAn?= -Date: Mon, 4 Jul 2022 13:36:21 +0200 -Subject: [PATCH 1/5] ARM: dts: turris-omnia: configure LED[0] pin function to - link/activity -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The marvell PHY driver changes the LED[0] pin function to "On - 1000 -Mbps Link, Off - Else". - -Turris Omnia expects that the function is "On - Link, Blink - Activity, -Off - No link". - -Use the `marvell,reg-init` DT property to change the function. - -In the future, once netdev trigger will support HW offloading, we will -be able to have this configured via the combination of PHY driver and -leds-turris-omnia driver. - -Signed-off-by: Marek Behún ---- - arch/arm/boot/dts/armada-385-turris-omnia.dts | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/armada-385-turris-omnia.dts -+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts -@@ -396,7 +396,8 @@ - phy1: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <1>; -- marvell,reg-init = <3 18 0 0x4985>; -+ marvell,reg-init = <3 18 0 0x4985>, -+ <3 16 0xfff0 0x0001>; - - /* irq is connected to &pcawan pin 7 */ - }; diff --git a/target/linux/mvebu/patches-6.1/100-aardvark-workaround-PCIe.patch b/target/linux/mvebu/patches-6.1/100-aardvark-workaround-PCIe.patch index 975eadb80e2..4936f6ad16c 100644 --- a/target/linux/mvebu/patches-6.1/100-aardvark-workaround-PCIe.patch +++ b/target/linux/mvebu/patches-6.1/100-aardvark-workaround-PCIe.patch @@ -48,7 +48,7 @@ Cc: stable@vger.kernel.org --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c -@@ -210,6 +210,8 @@ enum { +@@ -212,6 +212,8 @@ enum { }; #define VENDOR_ID_REG (LMI_BASE_ADDR + 0x44) @@ -57,7 +57,7 @@ Cc: stable@vger.kernel.org /* PCIe core controller registers */ #define CTRL_CORE_BASE_ADDR 0x18000 -@@ -558,6 +560,11 @@ static void advk_pcie_setup_hw(struct ad +@@ -560,6 +562,11 @@ static void advk_pcie_setup_hw(struct ad PCIE_CORE_CTRL2_TD_ENABLE; advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); @@ -69,7 +69,7 @@ Cc: stable@vger.kernel.org /* Set lane X1 */ reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); reg &= ~LANE_CNT_MSK; -@@ -1580,6 +1587,9 @@ static irqreturn_t advk_pcie_irq_handler +@@ -1661,6 +1668,9 @@ static irqreturn_t advk_pcie_irq_handler struct advk_pcie *pcie = arg; u32 status; diff --git a/target/linux/mvebu/patches-6.1/101-ARM-dts-turris-omnia-enable-LED-controller-node.patch b/target/linux/mvebu/patches-6.1/101-ARM-dts-turris-omnia-enable-LED-controller-node.patch deleted file mode 100644 index ecfb43553f5..00000000000 --- a/target/linux/mvebu/patches-6.1/101-ARM-dts-turris-omnia-enable-LED-controller-node.patch +++ /dev/null @@ -1,48 +0,0 @@ -From fed7cef5e4f2df8c6a79bebf5da1fdd3783ff6f3 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Marek=20Beh=C3=BAn?= -Date: Mon, 4 Jul 2022 13:36:22 +0200 -Subject: [PATCH] ARM: dts: turris-omnia: enable LED controller node -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The LED controller node is disabled because the leds-turris-omnia driver -does not support setting the LED blinking to be controlled by the MCU. - -The patches for that have now been sent [1], so let's enable the node. - -[1] https://lore.kernel.org/linux-leds/20220704105955.15474-1-kabel@kernel.org/T/ - -Signed-off-by: Marek Behún ---- - arch/arm/boot/dts/armada-385-turris-omnia.dts | 7 ++----- - 1 file changed, 2 insertions(+), 5 deletions(-) - ---- a/arch/arm/boot/dts/armada-385-turris-omnia.dts -+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts -@@ -194,15 +194,13 @@ - reg = <0x2b>; - #address-cells = <1>; - #size-cells = <0>; -+ status = "okay"; - - /* - * LEDs are controlled by MCU (STM32F0) at - * address 0x2b. - * -- * The driver does not support HW control mode -- * for the LEDs yet. Disable the LEDs for now. -- * -- * Also LED functions are not stable yet: -+ * LED functions are not stable yet: - * - there are 3 LEDs connected via MCU to PCIe - * ports. One of these ports supports mSATA. - * There is no mSATA nor PCIe function. -@@ -213,7 +211,6 @@ - * B. Again there is no such function defined. - * For now we use LED_FUNCTION_INDICATOR - */ -- status = "disabled"; - - multi-led@0 { - reg = <0x0>; diff --git a/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch index 9069de16146..5c3672659cd 100644 --- a/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch +++ b/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch @@ -28,7 +28,7 @@ Signed-off-by: Michael Gray --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -1727,6 +1727,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN +@@ -1586,6 +1586,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN The command-line arguments provided by the boot loader will be appended to the the device tree bootargs property. @@ -258,7 +258,7 @@ Signed-off-by: Michael Gray static int kernel_init(void *); extern void init_IRQ(void); -@@ -991,6 +995,18 @@ asmlinkage __visible void __init __no_sa +@@ -992,6 +996,18 @@ asmlinkage __visible void __init __no_sa page_alloc_init(); pr_notice("Kernel command line: %s\n", saved_command_line); diff --git a/target/linux/mvebu/patches-6.1/301-mvebu-armada-38x-enable-libata-leds.patch b/target/linux/mvebu/patches-6.1/301-mvebu-armada-38x-enable-libata-leds.patch index 615caac24f4..b75dcf596ad 100644 --- a/target/linux/mvebu/patches-6.1/301-mvebu-armada-38x-enable-libata-leds.patch +++ b/target/linux/mvebu/patches-6.1/301-mvebu-armada-38x-enable-libata-leds.patch @@ -1,6 +1,6 @@ --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig -@@ -67,6 +67,7 @@ config MACH_ARMADA_38X +@@ -66,6 +66,7 @@ config MACH_ARMADA_38X select HAVE_ARM_TWD if SMP select MACH_MVEBU_V7 select PINCTRL_ARMADA_38X diff --git a/target/linux/mvebu/patches-6.1/302-add_powertables.patch b/target/linux/mvebu/patches-6.1/302-add_powertables.patch index 93ad5de2cc4..d0c0dbeb0cb 100644 --- a/target/linux/mvebu/patches-6.1/302-add_powertables.patch +++ b/target/linux/mvebu/patches-6.1/302-add_powertables.patch @@ -667,7 +667,7 @@ pinctrl-0 = <&sdhci_pins>; --- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -225,12 +225,100 @@ +@@ -223,12 +223,100 @@ pcie@2,0 { /* Port 0, Lane 1 */ status = "okay"; diff --git a/target/linux/mvebu/patches-6.1/306-ARM-mvebu-385-ap-Add-partitions.patch b/target/linux/mvebu/patches-6.1/306-ARM-mvebu-385-ap-Add-partitions.patch index 2057e31c7e9..aee033d21fc 100644 --- a/target/linux/mvebu/patches-6.1/306-ARM-mvebu-385-ap-Add-partitions.patch +++ b/target/linux/mvebu/patches-6.1/306-ARM-mvebu-385-ap-Add-partitions.patch @@ -5,8 +5,8 @@ Subject: [PATCH 2/2] ARM: mvebu: 385-ap: Add partitions Signed-off-by: Maxime Ripard --- - arch/arm/boot/dts/armada-385-db-ap.dts | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) + arch/arm/boot/dts/armada-385-db-ap.dts | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) --- a/arch/arm/boot/dts/armada-385-db-ap.dts +++ b/arch/arm/boot/dts/armada-385-db-ap.dts diff --git a/target/linux/mvebu/patches-6.1/307-armada-xp-linksys-mamba-broken-idle.patch b/target/linux/mvebu/patches-6.1/307-armada-xp-linksys-mamba-broken-idle.patch index 16112d53fc9..fc6d6239ca4 100644 --- a/target/linux/mvebu/patches-6.1/307-armada-xp-linksys-mamba-broken-idle.patch +++ b/target/linux/mvebu/patches-6.1/307-armada-xp-linksys-mamba-broken-idle.patch @@ -1,6 +1,6 @@ --- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -485,3 +485,7 @@ +@@ -483,3 +483,7 @@ }; }; }; diff --git a/target/linux/mvebu/patches-6.1/308-armada-xp-linksys-mamba-wan.patch b/target/linux/mvebu/patches-6.1/308-armada-xp-linksys-mamba-wan.patch index 4315abc7d22..389e03742e2 100644 --- a/target/linux/mvebu/patches-6.1/308-armada-xp-linksys-mamba-wan.patch +++ b/target/linux/mvebu/patches-6.1/308-armada-xp-linksys-mamba-wan.patch @@ -1,6 +1,6 @@ --- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -387,7 +387,7 @@ +@@ -385,7 +385,7 @@ port@4 { reg = <4>; diff --git a/target/linux/mvebu/patches-6.1/309-linksys-status-led.patch b/target/linux/mvebu/patches-6.1/309-linksys-status-led.patch index e5e83572c9e..0ef15f2943f 100644 --- a/target/linux/mvebu/patches-6.1/309-linksys-status-led.patch +++ b/target/linux/mvebu/patches-6.1/309-linksys-status-led.patch @@ -39,7 +39,7 @@ chosen { bootargs = "console=ttyS0,115200"; stdout-path = &uart0; -@@ -197,7 +204,7 @@ +@@ -195,7 +202,7 @@ pinctrl-0 = <&power_led_pin>; pinctrl-names = "default"; diff --git a/target/linux/mvebu/patches-6.1/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch b/target/linux/mvebu/patches-6.1/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch index dd2bef7f632..f52417e83a7 100644 --- a/target/linux/mvebu/patches-6.1/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch +++ b/target/linux/mvebu/patches-6.1/312-ARM-dts-armada388-clearfog-emmc-on-clearfog-base.patch @@ -5,8 +5,8 @@ Subject: ARM: dts: armada388-clearfog: emmc on clearfog base Signed-off-by: Russell King --- - arch/arm/boot/dts/armada-388-clearfog-base.dts | 1 + - .../dts/armada-38x-solidrun-microsom-emmc.dtsi | 62 ++++++++++++++++++++++ + .../arm/boot/dts/armada-388-clearfog-base.dts | 1 + + .../armada-38x-solidrun-microsom-emmc.dtsi | 62 +++++++++++++++++++ 2 files changed, 63 insertions(+) create mode 100644 arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi diff --git a/target/linux/mvebu/patches-6.1/315-armada-xp-linksys-mamba-resize-kernel.patch b/target/linux/mvebu/patches-6.1/315-armada-xp-linksys-mamba-resize-kernel.patch index f1fddceff4b..c333df27842 100644 --- a/target/linux/mvebu/patches-6.1/315-armada-xp-linksys-mamba-resize-kernel.patch +++ b/target/linux/mvebu/patches-6.1/315-armada-xp-linksys-mamba-resize-kernel.patch @@ -11,7 +11,7 @@ Signed-off-by: Tad Davanzo --- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts +++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -456,9 +456,9 @@ +@@ -454,9 +454,9 @@ reg = <0xa00000 0x2800000>; /* 40MB */ }; @@ -23,7 +23,7 @@ Signed-off-by: Tad Davanzo }; /* kernel2 overlaps with rootfs2 by design */ -@@ -467,9 +467,9 @@ +@@ -465,9 +465,9 @@ reg = <0x3200000 0x2800000>; /* 40MB */ }; diff --git a/target/linux/mvebu/patches-6.1/316-armada-370-dts-fix-crypto-engine.patch b/target/linux/mvebu/patches-6.1/316-armada-370-dts-fix-crypto-engine.patch index 19378870ef7..b5ed5ece369 100644 --- a/target/linux/mvebu/patches-6.1/316-armada-370-dts-fix-crypto-engine.patch +++ b/target/linux/mvebu/patches-6.1/316-armada-370-dts-fix-crypto-engine.patch @@ -1,6 +1,6 @@ --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi -@@ -234,7 +234,7 @@ +@@ -254,7 +254,7 @@ clocks = <&gateclk 23>; clock-names = "cesa0"; marvell,crypto-srams = <&crypto_sram>; @@ -9,7 +9,7 @@ }; }; -@@ -255,12 +255,17 @@ +@@ -275,12 +275,17 @@ * cpuidle workaround. */ idle-sram@0 { diff --git a/target/linux/mvebu/patches-6.1/700-mvneta-tx-queue-workaround.patch b/target/linux/mvebu/patches-6.1/700-mvneta-tx-queue-workaround.patch index 32e8ef4b7d8..307c46e7b80 100644 --- a/target/linux/mvebu/patches-6.1/700-mvneta-tx-queue-workaround.patch +++ b/target/linux/mvebu/patches-6.1/700-mvneta-tx-queue-workaround.patch @@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau --- --- a/drivers/net/ethernet/marvell/mvneta.c +++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -5006,6 +5006,16 @@ static int mvneta_setup_tc(struct net_de +@@ -5222,6 +5222,16 @@ static int mvneta_setup_tc(struct net_de } } @@ -26,7 +26,7 @@ Signed-off-by: Felix Fietkau static const struct net_device_ops mvneta_netdev_ops = { .ndo_open = mvneta_open, .ndo_stop = mvneta_stop, -@@ -5016,6 +5026,9 @@ static const struct net_device_ops mvnet +@@ -5232,6 +5242,9 @@ static const struct net_device_ops mvnet .ndo_fix_features = mvneta_fix_features, .ndo_get_stats64 = mvneta_get_stats64, .ndo_eth_ioctl = mvneta_ioctl, diff --git a/target/linux/mvebu/patches-6.1/702-net-next-ethernet-marvell-mvnetaMQPrioOffload.patch b/target/linux/mvebu/patches-6.1/702-net-next-ethernet-marvell-mvnetaMQPrioOffload.patch deleted file mode 100644 index 019b9528c36..00000000000 --- a/target/linux/mvebu/patches-6.1/702-net-next-ethernet-marvell-mvnetaMQPrioOffload.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 75fa71e3acadbb4ab5eda18505277eb9a1f69b23 Mon Sep 17 00:00:00 2001 -From: Maxime Chevallier -Date: Fri, 26 Nov 2021 12:20:53 +0100 -Subject: net: mvneta: Use struct tc_mqprio_qopt_offload for MQPrio - configuration - -The struct tc_mqprio_qopt_offload is a container for struct tc_mqprio_qopt, -that allows passing extra parameters, such as traffic shaping. This commit -converts the current mqprio code to that new struct. - -Signed-off-by: Maxime Chevallier -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 17 ++++++++++------- - 1 file changed, 10 insertions(+), 7 deletions(-) - -(limited to 'drivers/net/ethernet/marvell/mvneta.c') - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -38,6 +38,7 @@ - #include - #include - #include -+#include - #include - - /* Registers */ -@@ -4966,14 +4967,14 @@ static void mvneta_setup_rx_prio_map(str - } - - static int mvneta_setup_mqprio(struct net_device *dev, -- struct tc_mqprio_qopt *qopt) -+ struct tc_mqprio_qopt_offload *mqprio) - { - struct mvneta_port *pp = netdev_priv(dev); - u8 num_tc; - int i; - -- qopt->hw = TC_MQPRIO_HW_OFFLOAD_TCS; -- num_tc = qopt->num_tc; -+ mqprio->qopt.hw = TC_MQPRIO_HW_OFFLOAD_TCS; -+ num_tc = mqprio->qopt.num_tc; - - if (num_tc > rxq_number) - return -EINVAL; -@@ -4984,13 +4985,15 @@ static int mvneta_setup_mqprio(struct ne - return 0; - } - -- memcpy(pp->prio_tc_map, qopt->prio_tc_map, sizeof(pp->prio_tc_map)); -+ memcpy(pp->prio_tc_map, mqprio->qopt.prio_tc_map, -+ sizeof(pp->prio_tc_map)); - - mvneta_setup_rx_prio_map(pp); - -- netdev_set_num_tc(dev, qopt->num_tc); -- for (i = 0; i < qopt->num_tc; i++) -- netdev_set_tc_queue(dev, i, qopt->count[i], qopt->offset[i]); -+ netdev_set_num_tc(dev, mqprio->qopt.num_tc); -+ for (i = 0; i < mqprio->qopt.num_tc; i++) -+ netdev_set_tc_queue(dev, i, mqprio->qopt.count[i], -+ mqprio->qopt.offset[i]); - - return 0; - } diff --git a/target/linux/mvebu/patches-6.1/703-net-next-ethernet-marvell-mvnetaMQPrioFlag.patch b/target/linux/mvebu/patches-6.1/703-net-next-ethernet-marvell-mvnetaMQPrioFlag.patch deleted file mode 100644 index c878a288439..00000000000 --- a/target/linux/mvebu/patches-6.1/703-net-next-ethernet-marvell-mvnetaMQPrioFlag.patch +++ /dev/null @@ -1,30 +0,0 @@ -From e7ca75fe6662f78bfeb0112671c812e4c7b8e214 Mon Sep 17 00:00:00 2001 -From: Maxime Chevallier -Date: Fri, 26 Nov 2021 12:20:54 +0100 -Subject: net: mvneta: Don't force-set the offloading flag - -The qopt->hw flag is set by the TC code according to the offloading mode -asked by user. Don't force-set it in the driver, but instead read it to -make sure we do what's asked. - -Signed-off-by: Maxime Chevallier -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -(limited to 'drivers/net/ethernet/marvell/mvneta.c') - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -4973,7 +4973,9 @@ static int mvneta_setup_mqprio(struct ne - u8 num_tc; - int i; - -- mqprio->qopt.hw = TC_MQPRIO_HW_OFFLOAD_TCS; -+ if (mqprio->qopt.hw != TC_MQPRIO_HW_OFFLOAD_TCS) -+ return 0; -+ - num_tc = mqprio->qopt.num_tc; - - if (num_tc > rxq_number) diff --git a/target/linux/mvebu/patches-6.1/704-net-next-ethernet-marvell-mvnetaMQPrioQueue.patch b/target/linux/mvebu/patches-6.1/704-net-next-ethernet-marvell-mvnetaMQPrioQueue.patch deleted file mode 100644 index 546a8486ef0..00000000000 --- a/target/linux/mvebu/patches-6.1/704-net-next-ethernet-marvell-mvnetaMQPrioQueue.patch +++ /dev/null @@ -1,97 +0,0 @@ -From e9f7099d0730341b24c057acbf545dd019581db6 Mon Sep 17 00:00:00 2001 -From: Maxime Chevallier -Date: Fri, 26 Nov 2021 12:20:55 +0100 -Subject: net: mvneta: Allow having more than one queue per TC - -The current mqprio implementation assumed that we are only using one -queue per TC. Use the offset and count parameters to allow using -multiple queues per TC. In that case, the controller will use a standard -round-robin algorithm to pick queues assigned to the same TC, with the -same priority. - -This only applies to VLAN priorities in ingress traffic, each TC -corresponding to a vlan priority. - -Signed-off-by: Maxime Chevallier -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 35 ++++++++++++++++++++--------------- - 1 file changed, 20 insertions(+), 15 deletions(-) - -(limited to 'drivers/net/ethernet/marvell/mvneta.c') - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -498,7 +498,6 @@ struct mvneta_port { - u8 mcast_count[256]; - u16 tx_ring_size; - u16 rx_ring_size; -- u8 prio_tc_map[8]; - - phy_interface_t phy_interface; - struct device_node *dn; -@@ -4955,13 +4954,12 @@ static void mvneta_clear_rx_prio_map(str - mvreg_write(pp, MVNETA_VLAN_PRIO_TO_RXQ, 0); - } - --static void mvneta_setup_rx_prio_map(struct mvneta_port *pp) -+static void mvneta_map_vlan_prio_to_rxq(struct mvneta_port *pp, u8 pri, u8 rxq) - { -- u32 val = 0; -- int i; -+ u32 val = mvreg_read(pp, MVNETA_VLAN_PRIO_TO_RXQ); - -- for (i = 0; i < rxq_number; i++) -- val |= MVNETA_VLAN_PRIO_RXQ_MAP(i, pp->prio_tc_map[i]); -+ val &= ~MVNETA_VLAN_PRIO_RXQ_MAP(pri, 0x7); -+ val |= MVNETA_VLAN_PRIO_RXQ_MAP(pri, rxq); - - mvreg_write(pp, MVNETA_VLAN_PRIO_TO_RXQ, val); - } -@@ -4970,8 +4968,8 @@ static int mvneta_setup_mqprio(struct ne - struct tc_mqprio_qopt_offload *mqprio) - { - struct mvneta_port *pp = netdev_priv(dev); -+ int rxq, tc; - u8 num_tc; -- int i; - - if (mqprio->qopt.hw != TC_MQPRIO_HW_OFFLOAD_TCS) - return 0; -@@ -4981,21 +4979,28 @@ static int mvneta_setup_mqprio(struct ne - if (num_tc > rxq_number) - return -EINVAL; - -+ mvneta_clear_rx_prio_map(pp); -+ - if (!num_tc) { -- mvneta_clear_rx_prio_map(pp); - netdev_reset_tc(dev); - return 0; - } - -- memcpy(pp->prio_tc_map, mqprio->qopt.prio_tc_map, -- sizeof(pp->prio_tc_map)); -+ netdev_set_num_tc(dev, mqprio->qopt.num_tc); - -- mvneta_setup_rx_prio_map(pp); -+ for (tc = 0; tc < mqprio->qopt.num_tc; tc++) { -+ netdev_set_tc_queue(dev, tc, mqprio->qopt.count[tc], -+ mqprio->qopt.offset[tc]); -+ -+ for (rxq = mqprio->qopt.offset[tc]; -+ rxq < mqprio->qopt.count[tc] + mqprio->qopt.offset[tc]; -+ rxq++) { -+ if (rxq >= rxq_number) -+ return -EINVAL; - -- netdev_set_num_tc(dev, mqprio->qopt.num_tc); -- for (i = 0; i < mqprio->qopt.num_tc; i++) -- netdev_set_tc_queue(dev, i, mqprio->qopt.count[i], -- mqprio->qopt.offset[i]); -+ mvneta_map_vlan_prio_to_rxq(pp, tc, rxq); -+ } -+ } - - return 0; - } diff --git a/target/linux/mvebu/patches-6.1/705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload.patch b/target/linux/mvebu/patches-6.1/705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload.patch deleted file mode 100644 index 1d4a055a719..00000000000 --- a/target/linux/mvebu/patches-6.1/705-net-next-ethernet-marvell-mvnetaMQPrioTCOffload.patch +++ /dev/null @@ -1,182 +0,0 @@ -From 2551dc9e398c37a15e52122d385c29a8b06be45f Mon Sep 17 00:00:00 2001 -From: Maxime Chevallier -Date: Fri, 26 Nov 2021 12:20:56 +0100 -Subject: net: mvneta: Add TC traffic shaping offload - -The mvneta controller is able to do some tocken-bucket per-queue traffic -shaping. This commit adds support for setting these using the TC mqprio -interface. - -The token-bucket parameters are customisable, but the current -implementation configures them to have a 10kbps resolution for the -rate limitation, since it allows to cover the whole range of max_rate -values from 10kbps to 5Gbps with 10kbps increments. - -Signed-off-by: Maxime Chevallier -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/marvell/mvneta.c | 120 +++++++++++++++++++++++++++++++++- - 1 file changed, 119 insertions(+), 1 deletion(-) - -(limited to 'drivers/net/ethernet/marvell/mvneta.c') - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -248,12 +248,39 @@ - #define MVNETA_TXQ_SENT_DESC_MASK 0x3fff0000 - #define MVNETA_PORT_TX_RESET 0x3cf0 - #define MVNETA_PORT_TX_DMA_RESET BIT(0) -+#define MVNETA_TXQ_CMD1_REG 0x3e00 -+#define MVNETA_TXQ_CMD1_BW_LIM_SEL_V1 BIT(3) -+#define MVNETA_TXQ_CMD1_BW_LIM_EN BIT(0) -+#define MVNETA_REFILL_NUM_CLK_REG 0x3e08 -+#define MVNETA_REFILL_MAX_NUM_CLK 0x0000ffff - #define MVNETA_TX_MTU 0x3e0c - #define MVNETA_TX_TOKEN_SIZE 0x3e14 - #define MVNETA_TX_TOKEN_SIZE_MAX 0xffffffff -+#define MVNETA_TXQ_BUCKET_REFILL_REG(q) (0x3e20 + ((q) << 2)) -+#define MVNETA_TXQ_BUCKET_REFILL_PERIOD_MASK 0x3ff00000 -+#define MVNETA_TXQ_BUCKET_REFILL_PERIOD_SHIFT 20 -+#define MVNETA_TXQ_BUCKET_REFILL_VALUE_MAX 0x0007ffff - #define MVNETA_TXQ_TOKEN_SIZE_REG(q) (0x3e40 + ((q) << 2)) - #define MVNETA_TXQ_TOKEN_SIZE_MAX 0x7fffffff - -+/* The values of the bucket refill base period and refill period are taken from -+ * the reference manual, and adds up to a base resolution of 10Kbps. This allows -+ * to cover all rate-limit values from 10Kbps up to 5Gbps -+ */ -+ -+/* Base period for the rate limit algorithm */ -+#define MVNETA_TXQ_BUCKET_REFILL_BASE_PERIOD_NS 100 -+ -+/* Number of Base Period to wait between each bucket refill */ -+#define MVNETA_TXQ_BUCKET_REFILL_PERIOD 1000 -+ -+/* The base resolution for rate limiting, in bps. Any max_rate value should be -+ * a multiple of that value. -+ */ -+#define MVNETA_TXQ_RATE_LIMIT_RESOLUTION (NSEC_PER_SEC / \ -+ (MVNETA_TXQ_BUCKET_REFILL_BASE_PERIOD_NS * \ -+ MVNETA_TXQ_BUCKET_REFILL_PERIOD)) -+ - #define MVNETA_LPI_CTRL_0 0x2cc0 - #define MVNETA_LPI_CTRL_1 0x2cc4 - #define MVNETA_LPI_REQUEST_ENABLE BIT(0) -@@ -4964,11 +4991,74 @@ static void mvneta_map_vlan_prio_to_rxq( - mvreg_write(pp, MVNETA_VLAN_PRIO_TO_RXQ, val); - } - -+static int mvneta_enable_per_queue_rate_limit(struct mvneta_port *pp) -+{ -+ unsigned long core_clk_rate; -+ u32 refill_cycles; -+ u32 val; -+ -+ core_clk_rate = clk_get_rate(pp->clk); -+ if (!core_clk_rate) -+ return -EINVAL; -+ -+ refill_cycles = MVNETA_TXQ_BUCKET_REFILL_BASE_PERIOD_NS / -+ (NSEC_PER_SEC / core_clk_rate); -+ -+ if (refill_cycles > MVNETA_REFILL_MAX_NUM_CLK) -+ return -EINVAL; -+ -+ /* Enable bw limit algorithm version 3 */ -+ val = mvreg_read(pp, MVNETA_TXQ_CMD1_REG); -+ val &= ~(MVNETA_TXQ_CMD1_BW_LIM_SEL_V1 | MVNETA_TXQ_CMD1_BW_LIM_EN); -+ mvreg_write(pp, MVNETA_TXQ_CMD1_REG, val); -+ -+ /* Set the base refill rate */ -+ mvreg_write(pp, MVNETA_REFILL_NUM_CLK_REG, refill_cycles); -+ -+ return 0; -+} -+ -+static void mvneta_disable_per_queue_rate_limit(struct mvneta_port *pp) -+{ -+ u32 val = mvreg_read(pp, MVNETA_TXQ_CMD1_REG); -+ -+ val |= (MVNETA_TXQ_CMD1_BW_LIM_SEL_V1 | MVNETA_TXQ_CMD1_BW_LIM_EN); -+ mvreg_write(pp, MVNETA_TXQ_CMD1_REG, val); -+} -+ -+static int mvneta_setup_queue_rates(struct mvneta_port *pp, int queue, -+ u64 min_rate, u64 max_rate) -+{ -+ u32 refill_val, rem; -+ u32 val = 0; -+ -+ /* Convert to from Bps to bps */ -+ max_rate *= 8; -+ -+ if (min_rate) -+ return -EINVAL; -+ -+ refill_val = div_u64_rem(max_rate, MVNETA_TXQ_RATE_LIMIT_RESOLUTION, -+ &rem); -+ -+ if (rem || !refill_val || -+ refill_val > MVNETA_TXQ_BUCKET_REFILL_VALUE_MAX) -+ return -EINVAL; -+ -+ val = refill_val; -+ val |= (MVNETA_TXQ_BUCKET_REFILL_PERIOD << -+ MVNETA_TXQ_BUCKET_REFILL_PERIOD_SHIFT); -+ -+ mvreg_write(pp, MVNETA_TXQ_BUCKET_REFILL_REG(queue), val); -+ -+ return 0; -+} -+ - static int mvneta_setup_mqprio(struct net_device *dev, - struct tc_mqprio_qopt_offload *mqprio) - { - struct mvneta_port *pp = netdev_priv(dev); -- int rxq, tc; -+ int rxq, txq, tc, ret; - u8 num_tc; - - if (mqprio->qopt.hw != TC_MQPRIO_HW_OFFLOAD_TCS) -@@ -4982,6 +5072,7 @@ static int mvneta_setup_mqprio(struct ne - mvneta_clear_rx_prio_map(pp); - - if (!num_tc) { -+ mvneta_disable_per_queue_rate_limit(pp); - netdev_reset_tc(dev); - return 0; - } -@@ -5002,6 +5093,33 @@ static int mvneta_setup_mqprio(struct ne - } - } - -+ if (mqprio->shaper != TC_MQPRIO_SHAPER_BW_RATE) { -+ mvneta_disable_per_queue_rate_limit(pp); -+ return 0; -+ } -+ -+ if (mqprio->qopt.num_tc > txq_number) -+ return -EINVAL; -+ -+ ret = mvneta_enable_per_queue_rate_limit(pp); -+ if (ret) -+ return ret; -+ -+ for (tc = 0; tc < mqprio->qopt.num_tc; tc++) { -+ for (txq = mqprio->qopt.offset[tc]; -+ txq < mqprio->qopt.count[tc] + mqprio->qopt.offset[tc]; -+ txq++) { -+ if (txq >= txq_number) -+ return -EINVAL; -+ -+ ret = mvneta_setup_queue_rates(pp, txq, -+ mqprio->min_rate[tc], -+ mqprio->max_rate[tc]); -+ if (ret) -+ return ret; -+ } -+ } -+ - return 0; - } - diff --git a/target/linux/mvebu/patches-6.1/710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi.patch b/target/linux/mvebu/patches-6.1/710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi.patch deleted file mode 100644 index a852dc1fc11..00000000000 --- a/target/linux/mvebu/patches-6.1/710-v6.2-phy-marvell-phy-mvebu-a3700-comphy-Reset-COMPHY-regi.patch +++ /dev/null @@ -1,50 +0,0 @@ -From b01d622d76134e9401970ffd3fbbb9a7051f976a Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Pali=20Roh=C3=A1r?= -Date: Tue, 20 Sep 2022 14:11:54 +0200 -Subject: [PATCH] phy: marvell: phy-mvebu-a3700-comphy: Reset COMPHY registers - before USB 3.0 power on -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Turris MOX board with older ARM Trusted Firmware version v1.5 is not able -to detect any USB 3.0 device connected to USB-A port on Mox-A module after -commit 0a6fc70d76bd ("phy: marvell: phy-mvebu-a3700-comphy: Remove broken -reset support"). On the other hand USB 2.0 devices connected to the same -USB-A port are working fine. - -It looks as if the older firmware configures COMPHY registers for USB 3.0 -somehow incompatibly for kernel driver. Experiments show that resetting -COMPHY registers via setting SFT_RST auto-clearing bit in COMPHY_SFT_RESET -register fixes this issue. - -Reset the COMPHY in mvebu_a3700_comphy_usb3_power_on() function as a first -step after selecting COMPHY lane and USB 3.0 function. With this change -Turris MOX board can successfully detect USB 3.0 devices again. - -Before the above mentioned commit this reset was implemented in PHY reset -method, so this is the reason why there was no issue with older firmware -version then. - -Fixes: 0a6fc70d76bd ("phy: marvell: phy-mvebu-a3700-comphy: Remove broken reset support") -Reported-by: Marek Behún -Signed-off-by: Pali Rohár -Tested-by: Shin'ichiro Kawasaki -Link: https://lore.kernel.org/r/20220920121154.30115-1-pali@kernel.org -Signed-off-by: Vinod Koul ---- - drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c -+++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c -@@ -826,6 +826,9 @@ mvebu_a3700_comphy_usb3_power_on(struct - if (ret) - return ret; - -+ /* COMPHY register reset (cleared automatically) */ -+ comphy_lane_reg_set(lane, COMPHY_SFT_RESET, SFT_RST, SFT_RST); -+ - /* - * 0. Set PHY OTG Control(0x5d034), bit 4, Power up OTG module The - * register belong to UTMI module, so it is set in UTMI phy driver. diff --git a/target/linux/mvebu/patches-6.1/801-pci-mvebu-time-out-reset-on-link-up.patch b/target/linux/mvebu/patches-6.1/801-pci-mvebu-time-out-reset-on-link-up.patch index dba12536993..d2995b375c4 100644 --- a/target/linux/mvebu/patches-6.1/801-pci-mvebu-time-out-reset-on-link-up.patch +++ b/target/linux/mvebu/patches-6.1/801-pci-mvebu-time-out-reset-on-link-up.patch @@ -13,7 +13,7 @@ Signed-off-by: Russell King --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c -@@ -1023,6 +1023,7 @@ static int mvebu_pcie_powerup(struct mve +@@ -1414,6 +1414,7 @@ static int mvebu_pcie_powerup(struct mve if (port->reset_gpio) { u32 reset_udelay = PCI_PM_D3COLD_WAIT * 1000; @@ -21,7 +21,7 @@ Signed-off-by: Russell King of_property_read_u32(port->dn, "reset-delay-us", &reset_udelay); -@@ -1030,7 +1031,13 @@ static int mvebu_pcie_powerup(struct mve +@@ -1421,7 +1422,13 @@ static int mvebu_pcie_powerup(struct mve udelay(100); gpiod_set_value_cansleep(port->reset_gpio, 0); @@ -36,7 +36,7 @@ Signed-off-by: Russell King } return 0; -@@ -1190,15 +1197,16 @@ static int mvebu_pcie_probe(struct platf +@@ -1538,15 +1545,16 @@ static int mvebu_pcie_probe(struct platf if (!child) continue; diff --git a/target/linux/mvebu/patches-6.1/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch b/target/linux/mvebu/patches-6.1/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch index 3446086cadf..fc5c8045824 100644 --- a/target/linux/mvebu/patches-6.1/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch +++ b/target/linux/mvebu/patches-6.1/901-dt-bindings-Add-IEI-vendor-prefix-and-IEI-WT61P803-P.patch @@ -207,7 +207,7 @@ Cc: Robert Marko + }; --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml -@@ -519,6 +519,8 @@ patternProperties: +@@ -579,6 +579,8 @@ patternProperties: description: IC Plus Corp. "^idt,.*": description: Integrated Device Technologies, Inc. diff --git a/target/linux/mvebu/patches-6.1/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch b/target/linux/mvebu/patches-6.1/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch index 0e546b426ed..d2134042500 100644 --- a/target/linux/mvebu/patches-6.1/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch +++ b/target/linux/mvebu/patches-6.1/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch @@ -16,17 +16,17 @@ Signed-off-by: Pavo Banicevic Cc: Luka Perkov Cc: Robert Marko --- - drivers/mfd/Kconfig | 8 + + drivers/mfd/Kconfig | 9 + drivers/mfd/Makefile | 1 + drivers/mfd/iei-wt61p803-puzzle.c | 908 ++++++++++++++++++++++++ include/linux/mfd/iei-wt61p803-puzzle.h | 66 ++ - 4 files changed, 983 insertions(+) + 4 files changed, 984 insertions(+) create mode 100644 drivers/mfd/iei-wt61p803-puzzle.c create mode 100644 include/linux/mfd/iei-wt61p803-puzzle.h --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig -@@ -2189,6 +2189,15 @@ config SGI_MFD_IOC3 +@@ -2221,6 +2221,15 @@ config SGI_MFD_IOC3 If you have an SGI Origin, Octane, or a PCI IOC3 card, then say Y. Otherwise say N. @@ -44,14 +44,14 @@ Cc: Robert Marko depends on SPI_MASTER --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile -@@ -237,6 +237,7 @@ obj-$(CONFIG_MFD_DLN2) += dln2.o - obj-$(CONFIG_MFD_RT4831) += rt4831.o +@@ -244,6 +244,7 @@ obj-$(CONFIG_MFD_RT4831) += rt4831.o obj-$(CONFIG_MFD_RT5033) += rt5033.o + obj-$(CONFIG_MFD_RT5120) += rt5120.o obj-$(CONFIG_MFD_SKY81452) += sky81452.o -+obj-$(CONFIG_MFD_IEI_WT61P803_PUZZLE) += iei-wt61p803-puzzle.o ++obj-$(CONFIG_MFD_IEI_WT61P803_PUZZLE) += iei-wt61p803-puzzle.o - intel-soc-pmic-objs := intel_soc_pmic_core.o intel_soc_pmic_crc.o - obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o + obj-$(CONFIG_INTEL_SOC_PMIC) += intel_soc_pmic_crc.o + obj-$(CONFIG_INTEL_SOC_PMIC_BXTWC) += intel_soc_pmic_bxtwc.o --- /dev/null +++ b/drivers/mfd/iei-wt61p803-puzzle.c @@ -0,0 +1,908 @@ diff --git a/target/linux/mvebu/patches-6.1/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch b/target/linux/mvebu/patches-6.1/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch index 023495373b8..a11b387d929 100644 --- a/target/linux/mvebu/patches-6.1/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch +++ b/target/linux/mvebu/patches-6.1/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch @@ -20,13 +20,13 @@ Cc: Robert Marko --- drivers/hwmon/Kconfig | 8 + drivers/hwmon/Makefile | 1 + - drivers/hwmon/iei-wt61p803-puzzle-hwmon.c | 413 ++++++++++++++++++++++ - 3 files changed, 422 insertions(+) + drivers/hwmon/iei-wt61p803-puzzle-hwmon.c | 445 ++++++++++++++++++++++ + 3 files changed, 454 insertions(+) create mode 100644 drivers/hwmon/iei-wt61p803-puzzle-hwmon.c --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig -@@ -732,6 +732,14 @@ config SENSORS_IBMPOWERNV +@@ -755,6 +755,14 @@ config SENSORS_IBMPOWERNV This driver can also be built as a module. If so, the module will be called ibmpowernv. @@ -43,7 +43,7 @@ Cc: Robert Marko depends on IIO --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile -@@ -84,6 +84,7 @@ obj-$(CONFIG_SENSORS_HIH6130) += hih6130 +@@ -87,6 +87,7 @@ obj-$(CONFIG_SENSORS_HIH6130) += hih6130 obj-$(CONFIG_SENSORS_ULTRA45) += ultra45_env.o obj-$(CONFIG_SENSORS_I5500) += i5500_temp.o obj-$(CONFIG_SENSORS_I5K_AMB) += i5k_amb.o diff --git a/target/linux/mvebu/patches-6.1/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch b/target/linux/mvebu/patches-6.1/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch index a3fc731c471..ec783256e32 100644 --- a/target/linux/mvebu/patches-6.1/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch +++ b/target/linux/mvebu/patches-6.1/904-drivers-leds-Add-the-IEI-WT61P803-PUZZLE-LED-driver.patch @@ -30,7 +30,7 @@ Cc: Robert Marko --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig -@@ -306,6 +306,14 @@ config LEDS_IPAQ_MICRO +@@ -299,6 +299,14 @@ config LEDS_IPAQ_MICRO Choose this option if you want to use the notification LED on Compaq/HP iPAQ h3100 and h3600. @@ -47,7 +47,7 @@ Cc: Robert Marko depends on LEDS_CLASS --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile -@@ -33,6 +33,7 @@ obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx. +@@ -32,6 +32,7 @@ obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx. obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o obj-$(CONFIG_LEDS_IP30) += leds-ip30.o obj-$(CONFIG_LEDS_IPAQ_MICRO) += leds-ipaq-micro.o diff --git a/target/linux/mvebu/patches-6.1/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch b/target/linux/mvebu/patches-6.1/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch index 9015436f6a4..0f1a6f306bb 100644 --- a/target/linux/mvebu/patches-6.1/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch +++ b/target/linux/mvebu/patches-6.1/906-Documentation-hwmon-Add-iei-wt61p803-puzzle-hwmon-dr.patch @@ -64,11 +64,11 @@ Cc: Robert Marko +================= == ===================================================== --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst -@@ -74,6 +74,7 @@ Hardware Monitoring Kernel Drivers +@@ -77,6 +77,7 @@ Hardware Monitoring Kernel Drivers ibmaem ibm-cffps ibmpowernv + iei-wt61p803-puzzle-hwmon ina209 ina2xx - ina3221 + ina238 diff --git a/target/linux/mvebu/patches-6.1/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch b/target/linux/mvebu/patches-6.1/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch index b8accf180bb..e72df378efe 100644 --- a/target/linux/mvebu/patches-6.1/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch +++ b/target/linux/mvebu/patches-6.1/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch @@ -16,7 +16,7 @@ Cc: Robert Marko --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -9063,6 +9063,22 @@ F: include/net/nl802154.h +@@ -9900,6 +9900,22 @@ F: include/net/nl802154.h F: net/ieee802154/ F: net/mac802154/ From b1993f362a8a55d62ec995b0b34174a124fee869 Mon Sep 17 00:00:00 2001 From: Stefan Kalscheuer Date: Sun, 18 Jun 2023 17:04:18 +0200 Subject: [PATCH 05/27] mvebu: copy 5.15 kconfigs to 6.1 Start 6.1 migration with a full copy of the current stable config. Signed-off-by: Stefan Kalscheuer --- target/linux/mvebu/config-6.1 | 435 ++++++++++++++++++++++++ target/linux/mvebu/cortexa53/config-6.1 | 83 +++++ target/linux/mvebu/cortexa72/config-6.1 | 97 ++++++ target/linux/mvebu/cortexa9/config-6.1 | 3 + 4 files changed, 618 insertions(+) create mode 100644 target/linux/mvebu/config-6.1 create mode 100644 target/linux/mvebu/cortexa53/config-6.1 create mode 100644 target/linux/mvebu/cortexa72/config-6.1 create mode 100644 target/linux/mvebu/cortexa9/config-6.1 diff --git a/target/linux/mvebu/config-6.1 b/target/linux/mvebu/config-6.1 new file mode 100644 index 00000000000..0811ee6d4ce --- /dev/null +++ b/target/linux/mvebu/config-6.1 @@ -0,0 +1,435 @@ +CONFIG_AHCI_MVEBU=y +CONFIG_ALIGNMENT_TRAP=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_MVEBU=y +CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM=y +CONFIG_ARMADA_370_CLK=y +CONFIG_ARMADA_370_XP_IRQ=y +CONFIG_ARMADA_370_XP_TIMER=y +# CONFIG_ARMADA_37XX_WATCHDOG is not set +CONFIG_ARMADA_38X_CLK=y +CONFIG_ARMADA_THERMAL=y +CONFIG_ARMADA_XP_CLK=y +CONFIG_ARM_APPENDED_DTB=y +# CONFIG_ARM_ARMADA_37XX_CPUFREQ is not set +# CONFIG_ARM_ARMADA_8K_CPUFREQ is not set +CONFIG_ARM_ATAG_DTB_COMPAT=y +# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_CRYPTO=y +CONFIG_ARM_ERRATA_720789=y +CONFIG_ARM_ERRATA_764369=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GLOBAL_TIMER=y +CONFIG_ARM_GT_INITIAL_PRESCALER_VAL=1 +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_ARM_HEAVY_MB=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_MVEBU_V7_CPUIDLE=y +CONFIG_ARM_PATCH_IDIV=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_ARM_THUMB=y +CONFIG_ARM_UNWIND=y +CONFIG_ARM_VIRT_EXT=y +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_ATA=y +CONFIG_ATAGS=y +CONFIG_ATA_LEDS=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_NVME=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BOUNCE=y +# CONFIG_CACHE_FEROCEON_L2 is not set +CONFIG_CACHE_L2X0=y +CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_GOV_USERSPACE is not set +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_PJ4B=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SPECTRE=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRC16=y +CONFIG_CRYPTO_AES_ARM=y +CONFIG_CRYPTO_AES_ARM_BS=y +CONFIG_CRYPTO_AUTHENC=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_DEV_MARVELL=y +CONFIG_CRYPTO_DEV_MARVELL_CESA=y +CONFIG_CRYPTO_ESSIV=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA1_ARM=y +CONFIG_CRYPTO_SHA1_ARM_NEON=y +CONFIG_CRYPTO_SHA256_ARM=y +CONFIG_CRYPTO_SHA512_ARM=y +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_ALIGN_RODATA=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_LL=y +CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" +CONFIG_DEBUG_MVEBU_UART0=y +# CONFIG_DEBUG_MVEBU_UART0_ALTERNATE is not set +# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set +CONFIG_DEBUG_UART_8250=y +CONFIG_DEBUG_UART_8250_SHIFT=2 +CONFIG_DEBUG_UART_PHYS=0xd0012000 +CONFIG_DEBUG_UART_VIRT=0xfec12000 +CONFIG_DEBUG_UNCOMPRESS=y +CONFIG_DEBUG_USER=y +CONFIG_DMADEVICES=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_ENGINE_RAID=y +CONFIG_DMA_OF=y +CONFIG_DMA_OPS=y +CONFIG_DMA_REMAP=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_EXT4_FS=y +CONFIG_EXTCON=y +CONFIG_F2FS_FS=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_VDSO_32=y +CONFIG_GLOB=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_MVEBU=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_GRO_CELLS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAVE_SMP=y +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y +CONFIG_HOTPLUG_CPU=y +CONFIG_HWBM=y +CONFIG_HWMON=y +CONFIG_HW_RANDOM=y +CONFIG_HZ_FIXED=0 +CONFIG_HZ_PERIODIC=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MV64XXX=y +# CONFIG_I2C_PXA is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +# CONFIG_IWMMXT is not set +CONFIG_JBD2=y +CONFIG_KMAP_LOCAL=y +CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PCA963X=y +CONFIG_LEDS_TLC591XX=y +CONFIG_LEDS_TRIGGER_DISK=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MACH_ARMADA_370=y +# CONFIG_MACH_ARMADA_375 is not set +CONFIG_MACH_ARMADA_38X=y +# CONFIG_MACH_ARMADA_39X is not set +CONFIG_MACH_ARMADA_XP=y +# CONFIG_MACH_DOVE is not set +CONFIG_MACH_MVEBU_ANY=y +CONFIG_MACH_MVEBU_V7=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MANGLE_BOOTARGS=y +CONFIG_MARVELL_PHY=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_I2C=y +CONFIG_MEMFD_CREATE=y +CONFIG_MEMORY=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_MVSDIO=y +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_PXAV3=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_NAND_MARVELL=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_MVEBU_CLK_COMMON=y +CONFIG_MVEBU_CLK_COREDIV=y +CONFIG_MVEBU_CLK_CPU=y +CONFIG_MVEBU_DEVBUS=y +CONFIG_MVEBU_MBUS=y +CONFIG_MVMDIO=y +CONFIG_MVNETA=y +CONFIG_MVNETA_BM=y +CONFIG_MVNETA_BM_ENABLE=y +# CONFIG_MVPP2 is not set +CONFIG_MV_XOR=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEON=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_MV88E6XXX=y +CONFIG_NET_DSA_TAG_DSA=y +CONFIG_NET_DSA_TAG_DSA_COMMON=y +CONFIG_NET_DSA_TAG_EDSA=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NLS=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_NR_CPUS=4 +CONFIG_NVMEM=y +CONFIG_NVME_CORE=y +# CONFIG_NVME_HWMON is not set +# CONFIG_NVME_MULTIPATH is not set +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_ORION_WATCHDOG=y +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_PADATA=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PAGE_POOL=y +CONFIG_PCI=y +CONFIG_PCI_BRIDGE_EMUL=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PCI_MVEBU=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +# CONFIG_PHY_MVEBU_A3700_COMPHY is not set +# CONFIG_PHY_MVEBU_A3700_UTMI is not set +# CONFIG_PHY_MVEBU_A38X_COMPHY is not set +# CONFIG_PHY_MVEBU_CP110_COMPHY is not set +# CONFIG_PHY_MVEBU_CP110_UTMI is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_370=y +CONFIG_PINCTRL_ARMADA_38X=y +CONFIG_PINCTRL_ARMADA_XP=y +CONFIG_PINCTRL_MVEBU=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PJ4B_ERRATA_4742=y +CONFIG_PL310_ERRATA_753970=y +CONFIG_PLAT_ORION=y +CONFIG_PM_OPP=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_PWM=y +CONFIG_PWM_SYSFS=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_ARMADA38X=y +# CONFIG_RTC_DRV_MV is not set +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_SATA_HOST=y +CONFIG_SATA_MV=y +CONFIG_SATA_PMP=y +CONFIG_SCSI=y +CONFIG_SCSI_COMMON=y +CONFIG_SENSORS_PWM_FAN=y +CONFIG_SENSORS_TMP421=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_MVEBU_CONSOLE=y +CONFIG_SERIAL_MVEBU_UART=y +CONFIG_SFP=y +CONFIG_SGL_ALLOC=y +CONFIG_SG_POOL=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BUS=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +# CONFIG_SPI_ARMADA_3700 is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPI_ORION=y +CONFIG_SRAM=y +CONFIG_SRAM_EXEC=y +CONFIG_SRCU=y +CONFIG_SWPHY=y +CONFIG_SWP_EMULATE=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_UNWINDER_ARM=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_ORION=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_LEDS_TRIGGER_USBPORT=y +CONFIG_USB_PHY=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_MVEBU=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USE_OF=y +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_WATCHDOG_CORE=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/mvebu/cortexa53/config-6.1 b/target/linux/mvebu/cortexa53/config-6.1 new file mode 100644 index 00000000000..27d410f68b9 --- /dev/null +++ b/target/linux/mvebu/cortexa53/config-6.1 @@ -0,0 +1,83 @@ +CONFIG_64BIT=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_ARM64=y +CONFIG_ARM64_4K_PAGES=y +CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_TAGGED_ADDR_ABI=y +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_VA_BITS_39=y +CONFIG_ARMADA_37XX_CLK=y +CONFIG_ARMADA_37XX_RWTM_MBOX=y +CONFIG_ARMADA_37XX_WATCHDOG=y +CONFIG_ARMADA_AP806_SYSCON=y +CONFIG_ARMADA_AP_CP_HELPER=y +CONFIG_ARMADA_CP110_SYSCON=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER=y +# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set +CONFIG_ARM_ARMADA_37XX_CPUFREQ=y +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_ARM_MHU_V2 is not set +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_ARM_PSCI_FW=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_FRAME_POINTER=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_PINCONF=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_MAILBOX=y +# CONFIG_MAILBOX_TEST is not set +CONFIG_MFD_SYSCON=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MVEBU_GICP=y +CONFIG_MVEBU_ICU=y +CONFIG_MVEBU_ODMI=y +CONFIG_MVEBU_PIC=y +CONFIG_MVEBU_SEI=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_PARTITION_PERCPU=y +CONFIG_PCI_AARDVARK=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PHY_MVEBU_A3700_COMPHY=y +CONFIG_PHY_MVEBU_A3700_UTMI=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_PINCTRL_ARMADA_AP806=y +CONFIG_PINCTRL_ARMADA_CP110=y +CONFIG_POWER_SUPPLY=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_REGULATOR_GPIO=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPI_ARMADA_3700=y +CONFIG_SWIOTLB=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TURRIS_MOX_RWTM=y +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_VMAP_STACK=y +CONFIG_ZONE_DMA32=y diff --git a/target/linux/mvebu/cortexa72/config-6.1 b/target/linux/mvebu/cortexa72/config-6.1 new file mode 100644 index 00000000000..cb27e0285fa --- /dev/null +++ b/target/linux/mvebu/cortexa72/config-6.1 @@ -0,0 +1,97 @@ +CONFIG_64BIT=y +CONFIG_AQUANTIA_PHY=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_ARM64=y +CONFIG_ARM64_4K_PAGES=y +CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_1742098=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_SVE=y +# CONFIG_ARM64_TAGGED_ADDR_ABI is not set +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_VA_BITS_39=y +CONFIG_ARMADA_37XX_CLK=y +CONFIG_ARMADA_AP806_SYSCON=y +CONFIG_ARMADA_AP_CPU_CLK=y +CONFIG_ARMADA_AP_CP_HELPER=y +CONFIG_ARMADA_CP110_SYSCON=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER=y +# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set +CONFIG_ARM_ARMADA_8K_CPUFREQ=y +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_ARM_PSCI_FW=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_FRAME_POINTER=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_PINCONF=y +CONFIG_HW_RANDOM_OMAP=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_LEDS_IEI_WT61P803_PUZZLE=y +CONFIG_LEDS_IS31FL319X=y +CONFIG_MARVELL_10G_PHY=y +CONFIG_MFD_CORE=y +CONFIG_MFD_IEI_WT61P803_PUZZLE=y +CONFIG_MFD_SYSCON=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MVEBU_GICP=y +CONFIG_MVEBU_ICU=y +CONFIG_MVEBU_ODMI=y +CONFIG_MVEBU_PIC=y +CONFIG_MVEBU_SEI=y +CONFIG_MVPP2=y +CONFIG_MV_XOR_V2=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_PARTITION_PERCPU=y +CONFIG_PCIEAER=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_ARMADA_8K=y +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +# CONFIG_PCI_AARDVARK is not set +CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PHY_MVEBU_CP110_COMPHY=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_PINCTRL_ARMADA_AP806=y +CONFIG_PINCTRL_ARMADA_CP110=y +CONFIG_POWER_SUPPLY=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RAS=y +# CONFIG_RAVE_SP_CORE is not set +CONFIG_REGULATOR_GPIO=y +# CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set +CONFIG_SENSORS_IEI_WT61P803_PUZZLE_HWMON=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SWIOTLB=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_VMAP_STACK=y +CONFIG_ZONE_DMA32=y diff --git a/target/linux/mvebu/cortexa9/config-6.1 b/target/linux/mvebu/cortexa9/config-6.1 new file mode 100644 index 00000000000..88a2f14c026 --- /dev/null +++ b/target/linux/mvebu/cortexa9/config-6.1 @@ -0,0 +1,3 @@ +CONFIG_LED_TRIGGER_PHY=y +CONFIG_PHY_MVEBU_A38X_COMPHY=y +CONFIG_RTC_DRV_MV=y From 801c67b4e09b16ac4a2b8a9fbde76d37cd67d91f Mon Sep 17 00:00:00 2001 From: Stefan Kalscheuer Date: Sun, 18 Jun 2023 17:06:57 +0200 Subject: [PATCH 06/27] mvebu: add kernel 6.1 as testing kernel With an initial set of patches and configs in place let's start testing with kernel 6.1. Run-tested on the cortexa9 subtarget (WRT1900ACS, Turris Omnia) Tested-by: Etienne Champetier Signed-off-by: Stefan Kalscheuer --- target/linux/mvebu/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/target/linux/mvebu/Makefile b/target/linux/mvebu/Makefile index 2971f3fcaf5..9f5d374abd9 100644 --- a/target/linux/mvebu/Makefile +++ b/target/linux/mvebu/Makefile @@ -10,6 +10,7 @@ FEATURES:=fpu usb pci pcie gpio nand squashfs ramdisk boot-part rootfs-part lega SUBTARGETS:=cortexa9 cortexa53 cortexa72 KERNEL_PATCHVER:=5.15 +KERNEL_TESTING_PATCHVER:=6.1 include $(INCLUDE_DIR)/target.mk From 57fda4b743ecf06c217d2670002313d528ff817a Mon Sep 17 00:00:00 2001 From: Nick Hainke Date: Wed, 2 Aug 2023 14:18:31 +0200 Subject: [PATCH 07/27] tools/ccache: update to 4.8.2 Release Notes: https://ccache.dev/releasenotes.html#_ccache_4_8_2 Refresh patch: - 100-honour-copts.patch Signed-off-by: Nick Hainke --- tools/ccache/Makefile | 4 ++-- tools/ccache/patches/100-honour-copts.patch | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/ccache/Makefile b/tools/ccache/Makefile index 33255e92970..0571a994b8c 100644 --- a/tools/ccache/Makefile +++ b/tools/ccache/Makefile @@ -7,11 +7,11 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ccache -PKG_VERSION:=4.8.1 +PKG_VERSION:=4.8.2 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=https://github.com/ccache/ccache/releases/download/v$(PKG_VERSION) -PKG_HASH:=87959b6819530b3dcaeb39992f585b9fc2c7120302809741378097774919fb6f +PKG_HASH:=3d3fb3f888a5b16c4fa7ee5214cca76348afd6130e8443de5f6f2424f2076a49 include $(INCLUDE_DIR)/host-build.mk include $(INCLUDE_DIR)/cmake.mk diff --git a/tools/ccache/patches/100-honour-copts.patch b/tools/ccache/patches/100-honour-copts.patch index da72af922d0..91dc35536fb 100644 --- a/tools/ccache/patches/100-honour-copts.patch +++ b/tools/ccache/patches/100-honour-copts.patch @@ -1,6 +1,6 @@ --- a/src/ccache.cpp +++ b/src/ccache.cpp -@@ -1813,6 +1813,7 @@ get_manifest_key(Context& ctx, Hash& has +@@ -1815,6 +1815,7 @@ get_manifest_key(Context& ctx, Hash& has "CPLUS_INCLUDE_PATH", "OBJC_INCLUDE_PATH", "OBJCPLUS_INCLUDE_PATH", // clang From 15acde674c76504e023a525506a2e248e9aecd24 Mon Sep 17 00:00:00 2001 From: Stijn Tintel Date: Fri, 28 Jul 2023 22:40:34 +0300 Subject: [PATCH 08/27] xdp-tools: disable stack protector for BPF programs When building xdp-tools with CONFIG_USE_LLVM_HOST=y, on a host that enabled stack protector by default in Clang, compilation fails with the following error: CLANG xdp-dispatcher.o clang-16: error: ignoring '-fstack-protector-strong' option as it is not currently supported for target 'bpfeb' [-Werror,-Woption-ignored] Add -fno-stack-protector to BPF_CFLAGS to fix this. Signed-off-by: Stijn Tintel --- package/network/utils/xdp-tools/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/network/utils/xdp-tools/Makefile b/package/network/utils/xdp-tools/Makefile index 3cc7980cf60..dba775e4ea1 100644 --- a/package/network/utils/xdp-tools/Makefile +++ b/package/network/utils/xdp-tools/Makefile @@ -94,7 +94,7 @@ MAKE_VARS += \ define Build/Configure $(call Build/Configure/Default) - echo "BPF_CFLAGS += -I$(BPF_HEADERS_DIR)/tools/lib" >> $(PKG_BUILD_DIR)/config.mk + echo "BPF_CFLAGS += -I$(BPF_HEADERS_DIR)/tools/lib -fno-stack-protector" >> $(PKG_BUILD_DIR)/config.mk endef define Build/InstallDev From 2a5c7bf6213cc12d4ae6b7bce5d777b3518a89c1 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Tue, 1 Aug 2023 18:04:24 +0100 Subject: [PATCH 09/27] kernel: netdevices: add driver for Marvell 10G Ethernet PHYs Package kernel module for Marvell 10G Ethernet PHYs found also in many 10G/1G/100M/10M RJ-45 SFP+ modules. Signed-off-by: Daniel Golle --- package/kernel/linux/modules/netdevices.mk | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/package/kernel/linux/modules/netdevices.mk b/package/kernel/linux/modules/netdevices.mk index 33e7f1bc306..ec6741712e1 100644 --- a/package/kernel/linux/modules/netdevices.mk +++ b/package/kernel/linux/modules/netdevices.mk @@ -308,6 +308,24 @@ endef $(eval $(call KernelPackage,phy-marvell)) +define KernelPackage/phy-marvell-10g + SUBMENU:=$(NETWORK_DEVICES_MENU) + TITLE:=Marvell 10 Gigabit Ethernet PHY driver + KCONFIG:=CONFIG_MARVELL_10G_PHY + DEPENDS:=+kmod-libphy + FILES:=$(LINUX_DIR)/drivers/net/phy/marvell10g.ko + AUTOLOAD:=$(call AutoLoad,18,marvell10g) +endef + +define KernelPackage/phy-marvell/description + Supports Marvell 10 Gigabit Ethernet PHYs: + * 88E2110 + * 88E2111 + * 88x3310 + * 88x3340 +endef + +$(eval $(call KernelPackage,phy-marvell-10g)) define KernelPackage/phy-realtek SUBMENU:=$(NETWORK_DEVICES_MENU) From 36d0aa9c2db0f74614b04a152fb092bcc74afb8e Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Tue, 1 Aug 2023 00:04:56 +0100 Subject: [PATCH 10/27] mediatek: filogic: sync pinctrl-mt7988 with MediaTek SDK Update pinctrl driver for the MT7988 with driver from mtk-openwrt-feeds. Signed-off-by: Daniel Golle --- .../drivers/pinctrl/mediatek/pinctrl-mt7988.c | 415 +++++++++++++----- .../drivers/pinctrl/mediatek/pinctrl-mt7988.c | 382 +++++++++++----- 2 files changed, 583 insertions(+), 214 deletions(-) diff --git a/target/linux/mediatek/files-5.15/drivers/pinctrl/mediatek/pinctrl-mt7988.c b/target/linux/mediatek/files-5.15/drivers/pinctrl/mediatek/pinctrl-mt7988.c index 80a7e19f7a2..49c0be1bba0 100644 --- a/target/linux/mediatek/files-5.15/drivers/pinctrl/mediatek/pinctrl-mt7988.c +++ b/target/linux/mediatek/files-5.15/drivers/pinctrl/mediatek/pinctrl-mt7988.c @@ -46,37 +46,53 @@ static const struct mtk_pin_field_calc mt7988_pin_do_range[] = { }; static const struct mtk_pin_field_calc mt7988_pin_ies_range[] = { - PIN_FIELD_BASE(0, 1, 5, 0x30, 0x10, 13, 1), - PIN_FIELD_BASE(2, 3, 5, 0x30, 0x10, 11, 1), + PIN_FIELD_BASE(0, 0, 5, 0x30, 0x10, 13, 1), + PIN_FIELD_BASE(1, 1, 5, 0x30, 0x10, 14, 1), + PIN_FIELD_BASE(2, 2, 5, 0x30, 0x10, 11, 1), + PIN_FIELD_BASE(3, 3, 5, 0x30, 0x10, 12, 1), PIN_FIELD_BASE(4, 4, 5, 0x30, 0x10, 0, 1), - PIN_FIELD_BASE(5, 6, 5, 0x30, 0x10, 9, 1), + PIN_FIELD_BASE(5, 5, 5, 0x30, 0x10, 9, 1), + PIN_FIELD_BASE(6, 6, 5, 0x30, 0x10, 10, 1), + PIN_FIELD_BASE(7, 7, 4, 0x30, 0x10, 8, 1), PIN_FIELD_BASE(8, 8, 4, 0x30, 0x10, 6, 1), PIN_FIELD_BASE(9, 9, 4, 0x30, 0x10, 5, 1), PIN_FIELD_BASE(10, 10, 4, 0x30, 0x10, 3, 1), + PIN_FIELD_BASE(11, 11, 1, 0x40, 0x10, 0, 1), PIN_FIELD_BASE(12, 12, 1, 0x40, 0x10, 21, 1), - PIN_FIELD_BASE(13, 14, 1, 0x40, 0x10, 1, 1), - PIN_FIELD_BASE(15, 16, 5, 0x30, 0x10, 7, 1), - PIN_FIELD_BASE(17, 18, 5, 0x30, 0x10, 3, 1), + PIN_FIELD_BASE(13, 13, 1, 0x40, 0x10, 1, 1), + PIN_FIELD_BASE(14, 14, 1, 0x40, 0x10, 2, 1), + + PIN_FIELD_BASE(15, 15, 5, 0x30, 0x10, 7, 1), + PIN_FIELD_BASE(16, 16, 5, 0x30, 0x10, 8, 1), + PIN_FIELD_BASE(17, 17, 5, 0x30, 0x10, 3, 1), + PIN_FIELD_BASE(18, 18, 5, 0x30, 0x10, 4, 1), + PIN_FIELD_BASE(19, 19, 4, 0x30, 0x10, 7, 1), PIN_FIELD_BASE(20, 20, 4, 0x30, 0x10, 4, 1), + PIN_FIELD_BASE(21, 21, 3, 0x50, 0x10, 17, 1), PIN_FIELD_BASE(22, 22, 3, 0x50, 0x10, 23, 1), PIN_FIELD_BASE(23, 23, 3, 0x50, 0x10, 20, 1), PIN_FIELD_BASE(24, 24, 3, 0x50, 0x10, 19, 1), - PIN_FIELD_BASE(25, 26, 3, 0x50, 0x10, 21, 1), + PIN_FIELD_BASE(25, 25, 3, 0x50, 0x10, 21, 1), + PIN_FIELD_BASE(26, 26, 3, 0x50, 0x10, 22, 1), PIN_FIELD_BASE(27, 27, 3, 0x50, 0x10, 18, 1), - PIN_FIELD_BASE(28, 30, 3, 0x50, 0x10, 25, 1), + PIN_FIELD_BASE(28, 28, 3, 0x50, 0x10, 25, 1), + PIN_FIELD_BASE(29, 29, 3, 0x50, 0x10, 26, 1), + PIN_FIELD_BASE(30, 30, 3, 0x50, 0x10, 27, 1), PIN_FIELD_BASE(31, 31, 3, 0x50, 0x10, 24, 1), PIN_FIELD_BASE(32, 32, 3, 0x50, 0x10, 28, 1), PIN_FIELD_BASE(33, 33, 3, 0x60, 0x10, 0, 1), PIN_FIELD_BASE(34, 34, 3, 0x50, 0x10, 31, 1), - PIN_FIELD_BASE(35, 36, 3, 0x50, 0x10, 29, 1), + PIN_FIELD_BASE(35, 35, 3, 0x50, 0x10, 29, 1), + PIN_FIELD_BASE(36, 36, 3, 0x50, 0x10, 30, 1), PIN_FIELD_BASE(37, 37, 3, 0x60, 0x10, 1, 1), PIN_FIELD_BASE(38, 38, 3, 0x50, 0x10, 11, 1), PIN_FIELD_BASE(39, 39, 3, 0x50, 0x10, 10, 1), - PIN_FIELD_BASE(40, 41, 3, 0x50, 0x10, 0, 1), + PIN_FIELD_BASE(40, 40, 3, 0x50, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 3, 0x50, 0x10, 1, 1), PIN_FIELD_BASE(42, 42, 3, 0x50, 0x10, 9, 1), PIN_FIELD_BASE(43, 43, 3, 0x50, 0x10, 8, 1), PIN_FIELD_BASE(44, 44, 3, 0x50, 0x10, 7, 1), @@ -86,17 +102,31 @@ static const struct mtk_pin_field_calc mt7988_pin_ies_range[] = { PIN_FIELD_BASE(48, 48, 3, 0x50, 0x10, 3, 1), PIN_FIELD_BASE(49, 49, 3, 0x50, 0x10, 2, 1), PIN_FIELD_BASE(50, 50, 3, 0x50, 0x10, 15, 1), - PIN_FIELD_BASE(51, 53, 3, 0x50, 0x10, 12, 1), + PIN_FIELD_BASE(51, 51, 3, 0x50, 0x10, 12, 1), + PIN_FIELD_BASE(52, 52, 3, 0x50, 0x10, 13, 1), + PIN_FIELD_BASE(53, 53, 3, 0x50, 0x10, 14, 1), PIN_FIELD_BASE(54, 54, 3, 0x50, 0x10, 16, 1), - PIN_FIELD_BASE(55, 56, 1, 0x40, 0x10, 14, 1), + + PIN_FIELD_BASE(55, 55, 1, 0x40, 0x10, 14, 1), + PIN_FIELD_BASE(56, 56, 1, 0x40, 0x10, 15, 1), PIN_FIELD_BASE(57, 57, 1, 0x40, 0x10, 13, 1), - PIN_FIELD_BASE(58, 60, 1, 0x40, 0x10, 4, 1), + PIN_FIELD_BASE(58, 58, 1, 0x40, 0x10, 4, 1), + PIN_FIELD_BASE(59, 59, 1, 0x40, 0x10, 5, 1), + PIN_FIELD_BASE(60, 60, 1, 0x40, 0x10, 6, 1), PIN_FIELD_BASE(61, 61, 1, 0x40, 0x10, 3, 1), PIN_FIELD_BASE(62, 62, 1, 0x40, 0x10, 7, 1), PIN_FIELD_BASE(63, 63, 1, 0x40, 0x10, 20, 1), - PIN_FIELD_BASE(64, 68, 1, 0x40, 0x10, 8, 1), - PIN_FIELD_BASE(69, 70, 5, 0x30, 0x10, 1, 1), - PIN_FIELD_BASE(71, 72, 5, 0x30, 0x10, 5, 1), + PIN_FIELD_BASE(64, 64, 1, 0x40, 0x10, 8, 1), + PIN_FIELD_BASE(65, 65, 1, 0x40, 0x10, 9, 1), + PIN_FIELD_BASE(66, 66, 1, 0x40, 0x10, 10, 1), + PIN_FIELD_BASE(67, 67, 1, 0x40, 0x10, 11, 1), + PIN_FIELD_BASE(68, 68, 1, 0x40, 0x10, 12, 1), + + PIN_FIELD_BASE(69, 69, 5, 0x30, 0x10, 1, 1), + PIN_FIELD_BASE(70, 70, 5, 0x30, 0x10, 2, 1), + PIN_FIELD_BASE(71, 71, 5, 0x30, 0x10, 5, 1), + PIN_FIELD_BASE(72, 72, 5, 0x30, 0x10, 6, 1), + PIN_FIELD_BASE(73, 73, 4, 0x30, 0x10, 10, 1), PIN_FIELD_BASE(74, 74, 4, 0x30, 0x10, 1, 1), PIN_FIELD_BASE(75, 75, 4, 0x30, 0x10, 11, 1), @@ -104,42 +134,61 @@ static const struct mtk_pin_field_calc mt7988_pin_ies_range[] = { PIN_FIELD_BASE(77, 77, 4, 0x30, 0x10, 2, 1), PIN_FIELD_BASE(78, 78, 4, 0x30, 0x10, 0, 1), PIN_FIELD_BASE(79, 79, 4, 0x30, 0x10, 12, 1), - PIN_FIELD_BASE(80, 81, 1, 0x40, 0x10, 18, 1), - PIN_FIELD_BASE(82, 83, 1, 0x40, 0x10, 16, 1), + + PIN_FIELD_BASE(80, 80, 1, 0x40, 0x10, 18, 1), + PIN_FIELD_BASE(81, 81, 1, 0x40, 0x10, 19, 1), + PIN_FIELD_BASE(82, 82, 1, 0x40, 0x10, 16, 1), + PIN_FIELD_BASE(83, 83, 1, 0x40, 0x10, 17, 1), }; static const struct mtk_pin_field_calc mt7988_pin_smt_range[] = { - PIN_FIELD_BASE(0, 1, 5, 0xc0, 0x10, 13, 1), - PIN_FIELD_BASE(2, 3, 5, 0xc0, 0x10, 11, 1), + PIN_FIELD_BASE(0, 0, 5, 0xc0, 0x10, 13, 1), + PIN_FIELD_BASE(1, 1, 5, 0xc0, 0x10, 14, 1), + PIN_FIELD_BASE(2, 2, 5, 0xc0, 0x10, 11, 1), + PIN_FIELD_BASE(3, 3, 5, 0xc0, 0x10, 12, 1), PIN_FIELD_BASE(4, 4, 5, 0xc0, 0x10, 0, 1), - PIN_FIELD_BASE(5, 6, 5, 0xc0, 0x10, 9, 1), + PIN_FIELD_BASE(5, 5, 5, 0xc0, 0x10, 9, 1), + PIN_FIELD_BASE(6, 6, 5, 0xc0, 0x10, 10, 1), + PIN_FIELD_BASE(7, 7, 4, 0xb0, 0x10, 8, 1), PIN_FIELD_BASE(8, 8, 4, 0xb0, 0x10, 6, 1), PIN_FIELD_BASE(9, 9, 4, 0xb0, 0x10, 5, 1), PIN_FIELD_BASE(10, 10, 4, 0xb0, 0x10, 3, 1), + PIN_FIELD_BASE(11, 11, 1, 0xe0, 0x10, 0, 1), PIN_FIELD_BASE(12, 12, 1, 0xe0, 0x10, 21, 1), - PIN_FIELD_BASE(13, 14, 1, 0xe0, 0x10, 1, 1), - PIN_FIELD_BASE(15, 16, 5, 0xc0, 0x10, 7, 1), - PIN_FIELD_BASE(17, 18, 5, 0xc0, 0x10, 3, 1), + PIN_FIELD_BASE(13, 13, 1, 0xe0, 0x10, 1, 1), + PIN_FIELD_BASE(14, 14, 1, 0xe0, 0x10, 2, 1), + + PIN_FIELD_BASE(15, 15, 5, 0xc0, 0x10, 7, 1), + PIN_FIELD_BASE(16, 16, 5, 0xc0, 0x10, 8, 1), + PIN_FIELD_BASE(17, 17, 5, 0xc0, 0x10, 3, 1), + PIN_FIELD_BASE(18, 18, 5, 0xc0, 0x10, 4, 1), + PIN_FIELD_BASE(19, 19, 4, 0xb0, 0x10, 7, 1), PIN_FIELD_BASE(20, 20, 4, 0xb0, 0x10, 4, 1), + PIN_FIELD_BASE(21, 21, 3, 0x140, 0x10, 17, 1), PIN_FIELD_BASE(22, 22, 3, 0x140, 0x10, 23, 1), PIN_FIELD_BASE(23, 23, 3, 0x140, 0x10, 20, 1), PIN_FIELD_BASE(24, 24, 3, 0x140, 0x10, 19, 1), - PIN_FIELD_BASE(25, 26, 3, 0x140, 0x10, 21, 1), + PIN_FIELD_BASE(25, 25, 3, 0x140, 0x10, 21, 1), + PIN_FIELD_BASE(26, 26, 3, 0x140, 0x10, 22, 1), PIN_FIELD_BASE(27, 27, 3, 0x140, 0x10, 18, 1), - PIN_FIELD_BASE(28, 30, 3, 0x140, 0x10, 25, 1), + PIN_FIELD_BASE(28, 28, 3, 0x140, 0x10, 25, 1), + PIN_FIELD_BASE(29, 29, 3, 0x140, 0x10, 26, 1), + PIN_FIELD_BASE(30, 30, 3, 0x140, 0x10, 27, 1), PIN_FIELD_BASE(31, 31, 3, 0x140, 0x10, 24, 1), PIN_FIELD_BASE(32, 32, 3, 0x140, 0x10, 28, 1), PIN_FIELD_BASE(33, 33, 3, 0x150, 0x10, 0, 1), PIN_FIELD_BASE(34, 34, 3, 0x140, 0x10, 31, 1), - PIN_FIELD_BASE(35, 36, 3, 0x140, 0x10, 29, 1), + PIN_FIELD_BASE(35, 35, 3, 0x140, 0x10, 29, 1), + PIN_FIELD_BASE(36, 36, 3, 0x140, 0x10, 30, 1), PIN_FIELD_BASE(37, 37, 3, 0x150, 0x10, 1, 1), PIN_FIELD_BASE(38, 38, 3, 0x140, 0x10, 11, 1), PIN_FIELD_BASE(39, 39, 3, 0x140, 0x10, 10, 1), - PIN_FIELD_BASE(40, 41, 3, 0x140, 0x10, 0, 1), + PIN_FIELD_BASE(40, 40, 3, 0x140, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 3, 0x140, 0x10, 1, 1), PIN_FIELD_BASE(42, 42, 3, 0x140, 0x10, 9, 1), PIN_FIELD_BASE(43, 43, 3, 0x140, 0x10, 8, 1), PIN_FIELD_BASE(44, 44, 3, 0x140, 0x10, 7, 1), @@ -149,17 +198,31 @@ static const struct mtk_pin_field_calc mt7988_pin_smt_range[] = { PIN_FIELD_BASE(48, 48, 3, 0x140, 0x10, 3, 1), PIN_FIELD_BASE(49, 49, 3, 0x140, 0x10, 2, 1), PIN_FIELD_BASE(50, 50, 3, 0x140, 0x10, 15, 1), - PIN_FIELD_BASE(51, 53, 3, 0x140, 0x10, 12, 1), + PIN_FIELD_BASE(51, 51, 3, 0x140, 0x10, 12, 1), + PIN_FIELD_BASE(52, 52, 3, 0x140, 0x10, 13, 1), + PIN_FIELD_BASE(53, 53, 3, 0x140, 0x10, 14, 1), PIN_FIELD_BASE(54, 54, 3, 0x140, 0x10, 16, 1), - PIN_FIELD_BASE(55, 56, 1, 0xe0, 0x10, 14, 1), + + PIN_FIELD_BASE(55, 55, 1, 0xe0, 0x10, 14, 1), + PIN_FIELD_BASE(56, 56, 1, 0xe0, 0x10, 15, 1), PIN_FIELD_BASE(57, 57, 1, 0xe0, 0x10, 13, 1), - PIN_FIELD_BASE(58, 60, 1, 0xe0, 0x10, 4, 1), + PIN_FIELD_BASE(58, 58, 1, 0xe0, 0x10, 4, 1), + PIN_FIELD_BASE(59, 59, 1, 0xe0, 0x10, 5, 1), + PIN_FIELD_BASE(60, 60, 1, 0xe0, 0x10, 6, 1), PIN_FIELD_BASE(61, 61, 1, 0xe0, 0x10, 3, 1), PIN_FIELD_BASE(62, 62, 1, 0xe0, 0x10, 7, 1), PIN_FIELD_BASE(63, 63, 1, 0xe0, 0x10, 20, 1), - PIN_FIELD_BASE(64, 68, 1, 0xe0, 0x10, 8, 1), - PIN_FIELD_BASE(69, 70, 5, 0xc0, 0x10, 1, 1), - PIN_FIELD_BASE(71, 72, 5, 0xc0, 0x10, 5, 1), + PIN_FIELD_BASE(64, 64, 1, 0xe0, 0x10, 8, 1), + PIN_FIELD_BASE(65, 65, 1, 0xe0, 0x10, 9, 1), + PIN_FIELD_BASE(66, 66, 1, 0xe0, 0x10, 10, 1), + PIN_FIELD_BASE(67, 67, 1, 0xe0, 0x10, 11, 1), + PIN_FIELD_BASE(68, 68, 1, 0xe0, 0x10, 12, 1), + + PIN_FIELD_BASE(69, 69, 5, 0xc0, 0x10, 1, 1), + PIN_FIELD_BASE(70, 70, 5, 0xc0, 0x10, 2, 1), + PIN_FIELD_BASE(71, 71, 5, 0xc0, 0x10, 5, 1), + PIN_FIELD_BASE(72, 72, 5, 0xc0, 0x10, 6, 1), + PIN_FIELD_BASE(73, 73, 4, 0xb0, 0x10, 10, 1), PIN_FIELD_BASE(74, 74, 4, 0xb0, 0x10, 1, 1), PIN_FIELD_BASE(75, 75, 4, 0xb0, 0x10, 11, 1), @@ -167,8 +230,11 @@ static const struct mtk_pin_field_calc mt7988_pin_smt_range[] = { PIN_FIELD_BASE(77, 77, 4, 0xb0, 0x10, 2, 1), PIN_FIELD_BASE(78, 78, 4, 0xb0, 0x10, 0, 1), PIN_FIELD_BASE(79, 79, 4, 0xb0, 0x10, 12, 1), - PIN_FIELD_BASE(80, 81, 1, 0xe0, 0x10, 18, 1), - PIN_FIELD_BASE(82, 83, 1, 0xe0, 0x10, 16, 1), + + PIN_FIELD_BASE(80, 80, 1, 0xe0, 0x10, 18, 1), + PIN_FIELD_BASE(81, 81, 1, 0xe0, 0x10, 19, 1), + PIN_FIELD_BASE(82, 82, 1, 0xe0, 0x10, 16, 1), + PIN_FIELD_BASE(83, 83, 1, 0xe0, 0x10, 17, 1), }; static const struct mtk_pin_field_calc mt7988_pin_pu_range[] = { @@ -176,8 +242,11 @@ static const struct mtk_pin_field_calc mt7988_pin_pu_range[] = { PIN_FIELD_BASE(8, 8, 4, 0x60, 0x10, 4, 1), PIN_FIELD_BASE(9, 9, 4, 0x60, 0x10, 3, 1), PIN_FIELD_BASE(10, 10, 4, 0x60, 0x10, 2, 1), - PIN_FIELD_BASE(13, 14, 1, 0x70, 0x10, 0, 1), + + PIN_FIELD_BASE(13, 13, 1, 0x70, 0x10, 0, 1), + PIN_FIELD_BASE(14, 14, 1, 0x70, 0x10, 1, 1), PIN_FIELD_BASE(63, 63, 1, 0x70, 0x10, 2, 1), + PIN_FIELD_BASE(75, 75, 4, 0x60, 0x10, 7, 1), PIN_FIELD_BASE(76, 76, 4, 0x60, 0x10, 6, 1), PIN_FIELD_BASE(77, 77, 4, 0x60, 0x10, 1, 1), @@ -190,11 +259,19 @@ static const struct mtk_pin_field_calc mt7988_pin_pd_range[] = { PIN_FIELD_BASE(8, 8, 4, 0x40, 0x10, 4, 1), PIN_FIELD_BASE(9, 9, 4, 0x40, 0x10, 3, 1), PIN_FIELD_BASE(10, 10, 4, 0x40, 0x10, 2, 1), - PIN_FIELD_BASE(13, 14, 1, 0x50, 0x10, 0, 1), - PIN_FIELD_BASE(15, 16, 5, 0x40, 0x10, 4, 1), - PIN_FIELD_BASE(17, 18, 5, 0x40, 0x10, 0, 1), + + PIN_FIELD_BASE(13, 13, 1, 0x50, 0x10, 0, 1), + PIN_FIELD_BASE(14, 14, 1, 0x50, 0x10, 1, 1), + + PIN_FIELD_BASE(15, 15, 5, 0x40, 0x10, 4, 1), + PIN_FIELD_BASE(16, 16, 5, 0x40, 0x10, 5, 1), + PIN_FIELD_BASE(17, 17, 5, 0x40, 0x10, 0, 1), + PIN_FIELD_BASE(18, 18, 5, 0x40, 0x10, 1, 1), + PIN_FIELD_BASE(63, 63, 1, 0x50, 0x10, 2, 1), - PIN_FIELD_BASE(71, 72, 5, 0x40, 0x10, 2, 1), + PIN_FIELD_BASE(71, 71, 5, 0x40, 0x10, 2, 1), + PIN_FIELD_BASE(72, 72, 5, 0x40, 0x10, 3, 1), + PIN_FIELD_BASE(75, 75, 4, 0x40, 0x10, 7, 1), PIN_FIELD_BASE(76, 76, 4, 0x40, 0x10, 6, 1), PIN_FIELD_BASE(77, 77, 4, 0x40, 0x10, 1, 1), @@ -203,26 +280,37 @@ static const struct mtk_pin_field_calc mt7988_pin_pd_range[] = { }; static const struct mtk_pin_field_calc mt7988_pin_drv_range[] = { - PIN_FIELD_BASE(0, 1, 5, 0x00, 0x10, 21, 3), - PIN_FIELD_BASE(2, 3, 5, 0x00, 0x10, 15, 3), + PIN_FIELD_BASE(0, 0, 5, 0x00, 0x10, 21, 3), + PIN_FIELD_BASE(1, 1, 5, 0x00, 0x10, 24, 3), + PIN_FIELD_BASE(2, 2, 5, 0x00, 0x10, 15, 3), + PIN_FIELD_BASE(3, 3, 5, 0x00, 0x10, 18, 3), PIN_FIELD_BASE(4, 4, 5, 0x00, 0x10, 0, 3), - PIN_FIELD_BASE(5, 6, 5, 0x00, 0x10, 9, 3), + PIN_FIELD_BASE(5, 5, 5, 0x00, 0x10, 9, 3), + PIN_FIELD_BASE(6, 6, 5, 0x00, 0x10, 12, 3), + PIN_FIELD_BASE(7, 7, 4, 0x00, 0x10, 24, 3), PIN_FIELD_BASE(8, 8, 4, 0x00, 0x10, 28, 3), PIN_FIELD_BASE(9, 9, 4, 0x00, 0x10, 15, 3), PIN_FIELD_BASE(10, 10, 4, 0x00, 0x10, 9, 3), + PIN_FIELD_BASE(11, 11, 1, 0x00, 0x10, 0, 3), PIN_FIELD_BASE(12, 12, 1, 0x20, 0x10, 3, 3), - PIN_FIELD_BASE(13, 14, 1, 0x00, 0x10, 3, 3), + PIN_FIELD_BASE(13, 13, 1, 0x00, 0x10, 3, 3), + PIN_FIELD_BASE(14, 14, 1, 0x00, 0x10, 6, 3), + PIN_FIELD_BASE(19, 19, 4, 0x00, 0x10, 21, 3), PIN_FIELD_BASE(20, 20, 4, 0x00, 0x10, 12, 3), + PIN_FIELD_BASE(21, 21, 3, 0x10, 0x10, 21, 3), PIN_FIELD_BASE(22, 22, 3, 0x20, 0x10, 9, 3), PIN_FIELD_BASE(23, 23, 3, 0x20, 0x10, 0, 3), PIN_FIELD_BASE(24, 24, 3, 0x10, 0x10, 27, 3), - PIN_FIELD_BASE(25, 26, 3, 0x20, 0x10, 3, 3), + PIN_FIELD_BASE(25, 25, 3, 0x20, 0x10, 3, 3), + PIN_FIELD_BASE(26, 26, 3, 0x20, 0x10, 6, 3), PIN_FIELD_BASE(27, 27, 3, 0x10, 0x10, 24, 3), - PIN_FIELD_BASE(28, 30, 3, 0x20, 0x10, 15, 3), + PIN_FIELD_BASE(28, 28, 3, 0x20, 0x10, 15, 3), + PIN_FIELD_BASE(29, 29, 3, 0x20, 0x10, 18, 3), + PIN_FIELD_BASE(30, 30, 3, 0x20, 0x10, 21, 3), PIN_FIELD_BASE(31, 31, 3, 0x20, 0x10, 12, 3), PIN_FIELD_BASE(32, 32, 3, 0x20, 0x10, 24, 3), PIN_FIELD_BASE(33, 33, 3, 0x30, 0x10, 6, 3), @@ -232,7 +320,8 @@ static const struct mtk_pin_field_calc mt7988_pin_drv_range[] = { PIN_FIELD_BASE(37, 37, 3, 0x30, 0x10, 9, 3), PIN_FIELD_BASE(38, 38, 3, 0x10, 0x10, 3, 3), PIN_FIELD_BASE(39, 39, 3, 0x10, 0x10, 0, 3), - PIN_FIELD_BASE(40, 41, 3, 0x00, 0x10, 0, 3), + PIN_FIELD_BASE(40, 40, 3, 0x00, 0x10, 0, 3), + PIN_FIELD_BASE(41, 41, 3, 0x00, 0x10, 3, 3), PIN_FIELD_BASE(42, 42, 3, 0x00, 0x10, 27, 3), PIN_FIELD_BASE(43, 43, 3, 0x00, 0x10, 24, 3), PIN_FIELD_BASE(44, 44, 3, 0x00, 0x10, 21, 3), @@ -242,17 +331,29 @@ static const struct mtk_pin_field_calc mt7988_pin_drv_range[] = { PIN_FIELD_BASE(48, 48, 3, 0x00, 0x10, 9, 3), PIN_FIELD_BASE(49, 49, 3, 0x00, 0x10, 6, 3), PIN_FIELD_BASE(50, 50, 3, 0x10, 0x10, 15, 3), - PIN_FIELD_BASE(51, 53, 3, 0x10, 0x10, 6, 3), + PIN_FIELD_BASE(51, 51, 3, 0x10, 0x10, 6, 3), + PIN_FIELD_BASE(52, 52, 3, 0x10, 0x10, 9, 3), + PIN_FIELD_BASE(53, 53, 3, 0x10, 0x10, 12, 3), PIN_FIELD_BASE(54, 54, 3, 0x10, 0x10, 18, 3), - PIN_FIELD_BASE(55, 56, 1, 0x10, 0x10, 12, 3), + + PIN_FIELD_BASE(55, 55, 1, 0x10, 0x10, 12, 3), + PIN_FIELD_BASE(56, 56, 1, 0x10, 0x10, 15, 3), PIN_FIELD_BASE(57, 57, 1, 0x10, 0x10, 9, 3), - PIN_FIELD_BASE(58, 60, 1, 0x00, 0x10, 12, 3), + PIN_FIELD_BASE(58, 58, 1, 0x00, 0x10, 12, 3), + PIN_FIELD_BASE(59, 59, 1, 0x00, 0x10, 15, 3), + PIN_FIELD_BASE(60, 60, 1, 0x00, 0x10, 18, 3), PIN_FIELD_BASE(61, 61, 1, 0x00, 0x10, 9, 3), PIN_FIELD_BASE(62, 62, 1, 0x00, 0x10, 21, 3), PIN_FIELD_BASE(63, 63, 1, 0x20, 0x10, 0, 3), - PIN_FIELD_BASE(64, 65, 1, 0x00, 0x10, 24, 3), - PIN_FIELD_BASE(66, 68, 1, 0x10, 0x10, 0, 3), - PIN_FIELD_BASE(69, 70, 5, 0x00, 0x10, 3, 3), + PIN_FIELD_BASE(64, 64, 1, 0x00, 0x10, 24, 3), + PIN_FIELD_BASE(65, 65, 1, 0x00, 0x10, 27, 3), + PIN_FIELD_BASE(66, 66, 1, 0x10, 0x10, 0, 3), + PIN_FIELD_BASE(67, 67, 1, 0x10, 0x10, 3, 3), + PIN_FIELD_BASE(68, 68, 1, 0x10, 0x10, 6, 3), + + PIN_FIELD_BASE(69, 69, 5, 0x00, 0x10, 3, 3), + PIN_FIELD_BASE(70, 70, 5, 0x00, 0x10, 6, 3), + PIN_FIELD_BASE(73, 73, 4, 0x10, 0x10, 0, 3), PIN_FIELD_BASE(74, 74, 4, 0x00, 0x10, 3, 3), PIN_FIELD_BASE(75, 75, 4, 0x10, 0x10, 3, 3), @@ -260,35 +361,49 @@ static const struct mtk_pin_field_calc mt7988_pin_drv_range[] = { PIN_FIELD_BASE(77, 77, 4, 0x00, 0x10, 6, 3), PIN_FIELD_BASE(78, 78, 4, 0x00, 0x10, 0, 3), PIN_FIELD_BASE(79, 79, 4, 0x10, 0x10, 6, 3), - PIN_FIELD_BASE(80, 81, 1, 0x10, 0x10, 24, 3), - PIN_FIELD_BASE(82, 83, 1, 0x10, 0x10, 18, 3), + + PIN_FIELD_BASE(80, 80, 1, 0x10, 0x10, 24, 3), + PIN_FIELD_BASE(81, 81, 1, 0x10, 0x10, 27, 3), + PIN_FIELD_BASE(82, 82, 1, 0x10, 0x10, 18, 3), + PIN_FIELD_BASE(83, 83, 1, 0x10, 0x10, 21, 3), }; static const struct mtk_pin_field_calc mt7988_pin_pupd_range[] = { - PIN_FIELD_BASE(0, 1, 5, 0x50, 0x10, 7, 1), - PIN_FIELD_BASE(2, 3, 5, 0x50, 0x10, 5, 1), + PIN_FIELD_BASE(0, 0, 5, 0x50, 0x10, 7, 1), + PIN_FIELD_BASE(1, 1, 5, 0x50, 0x10, 8, 1), + PIN_FIELD_BASE(2, 2, 5, 0x50, 0x10, 5, 1), + PIN_FIELD_BASE(3, 3, 5, 0x50, 0x10, 6, 1), PIN_FIELD_BASE(4, 4, 5, 0x50, 0x10, 0, 1), - PIN_FIELD_BASE(5, 6, 5, 0x50, 0x10, 3, 1), + PIN_FIELD_BASE(5, 5, 5, 0x50, 0x10, 3, 1), + PIN_FIELD_BASE(6, 6, 5, 0x50, 0x10, 4, 1), + PIN_FIELD_BASE(11, 11, 1, 0x60, 0x10, 0, 1), PIN_FIELD_BASE(12, 12, 1, 0x60, 0x10, 18, 1), + PIN_FIELD_BASE(19, 19, 4, 0x50, 0x10, 2, 1), PIN_FIELD_BASE(20, 20, 4, 0x50, 0x10, 1, 1), + PIN_FIELD_BASE(21, 21, 3, 0x70, 0x10, 17, 1), PIN_FIELD_BASE(22, 22, 3, 0x70, 0x10, 23, 1), PIN_FIELD_BASE(23, 23, 3, 0x70, 0x10, 20, 1), PIN_FIELD_BASE(24, 24, 3, 0x70, 0x10, 19, 1), - PIN_FIELD_BASE(25, 26, 3, 0x70, 0x10, 21, 1), + PIN_FIELD_BASE(25, 25, 3, 0x70, 0x10, 21, 1), + PIN_FIELD_BASE(26, 26, 3, 0x70, 0x10, 22, 1), PIN_FIELD_BASE(27, 27, 3, 0x70, 0x10, 18, 1), - PIN_FIELD_BASE(28, 30, 3, 0x70, 0x10, 25, 1), + PIN_FIELD_BASE(28, 28, 3, 0x70, 0x10, 25, 1), + PIN_FIELD_BASE(29, 29, 3, 0x70, 0x10, 26, 1), + PIN_FIELD_BASE(30, 30, 3, 0x70, 0x10, 27, 1), PIN_FIELD_BASE(31, 31, 3, 0x70, 0x10, 24, 1), PIN_FIELD_BASE(32, 32, 3, 0x70, 0x10, 28, 1), PIN_FIELD_BASE(33, 33, 3, 0x80, 0x10, 0, 1), PIN_FIELD_BASE(34, 34, 3, 0x70, 0x10, 31, 1), - PIN_FIELD_BASE(35, 36, 3, 0x70, 0x10, 29, 1), + PIN_FIELD_BASE(35, 35, 3, 0x70, 0x10, 29, 1), + PIN_FIELD_BASE(36, 36, 3, 0x70, 0x10, 30, 1), PIN_FIELD_BASE(37, 37, 3, 0x80, 0x10, 1, 1), PIN_FIELD_BASE(38, 38, 3, 0x70, 0x10, 11, 1), PIN_FIELD_BASE(39, 39, 3, 0x70, 0x10, 10, 1), - PIN_FIELD_BASE(40, 41, 3, 0x70, 0x10, 0, 1), + PIN_FIELD_BASE(40, 40, 3, 0x70, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 3, 0x70, 0x10, 1, 1), PIN_FIELD_BASE(42, 42, 3, 0x70, 0x10, 9, 1), PIN_FIELD_BASE(43, 43, 3, 0x70, 0x10, 8, 1), PIN_FIELD_BASE(44, 44, 3, 0x70, 0x10, 7, 1), @@ -298,46 +413,73 @@ static const struct mtk_pin_field_calc mt7988_pin_pupd_range[] = { PIN_FIELD_BASE(48, 48, 3, 0x70, 0x10, 3, 1), PIN_FIELD_BASE(49, 49, 3, 0x70, 0x10, 2, 1), PIN_FIELD_BASE(50, 50, 3, 0x70, 0x10, 15, 1), - PIN_FIELD_BASE(51, 53, 3, 0x70, 0x10, 12, 1), + PIN_FIELD_BASE(51, 51, 3, 0x70, 0x10, 12, 1), + PIN_FIELD_BASE(52, 52, 3, 0x70, 0x10, 13, 1), + PIN_FIELD_BASE(53, 53, 3, 0x70, 0x10, 14, 1), PIN_FIELD_BASE(54, 54, 3, 0x70, 0x10, 16, 1), - PIN_FIELD_BASE(55, 56, 1, 0x60, 0x10, 12, 1), + + PIN_FIELD_BASE(55, 55, 1, 0x60, 0x10, 12, 1), + PIN_FIELD_BASE(56, 56, 1, 0x60, 0x10, 13, 1), PIN_FIELD_BASE(57, 57, 1, 0x60, 0x10, 11, 1), - PIN_FIELD_BASE(58, 60, 1, 0x60, 0x10, 2, 1), + PIN_FIELD_BASE(58, 58, 1, 0x60, 0x10, 2, 1), + PIN_FIELD_BASE(59, 59, 1, 0x60, 0x10, 3, 1), + PIN_FIELD_BASE(60, 60, 1, 0x60, 0x10, 4, 1), PIN_FIELD_BASE(61, 61, 1, 0x60, 0x10, 1, 1), PIN_FIELD_BASE(62, 62, 1, 0x60, 0x10, 5, 1), - PIN_FIELD_BASE(64, 68, 1, 0x60, 0x10, 6, 1), - PIN_FIELD_BASE(69, 70, 5, 0x50, 0x10, 1, 1), + PIN_FIELD_BASE(64, 64, 1, 0x60, 0x10, 6, 1), + PIN_FIELD_BASE(65, 65, 1, 0x60, 0x10, 7, 1), + PIN_FIELD_BASE(66, 66, 1, 0x60, 0x10, 8, 1), + PIN_FIELD_BASE(67, 67, 1, 0x60, 0x10, 9, 1), + PIN_FIELD_BASE(68, 68, 1, 0x60, 0x10, 10, 1), + + PIN_FIELD_BASE(69, 69, 5, 0x50, 0x10, 1, 1), + PIN_FIELD_BASE(70, 70, 5, 0x50, 0x10, 2, 1), + PIN_FIELD_BASE(73, 73, 4, 0x50, 0x10, 3, 1), PIN_FIELD_BASE(74, 74, 4, 0x50, 0x10, 0, 1), - PIN_FIELD_BASE(80, 81, 1, 0x60, 0x10, 16, 1), - PIN_FIELD_BASE(82, 83, 1, 0x60, 0x10, 14, 1), + + PIN_FIELD_BASE(80, 80, 1, 0x60, 0x10, 16, 1), + PIN_FIELD_BASE(81, 81, 1, 0x60, 0x10, 17, 1), + PIN_FIELD_BASE(82, 82, 1, 0x60, 0x10, 14, 1), + PIN_FIELD_BASE(83, 83, 1, 0x60, 0x10, 15, 1), }; static const struct mtk_pin_field_calc mt7988_pin_r0_range[] = { - PIN_FIELD_BASE(0, 1, 5, 0x60, 0x10, 7, 1), - PIN_FIELD_BASE(2, 3, 5, 0x60, 0x10, 5, 1), + PIN_FIELD_BASE(0, 0, 5, 0x60, 0x10, 7, 1), + PIN_FIELD_BASE(1, 1, 5, 0x60, 0x10, 8, 1), + PIN_FIELD_BASE(2, 2, 5, 0x60, 0x10, 5, 1), + PIN_FIELD_BASE(3, 3, 5, 0x60, 0x10, 6, 1), PIN_FIELD_BASE(4, 4, 5, 0x60, 0x10, 0, 1), - PIN_FIELD_BASE(5, 6, 5, 0x60, 0x10, 3, 1), + PIN_FIELD_BASE(5, 5, 5, 0x60, 0x10, 3, 1), + PIN_FIELD_BASE(6, 6, 5, 0x60, 0x10, 4, 1), + PIN_FIELD_BASE(11, 11, 1, 0x80, 0x10, 0, 1), PIN_FIELD_BASE(12, 12, 1, 0x80, 0x10, 18, 1), + PIN_FIELD_BASE(19, 19, 4, 0x70, 0x10, 2, 1), PIN_FIELD_BASE(20, 20, 4, 0x70, 0x10, 1, 1), + PIN_FIELD_BASE(21, 21, 3, 0x90, 0x10, 17, 1), PIN_FIELD_BASE(22, 22, 3, 0x90, 0x10, 23, 1), PIN_FIELD_BASE(23, 23, 3, 0x90, 0x10, 20, 1), PIN_FIELD_BASE(24, 24, 3, 0x90, 0x10, 19, 1), - PIN_FIELD_BASE(25, 26, 3, 0x90, 0x10, 21, 1), + PIN_FIELD_BASE(25, 25, 3, 0x90, 0x10, 21, 1), + PIN_FIELD_BASE(26, 26, 3, 0x90, 0x10, 22, 1), PIN_FIELD_BASE(27, 27, 3, 0x90, 0x10, 18, 1), - PIN_FIELD_BASE(28, 30, 3, 0x90, 0x10, 25, 1), + PIN_FIELD_BASE(28, 28, 3, 0x90, 0x10, 25, 1), + PIN_FIELD_BASE(29, 29, 3, 0x90, 0x10, 26, 1), + PIN_FIELD_BASE(30, 30, 3, 0x90, 0x10, 27, 1), PIN_FIELD_BASE(31, 31, 3, 0x90, 0x10, 24, 1), PIN_FIELD_BASE(32, 32, 3, 0x90, 0x10, 28, 1), PIN_FIELD_BASE(33, 33, 3, 0xa0, 0x10, 0, 1), PIN_FIELD_BASE(34, 34, 3, 0x90, 0x10, 31, 1), - PIN_FIELD_BASE(35, 36, 3, 0x90, 0x10, 29, 1), + PIN_FIELD_BASE(35, 35, 3, 0x90, 0x10, 29, 1), + PIN_FIELD_BASE(36, 36, 3, 0x90, 0x10, 30, 1), PIN_FIELD_BASE(37, 37, 3, 0xa0, 0x10, 1, 1), PIN_FIELD_BASE(38, 38, 3, 0x90, 0x10, 11, 1), PIN_FIELD_BASE(39, 39, 3, 0x90, 0x10, 10, 1), - PIN_FIELD_BASE(40, 41, 3, 0x90, 0x10, 0, 1), + PIN_FIELD_BASE(40, 40, 3, 0x90, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 3, 0x90, 0x10, 1, 1), PIN_FIELD_BASE(42, 42, 3, 0x90, 0x10, 9, 1), PIN_FIELD_BASE(43, 43, 3, 0x90, 0x10, 8, 1), PIN_FIELD_BASE(44, 44, 3, 0x90, 0x10, 7, 1), @@ -347,46 +489,73 @@ static const struct mtk_pin_field_calc mt7988_pin_r0_range[] = { PIN_FIELD_BASE(48, 48, 3, 0x90, 0x10, 3, 1), PIN_FIELD_BASE(49, 49, 3, 0x90, 0x10, 2, 1), PIN_FIELD_BASE(50, 50, 3, 0x90, 0x10, 15, 1), - PIN_FIELD_BASE(51, 53, 3, 0x90, 0x10, 12, 1), + PIN_FIELD_BASE(51, 51, 3, 0x90, 0x10, 12, 1), + PIN_FIELD_BASE(52, 52, 3, 0x90, 0x10, 13, 1), + PIN_FIELD_BASE(53, 53, 3, 0x90, 0x10, 14, 1), PIN_FIELD_BASE(54, 54, 3, 0x90, 0x10, 16, 1), - PIN_FIELD_BASE(55, 56, 1, 0x80, 0x10, 12, 1), + + PIN_FIELD_BASE(55, 55, 1, 0x80, 0x10, 12, 1), + PIN_FIELD_BASE(56, 56, 1, 0x80, 0x10, 13, 1), PIN_FIELD_BASE(57, 57, 1, 0x80, 0x10, 11, 1), - PIN_FIELD_BASE(58, 60, 1, 0x80, 0x10, 2, 1), + PIN_FIELD_BASE(58, 58, 1, 0x80, 0x10, 2, 1), + PIN_FIELD_BASE(59, 59, 1, 0x80, 0x10, 3, 1), + PIN_FIELD_BASE(60, 60, 1, 0x80, 0x10, 4, 1), PIN_FIELD_BASE(61, 61, 1, 0x80, 0x10, 1, 1), PIN_FIELD_BASE(62, 62, 1, 0x80, 0x10, 5, 1), - PIN_FIELD_BASE(64, 68, 1, 0x80, 0x10, 6, 1), - PIN_FIELD_BASE(69, 70, 5, 0x60, 0x10, 1, 1), + PIN_FIELD_BASE(64, 64, 1, 0x80, 0x10, 6, 1), + PIN_FIELD_BASE(65, 65, 1, 0x80, 0x10, 7, 1), + PIN_FIELD_BASE(66, 66, 1, 0x80, 0x10, 8, 1), + PIN_FIELD_BASE(67, 67, 1, 0x80, 0x10, 9, 1), + PIN_FIELD_BASE(68, 68, 1, 0x80, 0x10, 10, 1), + + PIN_FIELD_BASE(69, 69, 5, 0x60, 0x10, 1, 1), + PIN_FIELD_BASE(70, 70, 5, 0x60, 0x10, 2, 1), + PIN_FIELD_BASE(73, 73, 4, 0x70, 0x10, 3, 1), PIN_FIELD_BASE(74, 74, 4, 0x70, 0x10, 0, 1), - PIN_FIELD_BASE(80, 81, 1, 0x80, 0x10, 16, 1), - PIN_FIELD_BASE(82, 83, 1, 0x80, 0x10, 14, 1), + + PIN_FIELD_BASE(80, 80, 1, 0x80, 0x10, 16, 1), + PIN_FIELD_BASE(81, 81, 1, 0x80, 0x10, 17, 1), + PIN_FIELD_BASE(82, 82, 1, 0x80, 0x10, 14, 1), + PIN_FIELD_BASE(83, 83, 1, 0x80, 0x10, 15, 1), }; static const struct mtk_pin_field_calc mt7988_pin_r1_range[] = { - PIN_FIELD_BASE(0, 1, 5, 0x70, 0x10, 7, 1), - PIN_FIELD_BASE(2, 3, 5, 0x70, 0x10, 5, 1), + PIN_FIELD_BASE(0, 0, 5, 0x70, 0x10, 7, 1), + PIN_FIELD_BASE(1, 1, 5, 0x70, 0x10, 8, 1), + PIN_FIELD_BASE(2, 2, 5, 0x70, 0x10, 5, 1), + PIN_FIELD_BASE(3, 3, 5, 0x70, 0x10, 6, 1), PIN_FIELD_BASE(4, 4, 5, 0x70, 0x10, 0, 1), - PIN_FIELD_BASE(5, 6, 5, 0x70, 0x10, 3, 1), + PIN_FIELD_BASE(5, 5, 5, 0x70, 0x10, 3, 1), + PIN_FIELD_BASE(6, 6, 5, 0x70, 0x10, 4, 1), + PIN_FIELD_BASE(11, 11, 1, 0x90, 0x10, 0, 1), PIN_FIELD_BASE(12, 12, 1, 0x90, 0x10, 18, 1), + PIN_FIELD_BASE(19, 19, 4, 0x80, 0x10, 2, 1), PIN_FIELD_BASE(20, 20, 4, 0x80, 0x10, 1, 1), + PIN_FIELD_BASE(21, 21, 3, 0xb0, 0x10, 17, 1), PIN_FIELD_BASE(22, 22, 3, 0xb0, 0x10, 23, 1), PIN_FIELD_BASE(23, 23, 3, 0xb0, 0x10, 20, 1), PIN_FIELD_BASE(24, 24, 3, 0xb0, 0x10, 19, 1), - PIN_FIELD_BASE(25, 26, 3, 0xb0, 0x10, 21, 1), + PIN_FIELD_BASE(25, 25, 3, 0xb0, 0x10, 21, 1), + PIN_FIELD_BASE(26, 26, 3, 0xb0, 0x10, 22, 1), PIN_FIELD_BASE(27, 27, 3, 0xb0, 0x10, 18, 1), - PIN_FIELD_BASE(28, 30, 3, 0xb0, 0x10, 25, 1), + PIN_FIELD_BASE(28, 28, 3, 0xb0, 0x10, 25, 1), + PIN_FIELD_BASE(29, 29, 3, 0xb0, 0x10, 26, 1), + PIN_FIELD_BASE(30, 30, 3, 0xb0, 0x10, 27, 1), PIN_FIELD_BASE(31, 31, 3, 0xb0, 0x10, 24, 1), PIN_FIELD_BASE(32, 32, 3, 0xb0, 0x10, 28, 1), PIN_FIELD_BASE(33, 33, 3, 0xc0, 0x10, 0, 1), PIN_FIELD_BASE(34, 34, 3, 0xb0, 0x10, 31, 1), - PIN_FIELD_BASE(35, 36, 3, 0xb0, 0x10, 29, 1), + PIN_FIELD_BASE(35, 35, 3, 0xb0, 0x10, 29, 1), + PIN_FIELD_BASE(36, 36, 3, 0xb0, 0x10, 30, 1), PIN_FIELD_BASE(37, 37, 3, 0xc0, 0x10, 1, 1), PIN_FIELD_BASE(38, 38, 3, 0xb0, 0x10, 11, 1), PIN_FIELD_BASE(39, 39, 3, 0xb0, 0x10, 10, 1), - PIN_FIELD_BASE(40, 41, 3, 0xb0, 0x10, 0, 1), + PIN_FIELD_BASE(40, 40, 3, 0xb0, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 3, 0xb0, 0x10, 1, 1), PIN_FIELD_BASE(42, 42, 3, 0xb0, 0x10, 9, 1), PIN_FIELD_BASE(43, 43, 3, 0xb0, 0x10, 8, 1), PIN_FIELD_BASE(44, 44, 3, 0xb0, 0x10, 7, 1), @@ -396,19 +565,35 @@ static const struct mtk_pin_field_calc mt7988_pin_r1_range[] = { PIN_FIELD_BASE(48, 48, 3, 0xb0, 0x10, 3, 1), PIN_FIELD_BASE(49, 49, 3, 0xb0, 0x10, 2, 1), PIN_FIELD_BASE(50, 50, 3, 0xb0, 0x10, 15, 1), - PIN_FIELD_BASE(51, 53, 3, 0xb0, 0x10, 12, 1), + PIN_FIELD_BASE(51, 51, 3, 0xb0, 0x10, 12, 1), + PIN_FIELD_BASE(52, 52, 3, 0xb0, 0x10, 13, 1), + PIN_FIELD_BASE(53, 53, 3, 0xb0, 0x10, 14, 1), PIN_FIELD_BASE(54, 54, 3, 0xb0, 0x10, 16, 1), - PIN_FIELD_BASE(55, 56, 1, 0x90, 0x10, 12, 1), + + PIN_FIELD_BASE(55, 55, 1, 0x90, 0x10, 12, 1), + PIN_FIELD_BASE(56, 56, 1, 0x90, 0x10, 13, 1), PIN_FIELD_BASE(57, 57, 1, 0x90, 0x10, 11, 1), - PIN_FIELD_BASE(58, 60, 1, 0x90, 0x10, 2, 1), + PIN_FIELD_BASE(58, 58, 1, 0x90, 0x10, 2, 1), + PIN_FIELD_BASE(59, 59, 1, 0x90, 0x10, 3, 1), + PIN_FIELD_BASE(60, 60, 1, 0x90, 0x10, 4, 1), PIN_FIELD_BASE(61, 61, 1, 0x90, 0x10, 1, 1), PIN_FIELD_BASE(62, 62, 1, 0x90, 0x10, 5, 1), - PIN_FIELD_BASE(64, 68, 1, 0x90, 0x10, 6, 1), - PIN_FIELD_BASE(69, 70, 5, 0x70, 0x10, 1, 1), + PIN_FIELD_BASE(64, 64, 1, 0x90, 0x10, 6, 1), + PIN_FIELD_BASE(65, 65, 1, 0x90, 0x10, 7, 1), + PIN_FIELD_BASE(66, 66, 1, 0x90, 0x10, 8, 1), + PIN_FIELD_BASE(67, 67, 1, 0x90, 0x10, 9, 1), + PIN_FIELD_BASE(68, 68, 1, 0x90, 0x10, 10, 1), + + PIN_FIELD_BASE(69, 69, 5, 0x70, 0x10, 1, 1), + PIN_FIELD_BASE(70, 70, 5, 0x70, 0x10, 2, 1), + PIN_FIELD_BASE(73, 73, 4, 0x80, 0x10, 3, 1), PIN_FIELD_BASE(74, 74, 4, 0x80, 0x10, 0, 1), - PIN_FIELD_BASE(80, 81, 1, 0x90, 0x10, 16, 1), - PIN_FIELD_BASE(82, 83, 1, 0x90, 0x10, 14, 1), + + PIN_FIELD_BASE(80, 80, 1, 0x90, 0x10, 16, 1), + PIN_FIELD_BASE(81, 81, 1, 0x90, 0x10, 17, 1), + PIN_FIELD_BASE(82, 82, 1, 0x90, 0x10, 14, 1), + PIN_FIELD_BASE(83, 83, 1, 0x90, 0x10, 15, 1), }; static const struct mtk_pin_reg_calc mt7988_reg_cals[] = { @@ -1096,20 +1281,20 @@ static const struct group_desc mt7988_groups[] = { /* Joint those groups owning the same capability in user point of view which * allows that people tend to use through the device tree. */ -static const char *mt7988_jtag_groups[] = { +static const char * const mt7988_jtag_groups[] = { "tops_jtag0_0", "wo0_jtag", "wo1_jtag", "wo2_jtag", "jtag", "tops_jtag0_1", }; -static const char *mt7988_int_usxgmii_groups[] = { +static const char * const mt7988_int_usxgmii_groups[] = { "int_usxgmii", }; -static const char *mt7988_pwm_groups[] = { +static const char * const mt7988_pwm_groups[] = { "pwm0", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5", "pwm6", "pwm7" }; -static const char *mt7988_dfd_groups[] = { +static const char * const mt7988_dfd_groups[] = { "dfd", }; -static const char *mt7988_i2c_groups[] = { +static const char * const mt7988_i2c_groups[] = { "xfi_phy0_i2c0", "xfi_phy1_i2c0", "xfi_phy_pll_i2c0", @@ -1134,13 +1319,13 @@ static const char *mt7988_i2c_groups[] = { "i2c2_0", "i2c2_1", }; -static const char *mt7988_ethernet_groups[] = { +static const char * const mt7988_ethernet_groups[] = { "mdc_mdio0", "2p5g_ext_mdio", "gbe_ext_mdio", "mdc_mdio1", }; -static const char *mt7988_pcie_groups[] = { +static const char * const mt7988_pcie_groups[] = { "pcie_wake_n0_0", "pcie_clk_req_n0_0", "pcie_wake_n3_0", "pcie_clk_req_n3", "pcie_p0_phy_i2c", "pcie_p1_phy_i2c", "pcie_p3_phy_i2c", "pcie_p2_phy_i2c", "ckm_phy_i2c", @@ -1150,18 +1335,18 @@ static const char *mt7988_pcie_groups[] = { "pcie_wake_n2_0", "pcie_clk_req_n2_0", "pcie_wake_n2_1", "pcie_clk_req_n0_1" }; -static const char *mt7988_pmic_groups[] = { +static const char * const mt7988_pmic_groups[] = { "pmic", }; -static const char *mt7988_wdt_groups[] = { +static const char * const mt7988_wdt_groups[] = { "watchdog", }; -static const char *mt7988_spi_groups[] = { +static const char * const mt7988_spi_groups[] = { "spi0", "spi0_wp_hold", "spi1", "spi2", "spi2_wp_hold", }; -static const char *mt7988_flash_groups[] = { "emmc_45", "sdcard", "snfi", +static const char * const mt7988_flash_groups[] = { "emmc_45", "sdcard", "snfi", "emmc_51" }; -static const char *mt7988_uart_groups[] = { +static const char * const mt7988_uart_groups[] = { "uart2", "tops_uart0_0", "uart2_0", @@ -1183,18 +1368,18 @@ static const char *mt7988_uart_groups[] = { "net_wo1_uart_txd_1", "net_wo2_uart_txd_1", }; -static const char *mt7988_udi_groups[] = { +static const char * const mt7988_udi_groups[] = { "udi", }; -static const char *mt7988_audio_groups[] = { +static const char * const mt7988_audio_groups[] = { "i2s", "pcm", }; -static const char *mt7988_led_groups[] = { +static const char * const mt7988_led_groups[] = { "gbe0_led1", "gbe1_led1", "gbe2_led1", "gbe3_led1", "2p5gbe_led1", "gbe0_led0", "gbe1_led0", "gbe2_led0", "gbe3_led0", "2p5gbe_led0", "wf5g_led0", "wf5g_led1", }; -static const char *mt7988_usb_groups[] = { +static const char * const mt7988_usb_groups[] = { "drv_vbus", "drv_vbus_p1", }; @@ -1226,7 +1411,7 @@ static const struct mtk_eint_hw mt7988_eint_hw = { .db_cnt = 16, }; -static const char *mt7988_pinctrl_register_base_names[] = { +static const char * const mt7988_pinctrl_register_base_names[] = { "gpio_base", "iocfg_tr_base", "iocfg_br_base", "iocfg_rb_base", "iocfg_lb_base", "iocfg_tl_base", }; diff --git a/target/linux/mediatek/files-6.1/drivers/pinctrl/mediatek/pinctrl-mt7988.c b/target/linux/mediatek/files-6.1/drivers/pinctrl/mediatek/pinctrl-mt7988.c index da0269ed7a2..49c0be1bba0 100644 --- a/target/linux/mediatek/files-6.1/drivers/pinctrl/mediatek/pinctrl-mt7988.c +++ b/target/linux/mediatek/files-6.1/drivers/pinctrl/mediatek/pinctrl-mt7988.c @@ -46,37 +46,53 @@ static const struct mtk_pin_field_calc mt7988_pin_do_range[] = { }; static const struct mtk_pin_field_calc mt7988_pin_ies_range[] = { - PIN_FIELD_BASE(0, 1, 5, 0x30, 0x10, 13, 1), - PIN_FIELD_BASE(2, 3, 5, 0x30, 0x10, 11, 1), + PIN_FIELD_BASE(0, 0, 5, 0x30, 0x10, 13, 1), + PIN_FIELD_BASE(1, 1, 5, 0x30, 0x10, 14, 1), + PIN_FIELD_BASE(2, 2, 5, 0x30, 0x10, 11, 1), + PIN_FIELD_BASE(3, 3, 5, 0x30, 0x10, 12, 1), PIN_FIELD_BASE(4, 4, 5, 0x30, 0x10, 0, 1), - PIN_FIELD_BASE(5, 6, 5, 0x30, 0x10, 9, 1), + PIN_FIELD_BASE(5, 5, 5, 0x30, 0x10, 9, 1), + PIN_FIELD_BASE(6, 6, 5, 0x30, 0x10, 10, 1), + PIN_FIELD_BASE(7, 7, 4, 0x30, 0x10, 8, 1), PIN_FIELD_BASE(8, 8, 4, 0x30, 0x10, 6, 1), PIN_FIELD_BASE(9, 9, 4, 0x30, 0x10, 5, 1), PIN_FIELD_BASE(10, 10, 4, 0x30, 0x10, 3, 1), + PIN_FIELD_BASE(11, 11, 1, 0x40, 0x10, 0, 1), PIN_FIELD_BASE(12, 12, 1, 0x40, 0x10, 21, 1), - PIN_FIELD_BASE(13, 14, 1, 0x40, 0x10, 1, 1), - PIN_FIELD_BASE(15, 16, 5, 0x30, 0x10, 7, 1), - PIN_FIELD_BASE(17, 18, 5, 0x30, 0x10, 3, 1), + PIN_FIELD_BASE(13, 13, 1, 0x40, 0x10, 1, 1), + PIN_FIELD_BASE(14, 14, 1, 0x40, 0x10, 2, 1), + + PIN_FIELD_BASE(15, 15, 5, 0x30, 0x10, 7, 1), + PIN_FIELD_BASE(16, 16, 5, 0x30, 0x10, 8, 1), + PIN_FIELD_BASE(17, 17, 5, 0x30, 0x10, 3, 1), + PIN_FIELD_BASE(18, 18, 5, 0x30, 0x10, 4, 1), + PIN_FIELD_BASE(19, 19, 4, 0x30, 0x10, 7, 1), PIN_FIELD_BASE(20, 20, 4, 0x30, 0x10, 4, 1), + PIN_FIELD_BASE(21, 21, 3, 0x50, 0x10, 17, 1), PIN_FIELD_BASE(22, 22, 3, 0x50, 0x10, 23, 1), PIN_FIELD_BASE(23, 23, 3, 0x50, 0x10, 20, 1), PIN_FIELD_BASE(24, 24, 3, 0x50, 0x10, 19, 1), - PIN_FIELD_BASE(25, 26, 3, 0x50, 0x10, 21, 1), + PIN_FIELD_BASE(25, 25, 3, 0x50, 0x10, 21, 1), + PIN_FIELD_BASE(26, 26, 3, 0x50, 0x10, 22, 1), PIN_FIELD_BASE(27, 27, 3, 0x50, 0x10, 18, 1), - PIN_FIELD_BASE(28, 30, 3, 0x50, 0x10, 25, 1), + PIN_FIELD_BASE(28, 28, 3, 0x50, 0x10, 25, 1), + PIN_FIELD_BASE(29, 29, 3, 0x50, 0x10, 26, 1), + PIN_FIELD_BASE(30, 30, 3, 0x50, 0x10, 27, 1), PIN_FIELD_BASE(31, 31, 3, 0x50, 0x10, 24, 1), PIN_FIELD_BASE(32, 32, 3, 0x50, 0x10, 28, 1), PIN_FIELD_BASE(33, 33, 3, 0x60, 0x10, 0, 1), PIN_FIELD_BASE(34, 34, 3, 0x50, 0x10, 31, 1), - PIN_FIELD_BASE(35, 36, 3, 0x50, 0x10, 29, 1), + PIN_FIELD_BASE(35, 35, 3, 0x50, 0x10, 29, 1), + PIN_FIELD_BASE(36, 36, 3, 0x50, 0x10, 30, 1), PIN_FIELD_BASE(37, 37, 3, 0x60, 0x10, 1, 1), PIN_FIELD_BASE(38, 38, 3, 0x50, 0x10, 11, 1), PIN_FIELD_BASE(39, 39, 3, 0x50, 0x10, 10, 1), - PIN_FIELD_BASE(40, 41, 3, 0x50, 0x10, 0, 1), + PIN_FIELD_BASE(40, 40, 3, 0x50, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 3, 0x50, 0x10, 1, 1), PIN_FIELD_BASE(42, 42, 3, 0x50, 0x10, 9, 1), PIN_FIELD_BASE(43, 43, 3, 0x50, 0x10, 8, 1), PIN_FIELD_BASE(44, 44, 3, 0x50, 0x10, 7, 1), @@ -86,17 +102,31 @@ static const struct mtk_pin_field_calc mt7988_pin_ies_range[] = { PIN_FIELD_BASE(48, 48, 3, 0x50, 0x10, 3, 1), PIN_FIELD_BASE(49, 49, 3, 0x50, 0x10, 2, 1), PIN_FIELD_BASE(50, 50, 3, 0x50, 0x10, 15, 1), - PIN_FIELD_BASE(51, 53, 3, 0x50, 0x10, 12, 1), + PIN_FIELD_BASE(51, 51, 3, 0x50, 0x10, 12, 1), + PIN_FIELD_BASE(52, 52, 3, 0x50, 0x10, 13, 1), + PIN_FIELD_BASE(53, 53, 3, 0x50, 0x10, 14, 1), PIN_FIELD_BASE(54, 54, 3, 0x50, 0x10, 16, 1), - PIN_FIELD_BASE(55, 56, 1, 0x40, 0x10, 14, 1), + + PIN_FIELD_BASE(55, 55, 1, 0x40, 0x10, 14, 1), + PIN_FIELD_BASE(56, 56, 1, 0x40, 0x10, 15, 1), PIN_FIELD_BASE(57, 57, 1, 0x40, 0x10, 13, 1), - PIN_FIELD_BASE(58, 60, 1, 0x40, 0x10, 4, 1), + PIN_FIELD_BASE(58, 58, 1, 0x40, 0x10, 4, 1), + PIN_FIELD_BASE(59, 59, 1, 0x40, 0x10, 5, 1), + PIN_FIELD_BASE(60, 60, 1, 0x40, 0x10, 6, 1), PIN_FIELD_BASE(61, 61, 1, 0x40, 0x10, 3, 1), PIN_FIELD_BASE(62, 62, 1, 0x40, 0x10, 7, 1), PIN_FIELD_BASE(63, 63, 1, 0x40, 0x10, 20, 1), - PIN_FIELD_BASE(64, 68, 1, 0x40, 0x10, 8, 1), - PIN_FIELD_BASE(69, 70, 5, 0x30, 0x10, 1, 1), - PIN_FIELD_BASE(71, 72, 5, 0x30, 0x10, 5, 1), + PIN_FIELD_BASE(64, 64, 1, 0x40, 0x10, 8, 1), + PIN_FIELD_BASE(65, 65, 1, 0x40, 0x10, 9, 1), + PIN_FIELD_BASE(66, 66, 1, 0x40, 0x10, 10, 1), + PIN_FIELD_BASE(67, 67, 1, 0x40, 0x10, 11, 1), + PIN_FIELD_BASE(68, 68, 1, 0x40, 0x10, 12, 1), + + PIN_FIELD_BASE(69, 69, 5, 0x30, 0x10, 1, 1), + PIN_FIELD_BASE(70, 70, 5, 0x30, 0x10, 2, 1), + PIN_FIELD_BASE(71, 71, 5, 0x30, 0x10, 5, 1), + PIN_FIELD_BASE(72, 72, 5, 0x30, 0x10, 6, 1), + PIN_FIELD_BASE(73, 73, 4, 0x30, 0x10, 10, 1), PIN_FIELD_BASE(74, 74, 4, 0x30, 0x10, 1, 1), PIN_FIELD_BASE(75, 75, 4, 0x30, 0x10, 11, 1), @@ -104,42 +134,61 @@ static const struct mtk_pin_field_calc mt7988_pin_ies_range[] = { PIN_FIELD_BASE(77, 77, 4, 0x30, 0x10, 2, 1), PIN_FIELD_BASE(78, 78, 4, 0x30, 0x10, 0, 1), PIN_FIELD_BASE(79, 79, 4, 0x30, 0x10, 12, 1), - PIN_FIELD_BASE(80, 81, 1, 0x40, 0x10, 18, 1), - PIN_FIELD_BASE(82, 83, 1, 0x40, 0x10, 16, 1), + + PIN_FIELD_BASE(80, 80, 1, 0x40, 0x10, 18, 1), + PIN_FIELD_BASE(81, 81, 1, 0x40, 0x10, 19, 1), + PIN_FIELD_BASE(82, 82, 1, 0x40, 0x10, 16, 1), + PIN_FIELD_BASE(83, 83, 1, 0x40, 0x10, 17, 1), }; static const struct mtk_pin_field_calc mt7988_pin_smt_range[] = { - PIN_FIELD_BASE(0, 1, 5, 0xc0, 0x10, 13, 1), - PIN_FIELD_BASE(2, 3, 5, 0xc0, 0x10, 11, 1), + PIN_FIELD_BASE(0, 0, 5, 0xc0, 0x10, 13, 1), + PIN_FIELD_BASE(1, 1, 5, 0xc0, 0x10, 14, 1), + PIN_FIELD_BASE(2, 2, 5, 0xc0, 0x10, 11, 1), + PIN_FIELD_BASE(3, 3, 5, 0xc0, 0x10, 12, 1), PIN_FIELD_BASE(4, 4, 5, 0xc0, 0x10, 0, 1), - PIN_FIELD_BASE(5, 6, 5, 0xc0, 0x10, 9, 1), + PIN_FIELD_BASE(5, 5, 5, 0xc0, 0x10, 9, 1), + PIN_FIELD_BASE(6, 6, 5, 0xc0, 0x10, 10, 1), + PIN_FIELD_BASE(7, 7, 4, 0xb0, 0x10, 8, 1), PIN_FIELD_BASE(8, 8, 4, 0xb0, 0x10, 6, 1), PIN_FIELD_BASE(9, 9, 4, 0xb0, 0x10, 5, 1), PIN_FIELD_BASE(10, 10, 4, 0xb0, 0x10, 3, 1), + PIN_FIELD_BASE(11, 11, 1, 0xe0, 0x10, 0, 1), PIN_FIELD_BASE(12, 12, 1, 0xe0, 0x10, 21, 1), - PIN_FIELD_BASE(13, 14, 1, 0xe0, 0x10, 1, 1), - PIN_FIELD_BASE(15, 16, 5, 0xc0, 0x10, 7, 1), - PIN_FIELD_BASE(17, 18, 5, 0xc0, 0x10, 3, 1), + PIN_FIELD_BASE(13, 13, 1, 0xe0, 0x10, 1, 1), + PIN_FIELD_BASE(14, 14, 1, 0xe0, 0x10, 2, 1), + + PIN_FIELD_BASE(15, 15, 5, 0xc0, 0x10, 7, 1), + PIN_FIELD_BASE(16, 16, 5, 0xc0, 0x10, 8, 1), + PIN_FIELD_BASE(17, 17, 5, 0xc0, 0x10, 3, 1), + PIN_FIELD_BASE(18, 18, 5, 0xc0, 0x10, 4, 1), + PIN_FIELD_BASE(19, 19, 4, 0xb0, 0x10, 7, 1), PIN_FIELD_BASE(20, 20, 4, 0xb0, 0x10, 4, 1), + PIN_FIELD_BASE(21, 21, 3, 0x140, 0x10, 17, 1), PIN_FIELD_BASE(22, 22, 3, 0x140, 0x10, 23, 1), PIN_FIELD_BASE(23, 23, 3, 0x140, 0x10, 20, 1), PIN_FIELD_BASE(24, 24, 3, 0x140, 0x10, 19, 1), - PIN_FIELD_BASE(25, 26, 3, 0x140, 0x10, 21, 1), + PIN_FIELD_BASE(25, 25, 3, 0x140, 0x10, 21, 1), + PIN_FIELD_BASE(26, 26, 3, 0x140, 0x10, 22, 1), PIN_FIELD_BASE(27, 27, 3, 0x140, 0x10, 18, 1), - PIN_FIELD_BASE(28, 30, 3, 0x140, 0x10, 25, 1), + PIN_FIELD_BASE(28, 28, 3, 0x140, 0x10, 25, 1), + PIN_FIELD_BASE(29, 29, 3, 0x140, 0x10, 26, 1), + PIN_FIELD_BASE(30, 30, 3, 0x140, 0x10, 27, 1), PIN_FIELD_BASE(31, 31, 3, 0x140, 0x10, 24, 1), PIN_FIELD_BASE(32, 32, 3, 0x140, 0x10, 28, 1), PIN_FIELD_BASE(33, 33, 3, 0x150, 0x10, 0, 1), PIN_FIELD_BASE(34, 34, 3, 0x140, 0x10, 31, 1), - PIN_FIELD_BASE(35, 36, 3, 0x140, 0x10, 29, 1), + PIN_FIELD_BASE(35, 35, 3, 0x140, 0x10, 29, 1), + PIN_FIELD_BASE(36, 36, 3, 0x140, 0x10, 30, 1), PIN_FIELD_BASE(37, 37, 3, 0x150, 0x10, 1, 1), PIN_FIELD_BASE(38, 38, 3, 0x140, 0x10, 11, 1), PIN_FIELD_BASE(39, 39, 3, 0x140, 0x10, 10, 1), - PIN_FIELD_BASE(40, 41, 3, 0x140, 0x10, 0, 1), + PIN_FIELD_BASE(40, 40, 3, 0x140, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 3, 0x140, 0x10, 1, 1), PIN_FIELD_BASE(42, 42, 3, 0x140, 0x10, 9, 1), PIN_FIELD_BASE(43, 43, 3, 0x140, 0x10, 8, 1), PIN_FIELD_BASE(44, 44, 3, 0x140, 0x10, 7, 1), @@ -149,17 +198,31 @@ static const struct mtk_pin_field_calc mt7988_pin_smt_range[] = { PIN_FIELD_BASE(48, 48, 3, 0x140, 0x10, 3, 1), PIN_FIELD_BASE(49, 49, 3, 0x140, 0x10, 2, 1), PIN_FIELD_BASE(50, 50, 3, 0x140, 0x10, 15, 1), - PIN_FIELD_BASE(51, 53, 3, 0x140, 0x10, 12, 1), + PIN_FIELD_BASE(51, 51, 3, 0x140, 0x10, 12, 1), + PIN_FIELD_BASE(52, 52, 3, 0x140, 0x10, 13, 1), + PIN_FIELD_BASE(53, 53, 3, 0x140, 0x10, 14, 1), PIN_FIELD_BASE(54, 54, 3, 0x140, 0x10, 16, 1), - PIN_FIELD_BASE(55, 56, 1, 0xe0, 0x10, 14, 1), + + PIN_FIELD_BASE(55, 55, 1, 0xe0, 0x10, 14, 1), + PIN_FIELD_BASE(56, 56, 1, 0xe0, 0x10, 15, 1), PIN_FIELD_BASE(57, 57, 1, 0xe0, 0x10, 13, 1), - PIN_FIELD_BASE(58, 60, 1, 0xe0, 0x10, 4, 1), + PIN_FIELD_BASE(58, 58, 1, 0xe0, 0x10, 4, 1), + PIN_FIELD_BASE(59, 59, 1, 0xe0, 0x10, 5, 1), + PIN_FIELD_BASE(60, 60, 1, 0xe0, 0x10, 6, 1), PIN_FIELD_BASE(61, 61, 1, 0xe0, 0x10, 3, 1), PIN_FIELD_BASE(62, 62, 1, 0xe0, 0x10, 7, 1), PIN_FIELD_BASE(63, 63, 1, 0xe0, 0x10, 20, 1), - PIN_FIELD_BASE(64, 68, 1, 0xe0, 0x10, 8, 1), - PIN_FIELD_BASE(69, 70, 5, 0xc0, 0x10, 1, 1), - PIN_FIELD_BASE(71, 72, 5, 0xc0, 0x10, 5, 1), + PIN_FIELD_BASE(64, 64, 1, 0xe0, 0x10, 8, 1), + PIN_FIELD_BASE(65, 65, 1, 0xe0, 0x10, 9, 1), + PIN_FIELD_BASE(66, 66, 1, 0xe0, 0x10, 10, 1), + PIN_FIELD_BASE(67, 67, 1, 0xe0, 0x10, 11, 1), + PIN_FIELD_BASE(68, 68, 1, 0xe0, 0x10, 12, 1), + + PIN_FIELD_BASE(69, 69, 5, 0xc0, 0x10, 1, 1), + PIN_FIELD_BASE(70, 70, 5, 0xc0, 0x10, 2, 1), + PIN_FIELD_BASE(71, 71, 5, 0xc0, 0x10, 5, 1), + PIN_FIELD_BASE(72, 72, 5, 0xc0, 0x10, 6, 1), + PIN_FIELD_BASE(73, 73, 4, 0xb0, 0x10, 10, 1), PIN_FIELD_BASE(74, 74, 4, 0xb0, 0x10, 1, 1), PIN_FIELD_BASE(75, 75, 4, 0xb0, 0x10, 11, 1), @@ -167,8 +230,11 @@ static const struct mtk_pin_field_calc mt7988_pin_smt_range[] = { PIN_FIELD_BASE(77, 77, 4, 0xb0, 0x10, 2, 1), PIN_FIELD_BASE(78, 78, 4, 0xb0, 0x10, 0, 1), PIN_FIELD_BASE(79, 79, 4, 0xb0, 0x10, 12, 1), - PIN_FIELD_BASE(80, 81, 1, 0xe0, 0x10, 18, 1), - PIN_FIELD_BASE(82, 83, 1, 0xe0, 0x10, 16, 1), + + PIN_FIELD_BASE(80, 80, 1, 0xe0, 0x10, 18, 1), + PIN_FIELD_BASE(81, 81, 1, 0xe0, 0x10, 19, 1), + PIN_FIELD_BASE(82, 82, 1, 0xe0, 0x10, 16, 1), + PIN_FIELD_BASE(83, 83, 1, 0xe0, 0x10, 17, 1), }; static const struct mtk_pin_field_calc mt7988_pin_pu_range[] = { @@ -176,8 +242,11 @@ static const struct mtk_pin_field_calc mt7988_pin_pu_range[] = { PIN_FIELD_BASE(8, 8, 4, 0x60, 0x10, 4, 1), PIN_FIELD_BASE(9, 9, 4, 0x60, 0x10, 3, 1), PIN_FIELD_BASE(10, 10, 4, 0x60, 0x10, 2, 1), - PIN_FIELD_BASE(13, 14, 1, 0x70, 0x10, 0, 1), + + PIN_FIELD_BASE(13, 13, 1, 0x70, 0x10, 0, 1), + PIN_FIELD_BASE(14, 14, 1, 0x70, 0x10, 1, 1), PIN_FIELD_BASE(63, 63, 1, 0x70, 0x10, 2, 1), + PIN_FIELD_BASE(75, 75, 4, 0x60, 0x10, 7, 1), PIN_FIELD_BASE(76, 76, 4, 0x60, 0x10, 6, 1), PIN_FIELD_BASE(77, 77, 4, 0x60, 0x10, 1, 1), @@ -190,11 +259,19 @@ static const struct mtk_pin_field_calc mt7988_pin_pd_range[] = { PIN_FIELD_BASE(8, 8, 4, 0x40, 0x10, 4, 1), PIN_FIELD_BASE(9, 9, 4, 0x40, 0x10, 3, 1), PIN_FIELD_BASE(10, 10, 4, 0x40, 0x10, 2, 1), - PIN_FIELD_BASE(13, 14, 1, 0x50, 0x10, 0, 1), - PIN_FIELD_BASE(15, 16, 5, 0x40, 0x10, 4, 1), - PIN_FIELD_BASE(17, 18, 5, 0x40, 0x10, 0, 1), + + PIN_FIELD_BASE(13, 13, 1, 0x50, 0x10, 0, 1), + PIN_FIELD_BASE(14, 14, 1, 0x50, 0x10, 1, 1), + + PIN_FIELD_BASE(15, 15, 5, 0x40, 0x10, 4, 1), + PIN_FIELD_BASE(16, 16, 5, 0x40, 0x10, 5, 1), + PIN_FIELD_BASE(17, 17, 5, 0x40, 0x10, 0, 1), + PIN_FIELD_BASE(18, 18, 5, 0x40, 0x10, 1, 1), + PIN_FIELD_BASE(63, 63, 1, 0x50, 0x10, 2, 1), - PIN_FIELD_BASE(71, 72, 5, 0x40, 0x10, 2, 1), + PIN_FIELD_BASE(71, 71, 5, 0x40, 0x10, 2, 1), + PIN_FIELD_BASE(72, 72, 5, 0x40, 0x10, 3, 1), + PIN_FIELD_BASE(75, 75, 4, 0x40, 0x10, 7, 1), PIN_FIELD_BASE(76, 76, 4, 0x40, 0x10, 6, 1), PIN_FIELD_BASE(77, 77, 4, 0x40, 0x10, 1, 1), @@ -203,26 +280,37 @@ static const struct mtk_pin_field_calc mt7988_pin_pd_range[] = { }; static const struct mtk_pin_field_calc mt7988_pin_drv_range[] = { - PIN_FIELD_BASE(0, 1, 5, 0x00, 0x10, 21, 3), - PIN_FIELD_BASE(2, 3, 5, 0x00, 0x10, 15, 3), + PIN_FIELD_BASE(0, 0, 5, 0x00, 0x10, 21, 3), + PIN_FIELD_BASE(1, 1, 5, 0x00, 0x10, 24, 3), + PIN_FIELD_BASE(2, 2, 5, 0x00, 0x10, 15, 3), + PIN_FIELD_BASE(3, 3, 5, 0x00, 0x10, 18, 3), PIN_FIELD_BASE(4, 4, 5, 0x00, 0x10, 0, 3), - PIN_FIELD_BASE(5, 6, 5, 0x00, 0x10, 9, 3), + PIN_FIELD_BASE(5, 5, 5, 0x00, 0x10, 9, 3), + PIN_FIELD_BASE(6, 6, 5, 0x00, 0x10, 12, 3), + PIN_FIELD_BASE(7, 7, 4, 0x00, 0x10, 24, 3), PIN_FIELD_BASE(8, 8, 4, 0x00, 0x10, 28, 3), PIN_FIELD_BASE(9, 9, 4, 0x00, 0x10, 15, 3), PIN_FIELD_BASE(10, 10, 4, 0x00, 0x10, 9, 3), + PIN_FIELD_BASE(11, 11, 1, 0x00, 0x10, 0, 3), PIN_FIELD_BASE(12, 12, 1, 0x20, 0x10, 3, 3), - PIN_FIELD_BASE(13, 14, 1, 0x00, 0x10, 3, 3), + PIN_FIELD_BASE(13, 13, 1, 0x00, 0x10, 3, 3), + PIN_FIELD_BASE(14, 14, 1, 0x00, 0x10, 6, 3), + PIN_FIELD_BASE(19, 19, 4, 0x00, 0x10, 21, 3), PIN_FIELD_BASE(20, 20, 4, 0x00, 0x10, 12, 3), + PIN_FIELD_BASE(21, 21, 3, 0x10, 0x10, 21, 3), PIN_FIELD_BASE(22, 22, 3, 0x20, 0x10, 9, 3), PIN_FIELD_BASE(23, 23, 3, 0x20, 0x10, 0, 3), PIN_FIELD_BASE(24, 24, 3, 0x10, 0x10, 27, 3), - PIN_FIELD_BASE(25, 26, 3, 0x20, 0x10, 3, 3), + PIN_FIELD_BASE(25, 25, 3, 0x20, 0x10, 3, 3), + PIN_FIELD_BASE(26, 26, 3, 0x20, 0x10, 6, 3), PIN_FIELD_BASE(27, 27, 3, 0x10, 0x10, 24, 3), - PIN_FIELD_BASE(28, 30, 3, 0x20, 0x10, 15, 3), + PIN_FIELD_BASE(28, 28, 3, 0x20, 0x10, 15, 3), + PIN_FIELD_BASE(29, 29, 3, 0x20, 0x10, 18, 3), + PIN_FIELD_BASE(30, 30, 3, 0x20, 0x10, 21, 3), PIN_FIELD_BASE(31, 31, 3, 0x20, 0x10, 12, 3), PIN_FIELD_BASE(32, 32, 3, 0x20, 0x10, 24, 3), PIN_FIELD_BASE(33, 33, 3, 0x30, 0x10, 6, 3), @@ -232,7 +320,8 @@ static const struct mtk_pin_field_calc mt7988_pin_drv_range[] = { PIN_FIELD_BASE(37, 37, 3, 0x30, 0x10, 9, 3), PIN_FIELD_BASE(38, 38, 3, 0x10, 0x10, 3, 3), PIN_FIELD_BASE(39, 39, 3, 0x10, 0x10, 0, 3), - PIN_FIELD_BASE(40, 41, 3, 0x00, 0x10, 0, 3), + PIN_FIELD_BASE(40, 40, 3, 0x00, 0x10, 0, 3), + PIN_FIELD_BASE(41, 41, 3, 0x00, 0x10, 3, 3), PIN_FIELD_BASE(42, 42, 3, 0x00, 0x10, 27, 3), PIN_FIELD_BASE(43, 43, 3, 0x00, 0x10, 24, 3), PIN_FIELD_BASE(44, 44, 3, 0x00, 0x10, 21, 3), @@ -242,17 +331,29 @@ static const struct mtk_pin_field_calc mt7988_pin_drv_range[] = { PIN_FIELD_BASE(48, 48, 3, 0x00, 0x10, 9, 3), PIN_FIELD_BASE(49, 49, 3, 0x00, 0x10, 6, 3), PIN_FIELD_BASE(50, 50, 3, 0x10, 0x10, 15, 3), - PIN_FIELD_BASE(51, 53, 3, 0x10, 0x10, 6, 3), + PIN_FIELD_BASE(51, 51, 3, 0x10, 0x10, 6, 3), + PIN_FIELD_BASE(52, 52, 3, 0x10, 0x10, 9, 3), + PIN_FIELD_BASE(53, 53, 3, 0x10, 0x10, 12, 3), PIN_FIELD_BASE(54, 54, 3, 0x10, 0x10, 18, 3), - PIN_FIELD_BASE(55, 56, 1, 0x10, 0x10, 12, 3), + + PIN_FIELD_BASE(55, 55, 1, 0x10, 0x10, 12, 3), + PIN_FIELD_BASE(56, 56, 1, 0x10, 0x10, 15, 3), PIN_FIELD_BASE(57, 57, 1, 0x10, 0x10, 9, 3), - PIN_FIELD_BASE(58, 60, 1, 0x00, 0x10, 12, 3), + PIN_FIELD_BASE(58, 58, 1, 0x00, 0x10, 12, 3), + PIN_FIELD_BASE(59, 59, 1, 0x00, 0x10, 15, 3), + PIN_FIELD_BASE(60, 60, 1, 0x00, 0x10, 18, 3), PIN_FIELD_BASE(61, 61, 1, 0x00, 0x10, 9, 3), PIN_FIELD_BASE(62, 62, 1, 0x00, 0x10, 21, 3), PIN_FIELD_BASE(63, 63, 1, 0x20, 0x10, 0, 3), - PIN_FIELD_BASE(64, 65, 1, 0x00, 0x10, 24, 3), - PIN_FIELD_BASE(66, 68, 1, 0x10, 0x10, 0, 3), - PIN_FIELD_BASE(69, 70, 5, 0x00, 0x10, 3, 3), + PIN_FIELD_BASE(64, 64, 1, 0x00, 0x10, 24, 3), + PIN_FIELD_BASE(65, 65, 1, 0x00, 0x10, 27, 3), + PIN_FIELD_BASE(66, 66, 1, 0x10, 0x10, 0, 3), + PIN_FIELD_BASE(67, 67, 1, 0x10, 0x10, 3, 3), + PIN_FIELD_BASE(68, 68, 1, 0x10, 0x10, 6, 3), + + PIN_FIELD_BASE(69, 69, 5, 0x00, 0x10, 3, 3), + PIN_FIELD_BASE(70, 70, 5, 0x00, 0x10, 6, 3), + PIN_FIELD_BASE(73, 73, 4, 0x10, 0x10, 0, 3), PIN_FIELD_BASE(74, 74, 4, 0x00, 0x10, 3, 3), PIN_FIELD_BASE(75, 75, 4, 0x10, 0x10, 3, 3), @@ -260,35 +361,49 @@ static const struct mtk_pin_field_calc mt7988_pin_drv_range[] = { PIN_FIELD_BASE(77, 77, 4, 0x00, 0x10, 6, 3), PIN_FIELD_BASE(78, 78, 4, 0x00, 0x10, 0, 3), PIN_FIELD_BASE(79, 79, 4, 0x10, 0x10, 6, 3), - PIN_FIELD_BASE(80, 81, 1, 0x10, 0x10, 24, 3), - PIN_FIELD_BASE(82, 83, 1, 0x10, 0x10, 18, 3), + + PIN_FIELD_BASE(80, 80, 1, 0x10, 0x10, 24, 3), + PIN_FIELD_BASE(81, 81, 1, 0x10, 0x10, 27, 3), + PIN_FIELD_BASE(82, 82, 1, 0x10, 0x10, 18, 3), + PIN_FIELD_BASE(83, 83, 1, 0x10, 0x10, 21, 3), }; static const struct mtk_pin_field_calc mt7988_pin_pupd_range[] = { - PIN_FIELD_BASE(0, 1, 5, 0x50, 0x10, 7, 1), - PIN_FIELD_BASE(2, 3, 5, 0x50, 0x10, 5, 1), + PIN_FIELD_BASE(0, 0, 5, 0x50, 0x10, 7, 1), + PIN_FIELD_BASE(1, 1, 5, 0x50, 0x10, 8, 1), + PIN_FIELD_BASE(2, 2, 5, 0x50, 0x10, 5, 1), + PIN_FIELD_BASE(3, 3, 5, 0x50, 0x10, 6, 1), PIN_FIELD_BASE(4, 4, 5, 0x50, 0x10, 0, 1), - PIN_FIELD_BASE(5, 6, 5, 0x50, 0x10, 3, 1), + PIN_FIELD_BASE(5, 5, 5, 0x50, 0x10, 3, 1), + PIN_FIELD_BASE(6, 6, 5, 0x50, 0x10, 4, 1), + PIN_FIELD_BASE(11, 11, 1, 0x60, 0x10, 0, 1), PIN_FIELD_BASE(12, 12, 1, 0x60, 0x10, 18, 1), + PIN_FIELD_BASE(19, 19, 4, 0x50, 0x10, 2, 1), PIN_FIELD_BASE(20, 20, 4, 0x50, 0x10, 1, 1), + PIN_FIELD_BASE(21, 21, 3, 0x70, 0x10, 17, 1), PIN_FIELD_BASE(22, 22, 3, 0x70, 0x10, 23, 1), PIN_FIELD_BASE(23, 23, 3, 0x70, 0x10, 20, 1), PIN_FIELD_BASE(24, 24, 3, 0x70, 0x10, 19, 1), - PIN_FIELD_BASE(25, 26, 3, 0x70, 0x10, 21, 1), + PIN_FIELD_BASE(25, 25, 3, 0x70, 0x10, 21, 1), + PIN_FIELD_BASE(26, 26, 3, 0x70, 0x10, 22, 1), PIN_FIELD_BASE(27, 27, 3, 0x70, 0x10, 18, 1), - PIN_FIELD_BASE(28, 30, 3, 0x70, 0x10, 25, 1), + PIN_FIELD_BASE(28, 28, 3, 0x70, 0x10, 25, 1), + PIN_FIELD_BASE(29, 29, 3, 0x70, 0x10, 26, 1), + PIN_FIELD_BASE(30, 30, 3, 0x70, 0x10, 27, 1), PIN_FIELD_BASE(31, 31, 3, 0x70, 0x10, 24, 1), PIN_FIELD_BASE(32, 32, 3, 0x70, 0x10, 28, 1), PIN_FIELD_BASE(33, 33, 3, 0x80, 0x10, 0, 1), PIN_FIELD_BASE(34, 34, 3, 0x70, 0x10, 31, 1), - PIN_FIELD_BASE(35, 36, 3, 0x70, 0x10, 29, 1), + PIN_FIELD_BASE(35, 35, 3, 0x70, 0x10, 29, 1), + PIN_FIELD_BASE(36, 36, 3, 0x70, 0x10, 30, 1), PIN_FIELD_BASE(37, 37, 3, 0x80, 0x10, 1, 1), PIN_FIELD_BASE(38, 38, 3, 0x70, 0x10, 11, 1), PIN_FIELD_BASE(39, 39, 3, 0x70, 0x10, 10, 1), - PIN_FIELD_BASE(40, 41, 3, 0x70, 0x10, 0, 1), + PIN_FIELD_BASE(40, 40, 3, 0x70, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 3, 0x70, 0x10, 1, 1), PIN_FIELD_BASE(42, 42, 3, 0x70, 0x10, 9, 1), PIN_FIELD_BASE(43, 43, 3, 0x70, 0x10, 8, 1), PIN_FIELD_BASE(44, 44, 3, 0x70, 0x10, 7, 1), @@ -298,46 +413,73 @@ static const struct mtk_pin_field_calc mt7988_pin_pupd_range[] = { PIN_FIELD_BASE(48, 48, 3, 0x70, 0x10, 3, 1), PIN_FIELD_BASE(49, 49, 3, 0x70, 0x10, 2, 1), PIN_FIELD_BASE(50, 50, 3, 0x70, 0x10, 15, 1), - PIN_FIELD_BASE(51, 53, 3, 0x70, 0x10, 12, 1), + PIN_FIELD_BASE(51, 51, 3, 0x70, 0x10, 12, 1), + PIN_FIELD_BASE(52, 52, 3, 0x70, 0x10, 13, 1), + PIN_FIELD_BASE(53, 53, 3, 0x70, 0x10, 14, 1), PIN_FIELD_BASE(54, 54, 3, 0x70, 0x10, 16, 1), - PIN_FIELD_BASE(55, 56, 1, 0x60, 0x10, 12, 1), + + PIN_FIELD_BASE(55, 55, 1, 0x60, 0x10, 12, 1), + PIN_FIELD_BASE(56, 56, 1, 0x60, 0x10, 13, 1), PIN_FIELD_BASE(57, 57, 1, 0x60, 0x10, 11, 1), - PIN_FIELD_BASE(58, 60, 1, 0x60, 0x10, 2, 1), + PIN_FIELD_BASE(58, 58, 1, 0x60, 0x10, 2, 1), + PIN_FIELD_BASE(59, 59, 1, 0x60, 0x10, 3, 1), + PIN_FIELD_BASE(60, 60, 1, 0x60, 0x10, 4, 1), PIN_FIELD_BASE(61, 61, 1, 0x60, 0x10, 1, 1), PIN_FIELD_BASE(62, 62, 1, 0x60, 0x10, 5, 1), - PIN_FIELD_BASE(64, 68, 1, 0x60, 0x10, 6, 1), - PIN_FIELD_BASE(69, 70, 5, 0x50, 0x10, 1, 1), + PIN_FIELD_BASE(64, 64, 1, 0x60, 0x10, 6, 1), + PIN_FIELD_BASE(65, 65, 1, 0x60, 0x10, 7, 1), + PIN_FIELD_BASE(66, 66, 1, 0x60, 0x10, 8, 1), + PIN_FIELD_BASE(67, 67, 1, 0x60, 0x10, 9, 1), + PIN_FIELD_BASE(68, 68, 1, 0x60, 0x10, 10, 1), + + PIN_FIELD_BASE(69, 69, 5, 0x50, 0x10, 1, 1), + PIN_FIELD_BASE(70, 70, 5, 0x50, 0x10, 2, 1), + PIN_FIELD_BASE(73, 73, 4, 0x50, 0x10, 3, 1), PIN_FIELD_BASE(74, 74, 4, 0x50, 0x10, 0, 1), - PIN_FIELD_BASE(80, 81, 1, 0x60, 0x10, 16, 1), - PIN_FIELD_BASE(82, 83, 1, 0x60, 0x10, 14, 1), + + PIN_FIELD_BASE(80, 80, 1, 0x60, 0x10, 16, 1), + PIN_FIELD_BASE(81, 81, 1, 0x60, 0x10, 17, 1), + PIN_FIELD_BASE(82, 82, 1, 0x60, 0x10, 14, 1), + PIN_FIELD_BASE(83, 83, 1, 0x60, 0x10, 15, 1), }; static const struct mtk_pin_field_calc mt7988_pin_r0_range[] = { - PIN_FIELD_BASE(0, 1, 5, 0x60, 0x10, 7, 1), - PIN_FIELD_BASE(2, 3, 5, 0x60, 0x10, 5, 1), + PIN_FIELD_BASE(0, 0, 5, 0x60, 0x10, 7, 1), + PIN_FIELD_BASE(1, 1, 5, 0x60, 0x10, 8, 1), + PIN_FIELD_BASE(2, 2, 5, 0x60, 0x10, 5, 1), + PIN_FIELD_BASE(3, 3, 5, 0x60, 0x10, 6, 1), PIN_FIELD_BASE(4, 4, 5, 0x60, 0x10, 0, 1), - PIN_FIELD_BASE(5, 6, 5, 0x60, 0x10, 3, 1), + PIN_FIELD_BASE(5, 5, 5, 0x60, 0x10, 3, 1), + PIN_FIELD_BASE(6, 6, 5, 0x60, 0x10, 4, 1), + PIN_FIELD_BASE(11, 11, 1, 0x80, 0x10, 0, 1), PIN_FIELD_BASE(12, 12, 1, 0x80, 0x10, 18, 1), + PIN_FIELD_BASE(19, 19, 4, 0x70, 0x10, 2, 1), PIN_FIELD_BASE(20, 20, 4, 0x70, 0x10, 1, 1), + PIN_FIELD_BASE(21, 21, 3, 0x90, 0x10, 17, 1), PIN_FIELD_BASE(22, 22, 3, 0x90, 0x10, 23, 1), PIN_FIELD_BASE(23, 23, 3, 0x90, 0x10, 20, 1), PIN_FIELD_BASE(24, 24, 3, 0x90, 0x10, 19, 1), - PIN_FIELD_BASE(25, 26, 3, 0x90, 0x10, 21, 1), + PIN_FIELD_BASE(25, 25, 3, 0x90, 0x10, 21, 1), + PIN_FIELD_BASE(26, 26, 3, 0x90, 0x10, 22, 1), PIN_FIELD_BASE(27, 27, 3, 0x90, 0x10, 18, 1), - PIN_FIELD_BASE(28, 30, 3, 0x90, 0x10, 25, 1), + PIN_FIELD_BASE(28, 28, 3, 0x90, 0x10, 25, 1), + PIN_FIELD_BASE(29, 29, 3, 0x90, 0x10, 26, 1), + PIN_FIELD_BASE(30, 30, 3, 0x90, 0x10, 27, 1), PIN_FIELD_BASE(31, 31, 3, 0x90, 0x10, 24, 1), PIN_FIELD_BASE(32, 32, 3, 0x90, 0x10, 28, 1), PIN_FIELD_BASE(33, 33, 3, 0xa0, 0x10, 0, 1), PIN_FIELD_BASE(34, 34, 3, 0x90, 0x10, 31, 1), - PIN_FIELD_BASE(35, 36, 3, 0x90, 0x10, 29, 1), + PIN_FIELD_BASE(35, 35, 3, 0x90, 0x10, 29, 1), + PIN_FIELD_BASE(36, 36, 3, 0x90, 0x10, 30, 1), PIN_FIELD_BASE(37, 37, 3, 0xa0, 0x10, 1, 1), PIN_FIELD_BASE(38, 38, 3, 0x90, 0x10, 11, 1), PIN_FIELD_BASE(39, 39, 3, 0x90, 0x10, 10, 1), - PIN_FIELD_BASE(40, 41, 3, 0x90, 0x10, 0, 1), + PIN_FIELD_BASE(40, 40, 3, 0x90, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 3, 0x90, 0x10, 1, 1), PIN_FIELD_BASE(42, 42, 3, 0x90, 0x10, 9, 1), PIN_FIELD_BASE(43, 43, 3, 0x90, 0x10, 8, 1), PIN_FIELD_BASE(44, 44, 3, 0x90, 0x10, 7, 1), @@ -347,46 +489,73 @@ static const struct mtk_pin_field_calc mt7988_pin_r0_range[] = { PIN_FIELD_BASE(48, 48, 3, 0x90, 0x10, 3, 1), PIN_FIELD_BASE(49, 49, 3, 0x90, 0x10, 2, 1), PIN_FIELD_BASE(50, 50, 3, 0x90, 0x10, 15, 1), - PIN_FIELD_BASE(51, 53, 3, 0x90, 0x10, 12, 1), + PIN_FIELD_BASE(51, 51, 3, 0x90, 0x10, 12, 1), + PIN_FIELD_BASE(52, 52, 3, 0x90, 0x10, 13, 1), + PIN_FIELD_BASE(53, 53, 3, 0x90, 0x10, 14, 1), PIN_FIELD_BASE(54, 54, 3, 0x90, 0x10, 16, 1), - PIN_FIELD_BASE(55, 56, 1, 0x80, 0x10, 12, 1), + + PIN_FIELD_BASE(55, 55, 1, 0x80, 0x10, 12, 1), + PIN_FIELD_BASE(56, 56, 1, 0x80, 0x10, 13, 1), PIN_FIELD_BASE(57, 57, 1, 0x80, 0x10, 11, 1), - PIN_FIELD_BASE(58, 60, 1, 0x80, 0x10, 2, 1), + PIN_FIELD_BASE(58, 58, 1, 0x80, 0x10, 2, 1), + PIN_FIELD_BASE(59, 59, 1, 0x80, 0x10, 3, 1), + PIN_FIELD_BASE(60, 60, 1, 0x80, 0x10, 4, 1), PIN_FIELD_BASE(61, 61, 1, 0x80, 0x10, 1, 1), PIN_FIELD_BASE(62, 62, 1, 0x80, 0x10, 5, 1), - PIN_FIELD_BASE(64, 68, 1, 0x80, 0x10, 6, 1), - PIN_FIELD_BASE(69, 70, 5, 0x60, 0x10, 1, 1), + PIN_FIELD_BASE(64, 64, 1, 0x80, 0x10, 6, 1), + PIN_FIELD_BASE(65, 65, 1, 0x80, 0x10, 7, 1), + PIN_FIELD_BASE(66, 66, 1, 0x80, 0x10, 8, 1), + PIN_FIELD_BASE(67, 67, 1, 0x80, 0x10, 9, 1), + PIN_FIELD_BASE(68, 68, 1, 0x80, 0x10, 10, 1), + + PIN_FIELD_BASE(69, 69, 5, 0x60, 0x10, 1, 1), + PIN_FIELD_BASE(70, 70, 5, 0x60, 0x10, 2, 1), + PIN_FIELD_BASE(73, 73, 4, 0x70, 0x10, 3, 1), PIN_FIELD_BASE(74, 74, 4, 0x70, 0x10, 0, 1), - PIN_FIELD_BASE(80, 81, 1, 0x80, 0x10, 16, 1), - PIN_FIELD_BASE(82, 83, 1, 0x80, 0x10, 14, 1), + + PIN_FIELD_BASE(80, 80, 1, 0x80, 0x10, 16, 1), + PIN_FIELD_BASE(81, 81, 1, 0x80, 0x10, 17, 1), + PIN_FIELD_BASE(82, 82, 1, 0x80, 0x10, 14, 1), + PIN_FIELD_BASE(83, 83, 1, 0x80, 0x10, 15, 1), }; static const struct mtk_pin_field_calc mt7988_pin_r1_range[] = { - PIN_FIELD_BASE(0, 1, 5, 0x70, 0x10, 7, 1), - PIN_FIELD_BASE(2, 3, 5, 0x70, 0x10, 5, 1), + PIN_FIELD_BASE(0, 0, 5, 0x70, 0x10, 7, 1), + PIN_FIELD_BASE(1, 1, 5, 0x70, 0x10, 8, 1), + PIN_FIELD_BASE(2, 2, 5, 0x70, 0x10, 5, 1), + PIN_FIELD_BASE(3, 3, 5, 0x70, 0x10, 6, 1), PIN_FIELD_BASE(4, 4, 5, 0x70, 0x10, 0, 1), - PIN_FIELD_BASE(5, 6, 5, 0x70, 0x10, 3, 1), + PIN_FIELD_BASE(5, 5, 5, 0x70, 0x10, 3, 1), + PIN_FIELD_BASE(6, 6, 5, 0x70, 0x10, 4, 1), + PIN_FIELD_BASE(11, 11, 1, 0x90, 0x10, 0, 1), PIN_FIELD_BASE(12, 12, 1, 0x90, 0x10, 18, 1), + PIN_FIELD_BASE(19, 19, 4, 0x80, 0x10, 2, 1), PIN_FIELD_BASE(20, 20, 4, 0x80, 0x10, 1, 1), + PIN_FIELD_BASE(21, 21, 3, 0xb0, 0x10, 17, 1), PIN_FIELD_BASE(22, 22, 3, 0xb0, 0x10, 23, 1), PIN_FIELD_BASE(23, 23, 3, 0xb0, 0x10, 20, 1), PIN_FIELD_BASE(24, 24, 3, 0xb0, 0x10, 19, 1), - PIN_FIELD_BASE(25, 26, 3, 0xb0, 0x10, 21, 1), + PIN_FIELD_BASE(25, 25, 3, 0xb0, 0x10, 21, 1), + PIN_FIELD_BASE(26, 26, 3, 0xb0, 0x10, 22, 1), PIN_FIELD_BASE(27, 27, 3, 0xb0, 0x10, 18, 1), - PIN_FIELD_BASE(28, 30, 3, 0xb0, 0x10, 25, 1), + PIN_FIELD_BASE(28, 28, 3, 0xb0, 0x10, 25, 1), + PIN_FIELD_BASE(29, 29, 3, 0xb0, 0x10, 26, 1), + PIN_FIELD_BASE(30, 30, 3, 0xb0, 0x10, 27, 1), PIN_FIELD_BASE(31, 31, 3, 0xb0, 0x10, 24, 1), PIN_FIELD_BASE(32, 32, 3, 0xb0, 0x10, 28, 1), PIN_FIELD_BASE(33, 33, 3, 0xc0, 0x10, 0, 1), PIN_FIELD_BASE(34, 34, 3, 0xb0, 0x10, 31, 1), - PIN_FIELD_BASE(35, 36, 3, 0xb0, 0x10, 29, 1), + PIN_FIELD_BASE(35, 35, 3, 0xb0, 0x10, 29, 1), + PIN_FIELD_BASE(36, 36, 3, 0xb0, 0x10, 30, 1), PIN_FIELD_BASE(37, 37, 3, 0xc0, 0x10, 1, 1), PIN_FIELD_BASE(38, 38, 3, 0xb0, 0x10, 11, 1), PIN_FIELD_BASE(39, 39, 3, 0xb0, 0x10, 10, 1), - PIN_FIELD_BASE(40, 41, 3, 0xb0, 0x10, 0, 1), + PIN_FIELD_BASE(40, 40, 3, 0xb0, 0x10, 0, 1), + PIN_FIELD_BASE(41, 41, 3, 0xb0, 0x10, 1, 1), PIN_FIELD_BASE(42, 42, 3, 0xb0, 0x10, 9, 1), PIN_FIELD_BASE(43, 43, 3, 0xb0, 0x10, 8, 1), PIN_FIELD_BASE(44, 44, 3, 0xb0, 0x10, 7, 1), @@ -396,19 +565,35 @@ static const struct mtk_pin_field_calc mt7988_pin_r1_range[] = { PIN_FIELD_BASE(48, 48, 3, 0xb0, 0x10, 3, 1), PIN_FIELD_BASE(49, 49, 3, 0xb0, 0x10, 2, 1), PIN_FIELD_BASE(50, 50, 3, 0xb0, 0x10, 15, 1), - PIN_FIELD_BASE(51, 53, 3, 0xb0, 0x10, 12, 1), + PIN_FIELD_BASE(51, 51, 3, 0xb0, 0x10, 12, 1), + PIN_FIELD_BASE(52, 52, 3, 0xb0, 0x10, 13, 1), + PIN_FIELD_BASE(53, 53, 3, 0xb0, 0x10, 14, 1), PIN_FIELD_BASE(54, 54, 3, 0xb0, 0x10, 16, 1), - PIN_FIELD_BASE(55, 56, 1, 0x90, 0x10, 12, 1), + + PIN_FIELD_BASE(55, 55, 1, 0x90, 0x10, 12, 1), + PIN_FIELD_BASE(56, 56, 1, 0x90, 0x10, 13, 1), PIN_FIELD_BASE(57, 57, 1, 0x90, 0x10, 11, 1), - PIN_FIELD_BASE(58, 60, 1, 0x90, 0x10, 2, 1), + PIN_FIELD_BASE(58, 58, 1, 0x90, 0x10, 2, 1), + PIN_FIELD_BASE(59, 59, 1, 0x90, 0x10, 3, 1), + PIN_FIELD_BASE(60, 60, 1, 0x90, 0x10, 4, 1), PIN_FIELD_BASE(61, 61, 1, 0x90, 0x10, 1, 1), PIN_FIELD_BASE(62, 62, 1, 0x90, 0x10, 5, 1), - PIN_FIELD_BASE(64, 68, 1, 0x90, 0x10, 6, 1), - PIN_FIELD_BASE(69, 70, 5, 0x70, 0x10, 1, 1), + PIN_FIELD_BASE(64, 64, 1, 0x90, 0x10, 6, 1), + PIN_FIELD_BASE(65, 65, 1, 0x90, 0x10, 7, 1), + PIN_FIELD_BASE(66, 66, 1, 0x90, 0x10, 8, 1), + PIN_FIELD_BASE(67, 67, 1, 0x90, 0x10, 9, 1), + PIN_FIELD_BASE(68, 68, 1, 0x90, 0x10, 10, 1), + + PIN_FIELD_BASE(69, 69, 5, 0x70, 0x10, 1, 1), + PIN_FIELD_BASE(70, 70, 5, 0x70, 0x10, 2, 1), + PIN_FIELD_BASE(73, 73, 4, 0x80, 0x10, 3, 1), PIN_FIELD_BASE(74, 74, 4, 0x80, 0x10, 0, 1), - PIN_FIELD_BASE(80, 81, 1, 0x90, 0x10, 16, 1), - PIN_FIELD_BASE(82, 83, 1, 0x90, 0x10, 14, 1), + + PIN_FIELD_BASE(80, 80, 1, 0x90, 0x10, 16, 1), + PIN_FIELD_BASE(81, 81, 1, 0x90, 0x10, 17, 1), + PIN_FIELD_BASE(82, 82, 1, 0x90, 0x10, 14, 1), + PIN_FIELD_BASE(83, 83, 1, 0x90, 0x10, 15, 1), }; static const struct mtk_pin_reg_calc mt7988_reg_cals[] = { @@ -1279,4 +1464,3 @@ static int __init mt7988_pinctrl_init(void) return platform_driver_register(&mt7988_pinctrl_driver); } arch_initcall(mt7988_pinctrl_init); - From 64b99802a61a477ed23fc1f3426fb19d1bc0c6f3 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Tue, 1 Aug 2023 00:08:56 +0100 Subject: [PATCH 11/27] mediatek: filogic: update MT7988 device tree * move ethernet to mt7988a.dtsi * move switch definition to mt7988a.dtsi * add PHY LEDs Signed-off-by: Daniel Golle --- .../mediatek/mt7988a-dsa-10g-spim-nand.dts | 245 +++++-------- .../arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 321 +++++++++++++++++- .../mediatek/mt7988a-dsa-10g-spim-nand.dts | 245 +++++-------- .../arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 321 +++++++++++++++++- 4 files changed, 794 insertions(+), 338 deletions(-) diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts index e204dc4f166..27ef19c46dd 100644 --- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts +++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts @@ -7,6 +7,7 @@ /dts-v1/; #include "mt7988a-rfb-spim-nand.dtsi" #include +#include / { model = "MediaTek MT7988A DSA 10G SPIM-NAND RFB"; @@ -29,173 +30,105 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; status = "okay"; +}; - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; +&gmac0 { + status = "okay"; +}; + +&gmac1 { + status = "okay"; + phy-mode = "internal"; + phy-connection-type = "internal"; + phy = <&int_2p5g_phy>; +}; + +&gmac2 { + status = "okay"; + phy-mode = "usxgmii"; + phy-connection-type = "usxgmii"; + phy = <&phy8>; +}; + +&mdio_bus { + /* external Aquantia AQR113C */ + phy0: ethernet-phy@0 { reg = <0>; - phy-mode = "internal"; - - fixed-link { - speed = <10000>; - full-duplex; - pause; - }; + compatible = "ethernet-phy-ieee802.3-c45"; + reset-gpios = <&pio 72 1>; + reset-assert-us = <100000>; + reset-deassert-us = <221000>; }; - gmac1: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - phy-mode = "internal"; - phy-connection-type = "internal"; - phy = <&phy15>; + /* external Aquantia AQR113C */ + phy8: ethernet-phy@8 { + reg = <8>; + compatible = "ethernet-phy-ieee802.3-c45"; + reset-gpios = <&pio 71 1>; + reset-assert-us = <100000>; + reset-deassert-us = <221000>; }; - gmac2: mac@2 { - compatible = "mediatek,eth-mac"; - reg = <2>; - phy-mode = "10gbase-kr"; - phy-connection-type = "10gbase-kr"; - phy = <&phy8>; + /* external Maxlinear GPY211C */ + phy5: ethernet-phy@5 { + reg = <5>; + compatible = "ethernet-phy-ieee802.3-c45"; + phy-mode = "2500base-x"; }; - mdio0: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - - /* external Aquantia AQR113C */ - phy0: ethernet-phy@0 { - reg = <0>; - compatible = "ethernet-phy-ieee802.3-c45"; - reset-gpios = <&pio 72 1>; - reset-assert-us = <100000>; - reset-deassert-us = <221000>; - }; - - /* external Aquantia AQR113C */ - phy8: ethernet-phy@8 { - reg = <8>; - compatible = "ethernet-phy-ieee802.3-c45"; - reset-gpios = <&pio 71 1>; - reset-assert-us = <100000>; - reset-deassert-us = <221000>; - }; - - /* external Maxlinear GPY211C */ - phy5: ethernet-phy@5 { - reg = <5>; - compatible = "ethernet-phy-ieee802.3-c45"; - phy-mode = "2500base-x"; - }; - - /* external Maxlinear GPY211C */ - phy13: ethernet-phy@13 { - reg = <13>; - compatible = "ethernet-phy-ieee802.3-c45"; - phy-mode = "2500base-x"; - }; - - /* internal 2.5G PHY */ - phy15: ethernet-phy@15 { - reg = <15>; - pinctrl-names = "i2p5gbe-led"; - pinctrl-0 = <&i2p5gbe_led0_pins>; - compatible = "ethernet-phy-ieee802.3-c45"; - phy-mode = "internal"; - }; + /* external Maxlinear GPY211C */ + phy13: ethernet-phy@13 { + reg = <13>; + compatible = "ethernet-phy-ieee802.3-c45"; + phy-mode = "2500base-x"; }; }; +&int_2p5g_phy { + pinctrl-names = "i2p5gbe-led"; + pinctrl-0 = <&i2p5gbe_led0_pins>; +}; + &switch { status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - label = "lan0"; - phy-mode = "internal"; - phy-handle = <&gsw_phy0>; - }; - - port@1 { - reg = <1>; - label = "lan1"; - phy-mode = "internal"; - phy-handle = <&gsw_phy1>; - }; - - port@2 { - reg = <2>; - label = "lan2"; - phy-mode = "internal"; - phy-handle = <&gsw_phy2>; - }; - - port@3 { - reg = <3>; - label = "lan3"; - phy-mode = "internal"; - phy-handle = <&gsw_phy3>; - }; - - port@6 { - reg = <6>; - ethernet = <&gmac0>; - phy-mode = "internal"; - - fixed-link { - speed = <10000>; - full-duplex; - pause; - }; - }; - }; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - mediatek,pio = <&pio>; - - gsw_phy0: ethernet-phy@0 { - compatible = "ethernet-phy-id03a2.9481"; - reg = <0>; - phy-mode = "internal"; - pinctrl-names = "gbe-led"; - pinctrl-0 = <&gbe0_led0_pins>; - nvmem-cells = <&phy_calibration_p0>; - nvmem-cell-names = "phy-cal-data"; - }; - - gsw_phy1: ethernet-phy@1 { - compatible = "ethernet-phy-id03a2.9481"; - reg = <1>; - phy-mode = "internal"; - pinctrl-names = "gbe-led"; - pinctrl-0 = <&gbe1_led0_pins>; - nvmem-cells = <&phy_calibration_p1>; - nvmem-cell-names = "phy-cal-data"; - }; - - gsw_phy2: ethernet-phy@2 { - compatible = "ethernet-phy-id03a2.9481"; - reg = <2>; - phy-mode = "internal"; - pinctrl-names = "gbe-led"; - pinctrl-0 = <&gbe2_led0_pins>; - nvmem-cells = <&phy_calibration_p2>; - nvmem-cell-names = "phy-cal-data"; - }; - - gsw_phy3: ethernet-phy@3 { - compatible = "ethernet-phy-id03a2.9481"; - reg = <3>; - phy-mode = "internal"; - pinctrl-names = "gbe-led"; - pinctrl-0 = <&gbe3_led0_pins>; - nvmem-cells = <&phy_calibration_p3>; - nvmem-cell-names = "phy-cal-data"; - }; - }; +}; + +&gsw_phy0 { + pinctrl-names = "gbe-led"; + pinctrl-0 = <&gbe0_led0_pins>; +}; + +&gsw_phy0_led0 { + status = "okay"; + color = ; +}; + +&gsw_phy1 { + pinctrl-names = "gbe-led"; + pinctrl-0 = <&gbe1_led0_pins>; +}; + +&gsw_phy1_led0 { + status = "okay"; + color = ; +}; + +&gsw_phy2 { + pinctrl-names = "gbe-led"; + pinctrl-0 = <&gbe2_led0_pins>; +}; + +&gsw_phy2_led0 { + status = "okay"; + color = ; +}; + +&gsw_phy3 { + pinctrl-names = "gbe-led"; + pinctrl-0 = <&gbe3_led0_pins>; +}; + +&gsw_phy3_led0 { + status = "okay"; + color = ; }; diff --git a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a.dtsi index 94aa8251bd0..462218c65d4 100644 --- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a.dtsi +++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a.dtsi @@ -4,12 +4,13 @@ * Author: Sam.Shih */ -#include -#include -#include -#include #include +#include +#include +#include +#include #include +#include #include / { @@ -144,9 +145,9 @@ #size-cells = <2>; ranges; - /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ + /* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */ secmon_reserved: secmon@43000000 { - reg = <0 0x43000000 0 0x30000>; + reg = <0 0x43000000 0 0x50000>; no-map; }; }; @@ -228,7 +229,7 @@ "iocfg_lb_base", "iocfg_tl_base", "eint"; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pio 0 0 83>; + gpio-ranges = <&pio 0 0 84>; interrupt-controller; interrupts = ; interrupt-parent = <&gic>; @@ -260,47 +261,131 @@ }; }; - i2c2_pins: i2c2-pins-g0 { + i2c1_sfp_pins: i2c1-sfp-pins-g0 { + mux { + function = "i2c"; + groups = "i2c1_sfp"; + }; + }; + + i2c2_pins: i2c2-pins { + mux { + function = "i2c"; + groups = "i2c2"; + }; + }; + + i2c2_0_pins: i2c2-pins-g0 { + mux { + function = "i2c"; + groups = "i2c2_0"; + }; + }; + + i2c2_1_pins: i2c2-pins-g1 { mux { function = "i2c"; groups = "i2c2_1"; }; }; - gbe0_led0_pins: gbe0-pins { + gbe0_led0_pins: gbe0-led0-pins { mux { function = "led"; groups = "gbe0_led0"; }; }; - gbe1_led0_pins: gbe1-pins { + gbe1_led0_pins: gbe1-led0-pins { mux { function = "led"; groups = "gbe1_led0"; }; }; - gbe2_led0_pins: gbe2-pins { + gbe2_led0_pins: gbe2-led0-pins { mux { function = "led"; groups = "gbe2_led0"; }; }; - gbe3_led0_pins: gbe3-pins { + gbe3_led0_pins: gbe3-led0-pins { mux { function = "led"; groups = "gbe3_led0"; }; }; - i2p5gbe_led0_pins: 2p5gbe-pins { + gbe0_led1_pins: gbe0-led1-pins { + mux { + function = "led"; + groups = "gbe0_led1"; + }; + }; + + gbe1_led1_pins: gbe1-led1-pins { + mux { + function = "led"; + groups = "gbe1_led1"; + }; + }; + + gbe2_led1_pins: gbe2-led1-pins { + mux { + function = "led"; + groups = "gbe2_led1"; + }; + }; + + gbe3_led1_pins: gbe3-led1-pins { + mux { + function = "led"; + groups = "gbe3_led1"; + }; + }; + + i2p5gbe_led0_pins: 2p5gbe-led0-pins { mux { function = "led"; groups = "2p5gbe_led0"; }; }; + + i2p5gbe_led1_pins: 2p5gbe-led1-pins { + mux { + function = "led"; + groups = "2p5gbe_led1"; + }; + }; + + mmc0_pins_emmc_45: mmc0-pins-emmc-45 { + mux { + function = "flash"; + groups = "emmc_45"; + }; + }; + + mmc0_pins_emmc_51: mmc0-pins-emmc-51 { + mux { + function = "flash"; + groups = "emmc_51"; + }; + }; + + mmc0_pins_sdcard: mmc0-pins-sdcard { + mux { + function = "flash"; + groups = "sdcard"; + }; + }; + + uart0_pins: uart0-pins { + mux { + function = "uart"; + groups = "uart0"; + }; + }; }; sgmiisys0: syscon@10060000 { @@ -380,6 +465,8 @@ <&infracfg CLK_INFRA_MUX_UART0_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_XTAL>, <&topckgen CLK_TOP_UART_SEL>; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; status = "disabled"; }; @@ -645,6 +732,29 @@ status = "disabled"; }; + mmc0: mmc@11230000 { + compatible = "mediatek,mt7986-mmc", + "mediatek,mt7981-mmc"; + reg = <0 0x11230000 0 0x1000>, + <0 0x11D60000 0 0x1000>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_MSDC400>, + <&infracfg CLK_INFRA_MSDC2_HCK>, + <&infracfg CLK_INFRA_66M_MSDC_0_HCK>, + <&infracfg CLK_INFRA_133M_MSDC_0_HCK>; + assigned-clocks = <&topckgen CLK_TOP_EMMC_250M_SEL>, + <&topckgen CLK_TOP_EMMC_400M_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_NET1PLL_D5_D2>, + <&apmixedsys CLK_APMIXED_MSDCPLL>; + clock-names = "source", + "hclk", + "axi_cg", + "ahb_cg"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + tphy: tphy@11c50000 { compatible = "mediatek,mt7988", "mediatek,generic-tphy-v2"; @@ -747,6 +857,157 @@ interrupt-parent = <&gic>; interrupts = ; resets = <ðrst 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan0"; + phy-mode = "internal"; + phy-handle = <&gsw_phy0>; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&gsw_phy1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&gsw_phy2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&gsw_phy3>; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "internal"; + + fixed-link { + speed = <10000>; + full-duplex; + pause; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + mediatek,pio = <&pio>; + + gsw_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id03a2.9481"; + reg = <0>; + phy-mode = "internal"; + nvmem-cells = <&phy_calibration_p0>; + nvmem-cell-names = "phy-cal-data"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + gsw_phy0_led0: gsw-phy0-led0@0 { + reg = <0>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + + gsw_phy0_led1: gsw-phy0-led1@1 { + reg = <1>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + }; + }; + + gsw_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id03a2.9481"; + reg = <1>; + phy-mode = "internal"; + nvmem-cells = <&phy_calibration_p1>; + nvmem-cell-names = "phy-cal-data"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + gsw_phy1_led0: gsw-phy1-led0@0 { + reg = <0>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + + gsw_phy1_led1: gsw-phy1-led1@1 { + reg = <1>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + }; + }; + + gsw_phy2: ethernet-phy@2 { + compatible = "ethernet-phy-id03a2.9481"; + reg = <2>; + phy-mode = "internal"; + nvmem-cells = <&phy_calibration_p2>; + nvmem-cell-names = "phy-cal-data"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + gsw_phy2_led0: gsw-phy2-led0@0 { + reg = <0>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + + gsw_phy2_led1: gsw-phy2-led1@1 { + reg = <1>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + }; + }; + + gsw_phy3: ethernet-phy@3 { + compatible = "ethernet-phy-id03a2.9481"; + reg = <3>; + phy-mode = "internal"; + nvmem-cells = <&phy_calibration_p3>; + nvmem-cell-names = "phy-cal-data"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + gsw_phy3_led0: gsw-phy3-led0@0 { + reg = <0>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + + gsw_phy3_led1: gsw-phy3-led1@1 { + reg = <1>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + }; + }; + }; }; ethwarp: syscon@15031000 { @@ -843,6 +1104,40 @@ #address-cells = <1>; #size-cells = <0>; status = "disabled"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "internal"; + + fixed-link { + speed = <10000>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + }; + + gmac2: mac@2 { + compatible = "mediatek,eth-mac"; + reg = <2>; + }; + + mdio_bus: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + /* internal 2.5G PHY */ + int_2p5g_phy: ethernet-phy@15 { + reg = <15>; + compatible = "ethernet-phy-ieee802.3-c45"; + phy-mode = "internal"; + }; + }; }; }; }; diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts index e204dc4f166..27ef19c46dd 100644 --- a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts +++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts @@ -7,6 +7,7 @@ /dts-v1/; #include "mt7988a-rfb-spim-nand.dtsi" #include +#include / { model = "MediaTek MT7988A DSA 10G SPIM-NAND RFB"; @@ -29,173 +30,105 @@ pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; status = "okay"; +}; - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; +&gmac0 { + status = "okay"; +}; + +&gmac1 { + status = "okay"; + phy-mode = "internal"; + phy-connection-type = "internal"; + phy = <&int_2p5g_phy>; +}; + +&gmac2 { + status = "okay"; + phy-mode = "usxgmii"; + phy-connection-type = "usxgmii"; + phy = <&phy8>; +}; + +&mdio_bus { + /* external Aquantia AQR113C */ + phy0: ethernet-phy@0 { reg = <0>; - phy-mode = "internal"; - - fixed-link { - speed = <10000>; - full-duplex; - pause; - }; + compatible = "ethernet-phy-ieee802.3-c45"; + reset-gpios = <&pio 72 1>; + reset-assert-us = <100000>; + reset-deassert-us = <221000>; }; - gmac1: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - phy-mode = "internal"; - phy-connection-type = "internal"; - phy = <&phy15>; + /* external Aquantia AQR113C */ + phy8: ethernet-phy@8 { + reg = <8>; + compatible = "ethernet-phy-ieee802.3-c45"; + reset-gpios = <&pio 71 1>; + reset-assert-us = <100000>; + reset-deassert-us = <221000>; }; - gmac2: mac@2 { - compatible = "mediatek,eth-mac"; - reg = <2>; - phy-mode = "10gbase-kr"; - phy-connection-type = "10gbase-kr"; - phy = <&phy8>; + /* external Maxlinear GPY211C */ + phy5: ethernet-phy@5 { + reg = <5>; + compatible = "ethernet-phy-ieee802.3-c45"; + phy-mode = "2500base-x"; }; - mdio0: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - - /* external Aquantia AQR113C */ - phy0: ethernet-phy@0 { - reg = <0>; - compatible = "ethernet-phy-ieee802.3-c45"; - reset-gpios = <&pio 72 1>; - reset-assert-us = <100000>; - reset-deassert-us = <221000>; - }; - - /* external Aquantia AQR113C */ - phy8: ethernet-phy@8 { - reg = <8>; - compatible = "ethernet-phy-ieee802.3-c45"; - reset-gpios = <&pio 71 1>; - reset-assert-us = <100000>; - reset-deassert-us = <221000>; - }; - - /* external Maxlinear GPY211C */ - phy5: ethernet-phy@5 { - reg = <5>; - compatible = "ethernet-phy-ieee802.3-c45"; - phy-mode = "2500base-x"; - }; - - /* external Maxlinear GPY211C */ - phy13: ethernet-phy@13 { - reg = <13>; - compatible = "ethernet-phy-ieee802.3-c45"; - phy-mode = "2500base-x"; - }; - - /* internal 2.5G PHY */ - phy15: ethernet-phy@15 { - reg = <15>; - pinctrl-names = "i2p5gbe-led"; - pinctrl-0 = <&i2p5gbe_led0_pins>; - compatible = "ethernet-phy-ieee802.3-c45"; - phy-mode = "internal"; - }; + /* external Maxlinear GPY211C */ + phy13: ethernet-phy@13 { + reg = <13>; + compatible = "ethernet-phy-ieee802.3-c45"; + phy-mode = "2500base-x"; }; }; +&int_2p5g_phy { + pinctrl-names = "i2p5gbe-led"; + pinctrl-0 = <&i2p5gbe_led0_pins>; +}; + &switch { status = "okay"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - label = "lan0"; - phy-mode = "internal"; - phy-handle = <&gsw_phy0>; - }; - - port@1 { - reg = <1>; - label = "lan1"; - phy-mode = "internal"; - phy-handle = <&gsw_phy1>; - }; - - port@2 { - reg = <2>; - label = "lan2"; - phy-mode = "internal"; - phy-handle = <&gsw_phy2>; - }; - - port@3 { - reg = <3>; - label = "lan3"; - phy-mode = "internal"; - phy-handle = <&gsw_phy3>; - }; - - port@6 { - reg = <6>; - ethernet = <&gmac0>; - phy-mode = "internal"; - - fixed-link { - speed = <10000>; - full-duplex; - pause; - }; - }; - }; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - mediatek,pio = <&pio>; - - gsw_phy0: ethernet-phy@0 { - compatible = "ethernet-phy-id03a2.9481"; - reg = <0>; - phy-mode = "internal"; - pinctrl-names = "gbe-led"; - pinctrl-0 = <&gbe0_led0_pins>; - nvmem-cells = <&phy_calibration_p0>; - nvmem-cell-names = "phy-cal-data"; - }; - - gsw_phy1: ethernet-phy@1 { - compatible = "ethernet-phy-id03a2.9481"; - reg = <1>; - phy-mode = "internal"; - pinctrl-names = "gbe-led"; - pinctrl-0 = <&gbe1_led0_pins>; - nvmem-cells = <&phy_calibration_p1>; - nvmem-cell-names = "phy-cal-data"; - }; - - gsw_phy2: ethernet-phy@2 { - compatible = "ethernet-phy-id03a2.9481"; - reg = <2>; - phy-mode = "internal"; - pinctrl-names = "gbe-led"; - pinctrl-0 = <&gbe2_led0_pins>; - nvmem-cells = <&phy_calibration_p2>; - nvmem-cell-names = "phy-cal-data"; - }; - - gsw_phy3: ethernet-phy@3 { - compatible = "ethernet-phy-id03a2.9481"; - reg = <3>; - phy-mode = "internal"; - pinctrl-names = "gbe-led"; - pinctrl-0 = <&gbe3_led0_pins>; - nvmem-cells = <&phy_calibration_p3>; - nvmem-cell-names = "phy-cal-data"; - }; - }; +}; + +&gsw_phy0 { + pinctrl-names = "gbe-led"; + pinctrl-0 = <&gbe0_led0_pins>; +}; + +&gsw_phy0_led0 { + status = "okay"; + color = ; +}; + +&gsw_phy1 { + pinctrl-names = "gbe-led"; + pinctrl-0 = <&gbe1_led0_pins>; +}; + +&gsw_phy1_led0 { + status = "okay"; + color = ; +}; + +&gsw_phy2 { + pinctrl-names = "gbe-led"; + pinctrl-0 = <&gbe2_led0_pins>; +}; + +&gsw_phy2_led0 { + status = "okay"; + color = ; +}; + +&gsw_phy3 { + pinctrl-names = "gbe-led"; + pinctrl-0 = <&gbe3_led0_pins>; +}; + +&gsw_phy3_led0 { + status = "okay"; + color = ; }; diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a.dtsi index 94aa8251bd0..462218c65d4 100644 --- a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a.dtsi +++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a.dtsi @@ -4,12 +4,13 @@ * Author: Sam.Shih */ -#include -#include -#include -#include #include +#include +#include +#include +#include #include +#include #include / { @@ -144,9 +145,9 @@ #size-cells = <2>; ranges; - /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ + /* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */ secmon_reserved: secmon@43000000 { - reg = <0 0x43000000 0 0x30000>; + reg = <0 0x43000000 0 0x50000>; no-map; }; }; @@ -228,7 +229,7 @@ "iocfg_lb_base", "iocfg_tl_base", "eint"; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pio 0 0 83>; + gpio-ranges = <&pio 0 0 84>; interrupt-controller; interrupts = ; interrupt-parent = <&gic>; @@ -260,47 +261,131 @@ }; }; - i2c2_pins: i2c2-pins-g0 { + i2c1_sfp_pins: i2c1-sfp-pins-g0 { + mux { + function = "i2c"; + groups = "i2c1_sfp"; + }; + }; + + i2c2_pins: i2c2-pins { + mux { + function = "i2c"; + groups = "i2c2"; + }; + }; + + i2c2_0_pins: i2c2-pins-g0 { + mux { + function = "i2c"; + groups = "i2c2_0"; + }; + }; + + i2c2_1_pins: i2c2-pins-g1 { mux { function = "i2c"; groups = "i2c2_1"; }; }; - gbe0_led0_pins: gbe0-pins { + gbe0_led0_pins: gbe0-led0-pins { mux { function = "led"; groups = "gbe0_led0"; }; }; - gbe1_led0_pins: gbe1-pins { + gbe1_led0_pins: gbe1-led0-pins { mux { function = "led"; groups = "gbe1_led0"; }; }; - gbe2_led0_pins: gbe2-pins { + gbe2_led0_pins: gbe2-led0-pins { mux { function = "led"; groups = "gbe2_led0"; }; }; - gbe3_led0_pins: gbe3-pins { + gbe3_led0_pins: gbe3-led0-pins { mux { function = "led"; groups = "gbe3_led0"; }; }; - i2p5gbe_led0_pins: 2p5gbe-pins { + gbe0_led1_pins: gbe0-led1-pins { + mux { + function = "led"; + groups = "gbe0_led1"; + }; + }; + + gbe1_led1_pins: gbe1-led1-pins { + mux { + function = "led"; + groups = "gbe1_led1"; + }; + }; + + gbe2_led1_pins: gbe2-led1-pins { + mux { + function = "led"; + groups = "gbe2_led1"; + }; + }; + + gbe3_led1_pins: gbe3-led1-pins { + mux { + function = "led"; + groups = "gbe3_led1"; + }; + }; + + i2p5gbe_led0_pins: 2p5gbe-led0-pins { mux { function = "led"; groups = "2p5gbe_led0"; }; }; + + i2p5gbe_led1_pins: 2p5gbe-led1-pins { + mux { + function = "led"; + groups = "2p5gbe_led1"; + }; + }; + + mmc0_pins_emmc_45: mmc0-pins-emmc-45 { + mux { + function = "flash"; + groups = "emmc_45"; + }; + }; + + mmc0_pins_emmc_51: mmc0-pins-emmc-51 { + mux { + function = "flash"; + groups = "emmc_51"; + }; + }; + + mmc0_pins_sdcard: mmc0-pins-sdcard { + mux { + function = "flash"; + groups = "sdcard"; + }; + }; + + uart0_pins: uart0-pins { + mux { + function = "uart"; + groups = "uart0"; + }; + }; }; sgmiisys0: syscon@10060000 { @@ -380,6 +465,8 @@ <&infracfg CLK_INFRA_MUX_UART0_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_XTAL>, <&topckgen CLK_TOP_UART_SEL>; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; status = "disabled"; }; @@ -645,6 +732,29 @@ status = "disabled"; }; + mmc0: mmc@11230000 { + compatible = "mediatek,mt7986-mmc", + "mediatek,mt7981-mmc"; + reg = <0 0x11230000 0 0x1000>, + <0 0x11D60000 0 0x1000>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_MSDC400>, + <&infracfg CLK_INFRA_MSDC2_HCK>, + <&infracfg CLK_INFRA_66M_MSDC_0_HCK>, + <&infracfg CLK_INFRA_133M_MSDC_0_HCK>; + assigned-clocks = <&topckgen CLK_TOP_EMMC_250M_SEL>, + <&topckgen CLK_TOP_EMMC_400M_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_NET1PLL_D5_D2>, + <&apmixedsys CLK_APMIXED_MSDCPLL>; + clock-names = "source", + "hclk", + "axi_cg", + "ahb_cg"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + tphy: tphy@11c50000 { compatible = "mediatek,mt7988", "mediatek,generic-tphy-v2"; @@ -747,6 +857,157 @@ interrupt-parent = <&gic>; interrupts = ; resets = <ðrst 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan0"; + phy-mode = "internal"; + phy-handle = <&gsw_phy0>; + }; + + port@1 { + reg = <1>; + label = "lan1"; + phy-mode = "internal"; + phy-handle = <&gsw_phy1>; + }; + + port@2 { + reg = <2>; + label = "lan2"; + phy-mode = "internal"; + phy-handle = <&gsw_phy2>; + }; + + port@3 { + reg = <3>; + label = "lan3"; + phy-mode = "internal"; + phy-handle = <&gsw_phy3>; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "internal"; + + fixed-link { + speed = <10000>; + full-duplex; + pause; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + mediatek,pio = <&pio>; + + gsw_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id03a2.9481"; + reg = <0>; + phy-mode = "internal"; + nvmem-cells = <&phy_calibration_p0>; + nvmem-cell-names = "phy-cal-data"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + gsw_phy0_led0: gsw-phy0-led0@0 { + reg = <0>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + + gsw_phy0_led1: gsw-phy0-led1@1 { + reg = <1>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + }; + }; + + gsw_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id03a2.9481"; + reg = <1>; + phy-mode = "internal"; + nvmem-cells = <&phy_calibration_p1>; + nvmem-cell-names = "phy-cal-data"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + gsw_phy1_led0: gsw-phy1-led0@0 { + reg = <0>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + + gsw_phy1_led1: gsw-phy1-led1@1 { + reg = <1>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + }; + }; + + gsw_phy2: ethernet-phy@2 { + compatible = "ethernet-phy-id03a2.9481"; + reg = <2>; + phy-mode = "internal"; + nvmem-cells = <&phy_calibration_p2>; + nvmem-cell-names = "phy-cal-data"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + gsw_phy2_led0: gsw-phy2-led0@0 { + reg = <0>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + + gsw_phy2_led1: gsw-phy2-led1@1 { + reg = <1>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + }; + }; + + gsw_phy3: ethernet-phy@3 { + compatible = "ethernet-phy-id03a2.9481"; + reg = <3>; + phy-mode = "internal"; + nvmem-cells = <&phy_calibration_p3>; + nvmem-cell-names = "phy-cal-data"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + gsw_phy3_led0: gsw-phy3-led0@0 { + reg = <0>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + + gsw_phy3_led1: gsw-phy3-led1@1 { + reg = <1>; + function = LED_FUNCTION_LAN; + status = "disabled"; + }; + }; + }; + }; }; ethwarp: syscon@15031000 { @@ -843,6 +1104,40 @@ #address-cells = <1>; #size-cells = <0>; status = "disabled"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "internal"; + + fixed-link { + speed = <10000>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + }; + + gmac2: mac@2 { + compatible = "mediatek,eth-mac"; + reg = <2>; + }; + + mdio_bus: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + /* internal 2.5G PHY */ + int_2p5g_phy: ethernet-phy@15 { + reg = <15>; + compatible = "ethernet-phy-ieee802.3-c45"; + phy-mode = "internal"; + }; + }; }; }; }; From b8be20c7e81de2894df8fa2b361c39bc723e4cb5 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Thu, 3 Aug 2023 18:47:15 +0200 Subject: [PATCH 12/27] hostapd: fix unused device removal on DBDC devices Check the phy before removing unrelated netdevs on the same hw device Reported-by: Hartmut Birr Signed-off-by: Felix Fietkau --- package/network/services/hostapd/files/wdev.uc | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/package/network/services/hostapd/files/wdev.uc b/package/network/services/hostapd/files/wdev.uc index 9701af125aa..896f5261fb9 100644 --- a/package/network/services/hostapd/files/wdev.uc +++ b/package/network/services/hostapd/files/wdev.uc @@ -1,7 +1,7 @@ #!/usr/bin/env ucode 'use strict'; import { vlist_new, is_equal, wdev_create, wdev_remove } from "/usr/share/hostap/common.uc"; -import { readfile, writefile, basename, glob } from "fs"; +import { readfile, writefile, basename, readlink, glob } from "fs"; let keep_devices = {}; let phy = shift(ARGV); @@ -106,6 +106,9 @@ function add_existing(phy, config) if (config[wdev]) continue; + if (basename(readlink(`/sys/class/net/${wdev}/phy80211`)) != phy) + continue; + if (trim(readfile(`/sys/class/net/${wdev}/operstate`)) == "down") config[wdev] = {}; } From 1eb67cb0704a61f49d9be9f88aecbce1d881f8c9 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Thu, 3 Aug 2023 23:30:25 +0100 Subject: [PATCH 13/27] mediatek: filogic: restore non-const type in pinctrl-mt7988 driver When building with Linux 5.15 the 'const' type results in warnings. Restore the original non-const type in those cases. Fixes: 36d0aa9c2d ("mediatek: filogic: sync pinctrl-mt7988 with MediaTek SDK") Signed-off-by: Daniel Golle --- .../drivers/pinctrl/mediatek/pinctrl-mt7988.c | 34 +++++++++---------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/target/linux/mediatek/files-5.15/drivers/pinctrl/mediatek/pinctrl-mt7988.c b/target/linux/mediatek/files-5.15/drivers/pinctrl/mediatek/pinctrl-mt7988.c index 49c0be1bba0..659c83e997d 100644 --- a/target/linux/mediatek/files-5.15/drivers/pinctrl/mediatek/pinctrl-mt7988.c +++ b/target/linux/mediatek/files-5.15/drivers/pinctrl/mediatek/pinctrl-mt7988.c @@ -1281,20 +1281,20 @@ static const struct group_desc mt7988_groups[] = { /* Joint those groups owning the same capability in user point of view which * allows that people tend to use through the device tree. */ -static const char * const mt7988_jtag_groups[] = { +static const char *mt7988_jtag_groups[] = { "tops_jtag0_0", "wo0_jtag", "wo1_jtag", "wo2_jtag", "jtag", "tops_jtag0_1", }; -static const char * const mt7988_int_usxgmii_groups[] = { +static const char *mt7988_int_usxgmii_groups[] = { "int_usxgmii", }; -static const char * const mt7988_pwm_groups[] = { +static const char *mt7988_pwm_groups[] = { "pwm0", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5", "pwm6", "pwm7" }; -static const char * const mt7988_dfd_groups[] = { +static const char *mt7988_dfd_groups[] = { "dfd", }; -static const char * const mt7988_i2c_groups[] = { +static const char *mt7988_i2c_groups[] = { "xfi_phy0_i2c0", "xfi_phy1_i2c0", "xfi_phy_pll_i2c0", @@ -1319,13 +1319,13 @@ static const char * const mt7988_i2c_groups[] = { "i2c2_0", "i2c2_1", }; -static const char * const mt7988_ethernet_groups[] = { +static const char *mt7988_ethernet_groups[] = { "mdc_mdio0", "2p5g_ext_mdio", "gbe_ext_mdio", "mdc_mdio1", }; -static const char * const mt7988_pcie_groups[] = { +static const char *mt7988_pcie_groups[] = { "pcie_wake_n0_0", "pcie_clk_req_n0_0", "pcie_wake_n3_0", "pcie_clk_req_n3", "pcie_p0_phy_i2c", "pcie_p1_phy_i2c", "pcie_p3_phy_i2c", "pcie_p2_phy_i2c", "ckm_phy_i2c", @@ -1335,18 +1335,18 @@ static const char * const mt7988_pcie_groups[] = { "pcie_wake_n2_0", "pcie_clk_req_n2_0", "pcie_wake_n2_1", "pcie_clk_req_n0_1" }; -static const char * const mt7988_pmic_groups[] = { +static const char *mt7988_pmic_groups[] = { "pmic", }; -static const char * const mt7988_wdt_groups[] = { +static const char *mt7988_wdt_groups[] = { "watchdog", }; -static const char * const mt7988_spi_groups[] = { +static const char *mt7988_spi_groups[] = { "spi0", "spi0_wp_hold", "spi1", "spi2", "spi2_wp_hold", }; -static const char * const mt7988_flash_groups[] = { "emmc_45", "sdcard", "snfi", +static const char *mt7988_flash_groups[] = { "emmc_45", "sdcard", "snfi", "emmc_51" }; -static const char * const mt7988_uart_groups[] = { +static const char *mt7988_uart_groups[] = { "uart2", "tops_uart0_0", "uart2_0", @@ -1368,18 +1368,18 @@ static const char * const mt7988_uart_groups[] = { "net_wo1_uart_txd_1", "net_wo2_uart_txd_1", }; -static const char * const mt7988_udi_groups[] = { +static const char *mt7988_udi_groups[] = { "udi", }; -static const char * const mt7988_audio_groups[] = { +static const char *mt7988_audio_groups[] = { "i2s", "pcm", }; -static const char * const mt7988_led_groups[] = { +static const char *mt7988_led_groups[] = { "gbe0_led1", "gbe1_led1", "gbe2_led1", "gbe3_led1", "2p5gbe_led1", "gbe0_led0", "gbe1_led0", "gbe2_led0", "gbe3_led0", "2p5gbe_led0", "wf5g_led0", "wf5g_led1", }; -static const char * const mt7988_usb_groups[] = { +static const char *mt7988_usb_groups[] = { "drv_vbus", "drv_vbus_p1", }; @@ -1411,7 +1411,7 @@ static const struct mtk_eint_hw mt7988_eint_hw = { .db_cnt = 16, }; -static const char * const mt7988_pinctrl_register_base_names[] = { +static const char *mt7988_pinctrl_register_base_names[] = { "gpio_base", "iocfg_tr_base", "iocfg_br_base", "iocfg_rb_base", "iocfg_lb_base", "iocfg_tl_base", }; From f98dc5aa43e9d84b8ceef9414fd4f92e05c418d7 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Sat, 5 Aug 2023 01:55:11 +0200 Subject: [PATCH 14/27] CI: generilize S3 secret keys name and rename to proper name Generilize S3 secret keys and rename to make them not platform specific. Signed-off-by: Christian Marangi --- .github/workflows/kernel.yml | 4 ++-- .github/workflows/packages.yml | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/.github/workflows/kernel.yml b/.github/workflows/kernel.yml index 87b8a14293b..a96ece87093 100644 --- a/.github/workflows/kernel.yml +++ b/.github/workflows/kernel.yml @@ -35,6 +35,6 @@ jobs: packages: read actions: write secrets: - s3_access_key: ${{ secrets.GCS_S3_ACCESS_KEY }} - s3_secret_key: ${{ secrets.GCS_S3_SECRET_KEY }} + ccache_s3_access_key: ${{ secrets.CCACHE_S3_ACCESS_KEY }} + ccache_s3_secret_key: ${{ secrets.CCACHE_S3_SECRET_KEY }} uses: openwrt/actions-shared-workflows/.github/workflows/kernel.yml@main diff --git a/.github/workflows/packages.yml b/.github/workflows/packages.yml index 07621dcb4ac..d9251ed2a0d 100644 --- a/.github/workflows/packages.yml +++ b/.github/workflows/packages.yml @@ -35,6 +35,6 @@ jobs: packages: read actions: write secrets: - s3_access_key: ${{ secrets.GCS_S3_ACCESS_KEY }} - s3_secret_key: ${{ secrets.GCS_S3_SECRET_KEY }} + ccache_s3_access_key: ${{ secrets.CCACHE_S3_ACCESS_KEY }} + ccache_s3_secret_key: ${{ secrets.CCACHE_S3_SECRET_KEY }} uses: openwrt/actions-shared-workflows/.github/workflows/packages.yml@main From 881235c713fae8692190178561af4eb2dee4ead1 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Sat, 5 Aug 2023 01:58:29 +0200 Subject: [PATCH 15/27] CI: provide new required secret for S3 endpoint and bucket name Provide new required secret for S3 endpoint and bucket name to permit an easier migration to new services. Signed-off-by: Christian Marangi --- .github/workflows/kernel.yml | 2 ++ .github/workflows/packages.yml | 2 ++ 2 files changed, 4 insertions(+) diff --git a/.github/workflows/kernel.yml b/.github/workflows/kernel.yml index a96ece87093..43c610ab4f0 100644 --- a/.github/workflows/kernel.yml +++ b/.github/workflows/kernel.yml @@ -35,6 +35,8 @@ jobs: packages: read actions: write secrets: + ccache_s3_endpoint: ${{ secrets.CCACHE_S3_ENDPOINT }} + ccache_s3_bucket: ${{ secrets.CCACHE_S3_BUCKET }} ccache_s3_access_key: ${{ secrets.CCACHE_S3_ACCESS_KEY }} ccache_s3_secret_key: ${{ secrets.CCACHE_S3_SECRET_KEY }} uses: openwrt/actions-shared-workflows/.github/workflows/kernel.yml@main diff --git a/.github/workflows/packages.yml b/.github/workflows/packages.yml index d9251ed2a0d..f061c1cd371 100644 --- a/.github/workflows/packages.yml +++ b/.github/workflows/packages.yml @@ -35,6 +35,8 @@ jobs: packages: read actions: write secrets: + ccache_s3_endpoint: ${{ secrets.CCACHE_S3_ENDPOINT }} + ccache_s3_bucket: ${{ secrets.CCACHE_S3_BUCKET }} ccache_s3_access_key: ${{ secrets.CCACHE_S3_ACCESS_KEY }} ccache_s3_secret_key: ${{ secrets.CCACHE_S3_SECRET_KEY }} uses: openwrt/actions-shared-workflows/.github/workflows/packages.yml@main From 7e7eb5312d7810084547bb54a4b6867c2da08182 Mon Sep 17 00:00:00 2001 From: David Bauer Date: Fri, 9 Jun 2023 13:39:52 +0200 Subject: [PATCH 16/27] mediatek: add support for Acer Predator W6 Hardware -------- SOC: MediaTek MT7986A RAM: 1GB DDR4 FLASH: 4GB eMMC WiFi: 2x2 2.4 GHz 802.11 b/g/n/ax MT7916 DBDC 4x4 5 GHz 802.11 a/n/ac/ax MT7986 2x2 6 GHz 802.11ax MT7916 DBDC ETH: 4x LAN 1Gbit/s (MT7531) 1x WAN 2.5Gbit/s (GPY211) BTN: RESET, WPS LED: Antenna LEDs (GPIO) Mood-LED (Kinetic KTD2601) - unsupported UART: Header nest to USB port - 3V3 115200 8N1 [BUTTON] GND - RX - TX [USB] Installation ------------ 1. Connect to the device using serial console. 2. Interrupt the Autoboot process when promted by sending '0' twice. 3. Serve the OpenWrt initramfs image using TFTP at 192.168.1.66. Name the image "predator.bin" and conenct the TFTP server to the routers LAN port. 4. Configure U-Boot to allow loading unsigned images from MMC $ setenv bootcmd 'mmc read 0x40000000 0x00004400 0x0010000; fdt addr $(fdtcontroladdr); fdt rm /signature; bootm 0x40000000'; saveenv 5. Transfer the image from U-Boot $ setenv serverip 192.168.1.66; setenv ipaddr 192.168.1.1; tftpboot 0x46000000 predator.bin; fdt addr $(fdtcontroladdr); fdt rm /signature; bootm 6. Wait for OpenWrt to boot 7. Transfer the OpenWrt sysupgrade image to the router using scp. 8. Install OpenWrt using sysupgrade. Signed-off-by: David Bauer --- .../mediatek/dts/mt7986a-acer-predator-w6.dts | 503 ++++++++++++++++++ .../filogic/base-files/etc/board.d/02_network | 3 + .../etc/hotplug.d/firmware/11-mt76-caldata | 14 + .../etc/hotplug.d/ieee80211/11_fix_wifi_mac | 6 + .../lib/preinit/05_extract_factory_data.sh | 25 + .../base-files/lib/preinit/10_fix_eth_mac.sh | 8 + .../base-files/lib/upgrade/platform.sh | 5 + target/linux/mediatek/image/filogic.mk | 15 + 8 files changed, 579 insertions(+) create mode 100644 target/linux/mediatek/dts/mt7986a-acer-predator-w6.dts create mode 100644 target/linux/mediatek/filogic/base-files/lib/preinit/05_extract_factory_data.sh diff --git a/target/linux/mediatek/dts/mt7986a-acer-predator-w6.dts b/target/linux/mediatek/dts/mt7986a-acer-predator-w6.dts new file mode 100644 index 00000000000..35a2c30bb45 --- /dev/null +++ b/target/linux/mediatek/dts/mt7986a-acer-predator-w6.dts @@ -0,0 +1,503 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +/dts-v1/; +#include +#include +#include + +#include "mt7986a.dtsi" + +/ { + model = "Acer Predator W6"; + compatible = "acer,predator-w6", "mediatek,mt7986a"; + + aliases { + serial0 = &uart0; + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "dm-mod.create=\"dm-verity,,,ro,0 31544 verity 1 PARTLABEL=rootfs PARTLABEL=rootfs 4096 4096 3943 3944 sha256 2f969fa9e9e4e20b37746f22633e85b178f5db7c143e11f92733a704299cc933 2dd56e34b15c6c84573cf26c4392028421061d2c808975217b45e9a5b49d2087\" rootfstype=squashfs,ext4 rootwait root=/dev/mmcblk0p6 fstools_ignore_partname=1"; + }; + + memory { + reg = <0 0x40000000 0 0x20000000>; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_5v: regulator-5v { + compatible = "regulator-fixed"; + regulator-name = "fixed-5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + }; + + gpio-keys { + compatible = "gpio-keys"; + + factory { + label = "factory"; + linux,code = ; + gpios = <&pio 9 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&pio 10 GPIO_ACTIVE_LOW>; + }; + }; + + + leds { + compatible = "gpio-leds"; + + led_status: led@0 { + label = "ant0:red"; + gpios = <&pio 1 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@1 { + label = "ant0:green"; + gpios = <&pio 2 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@2 { + label = "ant0:blue"; + gpios = <&pio 36 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@3 { + label = "ant1:red"; + gpios = <&pio 35 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@4 { + label = "ant1:green"; + gpios = <&pio 34 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@5 { + label = "ant1:blue"; + gpios = <&pio 33 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@6 { + label = "ant2:red"; + gpios = <&pio 38 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@7 { + label = "ant2:green"; + gpios = <&pio 37 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@8 { + label = "ant2:blue"; + gpios = <&pio 26 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@9 { + label = "ant3:red"; + gpios = <&pio 25 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@10 { + label = "ant3:green"; + gpios = <&pio 24 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@11 { + label = "ant3:blue"; + gpios = <&pio 23 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@12 { + label = "ant4:red"; + gpios = <&pio 28 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@13 { + label = "ant4:green"; + gpios = <&pio 27 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@14 { + label = "ant4:blue"; + gpios = <&pio 32 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@15 { + label = "ant5:red"; + gpios = <&pio 45 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@16 { + label = "ant5:green"; + gpios = <&pio 44 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + led@17 { + label = "ant5:blue"; + gpios = <&pio 43 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + /* LAN */ + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + /* WAN */ + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "2500base-x"; + phy-handle = <&phy6>; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + }; +}; + +&mdio { + phy6: phy@6 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <6>; + + reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + reset-deassert-us = <10000>; + + /* LED0: nc ; LED1: nc ; LED2: Amber ; LED3: Green */ + mxl,led-config = <0x0 0x0 0x370 0x80>; + }; + + switch: switch@0 { + compatible = "mediatek,mt7531"; + reg = <31>; + + reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; + reset-assert-us = <10000>; + reset-deassert-us = <10000>; + }; +}; + +&pio { + mmc0_pins_default: mmc0-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ + }; + }; + + mmc0_pins_uhs: mmc0-uhs-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + mediatek,pull-down-adv = <2>; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + mediatek,pull-up-adv = <1>; /* pull-up 10K */ + }; + }; + + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_pereset"; + }; + }; + + wf_2g_5g_pins: wf_2g_5g-pins { + mux { + function = "wifi"; + groups = "wf_2g", "wf_5g"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; + + wf_dbdc_pins: wf-dbdc-pins { + mux { + function = "wifi"; + groups = "wf_dbdc"; + }; + conf { + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", + "WF1_TOP_CLK", "WF1_TOP_DATA"; + drive-strength = <4>; + }; + }; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "game"; + }; + + port@1 { + reg = <1>; + label = "lan1"; + }; + + port@2 { + reg = <2>; + label = "lan2"; + }; + + port@3 { + reg = <3>; + label = "lan3"; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy@0 { + reg = <0>; + + mediatek,led-config = < + 0x21 0x8009 /* BASIC_CTRL */ + 0x22 0x0c00 /* ON_DURATION */ + 0x23 0x1400 /* BLINK_DURATION */ + 0x24 0xc001 /* LED0_ON_CTRL */ + 0x25 0x0000 /* LED0_BLINK_CTRL */ + 0x26 0xc007 /* LED1_ON_CTRL */ + 0x27 0x003f /* LED1_BLINK_CTRL */ + >; + }; + + phy@1 { + reg = <1>; + + mediatek,led-config = < + 0x21 0x8009 /* BASIC_CTRL */ + 0x22 0x0c00 /* ON_DURATION */ + 0x23 0x1400 /* BLINK_DURATION */ + 0x24 0xc001 /* LED0_ON_CTRL */ + 0x25 0x0000 /* LED0_BLINK_CTRL */ + 0x26 0xc007 /* LED1_ON_CTRL */ + 0x27 0x003f /* LED1_BLINK_CTRL */ + >; + }; + + phy@2 { + reg = <2>; + + mediatek,led-config = < + 0x21 0x8009 /* BASIC_CTRL */ + 0x22 0x0c00 /* ON_DURATION */ + 0x23 0x1400 /* BLINK_DURATION */ + 0x24 0xc001 /* LED0_ON_CTRL */ + 0x25 0x0000 /* LED0_BLINK_CTRL */ + 0x26 0xc007 /* LED1_ON_CTRL */ + 0x27 0x003f /* LED1_BLINK_CTRL */ + >; + }; + + phy@3 { + reg = <3>; + + mediatek,led-config = < + 0x21 0x8009 /* BASIC_CTRL */ + 0x22 0x0c00 /* ON_DURATION */ + 0x23 0x1400 /* BLINK_DURATION */ + 0x24 0xc001 /* LED0_ON_CTRL */ + 0x25 0x0000 /* LED0_BLINK_CTRL */ + 0x26 0xc007 /* LED1_ON_CTRL */ + 0x27 0x003f /* LED1_BLINK_CTRL */ + >; + }; + }; +}; + +&wifi { + status = "okay"; + pinctrl-names = "default", "dbdc"; + pinctrl-0 = <&wf_2g_5g_pins>; + pinctrl-1 = <&wf_dbdc_pins>; +}; + +&trng { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&ssusb { + vusb33-supply = <®_3p3v>; + vbus-supply = <®_5v>; + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&mmc0 { + status = "okay"; + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + bus-width = <0x08>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + hs400-ds-delay = <0x14014>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + non-removable; + no-sd; + no-sdio; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_pins>; + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network index 51903eeace5..4013c149f1e 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network @@ -8,6 +8,9 @@ mediatek_setup_interfaces() local board="$1" case $board in + acer,predator-w6) + ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 game" eth1 + ;; asus,tuf-ax4200) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1 ;; diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata index 0fe4c699887..c3d7c099740 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata @@ -7,6 +7,20 @@ board=$(board_name) case "$FIRMWARE" in +"mediatek/mt7916_eeprom.bin") + case "$board" in + acer,predator-w6) + caldata_extract_mmc "factory" 0xA0000 0x1000 + ;; + esac + ;; +"mediatek/mt7986_eeprom_mt7976.bin") + case "$board" in + acer,predator-w6) + caldata_extract_mmc "factory" 0x0 0x1000 + ;; + esac + ;; "mediatek/mt7986_eeprom_mt7976_dbdc.bin") case "$board" in asus,tuf-ax4200) diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac index 3620e3a6fbc..ebf76640c87 100644 --- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac +++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac @@ -10,6 +10,12 @@ PHYNBR=${DEVPATH##*/phy} board=$(board_name) case "$board" in + acer,predator-w6) + key_path="/var/qcidata/data" + [ "$PHYNBR" = "0" ] && cat $key_path/2gMAC > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && cat $key_path/6gMAC > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "2" ] && cat $key_path/5gMAC > /sys${DEVPATH}/macaddress + ;; asus,tuf-ax4200) CI_UBIPART="UBI_DEV" addr=$(mtd_get_mac_binary_ubi "Factory" 0x4) diff --git a/target/linux/mediatek/filogic/base-files/lib/preinit/05_extract_factory_data.sh b/target/linux/mediatek/filogic/base-files/lib/preinit/05_extract_factory_data.sh new file mode 100644 index 00000000000..87287a7d1c1 --- /dev/null +++ b/target/linux/mediatek/filogic/base-files/lib/preinit/05_extract_factory_data.sh @@ -0,0 +1,25 @@ +. /lib/functions/system.sh + +predator_w6_factory_extract() { + local mmc_part + + mmc_part="$(find_mmc_part qcidata)" + + mkdir -p /var/qcidata/data + mkdir -p /var/qcidata/mount + + mount -r "$mmc_part" /var/qcidata/mount + + cp /var/qcidata/mount/factory/*MAC "/var/qcidata/data/" + umount "/var/qcidata/mount" +} + +preinit_extract_factory() { + case $(board_name) in + acer,predator-w6) + predator_w6_factory_extract + ;; + esac +} + +boot_hook_add preinit_main preinit_extract_factory diff --git a/target/linux/mediatek/filogic/base-files/lib/preinit/10_fix_eth_mac.sh b/target/linux/mediatek/filogic/base-files/lib/preinit/10_fix_eth_mac.sh index cfddd9cedcc..69d0ab6c60c 100644 --- a/target/linux/mediatek/filogic/base-files/lib/preinit/10_fix_eth_mac.sh +++ b/target/linux/mediatek/filogic/base-files/lib/preinit/10_fix_eth_mac.sh @@ -2,6 +2,14 @@ preinit_set_mac_address() { case $(board_name) in + acer,predator-w6) + key_path="/var/qcidata/data" + ip link set dev lan1 address "$(cat $key_path/LANMAC)" + ip link set dev lan2 address "$(cat $key_path/LANMAC)" + ip link set dev lan3 address "$(cat $key_path/LANMAC)" + ip link set dev game address "$(cat $key_path/LANMAC)" + ip link set dev eth1 address "$(cat $key_path/WANMAC)" + ;; asus,tuf-ax4200) CI_UBIPART="UBI_DEV" addr=$(mtd_get_mac_binary_ubi "Factory" 0x4) diff --git a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh index 858e11ff00d..b0585284cab 100755 --- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh @@ -51,6 +51,11 @@ platform_do_upgrade() { local board=$(board_name) case "$board" in + acer,predator-w6) + CI_KERNPART="kernel" + CI_ROOTPART="rootfs" + emmc_do_upgrade "$1" + ;; asus,tuf-ax4200) CI_UBIPART="UBI_DEV" CI_KERNPART="linux" diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk index d79e9299018..e008c23c0af 100644 --- a/target/linux/mediatek/image/filogic.mk +++ b/target/linux/mediatek/image/filogic.mk @@ -98,6 +98,21 @@ define Device/asus_tuf-ax4200 endef TARGET_DEVICES += asus_tuf-ax4200 +define Device/acer_predator-w6 + DEVICE_VENDOR := Acer + DEVICE_MODEL := Predator W6 + DEVICE_DTS := mt7986a-acer-predator-w6 + DEVICE_DTS_DIR := ../dts + DEVICE_DTS_LOADADDR := 0x47000000 + DEVICE_PACKAGES := kmod-usb3 kmod-mt7986-firmware kmod-mt7916-firmware mt7986-wo-firmware + IMAGES := sysupgrade.bin + KERNEL := kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb + KERNEL_INITRAMFS := kernel-bin | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata +endef +TARGET_DEVICES += acer_predator-w6 + define Device/bananapi_bpi-r3 DEVICE_VENDOR := Bananapi DEVICE_MODEL := BPi-R3 From 5ae3b195a17d3c8a7b25e826928cd73117fbbe57 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Mon, 7 Aug 2023 22:01:57 +0200 Subject: [PATCH 17/27] hostapd: fix bss color CCA issue with multiple wifi interfaces Fixes this error: hostapd: nl80211: kernel reports: integer out of range Reported-by: Hartmut Birr Signed-off-by: Felix Fietkau --- ...S-coloring-fix-CCA-with-multiple-BSS.patch | 103 ++++++++++++++++++ .../hostapd/patches/200-multicall.patch | 2 +- 2 files changed, 104 insertions(+), 1 deletion(-) create mode 100644 package/network/services/hostapd/patches/180-BSS-coloring-fix-CCA-with-multiple-BSS.patch diff --git a/package/network/services/hostapd/patches/180-BSS-coloring-fix-CCA-with-multiple-BSS.patch b/package/network/services/hostapd/patches/180-BSS-coloring-fix-CCA-with-multiple-BSS.patch new file mode 100644 index 00000000000..7b0435a4533 --- /dev/null +++ b/package/network/services/hostapd/patches/180-BSS-coloring-fix-CCA-with-multiple-BSS.patch @@ -0,0 +1,103 @@ +From: Felix Fietkau +Date: Mon, 7 Aug 2023 21:55:57 +0200 +Subject: [PATCH] BSS coloring: fix CCA with multiple BSS + +Pass bss->ctx instead of drv->ctx in order to avoid multiple reports for +the first bss. The first report would otherwise clear hapd->cca_color and +subsequent reports would cause the iface bss color to be set to 0. +In order to avoid any issues with cancellations, only overwrite the color +based on hapd->cca_color if it was actually set. + +Fixes: 33c4dd26cd11 ("BSS coloring: Handle the collision and CCA events coming from the kernel") +Signed-off-by: Felix Fietkau +--- + +--- a/src/ap/drv_callbacks.c ++++ b/src/ap/drv_callbacks.c +@@ -2260,7 +2260,8 @@ void wpa_supplicant_event(void *ctx, enu + case EVENT_CCA_NOTIFY: + wpa_printf(MSG_DEBUG, "CCA finished on on %s", + hapd->conf->iface); +- hapd->iface->conf->he_op.he_bss_color = hapd->cca_color; ++ if (hapd->cca_color) ++ hapd->iface->conf->he_op.he_bss_color = hapd->cca_color; + hostapd_cleanup_cca_params(hapd); + break; + #endif /* CONFIG_IEEE80211AX */ +--- a/src/drivers/driver_nl80211_event.c ++++ b/src/drivers/driver_nl80211_event.c +@@ -3653,7 +3653,7 @@ static void nl80211_assoc_comeback(struc + + #ifdef CONFIG_IEEE80211AX + +-static void nl80211_obss_color_collision(struct wpa_driver_nl80211_data *drv, ++static void nl80211_obss_color_collision(struct i802_bss *bss, + struct nlattr *tb[]) + { + union wpa_event_data data; +@@ -3667,37 +3667,37 @@ static void nl80211_obss_color_collision + + wpa_printf(MSG_DEBUG, "nl80211: BSS color collision - bitmap %08llx", + (long long unsigned int) data.bss_color_collision.bitmap); +- wpa_supplicant_event(drv->ctx, EVENT_BSS_COLOR_COLLISION, &data); ++ wpa_supplicant_event(bss->ctx, EVENT_BSS_COLOR_COLLISION, &data); + } + + + static void +-nl80211_color_change_announcement_started(struct wpa_driver_nl80211_data *drv) ++nl80211_color_change_announcement_started(struct i802_bss *bss) + { + union wpa_event_data data = {}; + + wpa_printf(MSG_DEBUG, "nl80211: CCA started"); +- wpa_supplicant_event(drv->ctx, EVENT_CCA_STARTED_NOTIFY, &data); ++ wpa_supplicant_event(bss->ctx, EVENT_CCA_STARTED_NOTIFY, &data); + } + + + static void +-nl80211_color_change_announcement_aborted(struct wpa_driver_nl80211_data *drv) ++nl80211_color_change_announcement_aborted(struct i802_bss *bss) + { + union wpa_event_data data = {}; + + wpa_printf(MSG_DEBUG, "nl80211: CCA aborted"); +- wpa_supplicant_event(drv->ctx, EVENT_CCA_ABORTED_NOTIFY, &data); ++ wpa_supplicant_event(bss->ctx, EVENT_CCA_ABORTED_NOTIFY, &data); + } + + + static void +-nl80211_color_change_announcement_completed(struct wpa_driver_nl80211_data *drv) ++nl80211_color_change_announcement_completed(struct i802_bss *bss) + { + union wpa_event_data data = {}; + + wpa_printf(MSG_DEBUG, "nl80211: CCA completed"); +- wpa_supplicant_event(drv->ctx, EVENT_CCA_NOTIFY, &data); ++ wpa_supplicant_event(bss->ctx, EVENT_CCA_NOTIFY, &data); + } + + #endif /* CONFIG_IEEE80211AX */ +@@ -3957,16 +3957,16 @@ static void do_process_drv_event(struct + break; + #ifdef CONFIG_IEEE80211AX + case NL80211_CMD_OBSS_COLOR_COLLISION: +- nl80211_obss_color_collision(drv, tb); ++ nl80211_obss_color_collision(bss, tb); + break; + case NL80211_CMD_COLOR_CHANGE_STARTED: +- nl80211_color_change_announcement_started(drv); ++ nl80211_color_change_announcement_started(bss); + break; + case NL80211_CMD_COLOR_CHANGE_ABORTED: +- nl80211_color_change_announcement_aborted(drv); ++ nl80211_color_change_announcement_aborted(bss); + break; + case NL80211_CMD_COLOR_CHANGE_COMPLETED: +- nl80211_color_change_announcement_completed(drv); ++ nl80211_color_change_announcement_completed(bss); + break; + #endif /* CONFIG_IEEE80211AX */ + default: diff --git a/package/network/services/hostapd/patches/200-multicall.patch b/package/network/services/hostapd/patches/200-multicall.patch index f7e797a9c80..8ebbed0c32c 100644 --- a/package/network/services/hostapd/patches/200-multicall.patch +++ b/package/network/services/hostapd/patches/200-multicall.patch @@ -189,7 +189,7 @@ { struct hostapd_data *hapd = ctx; #ifndef CONFIG_NO_STDOUT_DEBUG -@@ -2271,7 +2271,7 @@ void wpa_supplicant_event(void *ctx, enu +@@ -2272,7 +2272,7 @@ void wpa_supplicant_event(void *ctx, enu } From 9b56c27a8a08a5c40d38064b9046f42177c94768 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Tue, 8 Aug 2023 20:11:42 +0200 Subject: [PATCH 18/27] hostapd: add extra sanity checks for config reload Avoid getting stuck because of bad configurations Signed-off-by: Felix Fietkau --- package/network/services/hostapd/files/hostapd.uc | 3 +++ 1 file changed, 3 insertions(+) diff --git a/package/network/services/hostapd/files/hostapd.uc b/package/network/services/hostapd/files/hostapd.uc index cc026cc853d..b52732adcb7 100644 --- a/package/network/services/hostapd/files/hostapd.uc +++ b/package/network/services/hostapd/files/hostapd.uc @@ -117,6 +117,9 @@ function iface_reload_config(phy, config, old_config) if (is_equal(old_config.bss, config.bss)) return true; + if (!old_config.bss || !old_config.bss[0]) + return false; + if (config.bss[0].ifname != old_config.bss[0].ifname) return false; From afa229038c05ba0ca20595d7f73bea94db21d3a6 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Tue, 8 Aug 2023 20:12:11 +0200 Subject: [PATCH 19/27] mac80211: fix applying tx/rx antenna changes afer hostapd reload change Tear down all interfaces if the antenna settings change, so that the capabilities can be recalculated properly Signed-off-by: Felix Fietkau --- .../mac80211/files/lib/netifd/wireless/mac80211.sh | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh index a2a7bdba255..d87a2c63122 100644 --- a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh +++ b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh @@ -1089,14 +1089,18 @@ drv_mac80211_setup() { json_get_values scan_list scan_list json_select .. + json_select data && { + json_get_var prev_rxantenna rxantenna + json_get_var prev_txantenna txantenna + json_select .. + } + find_phy || { echo "Could not find PHY for device '$1'" wireless_set_retry 0 return 1 } - wireless_set_data phy="$phy" - local wdev local cwdev local found @@ -1130,6 +1134,9 @@ drv_mac80211_setup() { [ "$txantenna" = "all" ] && txantenna=0xffffffff [ "$rxantenna" = "all" ] && rxantenna=0xffffffff + [ "$rxantenna" = "$prev_rxantenna" -a "$txantenna" = "$prev_txantenna" ] || mac80211_reset_config "$phy" + wireless_set_data phy="$phy" txantenna="$txantenna" rxantenna="$rxantenna" + iw phy "$phy" set antenna $txantenna $rxantenna >/dev/null 2>&1 iw phy "$phy" set antenna_gain $antenna_gain >/dev/null 2>&1 iw phy "$phy" set distance "$distance" >/dev/null 2>&1 From 4bd9f2eda5d544c4f9a5f39a995a339d64a92ceb Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Wed, 9 Aug 2023 10:50:53 +0200 Subject: [PATCH 20/27] mac80211: fix setting mesh parameters after hostapd reload change Signed-off-by: Felix Fietkau --- package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh index d87a2c63122..81c08b00bbc 100644 --- a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh +++ b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh @@ -765,7 +765,7 @@ mac80211_prepare_iw_htmode() { mac80211_add_mesh_params() { for var in $MP_CONFIG_INT $MP_CONFIG_BOOL $MP_CONFIG_STRING; do - eval "mp_val=\"\$var\"" + eval "mp_val=\"\$$var\"" [ -n "$mp_val" ] && json_add_string "$var" "$mp_val" done } From d198c77764b048096a6a4e339de342423dcc8cc9 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Wed, 9 Aug 2023 10:51:46 +0200 Subject: [PATCH 21/27] hostapd: fix typo in ssid variable for non-supplicant mesh interface bringup Signed-off-by: Felix Fietkau --- package/network/services/hostapd/files/wdev.uc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/network/services/hostapd/files/wdev.uc b/package/network/services/hostapd/files/wdev.uc index 896f5261fb9..5b321423eb2 100644 --- a/package/network/services/hostapd/files/wdev.uc +++ b/package/network/services/hostapd/files/wdev.uc @@ -46,7 +46,7 @@ function iface_start(wdev) push(cmd, key, wdev[key]); system(cmd); } else if (wdev.mode == "mesh") { - let cmd = [ "iw", "dev", ifname, "mesh", "join", ssid, "freq", wdev.freq, wdev.htmode ]; + let cmd = [ "iw", "dev", ifname, "mesh", "join", wdev.ssid, "freq", wdev.freq, wdev.htmode ]; for (let key in [ "beacon-interval", "mcast-rate" ]) if (wdev[key]) push(cmd, key, wdev[key]); From 9194fcb1a4052fd4ead29464d959dee686f8c94c Mon Sep 17 00:00:00 2001 From: Linhui Liu Date: Tue, 8 Aug 2023 16:26:07 +0800 Subject: [PATCH 22/27] toolchain/binutils: add support for version 2.41 Release notes: https://sourceware.org/pipermail/binutils/2023-July/128719.html Signed-off-by: Linhui Liu --- toolchain/binutils/Config.in | 4 ++ toolchain/binutils/Config.version | 4 ++ toolchain/binutils/Makefile | 4 ++ .../2.41/300-001_ld_makefile_patch.patch | 22 +++++++++ .../400-mips_no_dynamic_linking_sym.patch | 18 +++++++ ...e-default-emulation-for-mips64-linux.patch | 48 +++++++++++++++++++ 6 files changed, 100 insertions(+) create mode 100644 toolchain/binutils/patches/2.41/300-001_ld_makefile_patch.patch create mode 100644 toolchain/binutils/patches/2.41/400-mips_no_dynamic_linking_sym.patch create mode 100644 toolchain/binutils/patches/2.41/500-Change-default-emulation-for-mips64-linux.patch diff --git a/toolchain/binutils/Config.in b/toolchain/binutils/Config.in index e53384a0062..3ec4fe47a8f 100644 --- a/toolchain/binutils/Config.in +++ b/toolchain/binutils/Config.in @@ -21,6 +21,10 @@ choice config BINUTILS_USE_VERSION_2_40 bool "Binutils 2.40" select BINUTILS_VERSION_2_40 + + config BINUTILS_USE_VERSION_2_41 + bool "Binutils 2.41" + select BINUTILS_VERSION_2_41 endchoice config EXTRA_BINUTILS_CONFIG_OPTIONS diff --git a/toolchain/binutils/Config.version b/toolchain/binutils/Config.version index c9f85844808..acb764bb6a7 100644 --- a/toolchain/binutils/Config.version +++ b/toolchain/binutils/Config.version @@ -12,9 +12,13 @@ config BINUTILS_VERSION_2_40 default y if !TOOLCHAINOPTS bool +config BINUTILS_VERSION_2_41 + bool + config BINUTILS_VERSION string default "2.37" if BINUTILS_VERSION_2_37 default "2.38" if BINUTILS_VERSION_2_38 default "2.39" if BINUTILS_VERSION_2_39 default "2.40" if BINUTILS_VERSION_2_40 + default "2.41" if BINUTILS_VERSION_2_41 diff --git a/toolchain/binutils/Makefile b/toolchain/binutils/Makefile index ae7e953eb92..701aded3335 100644 --- a/toolchain/binutils/Makefile +++ b/toolchain/binutils/Makefile @@ -31,6 +31,10 @@ ifeq ($(PKG_VERSION),2.40) PKG_HASH:=0f8a4c272d7f17f369ded10a4aca28b8e304828e95526da482b0ccc4dfc9d8e1 endif +ifeq ($(PKG_VERSION),2.41) + PKG_HASH:=ae9a5789e23459e59606e6714723f2d3ffc31c03174191ef0d015bdf06007450 +endif + HOST_BUILD_PARALLEL:=1 PATCH_DIR:=./patches/$(PKG_VERSION) diff --git a/toolchain/binutils/patches/2.41/300-001_ld_makefile_patch.patch b/toolchain/binutils/patches/2.41/300-001_ld_makefile_patch.patch new file mode 100644 index 00000000000..2dafd92a01d --- /dev/null +++ b/toolchain/binutils/patches/2.41/300-001_ld_makefile_patch.patch @@ -0,0 +1,22 @@ +--- a/ld/Makefile.am ++++ b/ld/Makefile.am +@@ -50,7 +50,7 @@ AM_CFLAGS = $(WARN_CFLAGS) $(ELF_CLFAGS) + # We put the scripts in the directory $(scriptdir)/ldscripts. + # We can't put the scripts in $(datadir) because the SEARCH_DIR + # directives need to be different for native and cross linkers. +-scriptdir = $(tooldir)/lib ++scriptdir = $(libdir) + + EMUL = @EMUL@ + EMULATION_OFILES = @EMULATION_OFILES@ +--- a/ld/Makefile.in ++++ b/ld/Makefile.in +@@ -573,7 +573,7 @@ AM_CFLAGS = $(WARN_CFLAGS) $(ELF_CLFAGS) + # We put the scripts in the directory $(scriptdir)/ldscripts. + # We can't put the scripts in $(datadir) because the SEARCH_DIR + # directives need to be different for native and cross linkers. +-scriptdir = $(tooldir)/lib ++scriptdir = $(libdir) + BASEDIR = $(srcdir)/.. + BFDDIR = $(BASEDIR)/bfd + INCDIR = $(BASEDIR)/include diff --git a/toolchain/binutils/patches/2.41/400-mips_no_dynamic_linking_sym.patch b/toolchain/binutils/patches/2.41/400-mips_no_dynamic_linking_sym.patch new file mode 100644 index 00000000000..c50a988da46 --- /dev/null +++ b/toolchain/binutils/patches/2.41/400-mips_no_dynamic_linking_sym.patch @@ -0,0 +1,18 @@ +--- a/bfd/elfxx-mips.c ++++ b/bfd/elfxx-mips.c +@@ -8144,6 +8144,7 @@ _bfd_mips_elf_create_dynamic_sections (b + + name = SGI_COMPAT (abfd) ? "_DYNAMIC_LINK" : "_DYNAMIC_LINKING"; + bh = NULL; ++ if (0) { + if (!(_bfd_generic_link_add_one_symbol + (info, abfd, name, BSF_GLOBAL, bfd_abs_section_ptr, 0, + NULL, false, get_elf_backend_data (abfd)->collect, &bh))) +@@ -8156,6 +8157,7 @@ _bfd_mips_elf_create_dynamic_sections (b + + if (! bfd_elf_link_record_dynamic_symbol (info, h)) + return false; ++ } + + if (! mips_elf_hash_table (info)->use_rld_obj_head) + { diff --git a/toolchain/binutils/patches/2.41/500-Change-default-emulation-for-mips64-linux.patch b/toolchain/binutils/patches/2.41/500-Change-default-emulation-for-mips64-linux.patch new file mode 100644 index 00000000000..60676bbe549 --- /dev/null +++ b/toolchain/binutils/patches/2.41/500-Change-default-emulation-for-mips64-linux.patch @@ -0,0 +1,48 @@ +--- a/bfd/config.bfd ++++ b/bfd/config.bfd +@@ -947,8 +947,8 @@ case "${targ}" in + want64=true + ;; + mips64*el-*-linux*) +- targ_defvec=mips_elf32_ntrad_le_vec +- targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec" ++ targ_defvec=mips_elf64_trad_le_vec ++ targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_be_vec" + ;; + mips64*-*-linux*-gnuabi64) + targ_defvec=mips_elf64_trad_be_vec +@@ -956,8 +956,8 @@ case "${targ}" in + want64=true + ;; + mips64*-*-linux*) +- targ_defvec=mips_elf32_ntrad_be_vec +- targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec" ++ targ_defvec=mips_elf64_trad_be_vec ++ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec" + ;; + mips*el-*-linux*) + targ_defvec=mips_elf32_trad_le_vec +--- a/ld/configure.tgt ++++ b/ld/configure.tgt +@@ -585,8 +585,8 @@ mips64*el-*-linux-gnuabi64) + targ_extra_emuls="elf64btsmip elf32ltsmipn32 elf32btsmipn32 elf32ltsmip elf32btsmip" + targ_extra_libpath=$targ_extra_emuls + ;; +-mips64*el-*-linux-*) targ_emul=elf32ltsmipn32 +- targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip" ++mips64*el-*-linux-*) targ_emul=elf64ltsmip ++ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip" + targ_extra_libpath=$targ_extra_emuls + ;; + mips64*-*-linux-gnuabi64) +@@ -594,8 +594,8 @@ mips64*-*-linux-gnuabi64) + targ_extra_emuls="elf64ltsmip elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip" + targ_extra_libpath=$targ_extra_emuls + ;; +-mips64*-*-linux-*) targ_emul=elf32btsmipn32 +- targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip" ++mips64*-*-linux-*) targ_emul=elf64btsmip ++ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip" + targ_extra_libpath=$targ_extra_emuls + ;; + mips*el-*-linux-*) targ_emul=elf32ltsmip From 92602f823a5f29fee41209ccef53ddddb2e89222 Mon Sep 17 00:00:00 2001 From: Ivan Pavlov Date: Fri, 4 Aug 2023 15:28:12 +0300 Subject: [PATCH 23/27] openssl: update to 3.0.10 Changes between 3.0.9 and 3.0.10 [1 Aug 2023] * Fix excessive time spent checking DH q parameter value ([CVE-2023-3817]) * Fix DH_check() excessive time with over sized modulus ([CVE-2023-3446]) * Do not ignore empty associated data entries with AES-SIV ([CVE-2023-2975]) Signed-off-by: Ivan Pavlov --- package/libs/openssl/Makefile | 6 +++--- .../libs/openssl/patches/100-Configure-afalg-support.patch | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/package/libs/openssl/Makefile b/package/libs/openssl/Makefile index 13e5952b372..7bee249676f 100644 --- a/package/libs/openssl/Makefile +++ b/package/libs/openssl/Makefile @@ -8,8 +8,8 @@ include $(TOPDIR)/rules.mk PKG_NAME:=openssl -PKG_VERSION:=3.0.9 -PKG_RELEASE:=3 +PKG_VERSION:=3.0.10 +PKG_RELEASE:=1 PKG_BUILD_FLAGS:=no-mips16 gc-sections no-lto PKG_BUILD_PARALLEL:=1 @@ -24,7 +24,7 @@ PKG_SOURCE_URL:= \ ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/ \ ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/old/$(PKG_BASE)/ -PKG_HASH:=eb1ab04781474360f77c318ab89d8c5a03abc38e63d65a603cabbf1b00a1dc90 +PKG_HASH:=1761d4f5b13a1028b9b6f3d4b8e17feb0cedc9370f6afe61d7193d2cdce83323 PKG_LICENSE:=Apache-2.0 PKG_LICENSE_FILES:=LICENSE diff --git a/package/libs/openssl/patches/100-Configure-afalg-support.patch b/package/libs/openssl/patches/100-Configure-afalg-support.patch index e9cd7bf9c1a..307e23b8092 100644 --- a/package/libs/openssl/patches/100-Configure-afalg-support.patch +++ b/package/libs/openssl/patches/100-Configure-afalg-support.patch @@ -10,7 +10,7 @@ Signed-off-by: Eneas U de Queiroz --- a/Configure +++ b/Configure -@@ -1677,7 +1677,9 @@ $config{CFLAGS} = [ map { $_ eq '--ossl- +@@ -1674,7 +1674,9 @@ $config{CFLAGS} = [ map { $_ eq '--ossl- unless ($disabled{afalgeng}) { $config{afalgeng}=""; From 81c1172c3626157ff9a146430cd14e32c9c80a5a Mon Sep 17 00:00:00 2001 From: John Audia Date: Thu, 3 Aug 2023 13:53:47 -0400 Subject: [PATCH 24/27] kernel: bump 5.15 to 5.15.124 Changelog: https://lore.kernel.org/stable/2023080341-curliness-salary-4158@gregkh/ 1. Needed to make a change to to package/kernel/linux/modules/netsupport.mk due to upstream moving vxlan to its own directory[1]. @john-tho suggested using the the 6.1 xvlan FILES to circumvent. 2. All patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.124&id=77396fa9096abdbfbb87d63e73ad44d5621cf103 Signed-off-by: John Audia --- include/kernel-5.15 | 4 ++-- package/kernel/linux/modules/netsupport.mk | 3 +-- .../linux/ath79/patches-5.15/910-unaligned_access_hacks.patch | 4 ++-- .../707-v6.3-net-pcs-add-driver-for-MediaTek-SGMII-PCS.patch | 2 +- ...4-0011-net-dsa-mt7530-introduce-separate-MDIO-driver.patch | 2 +- ...net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch | 2 +- ...phy-Add-driver-for-Motorcomm-yt8521-gigabit-ethernet.patch | 2 +- ...18-0009-nvmem-Add-driver-for-OCOTP-in-Sunplus-SP7021.patch | 2 +- .../806-v6.0-0001-nvmem-microchip-otpc-add-support.patch | 2 +- .../hack-5.15/780-usb-net-MeigLink_modem_support.patch | 2 +- .../351-irqchip-bcm-6345-l1-request-memory-region.patch | 4 ++-- .../patches-5.15/701-staging-add-fsl_ppfe-driver.patch | 2 +- ...net-phy-add-driver-for-MediaTek-SoC-built-in-GE-PHYs.patch | 2 +- .../850-v6.0-i2c-move-drivers-from-strlcpy-to-strscpy.patch | 2 +- ...MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch | 2 +- ...-09-MAINTAINERS-add-Mediatek-MTMIPS-Clock-maintainer.patch | 2 +- .../008-5.17-watchdog-add-realtek-otto-watchdog-timer.patch | 2 +- 17 files changed, 20 insertions(+), 21 deletions(-) diff --git a/include/kernel-5.15 b/include/kernel-5.15 index 3052c783a95..35c6240132b 100644 --- a/include/kernel-5.15 +++ b/include/kernel-5.15 @@ -1,2 +1,2 @@ -LINUX_VERSION-5.15 = .123 -LINUX_KERNEL_HASH-5.15.123 = 2de69544a12e6a059163c58fc901c13bcf22e8cac39c66b56f8fbb633399bf93 +LINUX_VERSION-5.15 = .124 +LINUX_KERNEL_HASH-5.15.124 = 00036a0260ad012aa832a8698a4afcf23b2410091527738ce48ce3fcc23f22ed diff --git a/package/kernel/linux/modules/netsupport.mk b/package/kernel/linux/modules/netsupport.mk index 35e627002ea..0187a058258 100644 --- a/package/kernel/linux/modules/netsupport.mk +++ b/package/kernel/linux/modules/netsupport.mk @@ -93,8 +93,7 @@ define KernelPackage/vxlan +IPV6:kmod-udptunnel6 KCONFIG:=CONFIG_VXLAN FILES:= \ - $(LINUX_DIR)/drivers/net/vxlan.ko@lt5.18 \ - $(LINUX_DIR)/drivers/net/vxlan/vxlan.ko@ge5.18 + $(LINUX_DIR)/drivers/net/vxlan/vxlan.ko AUTOLOAD:=$(call AutoLoad,13,vxlan) endef diff --git a/target/linux/ath79/patches-5.15/910-unaligned_access_hacks.patch b/target/linux/ath79/patches-5.15/910-unaligned_access_hacks.patch index f542c32d45d..1971b9cd010 100644 --- a/target/linux/ath79/patches-5.15/910-unaligned_access_hacks.patch +++ b/target/linux/ath79/patches-5.15/910-unaligned_access_hacks.patch @@ -654,7 +654,7 @@ SVN-Revision: 35130 return false; return true; -@@ -750,13 +754,13 @@ static inline void ipv6_addr_set_v4mappe +@@ -746,13 +750,13 @@ static inline void ipv6_addr_set_v4mappe */ static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) { @@ -670,7 +670,7 @@ SVN-Revision: 35130 if (xb) return i * 32 + 31 - __fls(ntohl(xb)); } -@@ -950,17 +954,18 @@ static inline u32 ip6_multipath_hash_fie +@@ -946,17 +950,18 @@ static inline u32 ip6_multipath_hash_fie static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, __be32 flowlabel) { diff --git a/target/linux/generic/backport-5.15/707-v6.3-net-pcs-add-driver-for-MediaTek-SGMII-PCS.patch b/target/linux/generic/backport-5.15/707-v6.3-net-pcs-add-driver-for-MediaTek-SGMII-PCS.patch index 3668a821ef7..1cae648358f 100644 --- a/target/linux/generic/backport-5.15/707-v6.3-net-pcs-add-driver-for-MediaTek-SGMII-PCS.patch +++ b/target/linux/generic/backport-5.15/707-v6.3-net-pcs-add-driver-for-MediaTek-SGMII-PCS.patch @@ -32,7 +32,7 @@ Signed-off-by: Jakub Kicinski --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -11782,6 +11782,14 @@ L: netdev@vger.kernel.org +@@ -11783,6 +11783,14 @@ L: netdev@vger.kernel.org S: Maintained F: drivers/net/ethernet/mediatek/ diff --git a/target/linux/generic/backport-5.15/790-v6.4-0011-net-dsa-mt7530-introduce-separate-MDIO-driver.patch b/target/linux/generic/backport-5.15/790-v6.4-0011-net-dsa-mt7530-introduce-separate-MDIO-driver.patch index c0e29fa00fb..2cebac1f8c6 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0011-net-dsa-mt7530-introduce-separate-MDIO-driver.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0011-net-dsa-mt7530-introduce-separate-MDIO-driver.patch @@ -25,7 +25,7 @@ Signed-off-by: David S. Miller --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -11894,6 +11894,7 @@ M: Landen Chao L: netdev@vger.kernel.org S: Maintained diff --git a/target/linux/generic/backport-5.15/790-v6.4-0013-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch b/target/linux/generic/backport-5.15/790-v6.4-0013-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch index 89dc30c7dff..889a13e0149 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0013-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0013-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch @@ -28,7 +28,7 @@ Signed-off-by: David S. Miller --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -11892,9 +11892,11 @@ MEDIATEK SWITCH DRIVER +@@ -11893,9 +11893,11 @@ MEDIATEK SWITCH DRIVER M: Sean Wang M: Landen Chao M: DENG Qingfang diff --git a/target/linux/generic/backport-5.15/791-v6.2-01-net-phy-Add-driver-for-Motorcomm-yt8521-gigabit-ethernet.patch b/target/linux/generic/backport-5.15/791-v6.2-01-net-phy-Add-driver-for-Motorcomm-yt8521-gigabit-ethernet.patch index eb51b410b54..7eb097f86d0 100644 --- a/target/linux/generic/backport-5.15/791-v6.2-01-net-phy-Add-driver-for-Motorcomm-yt8521-gigabit-ethernet.patch +++ b/target/linux/generic/backport-5.15/791-v6.2-01-net-phy-Add-driver-for-Motorcomm-yt8521-gigabit-ethernet.patch @@ -21,7 +21,7 @@ Signed-off-by: David S. Miller --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -12693,6 +12693,7 @@ F: include/uapi/linux/meye.h +@@ -12694,6 +12694,7 @@ F: include/uapi/linux/meye.h MOTORCOMM PHY DRIVER M: Peter Geis diff --git a/target/linux/generic/backport-5.15/804-v5.18-0009-nvmem-Add-driver-for-OCOTP-in-Sunplus-SP7021.patch b/target/linux/generic/backport-5.15/804-v5.18-0009-nvmem-Add-driver-for-OCOTP-in-Sunplus-SP7021.patch index 6ad9257d60e..79fd479054e 100644 --- a/target/linux/generic/backport-5.15/804-v5.18-0009-nvmem-Add-driver-for-OCOTP-in-Sunplus-SP7021.patch +++ b/target/linux/generic/backport-5.15/804-v5.18-0009-nvmem-Add-driver-for-OCOTP-in-Sunplus-SP7021.patch @@ -19,7 +19,7 @@ Signed-off-by: Greg Kroah-Hartman --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -17958,6 +17958,11 @@ L: netdev@vger.kernel.org +@@ -17959,6 +17959,11 @@ L: netdev@vger.kernel.org S: Maintained F: drivers/net/ethernet/dlink/sundance.c diff --git a/target/linux/generic/backport-5.15/806-v6.0-0001-nvmem-microchip-otpc-add-support.patch b/target/linux/generic/backport-5.15/806-v6.0-0001-nvmem-microchip-otpc-add-support.patch index f7ea61626c5..24beeda0d22 100644 --- a/target/linux/generic/backport-5.15/806-v6.0-0001-nvmem-microchip-otpc-add-support.patch +++ b/target/linux/generic/backport-5.15/806-v6.0-0001-nvmem-microchip-otpc-add-support.patch @@ -57,7 +57,7 @@ Signed-off-by: Greg Kroah-Hartman --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -12357,6 +12357,14 @@ S: Supported +@@ -12358,6 +12358,14 @@ S: Supported F: Documentation/devicetree/bindings/mtd/atmel-nand.txt F: drivers/mtd/nand/raw/atmel/* diff --git a/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch b/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch index a44a5b6d89c..4f1966db165 100644 --- a/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch +++ b/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch @@ -29,7 +29,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support #define QUECTEL_VENDOR_ID 0x2c7c /* These Quectel products use Quectel's vendor ID */ -@@ -1177,6 +1179,11 @@ static const struct usb_device_id option +@@ -1179,6 +1181,11 @@ static const struct usb_device_id option .driver_info = ZLP }, { USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96), .driver_info = RSVD(4) }, diff --git a/target/linux/generic/pending-5.15/351-irqchip-bcm-6345-l1-request-memory-region.patch b/target/linux/generic/pending-5.15/351-irqchip-bcm-6345-l1-request-memory-region.patch index 9fad4f62c61..91654cc294c 100644 --- a/target/linux/generic/pending-5.15/351-irqchip-bcm-6345-l1-request-memory-region.patch +++ b/target/linux/generic/pending-5.15/351-irqchip-bcm-6345-l1-request-memory-region.patch @@ -91,7 +91,7 @@ Acked-by: Florian Fainelli --- a/drivers/irqchip/irq-bcm6345-l1.c +++ b/drivers/irqchip/irq-bcm6345-l1.c -@@ -261,6 +261,9 @@ static int __init bcm6345_l1_init_one(st +@@ -257,6 +257,9 @@ static int __init bcm6345_l1_init_one(st if (!cpu->map_base) return -ENOMEM; @@ -101,7 +101,7 @@ Acked-by: Florian Fainelli for (i = 0; i < n_words; i++) { cpu->enable_cache[i] = 0; __raw_writel(0, cpu->map_base + reg_enable(intc, i)); -@@ -339,8 +342,7 @@ static int __init bcm6345_l1_of_init(str +@@ -335,8 +338,7 @@ static int __init bcm6345_l1_of_init(str for_each_cpu(idx, &intc->cpumask) { struct bcm6345_l1_cpu *cpu = intc->cpus[idx]; diff --git a/target/linux/layerscape/patches-5.15/701-staging-add-fsl_ppfe-driver.patch b/target/linux/layerscape/patches-5.15/701-staging-add-fsl_ppfe-driver.patch index e8a69153500..445d050a784 100644 --- a/target/linux/layerscape/patches-5.15/701-staging-add-fsl_ppfe-driver.patch +++ b/target/linux/layerscape/patches-5.15/701-staging-add-fsl_ppfe-driver.patch @@ -854,7 +854,7 @@ Signed-off-by: Pawel Dembicki +}; --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -7519,6 +7519,14 @@ F: drivers/ptp/ptp_qoriq.c +@@ -7520,6 +7520,14 @@ F: drivers/ptp/ptp_qoriq.c F: drivers/ptp/ptp_qoriq_debugfs.c F: include/linux/fsl/ptp_qoriq.h diff --git a/target/linux/mediatek/patches-5.15/730-v6.5-net-phy-add-driver-for-MediaTek-SoC-built-in-GE-PHYs.patch b/target/linux/mediatek/patches-5.15/730-v6.5-net-phy-add-driver-for-MediaTek-SoC-built-in-GE-PHYs.patch index 26ebcb6733b..9da29755825 100644 --- a/target/linux/mediatek/patches-5.15/730-v6.5-net-phy-add-driver-for-MediaTek-SoC-built-in-GE-PHYs.patch +++ b/target/linux/mediatek/patches-5.15/730-v6.5-net-phy-add-driver-for-MediaTek-SoC-built-in-GE-PHYs.patch @@ -24,7 +24,7 @@ Signed-off-by: David S. Miller --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -11790,6 +11790,15 @@ S: Maintained +@@ -11791,6 +11791,15 @@ S: Maintained F: drivers/net/pcs/pcs-mtk-lynxi.c F: include/linux/pcs/pcs-mtk-lynxi.h diff --git a/target/linux/mediatek/patches-5.15/850-v6.0-i2c-move-drivers-from-strlcpy-to-strscpy.patch b/target/linux/mediatek/patches-5.15/850-v6.0-i2c-move-drivers-from-strlcpy-to-strscpy.patch index 44d3753b142..79444e071e8 100644 --- a/target/linux/mediatek/patches-5.15/850-v6.0-i2c-move-drivers-from-strlcpy-to-strscpy.patch +++ b/target/linux/mediatek/patches-5.15/850-v6.0-i2c-move-drivers-from-strlcpy-to-strscpy.patch @@ -257,7 +257,7 @@ Signed-off-by: Wolfram Sang --- a/drivers/i2c/busses/i2c-ibm_iic.c +++ b/drivers/i2c/busses/i2c-ibm_iic.c -@@ -738,7 +738,7 @@ static int iic_probe(struct platform_dev +@@ -736,7 +736,7 @@ static int iic_probe(struct platform_dev adap = &dev->adap; adap->dev.parent = &ofdev->dev; adap->dev.of_node = of_node_get(np); diff --git a/target/linux/mvebu/patches-5.15/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch b/target/linux/mvebu/patches-5.15/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch index 242a6c1e00a..0b6891343d2 100644 --- a/target/linux/mvebu/patches-5.15/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch +++ b/target/linux/mvebu/patches-5.15/907-MAINTAINERS-Add-an-entry-for-the-IEI-WT61P803-PUZZLE.patch @@ -16,7 +16,7 @@ Cc: Robert Marko --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -9056,6 +9056,22 @@ F: include/net/nl802154.h +@@ -9057,6 +9057,22 @@ F: include/net/nl802154.h F: net/ieee802154/ F: net/mac802154/ diff --git a/target/linux/ramips/patches-5.15/005-v6.5-09-MAINTAINERS-add-Mediatek-MTMIPS-Clock-maintainer.patch b/target/linux/ramips/patches-5.15/005-v6.5-09-MAINTAINERS-add-Mediatek-MTMIPS-Clock-maintainer.patch index 3c9a5982af7..d05c1954f7f 100644 --- a/target/linux/ramips/patches-5.15/005-v6.5-09-MAINTAINERS-add-Mediatek-MTMIPS-Clock-maintainer.patch +++ b/target/linux/ramips/patches-5.15/005-v6.5-09-MAINTAINERS-add-Mediatek-MTMIPS-Clock-maintainer.patch @@ -13,7 +13,7 @@ Signed-off-by: Thomas Bogendoerfer --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -11858,6 +11858,12 @@ S: Maintained +@@ -11859,6 +11859,12 @@ S: Maintained F: Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml F: drivers/clk/ralink/clk-mt7621.c diff --git a/target/linux/realtek/patches-5.15/008-5.17-watchdog-add-realtek-otto-watchdog-timer.patch b/target/linux/realtek/patches-5.15/008-5.17-watchdog-add-realtek-otto-watchdog-timer.patch index dfe7ab28d73..60db030647d 100644 --- a/target/linux/realtek/patches-5.15/008-5.17-watchdog-add-realtek-otto-watchdog-timer.patch +++ b/target/linux/realtek/patches-5.15/008-5.17-watchdog-add-realtek-otto-watchdog-timer.patch @@ -32,7 +32,7 @@ Signed-off-by: Guenter Roeck --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -15895,6 +15895,13 @@ S: Maintained +@@ -15896,6 +15896,13 @@ S: Maintained F: include/sound/rt*.h F: sound/soc/codecs/rt* From daed3322d347cae5fa538907b5f1fa5d5cfc08c6 Mon Sep 17 00:00:00 2001 From: John Audia Date: Tue, 8 Aug 2023 19:57:20 -0400 Subject: [PATCH 25/27] kernel: bump 5.15 to 5.15.125 1. Add new symbols to generic config 2. Bump kernel Changelog: https://lore.kernel.org/stable/2023080818-groin-gradient-a031@gregkh/ All patches automatically rebased. Signed-off-by: John Audia --- include/kernel-5.15 | 4 ++-- .../airoha/patches-5.15/0001-add-airoha-platform.patch | 2 +- target/linux/ath25/patches-5.15/107-ar5312_gpio.patch | 2 +- .../patches-5.15/0032-MIPS-ath79-sanitize-symbols.patch | 2 +- .../322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch | 2 +- .../patches-5.15/202-mips-bmips-tweak-Kconfig-options.patch | 2 +- .../bmips/patches-5.15/600-mips-bmips-add-pci-support.patch | 2 +- ....1-02-mm-x86-add-CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG.patch | 4 ++-- ...-v6.1-08-mm-multi-gen-LRU-support-page-table-walks.patch | 2 +- .../050-v5.16-05-mips-bpf-Enable-eBPF-JITs.patch | 4 ++-- target/linux/generic/hack-5.15/220-arm-gc_sections.patch | 2 +- .../generic/pending-5.15/300-mips_expose_boot_raw.patch | 4 ++-- target/linux/generic/pending-5.15/920-mangle_bootargs.patch | 4 ++-- target/linux/lantiq/patches-5.15/0152-lantiq-VPE.patch | 2 +- .../patches-5.15/901-arm-add-cmdline-override.patch | 2 +- .../300-mvebu-Mangle-bootloader-s-kernel-arguments.patch | 6 +++--- .../octeon/patches-5.15/100-mips_image_cmdline_hack.patch | 2 +- .../996-generic-Mangle-bootloader-s-kernel-arguments.patch | 6 +++--- .../314-MIPS-add-bootargs-override-property.patch | 4 ++-- .../patches-5.15/315-owrt-hack-fix-mt7688-cache-issue.patch | 4 ++-- .../patches-5.15/300-mips-add-rtl838x-platform.patch | 2 +- ...-um-increase-default-virtual-physical-memory-to-64.patch | 2 +- target/linux/x86/config-5.15 | 2 ++ 23 files changed, 35 insertions(+), 33 deletions(-) diff --git a/include/kernel-5.15 b/include/kernel-5.15 index 35c6240132b..43e03fac8d1 100644 --- a/include/kernel-5.15 +++ b/include/kernel-5.15 @@ -1,2 +1,2 @@ -LINUX_VERSION-5.15 = .124 -LINUX_KERNEL_HASH-5.15.124 = 00036a0260ad012aa832a8698a4afcf23b2410091527738ce48ce3fcc23f22ed +LINUX_VERSION-5.15 = .125 +LINUX_KERNEL_HASH-5.15.125 = 150f3846b76cd23a6135f49cef71372bade5a06e851cb4f8558df8b862d8fec7 diff --git a/target/linux/airoha/patches-5.15/0001-add-airoha-platform.patch b/target/linux/airoha/patches-5.15/0001-add-airoha-platform.patch index bb1104206e2..5b356ea23e0 100644 --- a/target/linux/airoha/patches-5.15/0001-add-airoha-platform.patch +++ b/target/linux/airoha/patches-5.15/0001-add-airoha-platform.patch @@ -1,6 +1,6 @@ --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -571,6 +571,18 @@ config ARCH_VIRT +@@ -572,6 +572,18 @@ config ARCH_VIRT select HAVE_ARM_ARCH_TIMER select ARCH_SUPPORTS_BIG_ENDIAN diff --git a/target/linux/ath25/patches-5.15/107-ar5312_gpio.patch b/target/linux/ath25/patches-5.15/107-ar5312_gpio.patch index e6e1290d35a..70d139621aa 100644 --- a/target/linux/ath25/patches-5.15/107-ar5312_gpio.patch +++ b/target/linux/ath25/patches-5.15/107-ar5312_gpio.patch @@ -202,7 +202,7 @@ +subsys_initcall(ar5312_gpio_init); --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -231,6 +231,7 @@ config ATH25 +@@ -232,6 +232,7 @@ config ATH25 select CEVT_R4K select CSRC_R4K select DMA_NONCOHERENT diff --git a/target/linux/ath79/patches-5.15/0032-MIPS-ath79-sanitize-symbols.patch b/target/linux/ath79/patches-5.15/0032-MIPS-ath79-sanitize-symbols.patch index 9d014434ecb..5eb23ba6c65 100644 --- a/target/linux/ath79/patches-5.15/0032-MIPS-ath79-sanitize-symbols.patch +++ b/target/linux/ath79/patches-5.15/0032-MIPS-ath79-sanitize-symbols.patch @@ -15,7 +15,7 @@ Signed-off-by: John Crispin --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -257,6 +257,8 @@ config ATH79 +@@ -258,6 +258,8 @@ config ATH79 select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_MIPS16 select SYS_SUPPORTS_ZBOOT_UART_PROM diff --git a/target/linux/bcm63xx/patches-5.15/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch b/target/linux/bcm63xx/patches-5.15/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch index aff3f4a1a0e..c6a8cf1e366 100644 --- a/target/linux/bcm63xx/patches-5.15/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch +++ b/target/linux/bcm63xx/patches-5.15/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch @@ -14,7 +14,7 @@ Signed-off-by: Jonas Gorski --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -332,6 +332,9 @@ config BCM63XX +@@ -333,6 +333,9 @@ config BCM63XX select SYNC_R4K select DMA_NONCOHERENT select IRQ_MIPS_CPU diff --git a/target/linux/bmips/patches-5.15/202-mips-bmips-tweak-Kconfig-options.patch b/target/linux/bmips/patches-5.15/202-mips-bmips-tweak-Kconfig-options.patch index eb3f1c1d5ce..79d4f98e0a7 100644 --- a/target/linux/bmips/patches-5.15/202-mips-bmips-tweak-Kconfig-options.patch +++ b/target/linux/bmips/patches-5.15/202-mips-bmips-tweak-Kconfig-options.patch @@ -13,7 +13,7 @@ Signed-off-by: Álvaro Fernández Rojas --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -275,25 +275,20 @@ config BMIPS_GENERIC +@@ -276,25 +276,20 @@ config BMIPS_GENERIC select SYNC_R4K select COMMON_CLK select BCM6345_L1_IRQ diff --git a/target/linux/bmips/patches-5.15/600-mips-bmips-add-pci-support.patch b/target/linux/bmips/patches-5.15/600-mips-bmips-add-pci-support.patch index e2ca75a3930..2f19d1e4894 100644 --- a/target/linux/bmips/patches-5.15/600-mips-bmips-add-pci-support.patch +++ b/target/linux/bmips/patches-5.15/600-mips-bmips-add-pci-support.patch @@ -14,7 +14,7 @@ Signed-off-by: Álvaro Fernández Rojas --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -275,6 +275,7 @@ config BMIPS_GENERIC +@@ -276,6 +276,7 @@ config BMIPS_GENERIC select SYNC_R4K select COMMON_CLK select BCM6345_L1_IRQ diff --git a/target/linux/generic/backport-5.15/020-v6.1-02-mm-x86-add-CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG.patch b/target/linux/generic/backport-5.15/020-v6.1-02-mm-x86-add-CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG.patch index 9e0430ea2aa..27c85a333b3 100644 --- a/target/linux/generic/backport-5.15/020-v6.1-02-mm-x86-add-CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG.patch +++ b/target/linux/generic/backport-5.15/020-v6.1-02-mm-x86-add-CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG.patch @@ -73,7 +73,7 @@ Signed-off-by: Andrew Morton --- a/arch/Kconfig +++ b/arch/Kconfig -@@ -1295,6 +1295,14 @@ config ARCH_HAS_ELFCORE_COMPAT +@@ -1298,6 +1298,14 @@ config ARCH_HAS_ELFCORE_COMPAT config ARCH_HAS_PARANOID_L1D_FLUSH bool @@ -90,7 +90,7 @@ Signed-off-by: Andrew Morton source "scripts/gcc-plugins/Kconfig" --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig -@@ -84,6 +84,7 @@ config X86 +@@ -85,6 +85,7 @@ config X86 select ARCH_HAS_PMEM_API if X86_64 select ARCH_HAS_PTE_DEVMAP if X86_64 select ARCH_HAS_PTE_SPECIAL diff --git a/target/linux/generic/backport-5.15/020-v6.1-08-mm-multi-gen-LRU-support-page-table-walks.patch b/target/linux/generic/backport-5.15/020-v6.1-08-mm-multi-gen-LRU-support-page-table-walks.patch index dad21dccb58..e6ce94e3d4f 100644 --- a/target/linux/generic/backport-5.15/020-v6.1-08-mm-multi-gen-LRU-support-page-table-walks.patch +++ b/target/linux/generic/backport-5.15/020-v6.1-08-mm-multi-gen-LRU-support-page-table-walks.patch @@ -398,7 +398,7 @@ Signed-off-by: Andrew Morton mmdrop(mm); } -@@ -2622,6 +2624,13 @@ pid_t kernel_clone(struct kernel_clone_a +@@ -2617,6 +2619,13 @@ pid_t kernel_clone(struct kernel_clone_a get_task_struct(p); } diff --git a/target/linux/generic/backport-5.15/050-v5.16-05-mips-bpf-Enable-eBPF-JITs.patch b/target/linux/generic/backport-5.15/050-v5.16-05-mips-bpf-Enable-eBPF-JITs.patch index 14763c1211e..24e4e9052b3 100644 --- a/target/linux/generic/backport-5.15/050-v5.16-05-mips-bpf-Enable-eBPF-JITs.patch +++ b/target/linux/generic/backport-5.15/050-v5.16-05-mips-bpf-Enable-eBPF-JITs.patch @@ -24,7 +24,7 @@ Signed-off-by: Johan Almbladh L: bpf@vger.kernel.org --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -57,7 +57,6 @@ config MIPS +@@ -58,7 +58,6 @@ config MIPS select HAVE_ARCH_TRACEHOOK select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES select HAVE_ASM_MODVERSIONS @@ -32,7 +32,7 @@ Signed-off-by: Johan Almbladh select HAVE_CONTEXT_TRACKING select HAVE_TIF_NOHZ select HAVE_C_RECORDMCOUNT -@@ -65,7 +64,10 @@ config MIPS +@@ -66,7 +65,10 @@ config MIPS select HAVE_DEBUG_STACKOVERFLOW select HAVE_DMA_CONTIGUOUS select HAVE_DYNAMIC_FTRACE diff --git a/target/linux/generic/hack-5.15/220-arm-gc_sections.patch b/target/linux/generic/hack-5.15/220-arm-gc_sections.patch index 0aa3eb840cd..dd6507c9178 100644 --- a/target/linux/generic/hack-5.15/220-arm-gc_sections.patch +++ b/target/linux/generic/hack-5.15/220-arm-gc_sections.patch @@ -12,7 +12,7 @@ Signed-off-by: Gabor Juhos --- --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -117,6 +117,7 @@ config ARM +@@ -118,6 +118,7 @@ config ARM select HAVE_UID16 select HAVE_VIRT_CPU_ACCOUNTING_GEN select IRQ_FORCED_THREADING diff --git a/target/linux/generic/pending-5.15/300-mips_expose_boot_raw.patch b/target/linux/generic/pending-5.15/300-mips_expose_boot_raw.patch index 436c2cc767c..0fcd415966e 100644 --- a/target/linux/generic/pending-5.15/300-mips_expose_boot_raw.patch +++ b/target/linux/generic/pending-5.15/300-mips_expose_boot_raw.patch @@ -9,7 +9,7 @@ Acked-by: Rob Landley --- --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -1101,9 +1101,6 @@ config FW_ARC +@@ -1102,9 +1102,6 @@ config FW_ARC config ARCH_MAY_HAVE_PC_FDC bool @@ -19,7 +19,7 @@ Acked-by: Rob Landley config CEVT_BCM1480 bool -@@ -3183,6 +3180,18 @@ choice +@@ -3184,6 +3181,18 @@ choice bool "Extend builtin kernel arguments with bootloader arguments" endchoice diff --git a/target/linux/generic/pending-5.15/920-mangle_bootargs.patch b/target/linux/generic/pending-5.15/920-mangle_bootargs.patch index 5f0a106ae4e..7e1f26d243f 100644 --- a/target/linux/generic/pending-5.15/920-mangle_bootargs.patch +++ b/target/linux/generic/pending-5.15/920-mangle_bootargs.patch @@ -31,7 +31,7 @@ Signed-off-by: Imre Kaloz help --- a/init/main.c +++ b/init/main.c -@@ -616,6 +616,29 @@ static inline void setup_nr_cpu_ids(void +@@ -614,6 +614,29 @@ static inline void setup_nr_cpu_ids(void static inline void smp_prepare_cpus(unsigned int maxcpus) { } #endif @@ -61,7 +61,7 @@ Signed-off-by: Imre Kaloz /* * We need to store the untouched command line for future reference. * We also need to store the touched command line since the parameter -@@ -956,6 +979,7 @@ asmlinkage __visible void __init __no_sa +@@ -953,6 +976,7 @@ asmlinkage __visible void __init __no_sa pr_notice("%s", linux_banner); early_security_init(); setup_arch(&command_line); diff --git a/target/linux/lantiq/patches-5.15/0152-lantiq-VPE.patch b/target/linux/lantiq/patches-5.15/0152-lantiq-VPE.patch index 6776d35ecec..25410e1fb71 100644 --- a/target/linux/lantiq/patches-5.15/0152-lantiq-VPE.patch +++ b/target/linux/lantiq/patches-5.15/0152-lantiq-VPE.patch @@ -15,7 +15,7 @@ Signed-off-by: Stefan Koch --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -2430,6 +2430,12 @@ config MIPS_VPE_LOADER +@@ -2431,6 +2431,12 @@ config MIPS_VPE_LOADER Includes a loader for loading an elf relocatable object onto another VPE and running it. diff --git a/target/linux/mediatek/patches-5.15/901-arm-add-cmdline-override.patch b/target/linux/mediatek/patches-5.15/901-arm-add-cmdline-override.patch index 636452bebb8..a22a1124e9d 100644 --- a/target/linux/mediatek/patches-5.15/901-arm-add-cmdline-override.patch +++ b/target/linux/mediatek/patches-5.15/901-arm-add-cmdline-override.patch @@ -1,6 +1,6 @@ --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -1729,6 +1729,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN +@@ -1730,6 +1730,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN endchoice diff --git a/target/linux/mvebu/patches-5.15/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/mvebu/patches-5.15/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch index 9069de16146..d064b801ecf 100644 --- a/target/linux/mvebu/patches-5.15/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch +++ b/target/linux/mvebu/patches-5.15/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch @@ -28,7 +28,7 @@ Signed-off-by: Michael Gray --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -1727,6 +1727,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN +@@ -1728,6 +1728,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN The command-line arguments provided by the boot loader will be appended to the the device tree bootargs property. @@ -247,7 +247,7 @@ Signed-off-by: Michael Gray } --- a/init/main.c +++ b/init/main.c -@@ -114,6 +114,10 @@ +@@ -112,6 +112,10 @@ #include @@ -258,7 +258,7 @@ Signed-off-by: Michael Gray static int kernel_init(void *); extern void init_IRQ(void); -@@ -991,6 +995,18 @@ asmlinkage __visible void __init __no_sa +@@ -988,6 +992,18 @@ asmlinkage __visible void __init __no_sa page_alloc_init(); pr_notice("Kernel command line: %s\n", saved_command_line); diff --git a/target/linux/octeon/patches-5.15/100-mips_image_cmdline_hack.patch b/target/linux/octeon/patches-5.15/100-mips_image_cmdline_hack.patch index 4b225277f9d..785fc1273c3 100644 --- a/target/linux/octeon/patches-5.15/100-mips_image_cmdline_hack.patch +++ b/target/linux/octeon/patches-5.15/100-mips_image_cmdline_hack.patch @@ -10,7 +10,7 @@ Signed-off-by: Gabor Juhos --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -1181,6 +1181,10 @@ config MIPS_MSC +@@ -1182,6 +1182,10 @@ config MIPS_MSC config SYNC_R4K bool diff --git a/target/linux/oxnas/patches-5.15/996-generic-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/oxnas/patches-5.15/996-generic-Mangle-bootloader-s-kernel-arguments.patch index c64c193e7ee..1e04b9daf58 100644 --- a/target/linux/oxnas/patches-5.15/996-generic-Mangle-bootloader-s-kernel-arguments.patch +++ b/target/linux/oxnas/patches-5.15/996-generic-Mangle-bootloader-s-kernel-arguments.patch @@ -22,7 +22,7 @@ Signed-off-by: Adrian Panella --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -1727,6 +1727,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN +@@ -1728,6 +1728,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN The command-line arguments provided by the boot loader will be appended to the the device tree bootargs property. @@ -228,7 +228,7 @@ Signed-off-by: Adrian Panella } --- a/init/main.c +++ b/init/main.c -@@ -114,6 +114,10 @@ +@@ -112,6 +112,10 @@ #include @@ -239,7 +239,7 @@ Signed-off-by: Adrian Panella static int kernel_init(void *); extern void init_IRQ(void); -@@ -991,6 +995,18 @@ asmlinkage __visible void __init __no_sa +@@ -988,6 +992,18 @@ asmlinkage __visible void __init __no_sa page_alloc_init(); pr_notice("Kernel command line: %s\n", saved_command_line); diff --git a/target/linux/ramips/patches-5.15/314-MIPS-add-bootargs-override-property.patch b/target/linux/ramips/patches-5.15/314-MIPS-add-bootargs-override-property.patch index ef45aac61bd..e7dca7af886 100644 --- a/target/linux/ramips/patches-5.15/314-MIPS-add-bootargs-override-property.patch +++ b/target/linux/ramips/patches-5.15/314-MIPS-add-bootargs-override-property.patch @@ -17,7 +17,7 @@ Signed-off-by: David Bauer --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c -@@ -545,8 +545,28 @@ static int __init bootcmdline_scan_chose +@@ -547,8 +547,28 @@ static int __init bootcmdline_scan_chose #endif /* CONFIG_OF_EARLY_FLATTREE */ @@ -46,7 +46,7 @@ Signed-off-by: David Bauer bool dt_bootargs = false; /* -@@ -560,6 +580,14 @@ static void __init bootcmdline_init(void +@@ -562,6 +582,14 @@ static void __init bootcmdline_init(void } /* diff --git a/target/linux/ramips/patches-5.15/315-owrt-hack-fix-mt7688-cache-issue.patch b/target/linux/ramips/patches-5.15/315-owrt-hack-fix-mt7688-cache-issue.patch index d49429f7a3b..4f9eec72714 100644 --- a/target/linux/ramips/patches-5.15/315-owrt-hack-fix-mt7688-cache-issue.patch +++ b/target/linux/ramips/patches-5.15/315-owrt-hack-fix-mt7688-cache-issue.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c -@@ -687,7 +687,6 @@ static void __init arch_mem_init(char ** +@@ -689,7 +689,6 @@ static void __init arch_mem_init(char ** mips_reserve_vmcore(); mips_parse_crashkernel(); @@ -18,7 +18,7 @@ Signed-off-by: John Crispin /* * In order to reduce the possibility of kernel panic when failed to -@@ -804,6 +803,7 @@ void __init setup_arch(char **cmdline_p) +@@ -806,6 +805,7 @@ void __init setup_arch(char **cmdline_p) cpu_cache_init(); paging_init(); diff --git a/target/linux/realtek/patches-5.15/300-mips-add-rtl838x-platform.patch b/target/linux/realtek/patches-5.15/300-mips-add-rtl838x-platform.patch index f853ef4feef..ed121a7ce72 100644 --- a/target/linux/realtek/patches-5.15/300-mips-add-rtl838x-platform.patch +++ b/target/linux/realtek/patches-5.15/300-mips-add-rtl838x-platform.patch @@ -25,7 +25,7 @@ Submitted-by: Birger Koblitz platform-$(CONFIG_SGI_IP28) += sgi-ip22/ --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -1054,8 +1054,58 @@ config NLM_XLP_BOARD +@@ -1055,8 +1055,58 @@ config NLM_XLP_BOARD This board is based on Netlogic XLP Processor. Say Y here if you have a XLP based board. diff --git a/target/linux/uml/patches-5.15/104-um-increase-default-virtual-physical-memory-to-64.patch b/target/linux/uml/patches-5.15/104-um-increase-default-virtual-physical-memory-to-64.patch index 3a67a7dbd07..f19e38d510b 100644 --- a/target/linux/uml/patches-5.15/104-um-increase-default-virtual-physical-memory-to-64.patch +++ b/target/linux/uml/patches-5.15/104-um-increase-default-virtual-physical-memory-to-64.patch @@ -29,7 +29,7 @@ Signed-off-by: Christian Lamparter --- a/arch/um/kernel/um_arch.c +++ b/arch/um/kernel/um_arch.c -@@ -130,7 +130,7 @@ static int have_root __initdata; +@@ -131,7 +131,7 @@ static int have_root __initdata; static int have_console __initdata; /* Set in uml_mem_setup and modified in linux_main */ diff --git a/target/linux/x86/config-5.15 b/target/linux/x86/config-5.15 index aebe4f08c4a..cf94f3bbff2 100644 --- a/target/linux/x86/config-5.15 +++ b/target/linux/x86/config-5.15 @@ -66,6 +66,7 @@ CONFIG_CPU_SUP_INTEL=y CONFIG_CPU_SUP_TRANSMETA_32=y CONFIG_CPU_SUP_UMC_32=y CONFIG_CPU_SUP_ZHAOXIN=y +CONFIG_CPU_SRSO=y CONFIG_CPU_UNRET_ENTRY=y CONFIG_CRASH_CORE=y CONFIG_CRC16=y @@ -116,6 +117,7 @@ CONFIG_FUSION=y CONFIG_FUSION_MAX_SGE=128 CONFIG_FUSION_SPI=y CONFIG_FW_LOADER_PAGED_BUF=y +# CONFIG_GDS_FORCE_MITIGATION is not set CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_CLOCKEVENTS=y From 549e710fc0c29dbd5ec7a8d483487e8369e7d40f Mon Sep 17 00:00:00 2001 From: John Audia Date: Wed, 9 Aug 2023 20:39:02 -0400 Subject: [PATCH 26/27] kernel: bump 6.1 to 6.1.43 1. Disable Ampere errata fix in target/linux/generic/config-6.1 2. Update kernel Changelog: https://lore.kernel.org/stable/2023061431-modular-data-8489@gregkh/ Manually rebased: bcm27xx/patches-6.1/950-0359-xhci-quirks-add-link-TRB-quirk-for-VL805.patch bcm27xx/patches-6.1/950-0362-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch bcm27xx/patches-6.1/950-0390-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch bcm27xx/patches-6.1/950-0469-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch bcm27xx/patches-6.1/950-0520-xhci-constrain-XHCI_VLI_HUB_TT_QUIRK-to-old-firmware.patch All other patches automatically rebased. Build system: x86/64 Build-tested: x86/64/AMD Cezanne, filogic/xiaomi_redmi-router-ax6000-ubootmod Run-tested: x86/64/AMD Cezanne, filogic/xiaomi_redmi-router-ax6000-ubootmod Signed-off-by: John Audia --- include/kernel-6.1 | 4 ++-- ...rkaround-for-bogus-SET_DEQ_PENDING-endpoi.patch | 2 +- ...-xhci-quirks-add-link-TRB-quirk-for-VL805.patch | 14 +++++++++----- ...or-out-TRBS_PER_SEGMENT-define-in-runtime.patch | 4 ++-- ...0362-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch | 4 ++-- ...d-a-quirk-for-Superspeed-bulk-OUT-transfe.patch | 10 +++++----- ...hci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch | 6 +++--- ...count-for-num_trbs_free-when-invalidating.patch | 8 ++++---- ...0-0469-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch | 8 ++++---- ...ain-XHCI_VLI_HUB_TT_QUIRK-to-old-firmware.patch | 2 +- target/linux/generic/config-6.1 | 1 + .../780-usb-net-MeigLink_modem_support.patch | 2 +- ...irqchip-bcm-6345-l1-request-memory-region.patch | 4 ++-- .../patches-6.1/901-arm-add-cmdline-override.patch | 2 +- 14 files changed, 38 insertions(+), 33 deletions(-) diff --git a/include/kernel-6.1 b/include/kernel-6.1 index 0bcf420f427..372de167671 100644 --- a/include/kernel-6.1 +++ b/include/kernel-6.1 @@ -1,2 +1,2 @@ -LINUX_VERSION-6.1 = .42 -LINUX_KERNEL_HASH-6.1.42 = aaf8261b551c8b76b81eab8780b446e88cea4d551ae517ac3a9b2dbdbd381ed3 +LINUX_VERSION-6.1 = .43 +LINUX_KERNEL_HASH-6.1.43 = 245248470a62d4e94b46f753afc01e19e45b9e6f3a0fa06e7f5da21fe845a808 diff --git a/target/linux/bcm27xx/patches-6.1/950-0327-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch b/target/linux/bcm27xx/patches-6.1/950-0327-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch index 6b2f3a9ad13..db15c65809f 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0327-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0327-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch @@ -26,7 +26,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -697,9 +697,9 @@ deq_found: +@@ -674,9 +674,9 @@ deq_found: } if ((ep->ep_state & SET_DEQ_PENDING)) { diff --git a/target/linux/bcm27xx/patches-6.1/950-0359-xhci-quirks-add-link-TRB-quirk-for-VL805.patch b/target/linux/bcm27xx/patches-6.1/950-0359-xhci-quirks-add-link-TRB-quirk-for-VL805.patch index b90f9f7d8b8..f5e57172b4e 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0359-xhci-quirks-add-link-TRB-quirk-for-VL805.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0359-xhci-quirks-add-link-TRB-quirk-for-VL805.patch @@ -22,17 +22,21 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -296,6 +296,7 @@ static void xhci_pci_quirks(struct devic - if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) { +@@ -293,8 +293,10 @@ static void xhci_pci_quirks(struct devic + pdev->device == 0x3432) + xhci->quirks |= XHCI_BROKEN_STREAMS; + +- if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) ++ if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) { xhci->quirks |= XHCI_LPM_SUPPORT; - xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS; + xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; - } ++ } if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && + pdev->device == PCI_DEVICE_ID_ASMEDIA_1042_XHCI) { --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -687,6 +687,15 @@ static int xhci_move_dequeue_past_td(str +@@ -664,6 +664,15 @@ static int xhci_move_dequeue_past_td(str } while (!cycle_found || !td_last_trb_found); deq_found: diff --git a/target/linux/bcm27xx/patches-6.1/950-0361-xhci-refactor-out-TRBS_PER_SEGMENT-define-in-runtime.patch b/target/linux/bcm27xx/patches-6.1/950-0361-xhci-refactor-out-TRBS_PER_SEGMENT-define-in-runtime.patch index 8b78e640616..8e033b751d5 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0361-xhci-refactor-out-TRBS_PER_SEGMENT-define-in-runtime.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0361-xhci-refactor-out-TRBS_PER_SEGMENT-define-in-runtime.patch @@ -204,7 +204,7 @@ Signed-off-by: Jonathan Bell xhci_err(xhci, "Tried to move enqueue past ring segment\n"); return; } -@@ -3123,7 +3126,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd +@@ -3100,7 +3103,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd * that clears the EHB. */ while (xhci_handle_event(xhci) > 0) { @@ -213,7 +213,7 @@ Signed-off-by: Jonathan Bell continue; xhci_update_erst_dequeue(xhci, event_ring_deq); event_ring_deq = xhci->event_ring->dequeue; -@@ -3265,7 +3268,8 @@ static int prepare_ring(struct xhci_hcd +@@ -3242,7 +3245,8 @@ static int prepare_ring(struct xhci_hcd } } diff --git a/target/linux/bcm27xx/patches-6.1/950-0362-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch b/target/linux/bcm27xx/patches-6.1/950-0362-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch index df2cc5d79b6..98cd413151a 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0362-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0362-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch @@ -53,9 +53,9 @@ Signed-off-by: Jonathan Bell cycle_state, type, max_packet, flags); --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -297,6 +297,7 @@ static void xhci_pci_quirks(struct devic +@@ -296,6 +296,7 @@ static void xhci_pci_quirks(struct devic + if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) { xhci->quirks |= XHCI_LPM_SUPPORT; - xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS; xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; + xhci->quirks |= XHCI_VLI_TRB_CACHE_BUG; } diff --git a/target/linux/bcm27xx/patches-6.1/950-0390-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch b/target/linux/bcm27xx/patches-6.1/950-0390-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch index 7ec1e3843e3..5ae9808cddf 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0390-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0390-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch @@ -26,8 +26,8 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -298,6 +298,7 @@ static void xhci_pci_quirks(struct devic - xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS; +@@ -297,6 +297,7 @@ static void xhci_pci_quirks(struct devic + xhci->quirks |= XHCI_LPM_SUPPORT; xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; xhci->quirks |= XHCI_VLI_TRB_CACHE_BUG; + xhci->quirks |= XHCI_VLI_SS_BULK_OUT_BUG; @@ -36,7 +36,7 @@ Signed-off-by: Jonathan Bell if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -3578,14 +3578,15 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3555,14 +3555,15 @@ int xhci_queue_bulk_tx(struct xhci_hcd * unsigned int num_trbs; unsigned int start_cycle, num_sgs = 0; unsigned int enqd_len, block_len, trb_buff_len, full_len; @@ -54,7 +54,7 @@ Signed-off-by: Jonathan Bell full_len = urb->transfer_buffer_length; /* If we have scatter/gather list, we use it. */ if (urb->num_sgs && !(urb->transfer_flags & URB_DMA_MAP_SINGLE)) { -@@ -3622,6 +3623,17 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3599,6 +3600,17 @@ int xhci_queue_bulk_tx(struct xhci_hcd * start_cycle = ring->cycle_state; send_addr = addr; @@ -72,7 +72,7 @@ Signed-off-by: Jonathan Bell /* Queue the TRBs, even if they are zero-length */ for (enqd_len = 0; first_trb || enqd_len < full_len; enqd_len += trb_buff_len) { -@@ -3634,6 +3646,11 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3611,6 +3623,11 @@ int xhci_queue_bulk_tx(struct xhci_hcd * if (enqd_len + trb_buff_len > full_len) trb_buff_len = full_len - enqd_len; diff --git a/target/linux/bcm27xx/patches-6.1/950-0392-usb-xhci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch b/target/linux/bcm27xx/patches-6.1/950-0392-usb-xhci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch index cb1389b4028..b2e7903df11 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0392-usb-xhci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0392-usb-xhci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch @@ -13,7 +13,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -3578,7 +3578,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3555,7 +3555,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * unsigned int num_trbs; unsigned int start_cycle, num_sgs = 0; unsigned int enqd_len, block_len, trb_buff_len, full_len; @@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell u32 field, length_field, remainder, maxpacket; u64 addr, send_addr; -@@ -3624,14 +3624,9 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3601,14 +3601,9 @@ int xhci_queue_bulk_tx(struct xhci_hcd * send_addr = addr; if (xhci->quirks & XHCI_VLI_SS_BULK_OUT_BUG && @@ -40,7 +40,7 @@ Signed-off-by: Jonathan Bell } /* Queue the TRBs, even if they are zero-length */ -@@ -3646,7 +3641,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3623,7 +3618,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * if (enqd_len + trb_buff_len > full_len) trb_buff_len = full_len - enqd_len; diff --git a/target/linux/bcm27xx/patches-6.1/950-0438-usb-xhci-account-for-num_trbs_free-when-invalidating.patch b/target/linux/bcm27xx/patches-6.1/950-0438-usb-xhci-account-for-num_trbs_free-when-invalidating.patch index e67561ce095..f604759c2ff 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0438-usb-xhci-account-for-num_trbs_free-when-invalidating.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0438-usb-xhci-account-for-num_trbs_free-when-invalidating.patch @@ -31,7 +31,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -1035,11 +1035,13 @@ static int xhci_invalidate_cancelled_tds +@@ -1012,11 +1012,13 @@ static int xhci_invalidate_cancelled_tds td->urb->stream_id, td->urb, cached_td->urb->stream_id, cached_td->urb); cached_td = td; @@ -45,7 +45,7 @@ Signed-off-by: Jonathan Bell } } -@@ -1287,10 +1289,7 @@ static void update_ring_for_set_deq_comp +@@ -1264,10 +1266,7 @@ static void update_ring_for_set_deq_comp unsigned int ep_index) { union xhci_trb *dequeue_temp; @@ -56,7 +56,7 @@ Signed-off-by: Jonathan Bell dequeue_temp = ep_ring->dequeue; /* If we get two back-to-back stalls, and the first stalled transfer -@@ -1305,8 +1304,6 @@ static void update_ring_for_set_deq_comp +@@ -1282,8 +1281,6 @@ static void update_ring_for_set_deq_comp } while (ep_ring->dequeue != dev->eps[ep_index].queued_deq_ptr) { @@ -65,7 +65,7 @@ Signed-off-by: Jonathan Bell ep_ring->dequeue++; if (trb_is_link(ep_ring->dequeue)) { if (ep_ring->dequeue == -@@ -1316,15 +1313,10 @@ static void update_ring_for_set_deq_comp +@@ -1293,15 +1290,10 @@ static void update_ring_for_set_deq_comp ep_ring->dequeue = ep_ring->deq_seg->trbs; } if (ep_ring->dequeue == dequeue_temp) { diff --git a/target/linux/bcm27xx/patches-6.1/950-0469-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch b/target/linux/bcm27xx/patches-6.1/950-0469-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch index 29f4ce16849..e7a512b4bf3 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0469-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0469-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch @@ -30,7 +30,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -299,6 +299,7 @@ static void xhci_pci_quirks(struct devic +@@ -298,6 +298,7 @@ static void xhci_pci_quirks(struct devic xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; xhci->quirks |= XHCI_VLI_TRB_CACHE_BUG; xhci->quirks |= XHCI_VLI_SS_BULK_OUT_BUG; @@ -40,7 +40,7 @@ Signed-off-by: Jonathan Bell if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -3555,6 +3555,48 @@ static int xhci_align_td(struct xhci_hcd +@@ -3532,6 +3532,48 @@ static int xhci_align_td(struct xhci_hcd return 1; } @@ -89,7 +89,7 @@ Signed-off-by: Jonathan Bell /* This is very similar to what ehci-q.c qtd_fill() does */ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, struct urb *urb, int slot_id, unsigned int ep_index) -@@ -3723,6 +3765,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3700,6 +3742,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd * } check_trb_math(urb, enqd_len); @@ -98,7 +98,7 @@ Signed-off-by: Jonathan Bell giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, start_cycle, start_trb); return 0; -@@ -3858,6 +3902,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd * +@@ -3835,6 +3879,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd * /* Event on completion */ field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state); diff --git a/target/linux/bcm27xx/patches-6.1/950-0520-xhci-constrain-XHCI_VLI_HUB_TT_QUIRK-to-old-firmware.patch b/target/linux/bcm27xx/patches-6.1/950-0520-xhci-constrain-XHCI_VLI_HUB_TT_QUIRK-to-old-firmware.patch index 662f2d360cf..b35584c7866 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0520-xhci-constrain-XHCI_VLI_HUB_TT_QUIRK-to-old-firmware.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0520-xhci-constrain-XHCI_VLI_HUB_TT_QUIRK-to-old-firmware.patch @@ -41,7 +41,7 @@ Signed-off-by: Jonathan Bell static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) { struct pci_dev *pdev = to_pci_dev(dev); -@@ -299,7 +311,8 @@ static void xhci_pci_quirks(struct devic +@@ -298,7 +310,8 @@ static void xhci_pci_quirks(struct devic xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; xhci->quirks |= XHCI_VLI_TRB_CACHE_BUG; xhci->quirks |= XHCI_VLI_SS_BULK_OUT_BUG; diff --git a/target/linux/generic/config-6.1 b/target/linux/generic/config-6.1 index 8ba82f42227..52a283237f0 100644 --- a/target/linux/generic/config-6.1 +++ b/target/linux/generic/config-6.1 @@ -181,6 +181,7 @@ CONFIG_ALLOW_DEV_COREDUMP=y # CONFIG_AMD_XGBE_HAVE_ECC is not set # CONFIG_AMIGA_PARTITION is not set # CONFIG_AMILO_RFKILL is not set +# CONFIG_AMPERE_ERRATUM_AC03_CPU_38 is not set # CONFIG_AMT is not set # CONFIG_ANDROID is not set # CONFIG_ANDROID_BINDER_IPC is not set diff --git a/target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch b/target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch index 64241c4801b..9ec5b539d39 100644 --- a/target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch +++ b/target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch @@ -29,7 +29,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support #define QUECTEL_VENDOR_ID 0x2c7c /* These Quectel products use Quectel's vendor ID */ -@@ -1177,6 +1179,11 @@ static const struct usb_device_id option +@@ -1179,6 +1181,11 @@ static const struct usb_device_id option .driver_info = ZLP }, { USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96), .driver_info = RSVD(4) }, diff --git a/target/linux/generic/pending-6.1/351-irqchip-bcm-6345-l1-request-memory-region.patch b/target/linux/generic/pending-6.1/351-irqchip-bcm-6345-l1-request-memory-region.patch index 91654cc294c..2675ca47910 100644 --- a/target/linux/generic/pending-6.1/351-irqchip-bcm-6345-l1-request-memory-region.patch +++ b/target/linux/generic/pending-6.1/351-irqchip-bcm-6345-l1-request-memory-region.patch @@ -91,7 +91,7 @@ Acked-by: Florian Fainelli --- a/drivers/irqchip/irq-bcm6345-l1.c +++ b/drivers/irqchip/irq-bcm6345-l1.c -@@ -257,6 +257,9 @@ static int __init bcm6345_l1_init_one(st +@@ -253,6 +253,9 @@ static int __init bcm6345_l1_init_one(st if (!cpu->map_base) return -ENOMEM; @@ -101,7 +101,7 @@ Acked-by: Florian Fainelli for (i = 0; i < n_words; i++) { cpu->enable_cache[i] = 0; __raw_writel(0, cpu->map_base + reg_enable(intc, i)); -@@ -335,8 +338,7 @@ static int __init bcm6345_l1_of_init(str +@@ -331,8 +334,7 @@ static int __init bcm6345_l1_of_init(str for_each_cpu(idx, &intc->cpumask) { struct bcm6345_l1_cpu *cpu = intc->cpus[idx]; diff --git a/target/linux/mediatek/patches-6.1/901-arm-add-cmdline-override.patch b/target/linux/mediatek/patches-6.1/901-arm-add-cmdline-override.patch index 602bac5d3d4..8e6c4363283 100644 --- a/target/linux/mediatek/patches-6.1/901-arm-add-cmdline-override.patch +++ b/target/linux/mediatek/patches-6.1/901-arm-add-cmdline-override.patch @@ -37,7 +37,7 @@ * CONFIG_CMDLINE is meant to be a default in case nothing else --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig -@@ -2202,6 +2202,14 @@ config CMDLINE_FORCE +@@ -2221,6 +2221,14 @@ config CMDLINE_FORCE endchoice From 1e0ee72b72747db4e92cb72834fd40d42b2194b7 Mon Sep 17 00:00:00 2001 From: John Audia Date: Tue, 8 Aug 2023 19:55:51 -0400 Subject: [PATCH 27/27] kernel: bump 6.1 to 6.1.44 Changelog: https://lore.kernel.org/stable/2023080822-repost-unfiled-2f01@gregkh/ All patches automatically rebased. Build system: x86/64 Build-tested: x86/64/AMD Cezanne, filogic/xiaomi_redmi-router-ax6000-ubootmod Run-tested: x86/64/AMD Cezanne, filogic/xiaomi_redmi-router-ax6000-ubootmod Signed-off-by: John Audia --- include/kernel-6.1 | 4 ++-- .../patches-6.1/221-armsr-disable_gc_sections_armv7.patch | 2 +- .../patches-6.1/202-mips-bmips-tweak-Kconfig-options.patch | 4 ++-- .../bmips/patches-6.1/600-mips-bmips-add-pci-support.patch | 2 +- target/linux/generic/hack-6.1/220-arm-gc_sections.patch | 2 +- .../generic/pending-6.1/300-mips_expose_boot_raw.patch | 4 ++-- target/linux/generic/pending-6.1/920-mangle_bootargs.patch | 4 ++-- .../0060-ARM-mach-qcom-fix-support-for-ipq806x.patch | 4 ++-- .../0067-generic-Mangle-bootloader-s-kernel-arguments.patch | 6 +++--- .../ipq806x/patches-6.1/900-arm-add-cmdline-override.patch | 2 +- .../mediatek/patches-6.1/901-arm-add-cmdline-override.patch | 2 +- .../300-mvebu-Mangle-bootloader-s-kernel-arguments.patch | 6 +++--- 12 files changed, 21 insertions(+), 21 deletions(-) diff --git a/include/kernel-6.1 b/include/kernel-6.1 index 372de167671..95d4bb19272 100644 --- a/include/kernel-6.1 +++ b/include/kernel-6.1 @@ -1,2 +1,2 @@ -LINUX_VERSION-6.1 = .43 -LINUX_KERNEL_HASH-6.1.43 = 245248470a62d4e94b46f753afc01e19e45b9e6f3a0fa06e7f5da21fe845a808 +LINUX_VERSION-6.1 = .44 +LINUX_KERNEL_HASH-6.1.44 = 2e51d41fe11d082ae167cee05772bb07ca7f19448d2b46772d8ca2db7673a1a5 diff --git a/target/linux/armsr/patches-6.1/221-armsr-disable_gc_sections_armv7.patch b/target/linux/armsr/patches-6.1/221-armsr-disable_gc_sections_armv7.patch index ef8493fa0d8..7c0b4b19202 100644 --- a/target/linux/armsr/patches-6.1/221-armsr-disable_gc_sections_armv7.patch +++ b/target/linux/armsr/patches-6.1/221-armsr-disable_gc_sections_armv7.patch @@ -13,7 +13,7 @@ Signed-off-by: Mathew McBride --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -123,7 +123,6 @@ config ARM +@@ -124,7 +124,6 @@ config ARM select HAVE_VIRT_CPU_ACCOUNTING_GEN select IRQ_FORCED_THREADING select LOCK_MM_AND_FIND_VMA diff --git a/target/linux/bmips/patches-6.1/202-mips-bmips-tweak-Kconfig-options.patch b/target/linux/bmips/patches-6.1/202-mips-bmips-tweak-Kconfig-options.patch index 36f8beb89f1..99d9947c962 100644 --- a/target/linux/bmips/patches-6.1/202-mips-bmips-tweak-Kconfig-options.patch +++ b/target/linux/bmips/patches-6.1/202-mips-bmips-tweak-Kconfig-options.patch @@ -13,7 +13,7 @@ Signed-off-by: Álvaro Fernández Rojas --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -274,19 +274,13 @@ config BMIPS_GENERIC +@@ -275,19 +275,13 @@ config BMIPS_GENERIC select SYNC_R4K select COMMON_CLK select BCM6345_L1_IRQ @@ -33,7 +33,7 @@ Signed-off-by: Álvaro Fernández Rojas select SWAP_IO_SPACE select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN -@@ -296,6 +290,7 @@ config BMIPS_GENERIC +@@ -297,6 +291,7 @@ config BMIPS_GENERIC select HAVE_PCI select PCI_DRIVERS_GENERIC select FW_CFE diff --git a/target/linux/bmips/patches-6.1/600-mips-bmips-add-pci-support.patch b/target/linux/bmips/patches-6.1/600-mips-bmips-add-pci-support.patch index e5c22bb17fd..d45a7a82393 100644 --- a/target/linux/bmips/patches-6.1/600-mips-bmips-add-pci-support.patch +++ b/target/linux/bmips/patches-6.1/600-mips-bmips-add-pci-support.patch @@ -14,7 +14,7 @@ Signed-off-by: Álvaro Fernández Rojas --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -288,7 +288,6 @@ config BMIPS_GENERIC +@@ -289,7 +289,6 @@ config BMIPS_GENERIC select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN select HARDIRQS_SW_RESEND select HAVE_PCI diff --git a/target/linux/generic/hack-6.1/220-arm-gc_sections.patch b/target/linux/generic/hack-6.1/220-arm-gc_sections.patch index b644739768d..a6a6c7cf2cc 100644 --- a/target/linux/generic/hack-6.1/220-arm-gc_sections.patch +++ b/target/linux/generic/hack-6.1/220-arm-gc_sections.patch @@ -12,7 +12,7 @@ Signed-off-by: Gabor Juhos --- --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -123,6 +123,7 @@ config ARM +@@ -124,6 +124,7 @@ config ARM select HAVE_VIRT_CPU_ACCOUNTING_GEN select IRQ_FORCED_THREADING select LOCK_MM_AND_FIND_VMA diff --git a/target/linux/generic/pending-6.1/300-mips_expose_boot_raw.patch b/target/linux/generic/pending-6.1/300-mips_expose_boot_raw.patch index 9e571a6d875..15d94f4d3c1 100644 --- a/target/linux/generic/pending-6.1/300-mips_expose_boot_raw.patch +++ b/target/linux/generic/pending-6.1/300-mips_expose_boot_raw.patch @@ -9,7 +9,7 @@ Acked-by: Rob Landley --- --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig -@@ -1034,9 +1034,6 @@ config FW_ARC +@@ -1035,9 +1035,6 @@ config FW_ARC config ARCH_MAY_HAVE_PC_FDC bool @@ -19,7 +19,7 @@ Acked-by: Rob Landley config CEVT_BCM1480 bool -@@ -3091,6 +3088,18 @@ choice +@@ -3092,6 +3089,18 @@ choice bool "Extend builtin kernel arguments with bootloader arguments" endchoice diff --git a/target/linux/generic/pending-6.1/920-mangle_bootargs.patch b/target/linux/generic/pending-6.1/920-mangle_bootargs.patch index 60ceff00d66..2017f04d0f3 100644 --- a/target/linux/generic/pending-6.1/920-mangle_bootargs.patch +++ b/target/linux/generic/pending-6.1/920-mangle_bootargs.patch @@ -31,7 +31,7 @@ Signed-off-by: Imre Kaloz help --- a/init/main.c +++ b/init/main.c -@@ -609,6 +609,29 @@ static inline void setup_nr_cpu_ids(void +@@ -607,6 +607,29 @@ static inline void setup_nr_cpu_ids(void static inline void smp_prepare_cpus(unsigned int maxcpus) { } #endif @@ -61,7 +61,7 @@ Signed-off-by: Imre Kaloz /* * We need to store the untouched command line for future reference. * We also need to store the touched command line since the parameter -@@ -957,6 +980,7 @@ asmlinkage __visible void __init __no_sa +@@ -954,6 +977,7 @@ asmlinkage __visible void __init __no_sa pr_notice("%s", linux_banner); early_security_init(); setup_arch(&command_line); diff --git a/target/linux/ipq806x/patches-6.1/0060-ARM-mach-qcom-fix-support-for-ipq806x.patch b/target/linux/ipq806x/patches-6.1/0060-ARM-mach-qcom-fix-support-for-ipq806x.patch index 40c45626106..47053260bb5 100644 --- a/target/linux/ipq806x/patches-6.1/0060-ARM-mach-qcom-fix-support-for-ipq806x.patch +++ b/target/linux/ipq806x/patches-6.1/0060-ARM-mach-qcom-fix-support-for-ipq806x.patch @@ -21,7 +21,7 @@ Signed-off-by: Christian Marangi --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -284,6 +284,7 @@ config PHYS_OFFSET +@@ -285,6 +285,7 @@ config PHYS_OFFSET default 0x30000000 if ARCH_S3C24XX default 0xa0000000 if ARCH_IOP32X || ARCH_PXA default 0xc0000000 if ARCH_EP93XX || ARCH_SA1100 @@ -29,7 +29,7 @@ Signed-off-by: Christian Marangi default 0 help Please provide the physical address corresponding to the -@@ -1703,7 +1704,7 @@ config CRASH_DUMP +@@ -1704,7 +1705,7 @@ config CRASH_DUMP config AUTO_ZRELADDR bool "Auto calculation of the decompressed kernel image address" if !ARCH_MULTIPLATFORM diff --git a/target/linux/ipq806x/patches-6.1/0067-generic-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/ipq806x/patches-6.1/0067-generic-Mangle-bootloader-s-kernel-arguments.patch index 15365322fb1..0305b7e4843 100644 --- a/target/linux/ipq806x/patches-6.1/0067-generic-Mangle-bootloader-s-kernel-arguments.patch +++ b/target/linux/ipq806x/patches-6.1/0067-generic-Mangle-bootloader-s-kernel-arguments.patch @@ -22,7 +22,7 @@ Signed-off-by: Adrian Panella --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -1587,6 +1587,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN +@@ -1588,6 +1588,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN The command-line arguments provided by the boot loader will be appended to the the device tree bootargs property. @@ -248,7 +248,7 @@ Signed-off-by: Adrian Panella } --- a/init/main.c +++ b/init/main.c -@@ -114,6 +114,10 @@ +@@ -112,6 +112,10 @@ #include @@ -259,7 +259,7 @@ Signed-off-by: Adrian Panella static int kernel_init(void *); extern void init_IRQ(void); -@@ -994,6 +998,18 @@ asmlinkage __visible void __init __no_sa +@@ -991,6 +995,18 @@ asmlinkage __visible void __init __no_sa pr_notice("Kernel command line: %s\n", saved_command_line); /* parameters may set static keys */ jump_label_init(); diff --git a/target/linux/ipq806x/patches-6.1/900-arm-add-cmdline-override.patch b/target/linux/ipq806x/patches-6.1/900-arm-add-cmdline-override.patch index e07947f4b48..20046325136 100644 --- a/target/linux/ipq806x/patches-6.1/900-arm-add-cmdline-override.patch +++ b/target/linux/ipq806x/patches-6.1/900-arm-add-cmdline-override.patch @@ -1,6 +1,6 @@ --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -1600,6 +1600,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGL +@@ -1601,6 +1601,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGL endchoice diff --git a/target/linux/mediatek/patches-6.1/901-arm-add-cmdline-override.patch b/target/linux/mediatek/patches-6.1/901-arm-add-cmdline-override.patch index 8e6c4363283..3978f52db13 100644 --- a/target/linux/mediatek/patches-6.1/901-arm-add-cmdline-override.patch +++ b/target/linux/mediatek/patches-6.1/901-arm-add-cmdline-override.patch @@ -1,6 +1,6 @@ --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -1588,6 +1588,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN +@@ -1589,6 +1589,14 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN endchoice diff --git a/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch index 5c3672659cd..7d40019020d 100644 --- a/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch +++ b/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch @@ -28,7 +28,7 @@ Signed-off-by: Michael Gray --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -1586,6 +1586,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN +@@ -1587,6 +1587,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN The command-line arguments provided by the boot loader will be appended to the the device tree bootargs property. @@ -247,7 +247,7 @@ Signed-off-by: Michael Gray } --- a/init/main.c +++ b/init/main.c -@@ -114,6 +114,10 @@ +@@ -112,6 +112,10 @@ #include @@ -258,7 +258,7 @@ Signed-off-by: Michael Gray static int kernel_init(void *); extern void init_IRQ(void); -@@ -992,6 +996,18 @@ asmlinkage __visible void __init __no_sa +@@ -989,6 +993,18 @@ asmlinkage __visible void __init __no_sa page_alloc_init(); pr_notice("Kernel command line: %s\n", saved_command_line);