toolchain: gcc: update GCC14 to 14.3

Remove upstreamed patches:
- 020-MIPS-Include-missing-mips16.S-in-libgcc-lib1funcs.S.patch
- 021-Reuse-scratch-registers-generated-by-LRA.patch

All other patches are automatically refreshed.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18891
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Shiji Yang 2025-05-23 21:09:01 +08:00 committed by Robert Marko
parent 086426a64e
commit ec4afc4c1b
9 changed files with 9 additions and 150 deletions

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@ -16,7 +16,7 @@ config GCC_VERSION
default "11.3.0" if GCC_VERSION_11
default "12.3.0" if GCC_VERSION_12
default "13.3.0" if GCC_VERSION_13
default "14.2.0"
default "14.3.0"
config GCC_USE_DEFAULT_VERSION
bool

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@ -42,8 +42,8 @@ ifeq ($(PKG_VERSION),13.3.0)
PKG_HASH:=0845e9621c9543a13f484e94584a49ffc0129970e9914624235fc1d061a0c083
endif
ifeq ($(PKG_VERSION),14.2.0)
PKG_HASH:=a7b39bc69cbf9e25826c5a60ab26477001f7c08d85cec04bc0e29cabed6f3cc9
ifeq ($(PKG_VERSION),14.3.0)
PKG_HASH:=e0dc77297625631ac8e50fa92fffefe899a4eb702592da5c32ef04e2293aca3a
endif
PATCH_DIR=../patches-$(GCC_MAJOR_VERSION).x

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@ -12,7 +12,7 @@ Date: Tue Feb 26 16:16:33 2013 +0000
--- a/gcc/Makefile.in
+++ b/gcc/Makefile.in
@@ -3549,18 +3549,10 @@ doc/gcc.info: $(TEXI_GCC_FILES)
@@ -3550,18 +3550,10 @@ doc/gcc.info: $(TEXI_GCC_FILES)
doc/gccint.info: $(TEXI_GCCINT_FILES)
doc/cppinternals.info: $(TEXI_CPPINT_FILES)

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@ -1,34 +0,0 @@
From 75892d97979f397a66730b97e8279941169e0316 Mon Sep 17 00:00:00 2001
From: YunQiang Su <syq@gcc.gnu.org>
Date: Fri, 23 Aug 2024 23:46:16 +0800
Subject: MIPS: Include missing mips16.S in libgcc/lib1funcs.S
mips16.S was missing since
commit 29b74545531f6afbee9fc38c267524326dbfbedf
Date: Thu Jun 1 10:14:24 2023 +0800
MIPS: Add speculation_barrier support
Without mips16.S included, some symbols will miss for mips16, and
so some software will fail to build.
libgcc/ChangeLog:
* config/mips/lib1funcs.S: Includes mips16.S.
(cherry picked from commit 9522fc8bb7812f2ad50eb038e0938bfd958e730f)
---
libgcc/config/mips/lib1funcs.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/libgcc/config/mips/lib1funcs.S
+++ b/libgcc/config/mips/lib1funcs.S
@@ -19,7 +19,7 @@ a copy of the GCC Runtime Library Except
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
<http://www.gnu.org/licenses/>. */
-//#include "mips16.S"
+#include "mips16.S"
#ifdef L_speculation_barrier

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@ -1,107 +0,0 @@
From 840e53f15468b1e808386c6190d7f59227b85495 Mon Sep 17 00:00:00 2001
Message-ID: <840e53f15468b1e808386c6190d7f59227b85495.1747165068.git.mschiffer@universe-factory.net>
From: Denis Chertykov <chertykov@gmail.com>
Date: Thu, 17 Oct 2024 11:12:38 +0400
Subject: [PATCH] Reuse scratch registers generated by LRA
Test file: udivmoddi.c
problem insn: 484
Before LRA pass we have:
(insn 484 483 485 72 (parallel [
(set (reg/v:SI 143 [ __q1 ])
(plus:SI (reg/v:SI 143 [ __q1 ])
(const_int -2 [0xfffffffffffffffe])))
(clobber (scratch:QI))
]) "udivmoddi.c":163:405 discrim 5 186 {addsi3}
(nil))
LRA substitute all scratches with new pseudos, so we have:
(insn 484 483 485 72 (parallel [
(set (reg/v:SI 143 [ __q1 ])
(plus:SI (reg/v:SI 143 [ __q1 ])
(const_int -2 [0xfffffffffffffffe])))
(clobber (reg:QI 619))
]) "/mnt/d/avr-lra/udivmoddi.c":163:405 discrim 5 186 {addsi3}
(expr_list:REG_UNUSED (reg:QI 619)
(nil)))
Pseudo 619 is a special scratch register generated by LRA which is marked in `scratch_bitmap' and can be tested by call `ira_former_scratch_p(regno)'.
In dump file (udivmoddi.c.317r.reload) we have:
Creating newreg=619
Removing SCRATCH to p619 in insn #484 (nop 3)
rescanning insn with uid = 484.
After that LRA tries to spill (reg:QI 619)
It's a bug because (reg:QI 619) is an output scratch register which is already something like spill register.
Fragment from udivmoddi.c.317r.reload:
Choosing alt 2 in insn 484: (0) r (1) 0 (2) nYnn (3) &d {addsi3}
Creating newreg=728 from oldreg=619, assigning class LD_REGS to r728
IMHO: the bug is in lra-constraints.cc in function `get_reload_reg'
fragment of `get_reload_reg':
if (type == OP_OUT)
{
/* Output reload registers tend to start out with a conservative
choice of register class. Usually this is ALL_REGS, although
a target might narrow it (for performance reasons) through
targetm.preferred_reload_class. It's therefore quite common
for a reload instruction to require a more restrictive class
than the class that was originally assigned to the reload register.
In these situations, it's more efficient to refine the choice
of register class rather than create a second reload register.
This also helps to avoid cycling for registers that are only
used by reload instructions. */
if (REG_P (original)
&& (int) REGNO (original) >= new_regno_start
&& INSN_UID (curr_insn) >= new_insn_uid_start
__________________________________^^
&& in_class_p (original, rclass, &new_class, true))
{
unsigned int regno = REGNO (original);
if (lra_dump_file != NULL)
{
fprintf (lra_dump_file, " Reuse r%d for output ", regno);
dump_value_slim (lra_dump_file, original, 1);
}
This condition incorrectly limits register reuse to ONLY newly generated instructions.
i.e. LRA can reuse registers only from insns generated by himself.
IMHO:It's wrong.
Scratch registers generated by LRA also have to be reused.
The patch is very simple.
On x86_64, it bootstraps+regtests fine.
gcc/
PR target/116550
PR target/119340
* lra-constraints.cc (get_reload_reg): Reuse scratch registers
generated by LRA.
(cherry picked from commit e7393cbb5f2cae50b42713e71984064073aa378a)
---
gcc/lra-constraints.cc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/gcc/lra-constraints.cc b/gcc/lra-constraints.cc
index 10e3d4e4097..d44c73e59c8 100644
--- a/gcc/lra-constraints.cc
+++ b/gcc/lra-constraints.cc
@@ -676,7 +676,8 @@ get_reload_reg (enum op_type type, machine_mode mode, rtx original,
used by reload instructions. */
if (REG_P (original)
&& (int) REGNO (original) >= new_regno_start
- && INSN_UID (curr_insn) >= new_insn_uid_start
+ && (INSN_UID (curr_insn) >= new_insn_uid_start
+ || ira_former_scratch_p (REGNO (original)))
&& in_class_p (original, rclass, &new_class, true))
{
unsigned int regno = REGNO (original);
--
2.49.0

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@ -1,6 +1,6 @@
--- a/gcc/gcc.cc
+++ b/gcc/gcc.cc
@@ -985,7 +985,9 @@ proper position among the other output f
@@ -989,7 +989,9 @@ proper position among the other output f
#endif
#ifndef LINK_SSP_SPEC

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@ -31,7 +31,7 @@ Date: Mon Oct 19 23:26:09 2009 +0000
ifneq ($(LIBUNWIND),)
all: libunwind$(SHLIB_EXT)
libgcc_s$(SHLIB_EXT): libunwind$(SHLIB_EXT)
@@ -1174,6 +1175,10 @@ install-shared:
@@ -1177,6 +1178,10 @@ install-shared:
chmod 644 $(DESTDIR)$(inst_libdir)/libgcc_eh.a
$(RANLIB) $(DESTDIR)$(inst_libdir)/libgcc_eh.a

View file

@ -12,7 +12,7 @@ Signed-off-by: Konstantin Demin <rockdrilla@gmail.com>
--- a/libatomic/Makefile.am
+++ b/libatomic/Makefile.am
@@ -130,7 +130,6 @@ libatomic_la_LIBADD = $(foreach s,$(SIZES),$(addsuffix _$(s)_.lo,$(SIZEOBJS)))
@@ -130,7 +130,6 @@ libatomic_la_LIBADD = $(foreach s,$(SIZE
## On a target-specific basis, include alternates to be selected by IFUNC.
if HAVE_IFUNC
if ARCH_AARCH64_LINUX
@ -22,7 +22,7 @@ Signed-off-by: Konstantin Demin <rockdrilla@gmail.com>
endif
--- a/libatomic/Makefile.in
+++ b/libatomic/Makefile.in
@@ -452,7 +452,6 @@ M_SRC = $(firstword $(filter %/$(M_FILE), $(all_c_files)))
@@ -452,7 +452,6 @@ M_SRC = $(firstword $(filter %/$(M_FILE)
libatomic_la_LIBADD = $(foreach s,$(SIZES),$(addsuffix \
_$(s)_.lo,$(SIZEOBJS))) $(am__append_1) $(am__append_2) \
$(am__append_3) $(am__append_4)

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@ -7,7 +7,7 @@ Date: Sat Apr 21 03:02:39 2012 +0000
--- a/gcc/gcc.cc
+++ b/gcc/gcc.cc
@@ -10319,8 +10319,10 @@ getenv_spec_function (int argc, const ch
@@ -10337,8 +10337,10 @@ getenv_spec_function (int argc, const ch
}
if (!value)