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ipq806x: update Netgear R7800 device tree

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-add spi pins
-move mdio and rgmii pinctrl from gmac and mdio into pinmux node
-add i2c4 pinctrl into rpm node
-add pin details into several nodes
-update gmac1 and gmac2 parameters
-update mdio phy0 and phy4 registers by ddwrt devs findings
-fix i2c4 pin drive-strengh
-remove pcie pins as it's already present in ipq8065 DT

Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
This commit is contained in:
dissent1 2016-09-26 15:18:37 -04:00 committed by John Crispin
parent 71370d2c55
commit eb7307cb94
4 changed files with 309 additions and 182 deletions
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2
target/linux/ipq806x/config-4.4
View file

@ -301,6 +301,7 @@ CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4 CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_OF=y CONFIG_OF=y
CONFIG_OF_ADDRESS=y CONFIG_OF_ADDRESS=y
CONFIG_OF_ADDRESS_PCI=y CONFIG_OF_ADDRESS_PCI=y
@ -372,6 +373,7 @@ CONFIG_QCOM_GDSC=y
CONFIG_QCOM_GSBI=y CONFIG_QCOM_GSBI=y
CONFIG_QCOM_HFPLL=y CONFIG_QCOM_HFPLL=y
# CONFIG_QCOM_PM is not set # CONFIG_QCOM_PM is not set
CONFIG_QCOM_QFPROM=y
CONFIG_QCOM_SCM=y CONFIG_QCOM_SCM=y
CONFIG_QCOM_SCM_32=y CONFIG_QCOM_SCM_32=y
# CONFIG_QCOM_SMD is not set # CONFIG_QCOM_SMD is not set

112
target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
View file

@ -33,25 +33,13 @@
soc { soc {
pinmux@800000 { pinmux@800000 {
pinctrl-0 = <&mdio0_pins &rgmii2_pins>;
pinctrl-names = "default";
i2c4_pins: i2c4_pinmux { i2c4_pins: i2c4_pinmux {
mux {
pins = "gpio12", "gpio13"; pins = "gpio12", "gpio13";
function = "gsbi4"; function = "gsbi4";
bias-disable;
};
pcie0_pins: pcie0_pinmux {
mux {
pins = "gpio3";
function = "pcie1_rst";
drive-strength = <12>;
bias-disable;
};
};
pcie1_pins: pcie1_pinmux {
mux {
pins = "gpio48";
function = "pcie2_rst";
drive-strength = <12>; drive-strength = <12>;
bias-disable; bias-disable;
}; };
@ -87,6 +75,11 @@
drive-strength = <8>; drive-strength = <8>;
bias-disable; bias-disable;
}; };
clk {
pins = "gpio1";
input-disable;
};
}; };
rgmii2_pins: rgmii2_pins { rgmii2_pins: rgmii2_pins {
@ -97,6 +90,25 @@
drive-strength = <8>; drive-strength = <8>;
bias-disable; bias-disable;
}; };
tx {
pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
input-disable;
};
};
spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19", "gpio21";
function = "gsbi5";
drive-strength = <10>;
bias-none;
};
cs {
pins = "gpio20";
drive-strength = <12>;
};
}; };
}; };
@ -114,6 +126,30 @@
*/ */
}; };
gsbi5: gsbi@1a200000 {
qcom,mode = <GSBI_PROT_SPI>;
status = "ok";
spi4: spi@1a280000 {
status = "ok";
spi-max-frequency = <50000000>;
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
cs-gpios = <&qcom_pinmux 20 0>;
flash: m25p80@0 {
compatible = "s25fl512s";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <51200000>;
reg = <0>;
linux,part-probe = "qcom-smem";
};
};
};
sata-phy@1b400000 { sata-phy@1b400000 {
status = "ok"; status = "ok";
}; };
@ -236,8 +272,6 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>; gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 { phy0: ethernet-phy@0 {
device_type = "ethernet-phy"; device_type = "ethernet-phy";
@ -246,16 +280,34 @@
0x00004 0x7600000 /* PAD0_MODE */ 0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */ 0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */ 0x0000c 0x80 /* PAD6_MODE */
0x000e4 0x6a545 /* MAC_POWER_SEL */ 0x000e4 0xaa545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */ 0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */ 0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */ 0x00094 0x4e /* PORT6_STATUS */
0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
0x00978 0x19008643 /* QM_PORT1_CTRL0 */
0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
0x00980 0x19008643 /* QM_PORT2_CTRL0 */
0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
0x00988 0x19008643 /* QM_PORT3_CTRL0 */
0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
0x00990 0x19008643 /* QM_PORT4_CTRL0 */
0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
>; >;
}; };
phy4: ethernet-phy@4 { phy4: ethernet-phy@4 {
device_type = "ethernet-phy"; device_type = "ethernet-phy";
reg = <4>; reg = <4>;
qca,ar8327-initvals = <
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x0000c 0x80 /* PAD6_MODE */
>;
}; };
}; };
@ -263,9 +315,13 @@
status = "ok"; status = "ok";
phy-mode = "rgmii"; phy-mode = "rgmii";
qcom,id = <1>; qcom,id = <1>;
qcom,phy_mdio_addr = <4>;
pinctrl-0 = <&rgmii2_pins>; qcom,poll_required = <0>;
pinctrl-names = "default"; qcom,rgmii_delay = <1>;
qcom,phy_mii_type = <0>;
qcom,emulation = <0>;
qcom,irq = <255>;
mdiobus = <&mdio0>;
mtd-mac-address = <&art 6>; mtd-mac-address = <&art 6>;
@ -279,6 +335,13 @@
status = "ok"; status = "ok";
phy-mode = "sgmii"; phy-mode = "sgmii";
qcom,id = <2>; qcom,id = <2>;
qcom,phy_mdio_addr = <0>; /* none */
qcom,poll_required = <0>; /* no polling */
qcom,rgmii_delay = <0>;
qcom,phy_mii_type = <1>;
qcom,emulation = <0>;
qcom,irq = <258>;
mdiobus = <&mdio0>;
mtd-mac-address = <&art 0>; mtd-mac-address = <&art 0>;
@ -287,6 +350,11 @@
full-duplex; full-duplex;
}; };
}; };
rpm@108000 {
pinctrl-0 = <&i2c4_pins>;
pinctrl-names = "default";
};
}; };
gpio-keys { gpio-keys {

247
target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
View file

@ -2,6 +2,7 @@
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include <dt-bindings/clock/qcom,gcc-ipq806x.h> #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
#include <dt-bindings/mfd/qcom-rpm.h> #include <dt-bindings/mfd/qcom-rpm.h>
#include <dt-bindings/soc/qcom,gsbi.h> #include <dt-bindings/soc/qcom,gsbi.h>
#include <dt-bindings/reset/qcom,gcc-ipq806x.h> #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
@ -27,6 +28,7 @@
qcom,saw = <&saw0>; qcom,saw = <&saw0>;
clocks = <&kraitcc 0>; clocks = <&kraitcc 0>;
clock-names = "cpu"; clock-names = "cpu";
qcom,imem = <&imem>;
clock-latency = <100000>; clock-latency = <100000>;
core-supply = <&smb208_s2a>; core-supply = <&smb208_s2a>;
voltage-tolerance = <5>; voltage-tolerance = <5>;
@ -109,8 +111,12 @@
qcom,saw = <&saw1>; qcom,saw = <&saw1>;
clocks = <&kraitcc 1>; clocks = <&kraitcc 1>;
clock-names = "cpu"; clock-names = "cpu";
qcom,imem = <&imem>;
clock-latency = <100000>; clock-latency = <100000>;
core-supply = <&smb208_s2b>; core-supply = <&smb208_s2b>;
cooling-min-state = <0>;
cooling-max-state = <10>;
#cooling-cells = <2>;
operating-points-0-0 = < operating-points-0-0 = <
/* kHz uV */ /* kHz uV */
@ -175,9 +181,6 @@
600000 800000 600000 800000
384000 775000 384000 775000
>; >;
cooling-min-state = <0>;
cooling-max-state = <10>;
#cooling-cells = <2>;
}; };
L2: l2-cache { L2: l2-cache {
@ -288,11 +291,27 @@
ranges; ranges;
compatible = "simple-bus"; compatible = "simple-bus";
lpass@28100000 {
compatible = "qcom,lpass-cpu";
status = "disabled";
clocks = <&lcc AHBIX_CLK>,
<&lcc MI2S_OSR_CLK>,
<&lcc MI2S_BIT_CLK>;
clock-names = "ahbix-clk",
"mi2s-osr-clk",
"mi2s-bit-clk";
interrupts = <0 85 1>;
interrupt-names = "lpass-irq-lpaif";
reg = <0x28100000 0x10000>;
reg-names = "lpass-lpaif";
};
imem: memory@700000 { imem: memory@700000 {
compatible = "qcom,imem-ipq8064", "syscon"; compatible = "qcom,qfprom", "syscon";
reg = <0x00700000 0x1000>; reg = <0x00700000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
stride = <1>;
ranges = <0x0 0x00700000 0x1000>; ranges = <0x0 0x00700000 0x1000>;
}; };
@ -311,99 +330,74 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
smb208_s1a: smb208-s1a { smb208_regulators {
compatible = "qcom,rpm-smb208"; compatible = "qcom,rpm-smb208-regulators";
reg = <QCOM_RPM_SMB208_S1a>;
smb208_s1a: s1a {
regulator-min-microvolt = <1050000>; regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1150000>; regulator-max-microvolt = <1150000>;
qcom,switch-mode-frequency = <1200000>;
};
smb208_s1b: smb208-s1b {
compatible = "qcom,rpm-smb208";
reg = <QCOM_RPM_SMB208_S1b>;
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1150000>;
qcom,switch-mode-frequency = <1200000>; qcom,switch-mode-frequency = <1200000>;
}; };
smb208_s2a: smb208-s2a { smb208_s1b: s1b {
compatible = "qcom,rpm-smb208"; regulator-min-microvolt = <1050000>;
reg = <QCOM_RPM_SMB208_S2a>; regulator-max-microvolt = <1150000>;
qcom,switch-mode-frequency = <1200000>;
regulator-min-microvolt = < 800000>;
regulator-max-microvolt = <1275000>;
qcom,switch-mode-frequency = <1400000>;
}; };
smb208_s2b: smb208-s2b { smb208_s2a: s2a {
compatible = "qcom,rpm-smb208";
reg = <QCOM_RPM_SMB208_S2b>;
regulator-min-microvolt = < 800000>; regulator-min-microvolt = < 800000>;
regulator-max-microvolt = <1275000>; regulator-max-microvolt = <1275000>;
qcom,switch-mode-frequency = <1200000>;
qcom,switch-mode-frequency = <1400000>;
}; };
cxo_clk: cxo-clk { smb208_s2b: s2b {
regulator-min-microvolt = < 800000>;
regulator-max-microvolt = <1275000>;
qcom,switch-mode-frequency = <1200000>;
};
};
rpm_clocks {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "qcom,rpm-clk"; compatible = "qcom,rpm-clk";
qcom,rpm-clk-active-only;
cxo_clk: cxo {
reg = <QCOM_RPM_CXO_CLK>; reg = <QCOM_RPM_CXO_CLK>;
qcom,rpm-clk-name = "cxo"; qcom,rpm-clk-name = "cxo";
qcom,rpm-clk-freq = <25000000>; qcom,rpm-clk-freq = <25000000>;
qcom,rpm-clk-active-only;
}; };
pxo_clk: pxo-clk { pxo_clk: pxo {
#clock-cells = <0>;
compatible = "qcom,rpm-clk";
reg = <QCOM_RPM_PXO_CLK>; reg = <QCOM_RPM_PXO_CLK>;
qcom,rpm-clk-name = "pxo"; qcom,rpm-clk-name = "pxo";
qcom,rpm-clk-freq = <25000000>; qcom,rpm-clk-freq = <25000000>;
qcom,rpm-clk-active-only;
}; };
ebi1_clk: ebi1-clk { ebi1_clk: ebi1 {
#clock-cells = <0>;
compatible = "qcom,rpm-clk";
reg = <QCOM_RPM_EBI1_CLK>; reg = <QCOM_RPM_EBI1_CLK>;
qcom,rpm-clk-name = "ebi1"; qcom,rpm-clk-name = "ebi1";
qcom,rpm-clk-freq = <533000000>; qcom,rpm-clk-freq = <533000000>;
qcom,rpm-clk-active-only;
}; };
apps_fabric_clk: apps-fabric-clk { apps_fabric_clk: apps-fabric {
#clock-cells = <0>;
compatible = "qcom,rpm-clk";
reg = <QCOM_RPM_APPS_FABRIC_CLK>; reg = <QCOM_RPM_APPS_FABRIC_CLK>;
qcom,rpm-clk-name = "apps-fabric"; qcom,rpm-clk-name = "apps-fabric";
qcom,rpm-clk-freq = <533000000>; qcom,rpm-clk-freq = <533000000>;
qcom,rpm-clk-active-only;
}; };
nss_fabric0_clk: nss-fabric0-clk { nss_fabric0_clk: nss-fabric0 {
#clock-cells = <0>;
compatible = "qcom,rpm-clk";
reg = <QCOM_RPM_NSS_FABRIC_0_CLK>; reg = <QCOM_RPM_NSS_FABRIC_0_CLK>;
qcom,rpm-clk-name = "nss-fabric0"; qcom,rpm-clk-name = "nss-fabric0";
qcom,rpm-clk-freq = <533000000>; qcom,rpm-clk-freq = <533000000>;
qcom,rpm-clk-active-only;
}; };
nss_fabric1_clk: nss-fabric1-clk { nss_fabric1_clk: nss-fabric1 {
#clock-cells = <0>;
compatible = "qcom,rpm-clk";
reg = <QCOM_RPM_NSS_FABRIC_1_CLK>; reg = <QCOM_RPM_NSS_FABRIC_1_CLK>;
qcom,rpm-clk-name = "nss-fabric1"; qcom,rpm-clk-name = "nss-fabric1";
qcom,rpm-clk-freq = <266000000>; qcom,rpm-clk-freq = <266000000>;
qcom,rpm-clk-active-only; };
}; };
}; };
@ -445,7 +439,7 @@
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupts = <0 32 0x4>; interrupts = <0 16 0x4>;
pcie0_pins: pcie0_pinmux { pcie0_pins: pcie0_pinmux {
mux { mux {
@ -528,6 +522,44 @@
regulator; regulator;
}; };
gsbi1: gsbi@12440000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <1>;
reg = <0x12440000 0x100>;
clocks = <&gcc GSBI1_H_CLK>;
clock-names = "iface";
#address-cells = <1>;
#size-cells = <1>;
ranges;
status = "disabled";
syscon-tcsr = <&tcsr>;
uart1: serial@12450000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x12450000 0x1000>,
<0x12440000 0x1000>;
interrupts = <0 193 0x0>;
clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
};
i2c@12460000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x12460000 0x1000>;
interrupts = <0 194 0>;
clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
gsbi2: gsbi@12480000 { gsbi2: gsbi@12480000 {
compatible = "qcom,gsbi-v1.0.0"; compatible = "qcom,gsbi-v1.0.0";
cell-index = <2>; cell-index = <2>;
@ -653,6 +685,94 @@
}; };
}; };
gsbi6: gsbi@16500000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <6>;
reg = <0x16500000 0x100>;
clocks = <&gcc GSBI6_H_CLK>;
clock-names = "iface";
#address-cells = <1>;
#size-cells = <1>;
ranges;
status = "disabled";
syscon-tcsr = <&tcsr>;
uart6: serial@16540000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16540000 0x1000>,
<0x16500000 0x1000>;
interrupts = <0 156 0x0>;
clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
};
i2c@16580000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x16580000 0x1000>;
interrupts = <0 157 0>;
clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi@16580000 {
compatible = "qcom,spi-qup-v1.1.1";
reg = <0x16580000 0x1000>;
interrupts = <0 157 0>;
clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
gsbi7: gsbi@16600000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <7>;
reg = <0x16600000 0x100>;
clocks = <&gcc GSBI7_H_CLK>;
clock-names = "iface";
#address-cells = <1>;
#size-cells = <1>;
ranges;
status = "disabled";
syscon-tcsr = <&tcsr>;
uart7: serial@16640000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16640000 0x1000>,
<0x16600000 0x1000>;
interrupts = <0 158 0x0>;
clocks = <&gcc GSBI7_UART_CLK>, <&gcc GSBI7_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
};
i2c@16680000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x16680000 0x1000>;
interrupts = <0 159 0>;
clocks = <&gcc GSBI7_QUP_CLK>, <&gcc GSBI7_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
};
sata_phy: sata-phy@1b400000 { sata_phy: sata-phy@1b400000 {
compatible = "qcom,ipq806x-sata-phy"; compatible = "qcom,ipq806x-sata-phy";
reg = <0x1b400000 0x200>; reg = <0x1b400000 0x200>;
@ -699,6 +819,13 @@
#reset-cells = <1>; #reset-cells = <1>;
}; };
lcc: clock-controller@28000000 {
compatible = "qcom,lcc-ipq8064";
reg = <0x28000000 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
tcsr: syscon@1a400000 { tcsr: syscon@1a400000 {
compatible = "qcom,tcsr-ipq8064", "syscon"; compatible = "qcom,tcsr-ipq8064", "syscon";
reg = <0x1a400000 0x100>; reg = <0x1a400000 0x100>;
@ -1021,7 +1148,7 @@
gmac0: ethernet@37000000 { gmac0: ethernet@37000000 {
device_type = "network"; device_type = "network";
compatible = "qcom,ipq806x-gmac"; compatible = "qcom,ipq806x-gmac", "snps,dwmac";
reg = <0x37000000 0x200000>; reg = <0x37000000 0x200000>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq"; interrupt-names = "macirq";
@ -1040,7 +1167,7 @@
gmac1: ethernet@37200000 { gmac1: ethernet@37200000 {
device_type = "network"; device_type = "network";
compatible = "qcom,ipq806x-gmac"; compatible = "qcom,ipq806x-gmac", "snps,dwmac";
reg = <0x37200000 0x200000>; reg = <0x37200000 0x200000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq"; interrupt-names = "macirq";
@ -1059,7 +1186,7 @@
gmac2: ethernet@37400000 { gmac2: ethernet@37400000 {
device_type = "network"; device_type = "network";
compatible = "qcom,ipq806x-gmac"; compatible = "qcom,ipq806x-gmac", "snps,dwmac";
reg = <0x37400000 0x200000>; reg = <0x37400000 0x200000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq"; interrupt-names = "macirq";
@ -1078,7 +1205,7 @@
gmac3: ethernet@37600000 { gmac3: ethernet@37600000 {
device_type = "network"; device_type = "network";
compatible = "qcom,ipq806x-gmac"; compatible = "qcom,ipq806x-gmac", "snps,dwmac";
reg = <0x37600000 0x200000>; reg = <0x37600000 0x200000>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq"; interrupt-names = "macirq";

70
target/linux/ipq806x/patches-4.4/168-ARM-qcom-add-smb208-DT.patch
View file

@ -72,73 +72,3 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
}; };
}; };
--- a/arch/arm/boot/dts/qcom-ipq8065.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi
@@ -311,45 +311,37 @@
#address-cells = <1>;
#size-cells = <0>;
- smb208_s1a: smb208-s1a {
- compatible = "qcom,rpm-smb208";
- reg = <QCOM_RPM_SMB208_S1a>;
+ regulators {
+ compatible = "qcom,rpm-smb208-regulators";
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1150000>;
+ smb208_s1a: s1a {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1150000>;
- qcom,switch-mode-frequency = <1200000>;
+ qcom,switch-mode-frequency = <1200000>;
- };
-
- smb208_s1b: smb208-s1b {
- compatible = "qcom,rpm-smb208";
- reg = <QCOM_RPM_SMB208_S1b>;
-
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1150000>;
+ };
- qcom,switch-mode-frequency = <1200000>;
- };
-
- smb208_s2a: smb208-s2a {
- compatible = "qcom,rpm-smb208";
- reg = <QCOM_RPM_SMB208_S2a>;
+ smb208_s1b: s1b {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1150000>;
- regulator-min-microvolt = < 800000>;
- regulator-max-microvolt = <1275000>;
+ qcom,switch-mode-frequency = <1200000>;
+ };
- qcom,switch-mode-frequency = <1400000>;
- };
+ smb208_s2a: s2a {
+ regulator-min-microvolt = < 800000>;
+ regulator-max-microvolt = <1275000>;
- smb208_s2b: smb208-s2b {
- compatible = "qcom,rpm-smb208";
- reg = <QCOM_RPM_SMB208_S2b>;
+ qcom,switch-mode-frequency = <1200000>;
+ };
- regulator-min-microvolt = < 800000>;
- regulator-max-microvolt = <1275000>;
+ smb208_s2b: s2b {
+ regulator-min-microvolt = < 800000>;
+ regulator-max-microvolt = <1275000>;
- qcom,switch-mode-frequency = <1400000>;
+ qcom,switch-mode-frequency = <1200000>;
+ };
};
cxo_clk: cxo-clk {