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Merge branch 'openwrt:master' into master

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This commit is contained in:
Hayzam Sherif 2023-05-10 04:53:15 +05:30 committed by GitHub
commit e58537ae56
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GPG key ID: 4AEE18F83AFDEB23
26 changed files with 504 additions and 60 deletions
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10
include/image-commands.mk
View file

@ -103,16 +103,6 @@ define Build/append-rootfs
dd if=$(IMAGE_ROOTFS) >> $@
endef
define Build/append-squashfs-fakeroot-be
rm -rf $@.fakefs $@.fakesquashfs
mkdir $@.fakefs
$(STAGING_DIR_HOST)/bin/mksquashfs3-lzma \
$@.fakefs $@.fakesquashfs \
-noappend -root-owned -be -nopad -b 65536 \
$(if $(SOURCE_DATE_EPOCH),-fixed-time $(SOURCE_DATE_EPOCH))
cat $@.fakesquashfs >> $@
endef
define Build/append-squashfs4-fakeroot
rm -rf $@.fakefs $@.fakesquashfs
mkdir $@.fakefs

4
package/Makefile
View file

@ -92,6 +92,10 @@ $(curdir)/index: FORCE
$(call ERROR_MESSAGE,WARNING: Applying padding in $$d/Packages to workaround usign SHA-512 bug!); \
{ echo ""; echo ""; } >> Packages;; \
esac; \
echo -n '{"architecture": "$(ARCH_PACKAGES)", "packages":{' > index.json; \
sed -n -e 's/^Package: \(.*\)$$/"\1":/p' -e 's/^Version: \(.*\)$$/"\1",/p' Packages | tr '\n' ' ' >> index.json; \
echo '}}' >> index.json; \
sed -i 's/, }}/}}/' index.json; \
gzip -9nc Packages > Packages.gz; \
); done
ifdef CONFIG_SIGNED_PACKAGES

2
package/base-files/files/lib/preinit/10_indicate_preinit
View file

@ -95,8 +95,6 @@ preinit_config_board() {
json_select "network_device"
json_select "$netdev"
json_get_vars path path
next_eth="$(echo "$netdev" | grep 'eth[0-9]*' | tr -dc '[0-9]')"
[ "$next_eth" -gt "$max_eth" ] && max_eth=$next_eth
if [ -n "$path" -a -h "/sys/class/net/$netdev" ]; then
ip link set "$netdev" down
ip link set "$netdev" name eth$((++max_eth))

1
package/boot/uboot-envtools/files/ramips
View file

@ -19,6 +19,7 @@ alfa-network,r36m-e4g|\
alfa-network,tube-e4g|\
engenius,epg600|\
engenius,esr600h|\
linksys,re7000|\
sitecom,wlr-4100-v1-002|\
zyxel,keenetic-lite-iii-a)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x1000"

13
package/boot/uboot-rockchip/Makefile
View file

@ -35,6 +35,16 @@ define U-Boot/nanopi-r2s-rk3328
OF_PLATDATA:=$(1)
endef
define U-Boot/roc-cc-rk3328
BUILD_SUBTARGET:=armv8
NAME:=ROC-RK3328-CC
BUILD_DEVICES:= \
firefly_roc-rk3328-cc
DEPENDS:=+PACKAGE_u-boot-roc-cc-rk3328:arm-trusted-firmware-rockchip
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
ATF:=rk3328_bl31.elf
OF_PLATDATA:=$(1)
endef
# RK3399 boards
@ -72,7 +82,8 @@ UBOOT_TARGETS := \
nanopi-r4s-rk3399 \
rock-pi-4-rk3399 \
rockpro64-rk3399 \
nanopi-r2s-rk3328
nanopi-r2s-rk3328 \
roc-cc-rk3328
UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes

24
package/boot/uboot-rockchip/src/of-platdata/roc-cc-rk3328/dt-decl.h Normal file
View file

@ -0,0 +1,24 @@
/*
* DO NOT MODIFY
*
* Declares externs for all device/uclass instances.
* This was generated by dtoc from a .dtb (device tree binary) file.
*/
#include <dm/device-internal.h>
#include <dm/uclass-internal.h>
/* driver declarations - these allow DM_DRIVER_GET() to be used */
extern U_BOOT_DRIVER(rockchip_rk3328_cru);
extern U_BOOT_DRIVER(rockchip_rk3328_dmc);
extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
extern U_BOOT_DRIVER(ns16550_serial);
extern U_BOOT_DRIVER(rockchip_rk3328_grf);
/* uclass driver declarations - needed for DM_UCLASS_DRIVER_REF() */
extern UCLASS_DRIVER(clk);
extern UCLASS_DRIVER(mmc);
extern UCLASS_DRIVER(ram);
extern UCLASS_DRIVER(serial);
extern UCLASS_DRIVER(syscon);

189
package/boot/uboot-rockchip/src/of-platdata/roc-cc-rk3328/dt-plat.c Normal file
View file

@ -0,0 +1,189 @@
/*
* DO NOT MODIFY
*
* Declares the U_BOOT_DRIVER() records and platform data.
* This was generated by dtoc from a .dtb (device tree binary) file.
*/
/* Allow use of U_BOOT_DRVINFO() in this file */
#define DT_PLAT_C
#include <common.h>
#include <dm.h>
#include <dt-structs.h>
/*
* driver_info declarations, ordered by 'struct driver_info' linker_list idx:
*
* idx driver_info driver
* --- -------------------- --------------------
* 0: clock_controller_at_ff440000 rockchip_rk3328_cru
* 1: dmc rockchip_rk3328_dmc
* 2: mmc_at_ff500000 rockchip_rk3288_dw_mshc
* 3: mmc_at_ff520000 rockchip_rk3288_dw_mshc
* 4: serial_at_ff130000 ns16550_serial
* 5: syscon_at_ff100000 rockchip_rk3328_grf
* --- -------------------- --------------------
*/
/*
* Node /clock-controller@ff440000 index 0
* driver rockchip_rk3328_cru parent None
*/
static struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
.reg = {0xff440000, 0x1000},
.rockchip_grf = 0x3a,
};
U_BOOT_DRVINFO(clock_controller_at_ff440000) = {
.name = "rockchip_rk3328_cru",
.plat = &dtv_clock_controller_at_ff440000,
.plat_size = sizeof(dtv_clock_controller_at_ff440000),
.parent_idx = -1,
};
/*
* Node /dmc index 1
* driver rockchip_rk3328_dmc parent None
*/
static struct dtd_rockchip_rk3328_dmc dtv_dmc = {
.reg = {0xff400000, 0x1000, 0xff780000, 0x3000, 0xff100000, 0x1000, 0xff440000, 0x1000,
0xff720000, 0x1000, 0xff798000, 0x1000},
.rockchip_sdram_params = {0x1, 0xa, 0x2, 0x1, 0x0, 0x0, 0x11, 0x0,
0x11, 0x0, 0x0, 0x94291288, 0x0, 0x27, 0x462, 0x15,
0x242, 0xff, 0x14d, 0x0, 0x1, 0x0, 0x0, 0x0,
0x43049010, 0x64, 0x28003b, 0xd0, 0x20053, 0xd4, 0x220000, 0xd8,
0x100, 0xdc, 0x40000, 0xe0, 0x0, 0xe4, 0x110000, 0xe8,
0x420, 0xec, 0x400, 0xf4, 0xf011f, 0x100, 0x9060b06, 0x104,
0x20209, 0x108, 0x505040a, 0x10c, 0x40400c, 0x110, 0x5030206, 0x114,
0x3030202, 0x120, 0x3030b03, 0x124, 0x20208, 0x180, 0x1000040, 0x184,
0x0, 0x190, 0x7030003, 0x198, 0x5001100, 0x1a0, 0xc0400003, 0x240,
0x6000604, 0x244, 0x201, 0x250, 0xf00, 0x490, 0x1, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0x4, 0xc, 0x28, 0xa, 0x2c,
0x0, 0x30, 0x9, 0xffffffff, 0xffffffff, 0x77, 0x88, 0x79,
0x79, 0x87, 0x97, 0x87, 0x78, 0x77, 0x78, 0x87,
0x88, 0x87, 0x87, 0x77, 0x78, 0x78, 0x78, 0x78,
0x78, 0x78, 0x78, 0x78, 0x78, 0x69, 0x9, 0x77,
0x78, 0x77, 0x78, 0x77, 0x78, 0x77, 0x78, 0x77,
0x79, 0x9, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
0x78, 0x78, 0x78, 0x69, 0x9, 0x77, 0x78, 0x77,
0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x79, 0x9,
0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
0x78, 0x69, 0x9, 0x77, 0x78, 0x77, 0x78, 0x77,
0x78, 0x77, 0x78, 0x77, 0x79, 0x9, 0x78, 0x78,
0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x69,
0x9, 0x77, 0x78, 0x77, 0x77, 0x77, 0x77, 0x77,
0x77, 0x77, 0x79, 0x9},
};
U_BOOT_DRVINFO(dmc) = {
.name = "rockchip_rk3328_dmc",
.plat = &dtv_dmc,
.plat_size = sizeof(dtv_dmc),
.parent_idx = -1,
};
/*
* Node /mmc@ff500000 index 2
* driver rockchip_rk3288_dw_mshc parent None
*/
static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff500000 = {
.bus_width = 0x4,
.cap_mmc_highspeed = true,
.cap_sd_highspeed = true,
.clocks = {
{0, {317}},
{0, {33}},
{0, {74}},
{0, {78}},},
.disable_wp = true,
.fifo_depth = 0x100,
.interrupts = {0x0, 0xc, 0x4},
.max_frequency = 0x8f0d180,
.pinctrl_0 = {0x47, 0x48, 0x49, 0x4a},
.pinctrl_names = "default",
.reg = {0xff500000, 0x4000},
.sd_uhs_sdr104 = true,
.sd_uhs_sdr12 = true,
.sd_uhs_sdr25 = true,
.sd_uhs_sdr50 = true,
.u_boot_spl_fifo_mode = true,
.vmmc_supply = 0x4b,
.vqmmc_supply = 0x1e,
};
U_BOOT_DRVINFO(mmc_at_ff500000) = {
.name = "rockchip_rk3288_dw_mshc",
.plat = &dtv_mmc_at_ff500000,
.plat_size = sizeof(dtv_mmc_at_ff500000),
.parent_idx = -1,
};
/*
* Node /mmc@ff520000 index 3
* driver rockchip_rk3288_dw_mshc parent None
*/
static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff520000 = {
.bus_width = 0x8,
.cap_mmc_highspeed = true,
.clocks = {
{0, {319}},
{0, {35}},
{0, {76}},
{0, {80}},},
.fifo_depth = 0x100,
.interrupts = {0x0, 0xe, 0x4},
.max_frequency = 0x8f0d180,
.mmc_ddr_1_8v = true,
.mmc_hs200_1_8v = true,
.non_removable = true,
.pinctrl_0 = {0x4c, 0x4d, 0x4e, 0x0},
.pinctrl_names = "default",
.reg = {0xff520000, 0x4000},
.u_boot_spl_fifo_mode = true,
.vmmc_supply = 0x1c,
.vqmmc_supply = 0x1d,
};
U_BOOT_DRVINFO(mmc_at_ff520000) = {
.name = "rockchip_rk3288_dw_mshc",
.plat = &dtv_mmc_at_ff520000,
.plat_size = sizeof(dtv_mmc_at_ff520000),
.parent_idx = -1,
};
/*
* Node /serial@ff130000 index 4
* driver ns16550_serial parent None
*/
static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
.clock_frequency = 0x16e3600,
.clocks = {
{0, {40}},
{0, {212}},},
.dma_names = {"tx", "rx"},
.dmas = {0x10, 0x6, 0x10, 0x7},
.interrupts = {0x0, 0x39, 0x4},
.pinctrl_0 = 0x26,
.pinctrl_names = "default",
.reg = {0xff130000, 0x100},
.reg_io_width = 0x4,
.reg_shift = 0x2,
};
U_BOOT_DRVINFO(serial_at_ff130000) = {
.name = "ns16550_serial",
.plat = &dtv_serial_at_ff130000,
.plat_size = sizeof(dtv_serial_at_ff130000),
.parent_idx = -1,
};
/*
* Node /syscon@ff100000 index 5
* driver rockchip_rk3328_grf parent None
*/
static struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = {
.reg = {0xff100000, 0x1000},
};
U_BOOT_DRVINFO(syscon_at_ff100000) = {
.name = "rockchip_rk3328_grf",
.plat = &dtv_syscon_at_ff100000,
.plat_size = sizeof(dtv_syscon_at_ff100000),
.parent_idx = -1,
};

55
package/boot/uboot-rockchip/src/of-platdata/roc-cc-rk3328/dt-structs-gen.h Normal file
View file

@ -0,0 +1,55 @@
/*
* DO NOT MODIFY
*
* Defines the structs used to hold devicetree data.
* This was generated by dtoc from a .dtb (device tree binary) file.
*/
#include <stdbool.h>
#include <linux/libfdt.h>
struct dtd_ns16550_serial {
fdt32_t clock_frequency;
struct phandle_1_arg clocks[2];
const char * dma_names[2];
fdt32_t dmas[4];
fdt32_t interrupts[3];
fdt32_t pinctrl_0;
const char * pinctrl_names;
fdt64_t reg[2];
fdt32_t reg_io_width;
fdt32_t reg_shift;
};
struct dtd_rockchip_rk3288_dw_mshc {
fdt32_t bus_width;
bool cap_mmc_highspeed;
bool cap_sd_highspeed;
struct phandle_1_arg clocks[4];
bool disable_wp;
fdt32_t fifo_depth;
fdt32_t interrupts[3];
fdt32_t max_frequency;
bool mmc_ddr_1_8v;
bool mmc_hs200_1_8v;
bool non_removable;
fdt32_t pinctrl_0[4];
const char * pinctrl_names;
fdt64_t reg[2];
bool sd_uhs_sdr104;
bool sd_uhs_sdr12;
bool sd_uhs_sdr25;
bool sd_uhs_sdr50;
bool u_boot_spl_fifo_mode;
fdt32_t vmmc_supply;
fdt32_t vqmmc_supply;
};
struct dtd_rockchip_rk3328_cru {
fdt64_t reg[2];
fdt32_t rockchip_grf;
};
struct dtd_rockchip_rk3328_dmc {
fdt64_t reg[12];
fdt32_t rockchip_sdram_params[196];
};
struct dtd_rockchip_rk3328_grf {
fdt64_t reg[2];
};

2
package/kernel/linux/modules/i2c.mk
View file

@ -103,7 +103,7 @@ I2C_DWPCI_MODULES:= \
define KernelPackage/i2c-designware-pci
$(call i2c_defaults,$(I2C_DWPCI_MODULES),59)
TITLE:=Synopsys DesignWare PCI
DEPENDS:=+kmod-i2c-designware-core
DEPENDS:=@PCI_SUPPORT +kmod-i2c-designware-core
endef
define KernelPackage/i2c-designware-pci/description

4
package/kernel/linux/modules/other.mk
View file

@ -901,7 +901,7 @@ define KernelPackage/serial-8250-exar
KCONFIG:= CONFIG_SERIAL_8250_EXAR
FILES:=$(LINUX_DIR)/drivers/tty/serial/8250/8250_exar.ko
AUTOLOAD:=$(call AutoProbe,8250 8250_base 8250_exar)
DEPENDS:=+kmod-serial-8250
DEPENDS:=@PCI_SUPPORT +kmod-serial-8250
endef
define KernelPackage/serial-8250-exar/description
@ -1352,7 +1352,7 @@ $(eval $(call KernelPackage,mhi-bus))
define KernelPackage/mhi-pci-generic
SUBMENU:=$(OTHER_MENU)
TITLE:=MHI PCI controller driver
DEPENDS:=@LINUX_5_15 +kmod-mhi-bus
DEPENDS:=@LINUX_5_15 @PCI_SUPPORT +kmod-mhi-bus
KCONFIG:=CONFIG_MHI_BUS_PCI_GENERIC
FILES:=$(LINUX_DIR)/drivers/bus/mhi/mhi_pci_generic.ko
AUTOLOAD:=$(call AutoProbe,mhi_pci_generic)

3
target/linux/ath79/image/Makefile
View file

@ -60,6 +60,9 @@ define Build/relocate-kernel
rm -rf $@.relocate
endef
define Build/append-squashfs-fakeroot-be
cat ./empty-squashfs-lzma >> $@
endef
define Device/Default
DEVICE_DTS_DIR := ../dts

BIN
target/linux/ath79/image/empty-squashfs-lzma Executable file
View file

Binary file not shown.

154
target/linux/ramips/dts/mt7621_linksys_re7000.dts Normal file
View file

@ -0,0 +1,154 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "linksys,re7000", "mediatek,mt7621-soc";
model = "Linksys RE7000";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds {
compatible = "gpio-leds";
wifi {
label = "orange:wifi";
gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tpt";
};
wps {
label = "orange:wps";
gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
};
led_power: power {
label = "green:power";
gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
reset {
label = "reset";
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x1000>;
};
partition@32000 {
label = "config";
reg = <0x32000 0xe000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0xfb0000>;
};
};
};
};
&state_default {
gpio {
groups = "i2c", "uart2", "rgmii2";
function = "gpio";
};
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
&pcie1 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&gmac0 {
nvmem-cells = <&macaddr_factory_2e>;
nvmem-cell-names = "mac-address";
};
&ethernet {
pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "lan";
};
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_2e: macaddr@2e {
reg = <0x2e 0x6>;
};
};

0
target/linux/ramips/dts/mt7621_snr-cpe-me1.dts → target/linux/ramips/dts/mt7621_snr_snr-cpe-me1.dts
View file

9
target/linux/ramips/image/mt7621.mk
View file

@ -1541,6 +1541,15 @@ define Device/linksys_re6500
endef
TARGET_DEVICES += linksys_re6500
define Device/linksys_re7000
$(Device/uimage-lzma-loader)
IMAGE_SIZE := 16064k
DEVICE_VENDOR := Linksys
DEVICE_MODEL := RE7000
DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615-firmware
endef
TARGET_DEVICES += linksys_re7000
define Device/mediatek_ap-mt7621a-v60
$(Device/dsa-migration)
IMAGE_SIZE := 7872k

1
target/linux/ramips/mt7621/base-files/etc/board.d/02_network
View file

@ -17,6 +17,7 @@ ramips_setup_interfaces()
dlink,dap-1620-b1|\
dlink,dap-x1860-a1|\
edimax,re23s|\
linksys,re7000|\
mikrotik,ltap-2hnd|\
mikrotik,routerboard-m11g|\
netgear,ex6150|\

3
target/linux/rockchip/armv8/config-5.15
View file

@ -243,6 +243,7 @@ CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_ROCKCHIP=y
CONFIG_GPIO_SYSCON=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
@ -431,7 +432,7 @@ CONFIG_PHY_ROCKCHIP_PCIE=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PHY_ROCKCHIP_USB=y
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_RK805 is not set
CONFIG_PINCTRL_RK805=y
CONFIG_PINCTRL_ROCKCHIP=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PL330_DMA=y

10
target/linux/rockchip/image/armv8.mk
View file

@ -5,6 +5,16 @@
# FIT will be loaded at 0x02080000. Leave 16M for that, align it to 2M and load the kernel after it.
KERNEL_LOADADDR := 0x03200000
define Device/firefly_roc-rk3328-cc
DEVICE_VENDOR := Firefly
DEVICE_MODEL := ROC-RK3328-CC
SOC := rk3328
DEVICE_DTS := rockchip/rk3328-roc-cc
UBOOT_DEVICE_NAME := roc-cc-rk3328
IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r2s | pine64-img | gzip | append-metadata
endef
TARGET_DEVICES += firefly_roc-rk3328-cc
define Device/friendlyarm_nanopi-r2s
DEVICE_VENDOR := FriendlyARM
DEVICE_MODEL := NanoPi R2S

28
target/linux/rockchip/patches-5.15/100-rockchip-use-system-LED-for-OpenWrt.patch
View file

@ -15,17 +15,29 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -18,6 +18,13 @@
@@ -16,6 +16,11 @@
aliases {
ethernet1 = &rtl8153;
mmc0 = &sdmmc;
};
+ aliases {
+
+ led-boot = &sys_led;
+ led-failsafe = &sys_led;
+ led-running = &sys_led;
+ led-upgrade = &sys_led;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
chosen {
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
@@ -13,6 +13,11 @@
aliases {
mmc0 = &sdmmc;
mmc1 = &emmc;
+
+ led-boot = &power_led;
+ led-failsafe = &power_led;
+ led-running = &power_led;
+ led-upgrade = &power_led;
};
chosen {

2
target/linux/rockchip/patches-5.15/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch
View file

@ -14,7 +14,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
@@ -404,6 +404,7 @@
@@ -402,6 +402,7 @@
rtl8153: device@2 {
compatible = "usbbda,8153";
reg = <2>;

10
target/linux/rockchip/patches-5.15/105-nanopi-r4s-sd-signalling.patch
View file

@ -10,6 +10,16 @@ userspace or following a kernel panic is always working.
Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
@@ -335,7 +335,6 @@
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
- sd-uhs-sdr104;
vmmc-supply = <&vcc_sd>;
vqmmc-supply = <&vcc_sdio>;
status = "okay";
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
@@ -121,6 +121,11 @@

3
target/sdk/Makefile
View file

@ -32,7 +32,6 @@ EXCLUDE_DIRS:= \
*.install.clean \
*.install.flags \
*.install \
*/doc \
*/share/locale
SDK_DIRS = \
@ -158,6 +157,8 @@ $(BIN_DIR)/$(SDK_NAME).tar.xz: clean
$(SDK_BUILD_DIR)/package/kernel/
-rm -rf $(SDK_BUILD_DIR)/$(STAGING_SUBDIR_HOST)/.prereq-build
-rm -rf $(SDK_BUILD_DIR)/$(STAGING_SUBDIR_HOST)/doc
-rm -rf $(SDK_BUILD_DIR)/$(STAGING_SUBDIR_HOST)/share/doc
-rm -f $(SDK_BUILD_DIR)/feeds.conf.default
$(if $(BASE_FEED),echo "$(BASE_FEED)" > $(SDK_BUILD_DIR)/feeds.conf.default)

4
tools/cpio/Makefile
View file

@ -3,11 +3,11 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=cpio
PKG_CPE_ID:=cpe:/a:gnu:cpio
PKG_VERSION:=2.13
PKG_VERSION:=2.14
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=@GNU/cpio
PKG_HASH:=eab5bdc5ae1df285c59f2a4f140a98fc33678a0bf61bdba67d9436ae26b46f6d
PKG_HASH:=fcdc15d60f7267a6fc7efcd6b9db7b6c8966c4f2fbbb964c24d41336fd3f2c12
include $(INCLUDE_DIR)/host-build.mk

18
tools/cpio/patches/001-duplicate-program-name.patch
View file

@ -1,18 +0,0 @@
author Sergey Poznyakoff <gray@gnu.org>
https://git.savannah.gnu.org/cgit/cpio.git/commit/?id=641d3f489cf6238bb916368d4ba0d9325a235afb
* src/global.c: Remove superfluous declaration of program_name
--- a/src/global.c
+++ b/src/global.c
@@ -184,9 +184,6 @@ unsigned int warn_option = 0;
/* Extract to standard output? */
bool to_stdout_option = false;
-/* The name this program was run with. */
-char *program_name;
-
/* A pointer to either lstat or stat, depending on whether
dereferencing of symlinks is done for input files. */
int (*xstat) ();

11
tools/cpio/patches/010-clang.patch
View file

@ -1,11 +0,0 @@
--- a/gnu/xalloc-oversized.h
+++ b/gnu/xalloc-oversized.h
@@ -52,7 +52,7 @@ typedef size_t __xalloc_count_type;
#elif ((5 <= __GNUC__ \
|| (__has_builtin (__builtin_mul_overflow) \
&& __has_builtin (__builtin_constant_p))) \
- && !__STRICT_ANSI__)
+ && !__STRICT_ANSI__) && !defined(__clang__)
# define xalloc_oversized(n, s) \
(__builtin_constant_p (n) && __builtin_constant_p (s) \
? __xalloc_oversized (n, s) \

4
tools/pkgconf/Makefile
View file

@ -7,11 +7,11 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=pkgconf
PKG_VERSION:=1.9.4
PKG_VERSION:=1.9.5
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=https://distfiles.dereferenced.org/pkgconf
PKG_HASH:=daccf1bbe5a30d149b556c7d2ffffeafd76d7b514e249271abdd501533c1d8ae
PKG_HASH:=1ac1656debb27497563036f7bffc281490f83f9b8457c0d60bcfb638fb6b6171
PKG_CPE_ID:=cpe:/a:pkgconf:pkgconf