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mvebu: Use common files folder

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The files-6.6 and files-6.12 folder contain the same content, merge them
into the files folder for both kernel versions.

Link: https://github.com/openwrt/openwrt/pull/19423
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Hauke Mehrtens 2025-07-15 21:59:25 +02:00
parent 5303f6330b
commit e3389e2783
58 changed files with 0 additions and 7482 deletions
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376
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-370-buffalo-ls220de.dts
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@ -1,376 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Device Tree file for Buffalo LinkStation LS220DE
*
* Copyright (C) 2023 Daniel González Cabanelas <dgcbueu@gmail.com>
*/
/dts-v1/;
#include "armada-370.dtsi"
#include "mvebu-linkstation-fan.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/thermal/thermal.h>
/ {
model = "Buffalo LinkStation LS220DE";
compatible = "buffalo,ls220de", "marvell,armada370", "marvell,armada-370-xp";
aliases {
led-boot = &led_boot;
led-failsafe = &led_failsafe;
led-running = &led_power;
led-upgrade = &led_upgrade;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
append-rootblock = "nullparameter="; /* override the bootloader args */
};
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>; /* 256 MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
};
system_fan: gpio_fan {
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH
&gpio0 14 GPIO_ACTIVE_HIGH>;
alarm-gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
#cooling-cells = <2>;
};
thermal-zones {
hdd-thermal {
polling-delay = <20000>;
polling-delay-passive = <2000>;
thermal-sensors = <&hdd0_temp>; /* only one drivetemp sensor is supported */
trips {
hdd_alert1: trip1 {
temperature = <34000>;
hysteresis = <2000>;
type = "active";
};
hdd_alert2: trip2 {
temperature = <40000>;
hysteresis = <2000>;
type = "active";
};
hdd_alert3: trip3 {
temperature = <45000>;
hysteresis = <2000>;
type = "passive";
};
hdd_hot {
temperature = <50000>;
hysteresis = <2000>;
type = "hot";
};
hdd_crit {
temperature = <60000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map1 {
trip = <&hdd_alert1>;
cooling-device = <&system_fan THERMAL_NO_LIMIT 1>;
};
map2 {
trip = <&hdd_alert2>;
cooling-device = <&system_fan 2 2>;
};
map3 {
trip = <&hdd_alert3>;
cooling-device = <&system_fan 3 THERMAL_NO_LIMIT>;
};
};
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&pmx_buttons>;
pinctrl-names = "default";
power {
label = "Power Switch";
linux,code = <KEY_POWER>;
linux,input-type = <EV_SW>;
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
};
function {
label = "Function Button";
linux,code = <KEY_CONFIG>;
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
};
};
gpio_leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pmx_leds1 &pmx_leds2>;
indicator_red {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
panic-indicator;
};
led_power: power_white {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_WHITE>;
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led_failsafe: power_red {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
};
led_upgrade: power_orange {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_AMBER>;
gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
};
led_boot: indicator_white {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_WHITE>;
gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
};
hdd1_red {
function = LED_FUNCTION_DISK;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "ata1";
function-enumerator = <1>;
};
hdd2_red {
function = LED_FUNCTION_DISK;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "ata2";
function-enumerator = <2>;
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pmx_power_hdd1 &pmx_power_hdd2>;
pinctrl-names = "default";
sata1_power: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "HDD1";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
startup-delay-us = <2000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
};
sata2_power: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "HDD2";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
startup-delay-us = <4000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
};
};
};
&coherencyfab {
broken-idle;
};
&eth1 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy-handle = <&ethphy0>;
phy-connection-type = "rgmii-id";
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
ethphy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
marvell,reg-init = <0x3 0x10 0xf000 0x091A>, /* LED function */
<0x3 0x11 0x0000 0x4401>, /* LED polarity */
<0x3 0x12 0x0000 0x4905>; /* LED timer */
#thermal-sensor-cells = <0>;
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "ubi_kernel";
reg = <0x00000000 0x02000000>; /* 32 MiB */
};
partition@2000000 {
label = "ubi";
reg = <0x02000000 0x1df00000>; /* 479 MiB */
};
};
};
};
&sata {
nr-ports = <2>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
hdd0_temp: sata-port@0 {
reg = <0>;
#thermal-sensor-cells = <0>;
};
hdd1_temp: sata-port@1 {
reg = <1>;
#thermal-sensor-cells = <0>;
};
};
&spi0 {
status = "okay";
pinctrl-0 = <&spi0_pins2>;
pinctrl-names = "default";
spi-flash@0 {
compatible = "mxicy,mx25l8005", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x00000 0xf0000>; /* 960 KiB*/
label = "u-boot";
read-only;
};
partition@f0000 {
reg = <0xf0000 0x10000>; /* 64 KiB */
label = "u-boot-env";
};
};
};
};
&pmsu {
pinctrl-0 = <&pmx_power_cpu>;
pinctrl-names = "default";
};
&uart0 {
status = "okay";
};
&usb0 {
status = "okay";
};
&pinctrl {
pmx_power_hdd2: pmx-power-hdd2 {
marvell,pins = "mpp2";
marvell,function = "gpio";
};
pmx_power_cpu: pmx-power-cpu {
marvell,pins = "mpp4";
marvell,function = "vdd";
};
pmx_power_hdd1: pmx-power-hdd1 {
marvell,pins = "mpp8";
marvell,function = "gpio";
};
pmx_fan_lock: pmx-fan-lock {
marvell,pins = "mpp10";
marvell,function = "gpio";
};
pmx_hdd_present: pmx-hdd-present {
marvell,pins = "mpp11", "mpp12";
marvell,function = "gpio";
};
pmx_fan_high: pmx-fan-high {
marvell,pins = "mpp13";
marvell,function = "gpio";
};
pmx_fan_low: pmx-fan-low {
marvell,pins = "mpp14";
marvell,function = "gpio";
};
pmx_buttons: pmx-buttons {
marvell,pins = "mpp15", "mpp16";
marvell,function = "gpio";
};
pmx_leds1: pmx-leds {
marvell,pins = "mpp7", "mpp54", "mpp59", "mpp61";
marvell,function = "gpo";
};
pmx_leds2: pmx-leds {
marvell,pins = "mpp55", "mpp57", "mpp62";
marvell,function = "gpio";
};
};

448
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-370-buffalo-ls421de.dts
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@ -1,448 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Device Tree file for Buffalo LinkStation LS421DE
*
* Copyright (C) 2020 Daniel González Cabanelas <dgcbueu@gmail.com>
*/
/dts-v1/;
#include "armada-370.dtsi"
#include "mvebu-linkstation-fan.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/thermal/thermal.h>
/ {
model = "Buffalo LinkStation LS421DE";
compatible = "buffalo,ls421de", "marvell,armada370", "marvell,armada-370-xp";
aliases {
led-boot = &led_boot;
led-failsafe = &led_failsafe;
led-running = &led_power;
led-upgrade = &led_upgrade;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
append-rootblock = "nullparameter="; /* override the bootloader args */
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
};
system_fan: gpio_fan {
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH
&gpio0 14 GPIO_ACTIVE_HIGH>;
alarm-gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
#cooling-cells = <2>;
};
thermal-zones {
hdd-thermal {
polling-delay = <20000>;
polling-delay-passive = <2000>;
thermal-sensors = <&hdd0_temp>; /* only one drivetemp sensor is supported */
trips {
hdd_alert1: trip1 {
temperature = <36000>;
hysteresis = <2000>;
type = "active";
};
hdd_alert2: trip2 {
temperature = <44000>;
hysteresis = <2000>;
type = "active";
};
hdd_alert3: trip3 {
temperature = <52000>;
hysteresis = <2000>;
type = "passive";
};
hdd_crit: trip4 {
temperature = <60000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map1 {
trip = <&hdd_alert1>;
cooling-device = <&system_fan THERMAL_NO_LIMIT 1>;
};
map2 {
trip = <&hdd_alert2>;
cooling-device = <&system_fan 2 2>;
};
map3 {
trip = <&hdd_alert3>;
cooling-device = <&system_fan 3 THERMAL_NO_LIMIT>;
};
};
};
ethphy-thermal {
polling-delay = <20000>;
polling-delay-passive = <2000>;
thermal-sensors = <&ethphy0>;
trips {
ethphy_alert1: trip1 {
temperature = <65000>;
hysteresis = <4000>;
type = "passive";
};
ethphy_crit: trip2 {
temperature = <100000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map1 {
trip = <&ethphy_alert1>;
cooling-device = <&system_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&pmx_buttons>;
pinctrl-names = "default";
power {
label = "Power Switch";
linux,code = <KEY_POWER>;
linux,input-type = <EV_SW>;
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
};
function {
label = "Function Button";
linux,code = <KEY_CONFIG>;
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
};
};
gpio_leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pmx_leds1 &pmx_leds2>;
system_red {
label = "ls421de:red:system";
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
};
led_power: power_white {
label = "ls421de:white:power";
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led_failsafe: power_red {
label = "ls421de:red:power";
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
};
led_upgrade: power_orange {
label = "ls421de:orange:power";
gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
};
led_boot: system_white {
label = "ls421de:white:system";
gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
};
hdd1_red {
label = "ls421de:red:hdd1";
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "ata1";
};
hdd2_red {
label = "ls421de:red:hdd2";
gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "ata2";
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pmx_power_usb &pmx_power_hdd1 &pmx_power_hdd2>;
pinctrl-names = "default";
usb_power: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "USB";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
};
sata1_power: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "HDD1";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
startup-delay-us = <2000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
};
sata2_power: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "HDD2";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
startup-delay-us = <4000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
};
};
};
&coherencyfab {
broken-idle;
};
&eth1 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy-handle = <&ethphy0>;
phy-connection-type = "rgmii-id";
};
&i2c0 {
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
clock-frequency = <100000>;
status = "okay";
rs5c372a: rs5c372a@32 {
compatible = "ricoh,rs5c372a";
reg = <0x32>;
wakeup-source;
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
ethphy0: ethernet-phy@0 { /* Marvell 88E1518 */
reg = <0>;
marvell,reg-init = <0x2 0x10 0xffff 0x0006>, /* disable CLK125 */
<0x3 0x10 0x0000 0x1991>, /* LED function */
<0x3 0x11 0x0000 0x4401>, /* LED polarity */
<0x3 0x12 0x0000 0x4905>; /* LED timer */
#thermal-sensor-cells = <0>;
};
};
&pciec {
status = "okay";
pinctrl-0 = <&pmx_pcie>;
pinctrl-names = "default";
/* Connected to uPD720202 USB 3.0 Host */
pcie@1,0 {
status = "okay";
};
};
&pmsu {
pinctrl-0 = <&pmx_power_cpu>;
pinctrl-names = "default";
};
&rtc {
status = "disabled";
};
&sata {
nr-ports = <2>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
hdd0_temp: sata-port@0 {
reg = <0>;
#thermal-sensor-cells = <0>;
};
hdd1_temp: sata-port@1 {
reg = <1>;
#thermal-sensor-cells = <0>;
};
};
&sdio {
pinctrl-0 = <&sdio_pins2>;
pinctrl-names = "default";
status = "okay";
/* No CD or WP GPIOs */
broken-cd;
};
&uart0 {
status = "okay";
};
&usb0 {
status = "okay";
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x00000000 0x02000000>; /* 32 MiB */
};
partition@2000000 {
label = "ubi";
reg = <0x02000000 0x1e000000>; /* 480 MiB */
};
};
};
};
&spi0 {
status = "okay";
pinctrl-0 = <&spi0_pins2>;
pinctrl-names = "default";
spi-flash@0 {
compatible = "mxicy,mx25l8005", "jedec,spi-nor";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x00000 0xf0000>; /* 960 KiB*/
label = "u-boot";
read-only;
};
partition@f0000 {
reg = <0xf0000 0x10000>; /* 64 KiB */
label = "u-boot-env";
};
};
};
};
&pinctrl {
pmx_power_cpu: pmx-power-cpu {
marvell,pins = "mpp4";
marvell,function = "vdd";
};
pmx_power_usb: pmx-power-usb {
marvell,pins = "mpp5";
marvell,function = "gpo";
};
pmx_power_hdd1: pmx-power-hdd1 {
marvell,pins = "mpp8";
marvell,function = "gpio";
};
pmx_power_hdd2: pmx-power-hdd2 {
marvell,pins = "mpp9";
marvell,function = "gpo";
};
pmx_fan_lock: pmx-fan-lock {
marvell,pins = "mpp10";
marvell,function = "gpio";
};
pmx_hdd_present: pmx-hdd-present {
marvell,pins = "mpp11", "mpp12";
marvell,function = "gpio";
};
pmx_fan_high: pmx-fan-high {
marvell,pins = "mpp13";
marvell,function = "gpio";
};
pmx_fan_low: pmx-fan-low {
marvell,pins = "mpp14";
marvell,function = "gpio";
};
pmx_buttons: pmx-buttons {
marvell,pins = "mpp15", "mpp16";
marvell,function = "gpio";
};
pmx_leds1: pmx-leds {
marvell,pins = "mpp7", "mpp54", "mpp59", "mpp61";
marvell,function = "gpo";
};
pmx_leds2: pmx-leds {
marvell,pins = "mpp55", "mpp57", "mpp62";
marvell,function = "gpio";
};
pmx_pcie: pmx-pcie {
marvell,pins = "mpp56", "mpp60";
marvell,function = "pcie";
};
};

424
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-370-c200-v2.dts
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@ -1,424 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Device Tree file for Ctera C200-V2
*
* Copyright (C) 2021 Pawel Dembicki <paweldembicki@gmail.com>
*/
/dts-v1/;
#include "armada-370.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Ctera C200 V2";
compatible = "ctera,c200-v2", "marvell,armada370", "marvell,armada-370-xp";
aliases {
led-boot = &led_status_green;
led-failsafe = &led_status_red;
led-running = &led_status_green;
led-upgrade = &led_status_red;
};
chosen {
bootargs = "console=ttyS0,115200";
stdout-path = "serial0:115200n8";
};
memory {
device_type = "memory";
reg = <0x00000000 0x40000000>; /* 1024 MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
};
thermal-zones {
ethphy-thermal {
polling-delay = <20000>;
polling-delay-passive = <2000>;
thermal-sensors = <&ethphy0>;
trips {
ethphy_alert1: trip1 {
temperature = <65000>;
hysteresis = <4000>;
type = "passive";
};
ethphy_crit: trip2 {
temperature = <100000>;
hysteresis = <2000>;
type = "critical";
};
};
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&pmx_buttons>;
pinctrl-names = "default";
power {
label = "Power Button";
linux,code = <KEY_POWER>;
gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
};
reset {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
usb1 {
label = "USB1 Button";
linux,code = <BTN_0>;
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
};
usb2 {
label = "USB2 Button";
linux,code = <BTN_1>;
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
};
gpio-poweroff {
compatible = "gpio-poweroff";
pinctrl-0 = <&pmx_poweroff>;
pinctrl-names = "default";
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&pmx_leds1 &pmx_leds2>;
pinctrl-names = "default";
led-0 {
function = LED_FUNCTION_USB;
function-enumerator = <2>;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
};
led-1 {
function = LED_FUNCTION_USB;
function-enumerator = <2>;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "usbport";
trigger-sources = <&usb1_port 1>, <&usb2_port 1>;
};
led-2 {
function = LED_FUNCTION_USB;
function-enumerator = <1>;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
};
led-3 {
function = LED_FUNCTION_USB;
function-enumerator = <1>;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
linux,default-trigger = "usbport";
trigger-sources = <&usb1_port 2>, <&usb2_port 2>;
};
led-4 {
function = LED_FUNCTION_DISK;
function-enumerator = <2>;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
linux,default-trigger = "ata2";
};
led-5 {
function = LED_FUNCTION_DISK;
function-enumerator = <1>;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
};
led-6 {
function = LED_FUNCTION_DISK;
function-enumerator = <2>;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
};
led-7 {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_BLUE>;
gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
};
led-8 {
function = LED_FUNCTION_DISK_ERR;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
};
led-9 {
function = LED_FUNCTION_DISK_ERR;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
};
led_status_red: led-10 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
};
led-11 {
function = LED_FUNCTION_DISK;
function-enumerator = <1>;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
linux,default-trigger = "ata1";
};
led_status_green: led-12 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
};
};
};
&coherencyfab {
broken-idle;
};
&eth1 {
pinctrl-0 = <&ge1_rgmii_pins>;
pinctrl-names = "default";
status = "okay";
phy-handle = <&ethphy0>;
phy-connection-type = "rgmii-id";
};
&i2c0 {
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
clock-frequency = <100000>;
status = "okay";
hwmon@2a {
compatible = "nuvoton,nct7802";
reg = <0x2a>;
};
rtc@30 {
compatible = "sii,s35390a";
reg = <0x30>;
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
ethphy0: ethernet-phy@0 { /* Marvell 88E1318 */
reg = <0>;
#thermal-sensor-cells = <0>;
};
};
&nand_controller {
status = "okay";
nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "uboot";
reg = <0x0000000 0x200000>;
read-only;
};
partition@200000 {
label = "certificate";
reg = <0x0200000 0x100000>;
read-only;
};
partition@300000 {
label = "preset_cfg";
reg = <0x0300000 0x100000>;
read-only;
};
partition@400000 {
label = "dev_params";
reg = <0x0400000 0x100000>;
read-only;
};
partition@500000 {
label = "active_bank";
reg = <0x0500000 0x0100000>;
};
partition@600000 {
label = "magic";
reg = <0x0600000 0x0100000>;
read-only;
};
partition@700000 {
label = "bank1";
reg = <0x0700000 0x2800000>;
};
partition@2f00000 {
label = "bank2";
reg = <0x2f00000 0x2800000>;
};
/* 0x5700000-0x5a00000 undefined in vendor firmware */
partition@5a00000 {
label = "reserved";
reg = <0x5a00000 0x2000000>;
};
partition@7a00000 {
label = "ubi";
reg = <0x7a00000 0x8600000>;
};
};
};
};
&pciec {
status = "okay";
pcie@1,0 {
pinctrl-0 = <&pmx_pcie>;
pinctrl-names = "default";
status = "okay";
reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
/* -[0000:00]---01.0-[01]----00.0 */
/* usbport trigger won't work */
bridge@0,1 {
compatible = "pci11ab,6710";
reg = <0x3800 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
usb@1,0 {
/* Renesas uPD720202 */
compatible = "pci1912,0015";
reg = <0x1000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
usb1_port: port@1 {
reg = <1>;
#trigger-source-cells = <1>;
};
usb2_port: port@2 {
reg = <2>;
#trigger-source-cells = <1>;
};
};
};
};
};
&pinctrl {
pmx_poweroff: pmx-poweroff {
marvell,pins = "mpp7";
marvell,function = "gpo";
};
pmx_power_cpu: pmx-power-cpu {
marvell,pins = "mpp4";
marvell,function = "vdd";
};
pmx_buttons: pmx-buttons {
marvell,pins = "mpp6", "mpp10", "mpp14", "mpp32";
marvell,function = "gpio";
};
pmx_leds1: pmx-leds1 {
marvell,pins = "mpp47";
marvell,function = "gpo";
};
pmx_leds2: pmx-leds2 {
marvell,pins = "mpp12", "mpp13", "mpp15", "mpp16", "mpp50", "mpp51",
"mpp52", "mpp53", "mpp55", "mpp56", "mpp57", "mpp58";
marvell,function = "gpio";
};
pmx_pcie: pmx-pcie {
marvell,pins = "mpp59";
marvell,function = "gpio";
};
/* this gpio is connected to the pin of buzzer
* leave it as is due lack of proper driver
*/
pmx_buzzer: pmx-buzzer {
marvell,pins = "mpp63";
marvell,function = "gpio";
};
};
&pmsu {
pinctrl-0 = <&pmx_power_cpu>;
pinctrl-names = "default";
};
&rtc {
status = "disabled";
};
&sata {
nr-ports = <2>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
hdd0_temp: sata-port@0 {
reg = <0>;
#thermal-sensor-cells = <0>;
};
hdd1_temp: sata-port@1 {
reg = <1>;
#thermal-sensor-cells = <0>;
};
};
&uart0 {
status = "okay";
};

389
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-380-iij-sa-w2.dts
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@ -1,389 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "armada-380.dtsi"
/ {
model = "IIJ SA-W2";
compatible = "iij,sa-w2", "marvell,armada380";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_green;
label-mac-device = &ge0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x10000000>; /* 256MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
pcie {
status = "okay";
pcie@1,0 {
status = "okay";
};
pcie@3,0 {
status = "okay";
};
};
};
keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pmx_keys_pins>;
button-init {
label = "init";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pmx_leds_pins>;
led-0 {
gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN_5GHZ;
linux,default-trigger = "phy0tpt";
};
led-1 {
gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WLAN_5GHZ;
};
led-2 {
gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
};
led-3 {
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
};
led-4 {
gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_MOBILE;
};
led-5 {
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_MOBILE;
};
led-6 {
gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN_2GHZ;
linux,default-trigger = "phy1tpt";
};
led-7 {
gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WLAN_2GHZ;
};
led_power_green: led-8 {
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_POWER;
};
led_power_red: led-9 {
gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
};
led-10 {
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_USB;
function-enumerator = <1>;
linux,default-trigger = "usbport";
trigger-sources = <&hub_port2>;
};
led-11 {
gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_USB;
function-enumerator = <0>;
linux,default-trigger = "usbport";
trigger-sources = <&hub_port1>;
};
};
regulator-vbus-usb0 {
compatible = "regulator-fixed";
regulator-name = "vbus-usb0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
regulator-vbus-usb1 {
compatible = "regulator-fixed";
regulator-name = "vbus-usb1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&pinctrl {
pmx_usb_pins: usb-pins {
marvell,pins = "mpp2", /* smsc usb2514b reset */
"mpp48", "mpp49", /* port over current */
"mpp52", "mpp53"; /* port vbus */
marvell,function = "gpio";
};
pmx_keys_pins: keys-pins {
marvell,pins = "mpp18";
marvell,function = "gpio";
};
pmx_leds_pins: leds-pins {
marvell,pins = "mpp19", "mpp20", "mpp33", "mpp34", "mpp35",
"mpp36", "mpp44", "mpp45", "mpp46", "mpp47",
"mpp54", "mpp55";
marvell,function = "gpio";
};
};
&gpio0 {
usb-hub-reset {
gpio-hog;
gpios = <2 GPIO_ACTIVE_HIGH>;
output-high;
};
};
&usb0 {
pinctrl-names = "default";
pinctrl-0 = <&pmx_usb_pins>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
/* SMSC USB2514B on PCB */
hub@1 {
compatible = "usb424,2514";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
hub_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
hub_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
&bm {
status = "okay";
};
&bm_bppi {
status = "okay";
};
&eth1 {
pinctrl-names = "default";
pinctrl-0 = <&ge1_rgmii_pins>;
status = "okay";
phy-connection-type = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>;
nvmem-cells = <&macaddr_bdinfo_6 1>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
/* Marvell 88E6172 */
switch@0 {
compatible = "marvell,mv88e6085";
reg = <0x0>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&gpio1>;
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "ge1_0";
};
port@1 {
reg = <1>;
label = "ge1_1";
};
port@2 {
reg = <2>;
label = "ge1_2";
};
port@3 {
reg = <3>;
label = "ge1_3";
};
ge0: port@4 {
reg = <4>;
label = "ge0";
nvmem-cells = <&macaddr_bdinfo_6 0>;
nvmem-cell-names = "mac-address";
};
/*
* eth0 is connected to port5 for WAN connection
* on port4 ("GE0")
*/
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&eth1>;
phy-connection-type = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
&rtc {
status = "disabled";
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x100000>;
label = "bootloader";
read-only;
};
partition@100000 {
reg = <0x100000 0x10000>;
label = "bootloader-env";
read-only;
};
partition@110000 {
reg = <0x110000 0xf0000>;
label = "board_info";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_bdinfo_6: macaddr@6 {
compatible = "mac-base";
reg = <0x6 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@200000 {
compatible = "iij,seil-firmware";
reg = <0x200000 0xf00000>;
label = "firmware";
iij,bootdev-name = "flash";
iij,seil-id = <0x5345494c 0x32303135>;
};
partition@1100000 {
compatible = "iij,seil-firmware";
reg = <0x1100000 0xf00000>;
label = "rescue";
iij,bootdev-name = "rescue";
iij,seil-id = <0x5345494c 0x32303135>;
};
};
};
};

8
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-30e.dts
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@ -1,8 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "armada-385-fortinet-fg-3xe.dtsi"
/ {
model = "Fortinet FortiGate 30E";
compatible = "fortinet,fg-30e", "marvell,armada385", "marvell,armada380";
};

96
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-3xe.dtsi
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@ -1,96 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "armada-385-fortinet-fg-xxe.dtsi"
/ {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x40000000>; /* 1GB */
};
};
&gpio_leds {
led-14 {
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_SPEED_WAN;
linux,default-trigger = "mv88e6xxx-0:00:100Mbps";
};
led-15 {
gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_SPEED_WAN;
linux,default-trigger = "mv88e6xxx-0:00:1Gbps";
};
};
&pinctrl {
pmx_switch_pins: switch-pins {
marvell,pins = "mpp19";
marvell,function = "gpio";
};
};
&mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>, <&pmx_switch_pins>;
/* Marvell 88E6176 */
switch@2 {
compatible = "marvell,mv88e6085";
reg = <0x2>;
reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "wan";
nvmem-cells = <&macaddr_bdinfo_d880 1>;
nvmem-cell-names = "mac-address";
};
port@1 {
reg = <1>;
label = "lan4";
nvmem-cells = <&macaddr_bdinfo_d880 5>;
nvmem-cell-names = "mac-address";
};
port@2 {
reg = <2>;
label = "lan3";
nvmem-cells = <&macaddr_bdinfo_d880 4>;
nvmem-cell-names = "mac-address";
};
port@3 {
reg = <3>;
label = "lan2";
nvmem-cells = <&macaddr_bdinfo_d880 3>;
nvmem-cell-names = "mac-address";
};
port@4 {
reg = <4>;
label = "lan1";
nvmem-cells = <&macaddr_bdinfo_d880 2>;
nvmem-cell-names = "mac-address";
};
port@6 {
reg = <6>;
ethernet = <&eth0>;
phy-connection-type = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};

8
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-50e.dts
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@ -1,8 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "armada-385-fortinet-fg-5xe.dtsi"
/ {
model = "Fortinet FortiGate 50E";
compatible = "fortinet,fg-50e", "marvell,armada385", "marvell,armada380";
};

12
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-51e.dts
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@ -1,12 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "armada-385-fortinet-fg-5xe.dtsi"
/ {
model = "Fortinet FortiGate 51E";
compatible = "fortinet,fg-51e", "marvell,armada385", "marvell,armada380";
};
&ahci0 {
status = "okay";
};

12
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-52e.dts
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@ -1,12 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "armada-385-fortinet-fg-5xe.dtsi"
/ {
model = "Fortinet FortiGate 52E";
compatible = "fortinet,fg-52e", "marvell,armada385", "marvell,armada380";
};
&ahci0 {
status = "okay";
};

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target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-5xe.dtsi
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@ -1,172 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "armada-385-fortinet-fg-xxe.dtsi"
/ {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x80000000>; /* 2GB */
};
};
&gpio_leds {
led-14 {
gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_SPEED_WAN;
function-enumerator = <1>;
linux,default-trigger = "f1072004.mdio-mii:00:1Gbps";
};
led-15 {
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_SPEED_WAN;
function-enumerator = <2>;
linux,default-trigger = "f1072004.mdio-mii:01:1Gbps";
};
led-16 {
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_SPEED_LAN;
function-enumerator = <5>;
linux,default-trigger = "mv88e6xxx-0:00:100Mbps";
};
led-17 {
gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_SPEED_LAN;
function-enumerator = <5>;
linux,default-trigger = "mv88e6xxx-0:00:1Gbps";
};
};
&pinctrl {
pmx_phy_switch_pins: phy-switch-pins {
marvell,pins = "mpp19", "mpp20", "mpp23", "mpp34", "mpp41";
marvell,function = "gpio";
};
};
&eth1 {
status = "okay";
phy-handle = <&ethphy0>;
phy-connection-type = "sgmii";
buffer-manager = <&bm>;
bm,pool-long = <2>;
nvmem-cells = <&macaddr_bdinfo_d880 1>;
nvmem-cell-names = "mac-address";
};
&eth2 {
status = "okay";
phy-handle = <&ethphy1>;
phy-connection-type = "sgmii";
buffer-manager = <&bm>;
bm,pool-long = <3>;
nvmem-cells = <&macaddr_bdinfo_d880 2>;
nvmem-cell-names = "mac-address";
};
&mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>, <&pmx_phy_switch_pins>;
/* Marvell 88E1512 */
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-id0141,0dd1",
"ethernet-phy-ieee802.3-c22";
reg = <0x0>;
interrupt-parent = <&gpio0>;
interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
/*
* LINK/ACT (Green): LED[0], Active Low
* SPEED 100M (Amber): LED[1], Active High
*/
marvell,reg-init = <3 16 0 0x71>,
<3 17 0 0x4>;
};
/* Marvell 88E1512 */
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-id0141,0dd1",
"ethernet-phy-ieee802.3-c22";
reg = <0x1>;
interrupt-parent = <&gpio1>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
/*
* LINK/ACT (Green): LED[0], Active Low
* SPEED 100M (Amber): LED[1], Active High
*/
marvell,reg-init = <3 16 0 0x71>,
<3 17 0 0x4>;
};
/* Marvell 88E6176 */
switch@2 {
compatible = "marvell,mv88e6085";
reg = <0x2>;
reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan5";
nvmem-cells = <&macaddr_bdinfo_d880 7>;
nvmem-cell-names = "mac-address";
};
port@1 {
reg = <1>;
label = "lan4";
nvmem-cells = <&macaddr_bdinfo_d880 6>;
nvmem-cell-names = "mac-address";
};
port@2 {
reg = <2>;
label = "lan3";
nvmem-cells = <&macaddr_bdinfo_d880 5>;
nvmem-cell-names = "mac-address";
};
port@3 {
reg = <3>;
label = "lan2";
nvmem-cells = <&macaddr_bdinfo_d880 4>;
nvmem-cell-names = "mac-address";
};
port@4 {
reg = <4>;
label = "lan1";
nvmem-cells = <&macaddr_bdinfo_d880 3>;
nvmem-cell-names = "mac-address";
};
port@6 {
reg = <6>;
ethernet = <&eth0>;
phy-connection-type = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};

346
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-xxe.dtsi
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@ -1,346 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "armada-385.dtsi"
/ {
aliases {
led-boot = &led_status_green;
led-failsafe = &led_status_red;
led-running = &led_status_green;
led-upgrade = &led_status_green;
label-mac-device = &eth0;
};
chosen {
stdout-path = "serial0:9600n8";
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pmx_gpio_keys_pins>;
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
};
};
gpio_leds: gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pmx_gpio_leds_pins>;
led-0 {
gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_ALARM;
};
led-1 {
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = "ha";
};
led_status_green: led-2 {
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
};
led-3 {
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = "ha";
};
led-4 {
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_ALARM;
};
led_status_red: led-5 {
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
};
led-6 {
gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_SPEED_LAN;
function-enumerator = <4>;
linux,default-trigger = "mv88e6xxx-0:01:1Gbps";
};
led-7 {
gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_SPEED_LAN;
function-enumerator = <4>;
linux,default-trigger = "mv88e6xxx-0:01:100Mbps";
};
led-8 {
gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_SPEED_LAN;
function-enumerator = <3>;
linux,default-trigger = "mv88e6xxx-0:02:100Mbps";
};
led-9 {
gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_SPEED_LAN;
function-enumerator = <3>;
linux,default-trigger = "mv88e6xxx-0:02:1Gbps";
};
led-10 {
gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_SPEED_LAN;
function-enumerator = <1>;
linux,default-trigger = "mv88e6xxx-0:04:1Gbps";
};
led-11 {
gpios = <&gpio2 13 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_SPEED_LAN;
function-enumerator = <1>;
linux,default-trigger = "mv88e6xxx-0:04:100Mbps";
};
led-12 {
gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_SPEED_LAN;
function-enumerator = <2>;
linux,default-trigger = "mv88e6xxx-0:03:1Gbps";
};
led-13 {
gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_SPEED_LAN;
function-enumerator = <2>;
linux,default-trigger = "mv88e6xxx-0:03:100Mbps";
};
};
reg_usb_vbus: regulator-usb-vbus {
compatible = "regulator-fixed";
regulator-name = "usb-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
regulator-always-on;
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
gpio2: gpio@24 {
compatible = "nxp,pca9555";
reg = <0x24>;
gpio-controller;
#gpio-cells = <0x2>;
};
hwmon@28 {
compatible = "nuvoton,nct7802";
reg = <0x28>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&pinctrl {
pmx_gpio_leds_pins: gpio-leds-pins {
marvell,pins = "mpp30", "mpp32", "mpp33", "mpp35",
"mpp45", "mpp47";
marvell,function = "gpio";
};
pmx_usb_pins: usb-pins {
marvell,pins = "mpp53";
marvell,function = "gpio";
};
pmx_gpio_keys_pins: gpio-keys-pins {
marvell,pins = "mpp54";
marvell,function = "gpio";
};
};
&bm {
status = "okay";
};
&bm_bppi {
status = "okay";
};
&eth0 {
pinctrl-names = "default";
pinctrl-0 = <&ge0_rgmii_pins>;
status = "okay";
phy-connection-type = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <0>;
bm,pool-short = <1>;
nvmem-cells = <&macaddr_bdinfo_d880 0>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&usb3_0 {
pinctrl-names = "default";
pinctrl-0 = <&pmx_usb_pins>;
status = "okay";
vbus-supply = <&reg_usb_vbus>;
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x1c0000>;
label = "u-boot";
read-only;
};
partition@1c0000 {
reg = <0x1c0000 0x10000>;
label = "firmware-info";
/*
* 0x10 - 0x2f : image name (image1)
* 0x30 - 0x4f : image name (image2)
* 0x170 (1byte): active image (0x0/0x1)
* 0x184 - 0x185: kernel block count (image1)
* 0x18c - 0x18d: rootfs block count (image1)
* 0x194 - 0x195: kernel block count (image2)
* 0x19c - 0x19d: rootfs block count (image2)
* 0x1be (1byte): bit7 -> active flag (image1)?
* 0x1ce (1byte): bit7 -> active flag (image2)?
*
* Note: block size --> 0x200 (512 bytes)
*/
};
partition@1d0000 {
reg = <0x1d0000 0x10000>;
label = "dtb";
read-only;
};
partition@1e0000 {
reg = <0x1e0000 0x10000>;
label = "u-boot-env";
read-only;
};
partition@1f0000 {
reg = <0x1f0000 0x10000>;
label = "board-info";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_bdinfo_d880: macaddr@d880 {
compatible = "mac-base";
reg = <0xd880 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@200000 {
reg = <0x200000 0x600000>;
label = "kernel";
};
partition@800000 {
reg = <0x800000 0x1800000>;
label = "rootfs";
};
partition@2000000 {
reg = <0x2000000 0x600000>;
label = "kn2";
read-only;
};
partition@2600000 {
reg = <0x2600000 0x1800000>;
label = "rfs2";
read-only;
};
partition@3e00000 {
reg = <0x3e00000 0x1200000>;
label = "part1";
read-only;
};
partition@5000000 {
reg = <0x5000000 0x1200000>;
label = "part2";
read-only;
};
partition@6200000 {
reg = <0x6200000 0x1e00000>;
label = "config";
read-only;
};
};
};
};

20
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fwf-50e-2r.dts
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@ -1,20 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "armada-385-fortinet-fg-5xe.dtsi"
/ {
model = "Fortinet FortiWiFi 50E-2R";
compatible = "fortinet,fwf-50e-2r", "marvell,armada385", "marvell,armada380";
};
&pciec {
status = "okay";
};
&pcie1 {
status = "okay";
};
&pcie2 {
status = "okay";
};

20
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-fortinet-fwf-51e.dts
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@ -1,20 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "armada-385-fortinet-fg-5xe.dtsi"
/ {
model = "Fortinet FortiWiFi 51E";
compatible = "fortinet,fwf-51e", "marvell,armada385", "marvell,armada380";
};
&ahci0 {
status = "okay";
};
&pciec {
status = "okay";
};
&pcie2 {
status = "okay";
};

213
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-linksys-venom.dts
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@ -1,213 +0,0 @@
/*
* Device Tree file for the Linksys WRT32X (Venom)
*
* Copyright (C) 2017 Imre Kaloz <kaloz@openwrt.org>
*
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "armada-385-linksys.dtsi"
/ {
model = "Linksys WRT32X";
compatible = "linksys,wrt32x", "linksys,venom", "linksys,armada385",
"marvell,armada385", "marvell,armada380";
chosen {
bootargs = "console=ttyS0,115200";
stdout-path = "serial0:115200n8";
append-rootblock = "root=/dev/mtdblock";
};
};
&expander0 {
wan_amber@0 {
label = "venom:amber:wan";
reg = <0x0>;
};
wan_blue@1 {
label = "venom:blue:wan";
reg = <0x1>;
};
usb2@5 {
label = "venom:blue:usb2";
reg = <0x5>;
};
usb3_1@6 {
label = "venom:blue:usb3_1";
reg = <0x6>;
};
usb3_2@7 {
label = "venom:blue:usb3_2";
reg = <0x7>;
};
wps_blue@8 {
label = "venom:blue:wps";
reg = <0x8>;
};
wps_amber@9 {
label = "venom:amber:wps";
reg = <0x9>;
};
};
&gpio_leds {
power {
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
label = "venom:blue:power";
};
sata {
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
label = "venom:blue:sata";
};
wlan_2g {
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
label = "venom:blue:wlan_2g";
};
wlan_5g {
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
label = "venom:blue:wlan_5g";
};
};
&gpio_leds_pins {
marvell,pins = "mpp21", "mpp45", "mpp46", "mpp56";
};
&nand {
/* Spansion S34ML02G2 256MiB, OEM Layout */
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0000000 0x200000>; /* 2MB */
read-only;
};
partition@200000 {
label = "u_env";
reg = <0x200000 0x20000>; /* 128KB */
};
partition@220000 {
label = "s_env";
reg = <0x220000 0x40000>; /* 256KB */
};
partition@180000 {
label = "unused_area";
reg = <0x260000 0x5c0000>; /* 5.75MB */
};
partition@7e0000 {
label = "devinfo";
reg = <0x7e0000 0x40000>; /* 256KB */
read-only;
};
/* kernel1 overlaps with rootfs1 by design */
partition@900000 {
label = "kernel1";
reg = <0x900000 0x7b00000>; /* 123MB */
};
partition@f00000 {
label = "rootfs1";
reg = <0xf00000 0x7500000>; /* 117MB */
};
/* kernel2 overlaps with rootfs2 by design */
partition@8400000 {
label = "kernel2";
reg = <0x8400000 0x7b00000>; /* 123MB */
};
partition@8a00000 {
label = "rootfs2";
reg = <0x8a00000 0x7500000>; /* 117MB */
};
/* last MB is for the BBT, not writable */
partition@ff00000 {
label = "BBT";
reg = <0xff00000 0x100000>;
};
};
};
&pcie1 {
mwlwifi {
marvell,chainmask = <4 4>;
};
};
&pcie2 {
mwlwifi {
marvell,chainmask = <4 4>;
};
};
&sdhci {
pinctrl-names = "default";
pinctrl-0 = <&sdhci_pins>;
no-1-8-v;
non-removable;
wp-inverted;
bus-width = <8>;
status = "okay";
};
&usb3_1_vbus {
gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
};
&usb3_1_vbus_pins {
marvell,pins = "mpp44";
};

322
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-nas1dual.dts
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@ -1,322 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
/*
* Device Tree file for ipTIME NAS1dual
*
* Copyright (C) 2020 Sungbo Eo <mans0n@gorani.run>
*
* Based on armada-385-linksys.dtsi
* Copyright (C) 2015 Imre Kaloz <kaloz@openwrt.org>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "armada-385.dtsi"
/ {
model = "ipTIME NAS1dual";
compatible = "iptime,nas1dual", "marvell,armada385", "marvell,armada380";
aliases {
led-boot = &led_ready;
led-failsafe = &led_ready;
led-running = &led_ready;
led-upgrade = &led_ready;
label-mac-device = &eth0;
};
chosen {
bootargs = "console=ttyS0,115200n8";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x80000000>; /* 2GB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_pins>;
power {
label = "Power Button";
linux,input-type = <EV_SW>;
linux,code = <KEY_POWER>;
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
};
reset {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
};
copy {
label = "USB Copy Button";
linux,code = <KEY_COPY>;
gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&gpio_leds_pins>;
led_ready: ready {
label = "blue:ready";
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
};
hdd {
label = "blue:hdd";
gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
linux,default-trigger = "disk-activity";
};
usb {
function = LED_FUNCTION_USB;
color = <LED_COLOR_ID_BLUE>;
gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
trigger-sources = <&usb3_0_port1 &usb3_0_port2>;
linux,default-trigger = "usbport";
};
};
gpio-fan {
compatible = "gpio-fan";
pinctrl-names = "default";
pinctrl-0 = <&gpio_fan_pins>;
gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>,
<&gpio1 18 GPIO_ACTIVE_HIGH>;
/* We don't know the exact rpm, just use dummy values here. */
gpio-fan,speed-map = <0 0>, <1 1>, <2 2>;
#cooling-cells = <2>;
};
gpio-poweroff {
compatible = "gpio-poweroff";
gpios = <&pca9536 1 GPIO_ACTIVE_LOW>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&sata_power_pins>;
reg_sata_power: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "sata-power";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
regulator-always-on;
};
};
};
&ahci0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
sata-port@0 {
reg = <0>;
target-supply = <&reg_sata_power>;
#thermal-sensor-cells = <0>;
};
};
&bm {
status = "okay";
};
&bm_bppi {
status = "okay";
};
&eth0 {
pinctrl-names = "default";
pinctrl-0 = <&ge0_rgmii_pins>;
status = "okay";
phy-handle = <&ethphy1>;
phy-connection-type = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <0>;
bm,pool-short = <1>;
nvmem-cells = <&macaddr_uboot_fffa8>;
nvmem-cell-names = "mac-address";
};
&eth1 {
pinctrl-names = "default";
pinctrl-0 = <&ge1_rgmii_pins>;
status = "okay";
phy-handle = <&ethphy0>;
phy-connection-type = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>;
nvmem-cells = <&macaddr_uboot_fffa8>;
nvmem-cell-names = "mac-address";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
pca9536: gpio@41 {
compatible = "nxp,pca9536";
reg = <0x41>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "power-led", "power-board";
};
};
&mdio {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
/* LED1: On - Link, Blink - Activity, Off - No Link */
ethphy0: ethernet-phy@0 {
reg = <0>;
marvell,reg-init = <3 16 0 0x1017>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
marvell,reg-init = <3 16 0 0x1017>;
};
};
&pinctrl {
gpio_keys_pins: gpio-keys-pins {
marvell,pins = "mpp24", "mpp26", "mpp48";
marvell,function = "gpio";
};
gpio_leds_pins: gpio-leds-pins {
marvell,pins = "mpp18", "mpp20", "mpp51";
marvell,function = "gpio";
};
gpio_fan_pins: gpio-fan-pins {
marvell,pins = "mpp25", "mpp50";
marvell,function = "gpio";
};
sata_power_pins: sata-power-pins {
marvell,pins = "mpp52";
marvell,function = "gpio";
};
uart1_pins_alt: uart-pins-1-alt {
marvell,pins = "mpp45", "mpp46";
marvell,function = "ua1";
};
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x00000000 0x00100000>;
label = "u-boot";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_uboot_fffa8: macaddr@fffa8 {
reg = <0xfffa8 0x6>;
};
};
};
partition@100000 {
reg = <0x00100000 0x03ec0000>;
label = "firmware";
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x00000000 0x00600000>;
label = "kernel";
};
partition@600000 {
reg = <0x00600000 0x038c0000>;
label = "rootfs";
};
};
partition@3fc0000 {
reg = <0x03fc0000 0x00040000>;
label = "config";
read-only;
};
};
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_alt>;
status = "okay";
};
&usb3_0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
usb3_0_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
usb3_0_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};

368
target/linux/mvebu/files-6.6/arch/arm/boot/dts/marvell/armada-385-wd_cloud-mirror-gen2.dts
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@ -1,368 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for Western Digital My Cloud Mirror Gen 2
* (BWVZ/Grand Teton)
*
* Copyright (C) 2020
*
* Based on the code from:
*
* Copyright (C) 2019 Evgeny Kolesnikov <evgenyz@gmail.com>
* Copyright (C) 2016 Martin Mueller <mm@sig21.net>
* Copyright (C) 2013 Gregory CLEMENT <gregory.clement@free-electrons.com>
* Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "armada-385.dtsi"
/ {
model = "WD MyCloud Mirror Gen 2 (BWVZ/Grand Teton)";
compatible = "wd,cloud-mirror-gen2", "marvell,armada385", "marvell,armada380";
aliases {
led-boot = &led_boot;
led-failsafe = &led_boot;
led-upgrade = &led_boot;
};
chosen {
stdout-path = "serial0:115200n8";
append-rootblock = "nullparameter="; /* override the bootloader args */
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
internal-regs {
timer@c200 {
status = "okay";
};
i2c0: i2c@11000 {
status = "okay";
clock-frequency = <100000>;
};
i2c1: i2c@11100 {
status = "okay";
clock-frequency = <100000>;
};
serial@12000 {
status = "okay";
};
/* Connected to Welltrend 6703F-OG240WT MCU
* which controls power, fan and other things
*/
serial@12100 {
status = "okay";
};
pinctrl@18000 {
/* use only one pin for UART1, as mpp20 is used by sata0 */
uart1_pins: uart-pins-1 {
marvell,pins = "mpp19";
marvell,function = "ua1";
};
xhci0_vbus_pins: xhci0-vbus-pins {
marvell,pins = "mpp26";
marvell,function = "gpio";
};
xhci1_vbus_pins: xhci1-vbus-pins {
marvell,pins = "mpp27";
marvell,function = "gpio";
};
sata0_pins: sata-pins-0 {
marvell,pins = "mpp55";
marvell,function = "sata0";
};
sata1_pins: sata-pins-1 {
marvell,pins = "mpp56";
marvell,function = "sata1";
};
sata_leds: sata-leds {
marvell,pins = "mpp43", "mpp52", "mpp53", "mpp54";
marvell,function = "gpio";
};
btn_pins: btn-pins {
marvell,pins = "mpp50";
marvell,function = "gpio";
};
};
usb@58000 {
status = "okay";
};
phy: mdio@72004 {
phy0: ethernet-phy@0 {
/* Init ETH LEDs */
marvell,reg-init = <3 16 0 0x101e>;
reg = <0>;
};
};
sata@a8000 {
status = "okay";
};
nand-controller@d0000 {
status = "okay";
nand: nand@0 {
reg = <0>;
label = "pxa3xx_nand-0";
nand-rb = <0>;
marvell,nand-keep-config;
#marvell,nand-enable-arbiter; //optional
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@00000000 {
label = "U-Boot";
reg = <0x00000000 0x00500000>; /* 5 MB */
read-only;
};
partition@00500000 {
label = "kernel";
reg = <0x00500000 0x00500000>; /* 5 MB */
};
partition@00a00000 {
label = "uRamdisk";
reg = <0x00a00000 0x00500000>; /* 5 MB */
read-only;
};
partition@00f00000 {
label = "ubi";
reg = <0x00f00000 0x0b900000>; /* 185 MB */
};
partition@c800000 {
label = "rescue fw";
reg = <0x0c800000 0x00f00000>; /* 15 MB */
read-only;
};
partition@d70000 {
label = "config";
reg = <0x0d700000 0x01400000>; /* 20 MB */
read-only;
};
partition@eb00000 {
label = "reserve1";
reg = <0x0eb00000 0x00a00000>; /* 10 MB */
read-only;
};
partition@f500000 {
label = "reserve2";
reg = <0x0f500000 0x00a00000>; /* 10 MB */
read-only;
};
};
};
};
usb3@f0000 {
usb-phy = <&usb3_0_phy>;
status = "okay";
};
usb3@f8000 {
usb-phy = <&usb3_1_phy>;
status = "okay";
};
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&sata_leds>;
led_boot: s1red {
label = "red:hdd1";
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
s2red {
label = "red:hdd2";
gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
};
s1blue {
label = "blue:hdd1";
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
linux,default-trigger = "ata1";
};
s2blue {
label = "blue:hdd2";
gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
linux,default-trigger = "ata2";
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&btn_pins>;
reset {
label = "reset";
linux,code = <KEY_RESTART>; // Restart=0x198, Power=0x116
gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
wakeup-source;
};
};
usb3_0_phy: usb3_0_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_usb3_0_vbus>;
};
usb3_1_phy: usb3_1_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_usb3_1_vbus>;
};
reg_usb3_0_vbus: usb3-vbus0 {
compatible = "regulator-fixed";
regulator-name = "usb3-vbus0";
pinctrl-names = "default";
pinctrl-0 = <&xhci0_vbus_pins>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
};
reg_usb3_1_vbus: usb3-vbus1 {
compatible = "regulator-fixed";
regulator-name = "usb3-vbus1";
pinctrl-names = "default";
pinctrl-0 = <&xhci1_vbus_pins>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>;
};
reg_sata0: pwr-sata0 {
compatible = "regulator-fixed";
regulator-name = "pwr_en_sata0";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
enable-active-high;
regulator-boot-on;
gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
};
reg_5v_sata0: v5-sata0 {
compatible = "regulator-fixed";
regulator-name = "v5.0-sata0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&reg_sata0>;
};
reg_12v_sata0: v12-sata0 {
compatible = "regulator-fixed";
regulator-name = "v12.0-sata0";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
vin-supply = <&reg_sata0>;
};
reg_sata1: pwr-sata1 {
compatible = "regulator-fixed";
regulator-name = "pwr_en_sata1";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
enable-active-high;
regulator-boot-on;
gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
};
reg_5v_sata1: v5-sata1 {
compatible = "regulator-fixed";
regulator-name = "v5.0-sata1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&reg_sata1>;
};
reg_12v_sata1: v12-sata1 {
compatible = "regulator-fixed";
regulator-name = "v12.0-sata1";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
vin-supply = <&reg_sata1>;
};
};
&bm {
status = "okay";
};
&bm_bppi {
status = "okay";
};
&eth2 {
status = "okay";
phy = <&phy0>;
phy-mode = "sgmii";
buffer-manager = <&bm>;
bm,pool-long = <0>;
bm,pool-short = <1>;
};
&ahci0 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
sata-port@0 {
reg = <0>;
target-supply = <&reg_sata0>;
#thermal-sensor-cells = <0>;
};
sata-port@1 {
reg = <1>;
target-supply = <&reg_sata1>;
#thermal-sensor-cells = <1>;
};
};

66
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts
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@ -1,66 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include "armada-3720-uDPU.dtsi"
/ {
model = "Methode eDPU Board";
compatible = "methode,edpu", "marvell,armada3720", "marvell,armada3710";
};
/* PHY mode is set to 1000Base-X despite Maxlinear IC being capable of
* 2500Base-X since until 5.15 support for mvebu is available trying to
* use 2500Base-X will cause buffer overruns for which the fix is not
* easily backportable.
*/
&eth0 {
phy-mode = "1000base-x";
};
/*
* External MV88E6361 switch is only available on v2 of the board.
* U-Boot will enable the MDIO bus and switch nodes.
*/
&mdio {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&smi_pins>;
/* Actual device is MV88E6361 */
switch: switch@0 {
compatible = "marvell,mv88e6190";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "cpu";
phy-mode = "2500base-x";
managed = "in-band-status";
ethernet = <&eth0>;
};
port@9 {
reg = <9>;
label = "downlink";
phy-mode = "2500base-x";
managed = "in-band-status";
};
port@a {
reg = <10>;
label = "uplink";
phy-mode = "2500base-x";
managed = "in-band-status";
sfp = <&sfp_eth1>;
};
};
};
};

240
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
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@ -1,240 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for ESPRESSObin-Ultra
* Copyright (C) 2019 Globalscale technologies, Inc.
*
* Jason Hung <jhung@globalscaletechnologies.com>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "armada-372x.dtsi"
/ {
model = "Globalscale Marvell ESPRESSOBin Ultra Board";
compatible = "globalscale,espressobin-ultra", "marvell,armada3720",
"marvell,armada3710";
aliases {
/* for dsa slave device */
ethernet1 = &switch0port1;
ethernet2 = &switch0port2;
ethernet3 = &switch0port3;
ethernet4 = &switch0port4;
ethernet5 = &switch0port5;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
};
reg_usb3_vbus: usb3-vbus {
compatible = "regulator-fixed";
regulator-name = "usb3-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpios = <&gpionb 19 GPIO_ACTIVE_HIGH>;
};
usb3_phy: usb3-phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_usb3_vbus>;
};
leds {
pinctrl-names = "default";
compatible = "gpio-leds";
/* No assigned functions to the LEDs by default */
led1 {
label = "ebin-ultra:blue:led1";
gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
};
led2 {
label = "ebin-ultra:green:led2";
gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
};
led3 {
label = "ebin-ultra:red:led3";
gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
};
led4 {
label = "ebin-ultra:yellow:led4";
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
};
};
};
&pcie0 {
status = "okay";
};
&sata {
status = "okay";
};
&sdhci0 {
status = "okay";
non-removable;
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs400-1_8v;
marvell,pad-type = "fixed-1-8v";
};
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <108000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "firmware";
reg = <0x0 0x3e0000>;
};
partition@3e0000 {
label = "hw-info";
reg = <0x3e0000 0x10000>;
read-only;
};
partition@3f0000 {
label = "u-boot-env";
reg = <0x3f0000 0x10000>;
};
};
};
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <100000>;
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
&usb3 {
status = "okay";
usb-phy = <&usb3_phy>;
};
&usb2 {
status = "okay";
};
&eth0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&mdio {
status = "okay";
extphy: ethernet-phy@0 {
reg = <1>;
};
switch0: switch0@1 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
dsa,member = <0 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
switch0port0: port@0 {
reg = <0>;
ethernet = <&eth0>;
};
switch0port1: port@1 {
reg = <1>;
label = "lan0";
phy-handle = <&switch0phy1>;
};
switch0port2: port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&switch0phy2>;
};
switch0port3: port@3 {
reg = <3>;
label = "lan2";
phy-handle = <&switch0phy3>;
};
switch0port4: port@4 {
reg = <4>;
label = "lan3";
phy-handle = <&switch0phy4>;
};
switch0port5: port@5 {
reg = <5>;
label = "wan";
phy-handle = <&extphy>;
phy-mode = "sgmii";
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch0phy1: switch0phy1@11 {
reg = <0x11>;
};
switch0phy2: switch0phy2@12 {
reg = <0x12>;
};
switch0phy3: switch0phy3@13 {
reg = <0x13>;
};
switch0phy4: switch0phy4@14 {
reg = <0x14>;
};
};
};
};

249
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
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@ -1,249 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "armada-372x.dtsi"
/ {
model = "GL.iNet GL-MV1000";
compatible = "glinet,gl-mv1000", "marvell,armada3720";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
};
vcc_sd_reg1: regulator {
compatible = "regulator-gpio";
regulator-name = "vcc_sd1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
gpios-states = <0>;
states = <1800000 0x1
3300000 0x0>;
enable-active-high;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
};
switch {
label = "switch";
linux,code = <BTN_0>;
gpios = <&gpiosb 22 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
vpn {
label = "green:vpn";
gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
};
wan {
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
};
led_power: power {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
default-state = "on";
};
};
};
&spi0 {
status = "okay";
flash@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <104000000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0 0xf0000>;
read-only;
};
partition@f0000 {
label = "u-boot-env";
reg = <0xf0000 0x8000>;
};
factory: partition@f8000 {
label = "factory";
reg = <0xf8000 0x8000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_factory_6: macaddr@6 {
reg = <0x6 0x6>;
};
};
};
partition@100000 {
label = "gl-firmware-dtb";
reg = <0x100000 0x10000>;
read-only;
};
partition@110000 {
label = "gl-firmware";
reg = <0x110000 0xef0000>;
read-only;
};
partition@ef0000 {
label = "gl-firmware-jffs2";
reg = <0xef0000 0x110000>;
read-only;
};
};
};
};
&sdhci1 {
wp-inverted;
bus-width = <4>;
cd-gpios = <&gpionb 17 GPIO_ACTIVE_LOW>;
marvell,pad-type = "sd";
no-1-8-v;
vqmmc-supply = <&vcc_sd_reg1>;
status = "okay";
};
&sdhci0 {
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs400-1_8v;
non-removable;
no-sd;
no-sdio;
marvell,pad-type = "fixed-1-8v";
status = "okay";
};
&usb3 {
status = "okay";
};
&usb2 {
status = "okay";
};
&uart0 {
status = "okay";
};
&mdio {
switch0: switch0@1 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
dsa,member = <0 0>;
ports: ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ethernet = <&eth0>;
};
port@1 {
reg = <1>;
label = "wan";
phy-handle = <&switch0phy0>;
};
port@2 {
reg = <2>;
label = "lan0";
phy-handle = <&switch0phy1>;
nvmem-cells = <&macaddr_factory_6>;
nvmem-cell-names = "mac-address";
};
port@3 {
reg = <3>;
label = "lan1";
phy-handle = <&switch0phy2>;
nvmem-cells = <&macaddr_factory_6>;
nvmem-cell-names = "mac-address";
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch0phy0: switch0phy0@11 {
reg = <0x11>;
};
switch0phy1: switch0phy1@12 {
reg = <0x12>;
};
switch0phy2: switch0phy2@13 {
reg = <0x13>;
};
};
};
};
&eth0 {
nvmem-cells = <&macaddr_factory_0>;
nvmem-cell-names = "mac-address";
phy-mode = "rgmii-id";
status = "okay";
fixed-link {
speed = <1000>;
full-duplex;
};
};

46
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
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@ -1,46 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include "armada-3720-uDPU.dtsi"
/ {
model = "Methode uDPU Board";
compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
sfp_eth0: sfp-eth0 {
compatible = "sff,sfp";
i2c-bus = <&i2c0>;
los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>;
tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <3000>;
};
};
&pinctrl_nb {
i2c1_recovery_pins: i2c1-recovery-pins {
groups = "i2c1";
function = "gpio";
};
};
&i2c0 {
status = "okay";
pinctrl-names = "default", "recovery";
pinctrl-0 = <&i2c1_pins>;
pinctrl-1 = <&i2c1_recovery_pins>;
/delete-property/mrvl,i2c-fast-mode;
scl-gpios = <&gpionb 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
};
&eth0 {
phy-mode = "2500base-x";
sfp = <&sfp_eth0>;
};
&eth1 {
phy-mode = "2500base-x";
};

165
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi
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@ -1,165 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device tree for the uDPU board.
* Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
* Copyright (C) 2016 Marvell
* Copyright (C) 2019 Methode Electronics
* Copyright (C) 2019 Telus
*
* Vladimir Vid <vladimir.vid@sartura.hr>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "armada-372x.dtsi"
/ {
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
};
aliases {
ethernet0 = &eth0;
ethernet1 = &eth1;
};
leds {
compatible = "gpio-leds";
led-power1 {
label = "udpu:green:power";
gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
};
led-power2 {
label = "udpu:red:power";
gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
};
led-network1 {
label = "udpu:green:network";
gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
};
led-network2 {
label = "udpu:red:network";
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
};
led-alarm1 {
label = "udpu:green:alarm";
gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;
};
led-alarm2 {
label = "udpu:red:alarm";
gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;
};
};
sfp_eth1: sfp-eth1 {
compatible = "sff,sfp";
i2c-bus = <&i2c1>;
los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;
tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <3000>;
};
};
&sdhci0 {
status = "okay";
bus-width = <8>;
mmc-ddr-1_8v;
mmc-hs400-1_8v;
marvell,pad-type = "fixed-1-8v";
non-removable;
no-sd;
no-sdio;
};
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <54000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "firmware";
reg = <0x0 0x180000>;
};
partition@180000 {
label = "u-boot-env";
reg = <0x180000 0x10000>;
};
};
};
};
&pinctrl_nb {
i2c2_recovery_pins: i2c2-recovery-pins {
groups = "i2c2";
function = "gpio";
};
};
&i2c1 {
status = "okay";
pinctrl-names = "default", "recovery";
pinctrl-0 = <&i2c2_pins>;
pinctrl-1 = <&i2c2_recovery_pins>;
/delete-property/mrvl,i2c-fast-mode;
scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
temp-sensor@48 {
compatible = "ti,tmp75c";
reg = <0x48>;
};
temp-sensor@49 {
compatible = "ti,tmp75c";
reg = <0x49>;
};
};
&eth0 {
status = "okay";
managed = "in-band-status";
phys = <&comphy1 0>;
};
&eth1 {
phy-mode = "sgmii";
status = "okay";
managed = "in-band-status";
phys = <&comphy0 1>;
sfp = <&sfp_eth1>;
};
&usb3 {
status = "okay";
phys = <&usb2_utmi_otg_phy>;
phy-names = "usb2-utmi-otg-phy";
};
&uart0 {
status = "okay";
};

448
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
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@ -1,448 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Device Tree file for Globalscale MOCHAbin
* Copyright (C) 2019 Globalscale technologies, Inc.
* Copyright (C) 2021 Sartura Ltd.
*
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "armada-7040.dtsi"
/ {
model = "Globalscale MOCHAbin";
compatible = "globalscale,mochabin", "marvell,armada7040",
"marvell,armada-ap806-quad", "marvell,armada-ap806";
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
ethernet0 = &cp0_eth0;
ethernet1 = &cp0_eth1;
ethernet2 = &cp0_eth2;
ethernet3 = &swport1;
ethernet4 = &swport2;
ethernet5 = &swport3;
ethernet6 = &swport4;
};
/* SFP+ 10G */
sfp_eth0: sfp-eth0 {
compatible = "sff,sfp";
i2c-bus = <&cp0_i2c1>;
los-gpio = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&sfp_gpio 2 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&sfp_gpio 1 GPIO_ACTIVE_HIGH>;
tx-fault-gpio = <&sfp_gpio 0 GPIO_ACTIVE_HIGH>;
};
/* SFP 1G */
sfp_eth2: sfp-eth2 {
compatible = "sff,sfp";
i2c-bus = <&cp0_i2c0>;
los-gpio = <&sfp_gpio 7 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&sfp_gpio 6 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&sfp_gpio 5 GPIO_ACTIVE_HIGH>;
tx-fault-gpio = <&sfp_gpio 4 GPIO_ACTIVE_HIGH>;
};
};
/* microUSB UART console */
&uart0 {
status = "okay";
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
};
/* eMMC */
&ap_sdhci0 {
status = "okay";
bus-width = <4>;
non-removable;
/delete-property/ marvell,xenon-phy-slow-mode;
no-1-8-v;
};
&cp0_pinctrl {
cp0_uart0_pins: cp0-uart0-pins {
marvell,pins = "mpp6", "mpp7";
marvell,function = "uart0";
};
cp0_spi0_pins: cp0-spi0-pins {
marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59";
marvell,function = "spi0";
};
cp0_spi1_pins: cp0-spi1-pins {
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
marvell,function = "spi1";
};
cp0_i2c0_pins: cp0-i2c0-pins {
marvell,pins = "mpp37", "mpp38";
marvell,function = "i2c0";
};
cp0_i2c1_pins: cp0-i2c1-pins {
marvell,pins = "mpp2", "mpp3";
marvell,function = "i2c1";
};
pca9554_int_pins: pca9554-int-pins {
marvell,pins = "mpp27";
marvell,function = "gpio";
};
cp0_rgmii1_pins: cp0-rgmii1-pins {
marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", "mpp48", "mpp49",
"mpp50", "mpp51", "mpp52", "mpp53", "mpp54", "mpp55";
marvell,function = "ge1";
};
is31_sdb_pins: is31-sdb-pins {
marvell,pins = "mpp30";
marvell,function = "gpio";
};
cp0_pcie_reset_pins: cp0-pcie-reset-pins {
marvell,pins = "mpp9";
marvell,function = "gpio";
};
cp0_switch_pins: cp0-switch-pins {
marvell,pins = "mpp0", "mpp1";
marvell,function = "gpio";
};
cp0_phy_pins: cp0-phy-pins {
marvell,pins = "mpp12";
marvell,function = "gpio";
};
};
/* mikroBUS UART */
&cp0_uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp0_uart0_pins>;
};
/* mikroBUS SPI */
&cp0_spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp0_spi0_pins>;
};
/* SPI-NOR */
&cp0_spi1{
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp0_spi1_pins>;
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x3e0000>;
read-only;
};
partition@3e0000 {
label = "hw-info";
reg = <0x3e0000 0x10000>;
read-only;
};
partition@3f0000 {
label = "u-boot-env";
reg = <0x3f0000 0x10000>;
};
};
};
};
/* mikroBUS, 1G SFP and GPIO expander */
&cp0_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp0_i2c0_pins>;
clock-frequency = <100000>;
sfp_gpio: pca9554@39 {
compatible = "nxp,pca9554";
pinctrl-names = "default";
pinctrl-0 = <&pca9554_int_pins>;
reg = <0x39>;
interrupt-parent = <&cp0_gpio1>;
interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
/*
* IO0_0: SFP+_TX_FAULT
* IO0_1: SFP+_TX_DISABLE
* IO0_2: SFP+_PRSNT
* IO0_3: SFP+_LOSS
* IO0_4: SFP_TX_FAULT
* IO0_5: SFP_TX_DISABLE
* IO0_6: SFP_PRSNT
* IO0_7: SFP_LOSS
*/
};
};
/* IS31FL3199, mini-PCIe and 10G SFP+ */
&cp0_i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp0_i2c1_pins>;
clock-frequency = <100000>;
leds@64 {
compatible = "issi,is31fl3199";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&is31_sdb_pins>;
shutdown-gpios = <&cp0_gpio1 30 GPIO_ACTIVE_HIGH>;
reg = <0x64>;
led1_red: led@1 {
label = "red:led1";
reg = <1>;
led-max-microamp = <20000>;
};
led1_green: led@2 {
label = "green:led1";
reg = <2>;
};
led1_blue: led@3 {
label = "blue:led1";
reg = <3>;
};
led2_red: led@4 {
label = "red:led2";
reg = <4>;
};
led2_green: led@5 {
label = "green:led2";
reg = <5>;
};
led2_blue: led@6 {
label = "blue:led2";
reg = <6>;
};
led3_red: led@7 {
label = "red:led3";
reg = <7>;
};
led3_green: led@8 {
label = "green:led3";
reg = <8>;
};
led3_blue: led@9 {
label = "blue:led3";
reg = <9>;
};
};
};
&cp0_mdio {
status = "okay";
/* 88E1512 PHY */
eth2phy: ethernet-phy@1 {
reg = <1>;
sfp = <&sfp_eth2>;
pinctrl-names = "default";
pinctrl-0 = <&cp0_phy_pins>;
reset-gpios = <&cp0_gpio1 12 GPIO_ACTIVE_LOW>;
};
/* 88E6141 Topaz switch */
switch: switch@3 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
pinctrl-names = "default";
pinctrl-0 = <&cp0_switch_pins>;
reset-gpios = <&cp0_gpio1 0 GPIO_ACTIVE_LOW>;
interrupt-parent = <&cp0_gpio1>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
swport1: port@1 {
reg = <1>;
label = "lan0";
phy-handle = <&swphy1>;
};
swport2: port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&swphy2>;
};
swport3: port@3 {
reg = <3>;
label = "lan2";
phy-handle = <&swphy3>;
};
swport4: port@4 {
reg = <4>;
label = "lan3";
phy-handle = <&swphy4>;
};
port@5 {
reg = <5>;
ethernet = <&cp0_eth1>;
phy-mode = "2500base-x";
managed = "in-band-status";
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
swphy1: swphy1@17 {
reg = <17>;
};
swphy2: swphy2@18 {
reg = <18>;
};
swphy3: swphy3@19 {
reg = <19>;
};
swphy4: swphy4@20 {
reg = <20>;
};
};
};
};
&cp0_ethernet {
status = "okay";
};
/* 10G SFP+ */
&cp0_eth0 {
status = "okay";
phy-mode = "10gbase-r";
phys = <&cp0_comphy4 0>;
managed = "in-band-status";
sfp = <&sfp_eth0>;
};
/* Topaz switch uplink */
&cp0_eth1 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp0_comphy0 1>;
fixed-link {
speed = <2500>;
full-duplex;
};
};
/* 1G SFP or 1G RJ45 */
&cp0_eth2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp0_rgmii1_pins>;
phy = <&eth2phy>;
phy-mode = "rgmii-id";
};
/* SMSC USB5434B hub */
&cp0_usb3_0 {
status = "okay";
phys = <&cp0_comphy1 0>;
phy-names = "cp0-usb3h0-comphy";
};
/* miniPCI-E USB */
&cp0_usb3_1 {
status = "okay";
};
&cp0_sata0 {
status = "okay";
/* 7 + 12 SATA connector (J24) */
sata-port@0 {
phys = <&cp0_comphy2 0>;
phy-names = "cp0-sata0-0-phy";
};
/* M.2-2250 B-key (J39) */
sata-port@1 {
phys = <&cp0_comphy3 1>;
phy-names = "cp0-sata0-1-phy";
};
};
/* miniPCI-E (J5) */
&cp0_pcie2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp0_pcie_reset_pins>;
phys = <&cp0_comphy5 2>;
phy-names = "cp0-pcie2-x1-phy";
reset-gpio = <&cp0_gpio1 9 GPIO_ACTIVE_LOW>;
ranges = <0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x8000000>;
};

406
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "armada-7040.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "MikroTik RB5009";
compatible = "mikrotik,rb5009", "marvell,armada7040",
"marvell,armada-ap806-quad", "marvell,armada-ap806";
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x40000000>;
};
aliases {
led-boot = &led_user;
led-failsafe = &led_user;
led-running = &led_user;
led-upgrade = &led_user;
label-mac-device = &p1;
};
usb3_vbus: regulator-usb3-vbus0 {
compatible = "regulator-fixed";
regulator-name = "usb3_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&cp0_gpio2 23 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_leds: regulator-leds {
compatible = "regulator-fixed";
regulator-name = "LED-power";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&cp0_gpio2 27 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-boot-on;
};
output-led-power {
compatible = "regulator-output";
vout-supply = <&reg_leds>;
};
sfp_i2c: sfp-i2c {
compatible = "i2c-gpio";
sda-gpios = <&cp0_gpio1 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
scl-gpios = <&cp0_gpio1 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&cp0_gpio1 28 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_user: user {
function = "user";
gpios = <&cp0_gpio2 26 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
};
sfp {
function = "sfp";
gpios = <&cp0_gpio2 25 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
};
hdr1 {
function = "hdr1";
gpios = <&cp0_gpio1 4 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
};
hdr2 {
function = "hdr2";
gpios = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
};
};
sfp: sfp {
compatible = "sff,sfp";
i2c-bus = <&sfp_i2c>;
mod-def0-gpios = <&cp0_gpio1 11 GPIO_ACTIVE_LOW>;
los-gpios = <&cp0_gpio1 2 GPIO_ACTIVE_HIGH>;
tx-fault-gpios = <&cp0_gpio1 6 GPIO_ACTIVE_HIGH>;
tx-disable-gpios = <&cp0_gpio1 5 GPIO_ACTIVE_HIGH>;
rate-select0-gpios = <&cp0_gpio1 3 GPIO_ACTIVE_HIGH>;
};
};
&uart0 {
status = "okay";
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
};
&spi0 {
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
compatible = "mikrotik,routerboot-partitions";
#address-cells = <1>;
#size-cells = <1>;
label = "MikroTik";
reg = <0x0 0xfe0000>;
hard_config: hard_config {
read-only;
nvmem-layout {
compatible = "mikrotik,routerboot-nvmem";
macaddr_hard: base-mac-address {
#nvmem-cell-cells = <1>;
};
};
};
soft_config {
};
dtb_config {
read-only;
};
};
partition@b0000 {
label = "RouterBOOT-primary";
reg = <0xb0000 0x10000>;
};
/* Empty space on NOR repurposed for U-Boot environment */
partition@fe0000 {
label = "u-boot-env";
reg = <0xfe0000 0x20000>;
nvmem-layout {
compatible = "u-boot,env";
};
};
};
};
};
&cp0_nand_controller {
status = "okay";
nand@0 {
reg = <0>;
nand-rb = <0>;
nand-ecc-mode = "hw";
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-on-flash-bbt;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "YAFFS";
reg = <0x0 0x800000>;
};
partition@800000 {
label = "ubi";
reg = <0x800000 0x3f800000>;
};
};
};
};
&cp0_utmi {
status = "okay";
};
&cp0_comphy3 {
connector {
compatible = "usb-a-connector";
phy-supply = <&usb3_vbus>;
};
};
&cp0_usb3_1 {
status = "okay";
phys = <&cp0_comphy3 1>, <&cp0_utmi1>;
phy-names = "cp0-usb3h1-comphy", "utmi";
dr_mode = "host";
};
&cp0_i2c0 {
status = "okay";
clock-frequency = <100000>;
};
&cp0_mdio {
status = "okay";
};
&cp0_ethernet {
status = "okay";
};
&cp0_eth0 {
/* This port is connected to 88E6393X switch */
status = "okay";
phy-mode = "10gbase-r";
phys = <&cp0_comphy2 0>;
managed = "in-band-status";
nvmem-cells = <&macaddr_hard 0>;
nvmem-cell-names = "mac-address";
};
&cp0_mdio {
status = "okay";
switch@0 {
/* Actual device is MV88E6393X */
compatible = "marvell,mv88e6190";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
/* LED config is lost if switch is reset */
//reset-gpios = <&cp0_gpio2 2 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "cpu";
ethernet = <&cp0_eth0>;
phy-mode = "10gbase-r";
managed = "in-band-status";
};
port@1 {
reg = <1>;
label = "p8";
phy-handle = <&switch0phy1>;
nvmem-cells = <&macaddr_hard 7>;
nvmem-cell-names = "mac-address";
};
port@2 {
reg = <2>;
label = "p7";
phy-handle = <&switch0phy2>;
nvmem-cells = <&macaddr_hard 6>;
nvmem-cell-names = "mac-address";
};
port@3 {
reg = <3>;
label = "p6";
phy-handle = <&switch0phy3>;
nvmem-cells = <&macaddr_hard 5>;
nvmem-cell-names = "mac-address";
};
port@4 {
reg = <4>;
label = "p5";
phy-handle = <&switch0phy4>;
nvmem-cells = <&macaddr_hard 4>;
nvmem-cell-names = "mac-address";
};
port@5 {
reg = <5>;
label = "p4";
phy-handle = <&switch0phy5>;
nvmem-cells = <&macaddr_hard 3>;
nvmem-cell-names = "mac-address";
};
port@6 {
reg = <6>;
label = "p3";
phy-handle = <&switch0phy6>;
nvmem-cells = <&macaddr_hard 2>;
nvmem-cell-names = "mac-address";
};
port@7 {
reg = <7>;
label = "p2";
phy-handle = <&switch0phy7>;
nvmem-cells = <&macaddr_hard 1>;
nvmem-cell-names = "mac-address";
};
p1: port@9 {
reg = <9>;
label = "p1";
phy-mode = "sgmii";
phy-handle = <&qca8081>;
managed = "in-band-status";
nvmem-cells = <&macaddr_hard 0>;
nvmem-cell-names = "mac-address";
};
port@a {
reg = <10>;
label = "sfp";
phy-mode = "10gbase-r";
managed = "in-band-status";
sfp = <&sfp>;
nvmem-cells = <&macaddr_hard 8>;
nvmem-cell-names = "mac-address";
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch0phy1: switch0phy1@1 {
reg = <0x1>;
};
switch0phy2: switch0phy2@2 {
reg = <0x2>;
};
switch0phy3: switch0phy3@3 {
reg = <0x3>;
};
switch0phy4: switch0phy4@4 {
reg = <0x4>;
};
switch0phy5: switch0phy5@5 {
reg = <0x5>;
};
switch0phy6: switch0phy6@6 {
reg = <0x6>;
};
switch0phy7: switch0phy7@7 {
reg = <0x7>;
};
};
mdio1 {
compatible = "marvell,mv88e6xxx-mdio-external";
#address-cells = <1>;
#size-cells = <0>;
qca8081: qca8081@0 {
reg = <0>;
leds {
#address-cells = <1>;
#size-cells = <0>;
led@1 {
reg = <1>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
default-state = "keep";
active-low;
};
};
};
};
};
};

425
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-7040-v-80.dts
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@ -1,425 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/leds/common.h>
#include "armada-7040.dtsi"
/ {
model = "Check Point V-80";
compatible = "checkpoint,v-80", "marvell,armada7040",
"marvell,armada-ap806-quad", "marvell,armada-ap806";
aliases {
ethernet0 = &cp0_eth0;
ethernet1 = &cp0_eth1;
mmc0 = &ap_sdhci0;
mmc1 = &cp0_sdhci0;
led-boot = &led_power_blue;
led-failsafe = &led_power_red;
led-running = &led_power_blue;
led-upgrade = &led_power_blue;
label-mac-device = &cp0_eth1;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&pmx_gpio_keys_pins>;
pinctrl-names = "default";
button-reset {
label = "reset";
gpios = <&cp0_gpio1 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&pmx_gpio_leds_pins>;
pinctrl-names = "default";
/* populated but no hole on the case */
led-0 {
gpios = <&cp0_gpio1 13 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN;
};
led_power_red: led-1 {
gpios = <&cp0_gpio1 23 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
};
led-2 {
gpios = <&cp0_gpio1 26 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WAN_ONLINE;
};
/* populated but no hole on the case */
led-3 {
gpios = <&cp0_gpio2 1 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WLAN;
};
led_power_blue: led-4 {
gpios = <&cp0_gpio2 2 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_POWER;
};
led-5 {
gpios = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = "management";
};
led-6 {
gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = "management";
};
led-7 {
gpios = <&cp0_gpio2 22 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WAN_ONLINE;
};
};
regulator-usb-vbus {
compatible = "regulator-fixed";
pinctrl-0 = <&pmx_reg_usb_vbus_pins>;
pinctrl-names = "default";
regulator-name = "usb-vbus";
gpios = <&cp0_gpio1 24 GPIO_ACTIVE_HIGH>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
};
};
/* USB Type-C UART console */
&uart0 {
status = "okay";
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
};
/*
* internal MicroSD slot
* (Note: not populated on some HW versions)
*/
&ap_sdhci0 {
status = "okay";
pinctrl-0 = <&pmx_ap_sdhci0_pins>;
pinctrl-names = "default";
bus-width = <4>;
cd-gpios = <&cp0_gpio1 6 GPIO_ACTIVE_LOW>;
/*
* Not stable in HS modes - phy needs "more calibration", so add
* the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
*/
marvell,xenon-phy-slow-mode;
no-1-8-v;
};
&cp0_pinctrl {
pinctrl-0 = <&pmx_board_id_pins>;
pinctrl-names = "default";
pmx_ap_sdhci0_pins: ap-sdhci0-pins {
marvell,pins = "mpp6";
marvell,function = "gpio";
};
pmx_cp0_mdio_pins: cp0-mdio-pins {
marvell,pins = "mpp27", "mpp28";
marvell,function = "ge";
};
pmx_cp0_spi1_pins: cp0-spi1-pins {
marvell,pins = "mpp47", "mpp48", "mpp49", "mpp50";
marvell,function = "spi1";
};
pmx_cp0_i2c0_pins: cp0-i2c0-pins {
marvell,pins = "mpp37", "mpp38";
marvell,function = "i2c0";
};
pmx_cp0_i2c1_pins: cp0-i2c1-pins {
marvell,pins = "mpp2", "mpp3";
marvell,function = "i2c1";
};
pmx_cp0_sdhci0_pins: cp0-sdhci0-pins {
marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59", "mpp60", "mpp61";
marvell,function = "sdio";
};
pmx_gpio_keys_pins: gpio-keys-pins {
marvell,pins = "mpp12";
marvell,function = "gpio";
};
pmx_gpio_leds_pins: gpio-leds-pins {
marvell,pins = "mpp13", "mpp23", "mpp26", "mpp33", "mpp34", "mpp51",
"mpp52", "mpp54";
marvell,function = "gpio";
};
pmx_reg_usb_vbus_pins: reg-usb-vbus-pins {
marvell,pins = "mpp24";
marvell,function = "gpio";
};
pmx_board_id_pins: board-id-pins {
marvell,pins = "mpp4", "mpp10", "mpp62";
marvell,function = "gpio";
};
pmx_eeprom_wp_pins: eeprom-wp-pins {
marvell,pins = "mpp55";
marvell,function = "gpio";
};
};
&cp0_mdio {
status = "okay";
pinctrl-0 = <&pmx_cp0_mdio_pins>;
pinctrl-names = "default";
/* Marvell 88E6352 */
switch@0 {
compatible = "marvell,mv88e6085";
reg = <0x0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
swport0: port@0 {
reg = <0x0>;
label = "lan5";
phy-handle = <&swphy0>;
};
swport1: port@1 {
reg = <0x1>;
label = "lan4";
phy-handle = <&swphy1>;
};
swport2: port@2 {
reg = <0x2>;
label = "lan3";
phy-handle = <&swphy2>;
};
swport3: port@3 {
reg = <0x3>;
label = "lan2";
phy-handle = <&swphy3>;
};
swport4: port@4 {
reg = <0x4>;
label = "lan1";
phy-handle = <&swphy4>;
};
port@5 {
reg = <0x5>;
ethernet = <&cp0_eth0>;
phy-connection-type = "sgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
swphy0: switch-phy@0 {
reg = <0x0>;
};
swphy1: switch-phy@1 {
reg = <0x1>;
};
swphy2: switch-phy@2 {
reg = <0x2>;
};
swphy3: switch-phy@3 {
reg = <0x3>;
};
swphy4: switch-phy@4 {
reg = <0x4>;
};
};
};
/* Marvell 88E1512 */
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-id0141,0dd1",
"ethernet-phy-ieee802.3-c22";
reg = <0x1>;
/*
* LED[0] (Green): LINK/ACT
* LED[1] (Amber): SPEED 100/1000M
*/
marvell,reg-init = <3 16 0 0x61>;
};
};
&cp0_ethernet {
status = "okay";
};
/* LAN1-5 (Switch) */
&cp0_eth0 {
status = "okay";
phy-connection-type = "sgmii";
phys = <&cp0_comphy2 0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
/* "WAN" */
&cp0_eth1 {
status = "okay";
phy-connection-type = "sgmii";
phy-handle = <&ethphy1>;
phys = <&cp0_comphy0 1>;
};
&cp0_gpio1 {
board-id-1 {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
input;
};
board-id-0 {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
input;
};
};
&cp0_gpio2 {
board-id-2 {
gpio-hog;
gpios = <30 GPIO_ACTIVE_HIGH>;
input;
};
};
/* 2x NCT7802Y, EEPROM */
&cp0_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_cp0_i2c0_pins>;
clock-frequency = <100000>;
hwmon@28 {
compatible = "nuvoton,nct7802";
reg = <0x28>;
};
hwmon@29 {
compatible = "nuvoton,nct7802";
reg = <0x29>;
};
/* Giantec GT24C04A */
eeprom@54 {
compatible = "atmel,24c04";
pinctrl-0 = <&pmx_eeprom_wp_pins>;
pinctrl-names = "default";
reg = <0x54>;
wp-gpios = <&cp0_gpio2 23 GPIO_ACTIVE_HIGH>;
read-only;
};
};
/* RTC */
&cp0_i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_cp0_i2c1_pins>;
clock-frequency = <100000>;
rtc@68 {
compatible = "dallas,ds1337";
reg = <0x68>;
};
};
/* eMMC */
&cp0_sdhci0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_cp0_sdhci0_pins>;
bus-width = <4>;
non-removable;
};
/*
* mPCIe slot
* (Note: not populated on some HW versions)
*/
&cp0_pcie2 {
status = "okay";
phys = <&cp0_comphy5 2>;
phy-names = "cp0-pcie2-x1-phy";
};
&cp0_utmi {
status = "okay";
};
/* USB 3.0 Type-A */
&cp0_usb3_0 {
status = "okay";
dr_mode = "host";
phys = <&cp0_comphy1 0>, <&cp0_utmi0>;
phy-names = "cp0-usb3h0-comphy", "utmi";
};

514
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/armada-8040-v-81.dts
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@ -1,514 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/leds/common.h>
#include "armada-8040.dtsi"
/ {
model = "Check Point V-81";
compatible = "checkpoint,v-81", "marvell,armada8040",
"marvell,armada-ap806-quad", "marvell,armada-ap806";
aliases {
ethernet0 = &cp0_eth0;
ethernet1 = &cp1_eth1;
ethernet2 = &cp1_eth2;
mmc0 = &ap_sdhci0;
mmc1 = &cp0_sdhci0;
led-boot = &led_power_blue;
led-failsafe = &led_power_red;
led-running = &led_power_blue;
led-upgrade = &led_power_blue;
label-mac-device = &cp1_eth2;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&pmx_gpio_keys_pins>;
pinctrl-names = "default";
button-reset {
label = "reset";
gpios = <&cp1_gpio1 31 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&pmx_gpio_leds_pins>;
pinctrl-names = "default";
led-0 {
gpios = <&cp1_gpio1 2 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = "management";
};
led-1 {
gpios = <&cp1_gpio1 3 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = "management";
};
led-2 {
gpios = <&cp1_gpio1 6 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WAN_ONLINE;
};
led-3 {
gpios = <&cp1_gpio1 7 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WAN_ONLINE;
};
led_power_red: led-4 {
gpios = <&cp1_gpio1 11 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
};
/* populated but no hole on the case ("LTE" or "DSL") */
led-5 {
gpios = <&cp1_gpio1 14 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_MOBILE;
};
/* populated but no hole on the case ("LTE" or "DSL") */
led-6 {
gpios = <&cp1_gpio1 15 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_MOBILE;
};
/* populated but no hole on the case */
led-7 {
gpios = <&cp1_gpio1 16 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WLAN;
};
/* populated but no hole on the case */
led-8 {
gpios = <&cp1_gpio1 24 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN;
};
led_power_blue: led-9 {
gpios = <&cp1_gpio1 26 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_POWER;
};
/* populated but no hole on the case (unused) */
led-10 {
gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = "unused";
};
};
regulator-usb-vbus {
compatible = "regulator-fixed";
regulator-name = "usb-vbus";
gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
};
sfp: sfp {
/*
* Note: port LEDs on RJ45/SFP are switched
* by pin7 on &cp0_gpio2
*
* - HIGH: RJ45
* - LOW : SFP
*/
compatible = "sff,sfp";
i2c-bus = <&cp0_i2c1>;
los-gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
tx-disable-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
tx-fault-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
};
};
/* USB Type-C UART console */
&uart0 {
status = "okay";
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
};
&ap_pinctrl {
pmx_ap_sdhci0_pins: ap-sdhci0-pins {
marvell,pins = "mpp12";
marvell,function = "gpio";
};
};
/* MicroSD slot */
&ap_sdhci0 {
status = "okay";
pinctrl-0 = <&pmx_ap_sdhci0_pins>;
pinctrl-names = "default";
bus-width = <4>;
cd-gpios = <&ap_gpio 12 GPIO_ACTIVE_LOW>;
/*
* Not stable in HS modes - phy needs "more calibration", so add
* the "slow-mode" and disable SDR104, SDR50 and DDR50 modes.
*/
marvell,xenon-phy-slow-mode;
no-1-8-v;
};
&cp0_ethernet {
status = "okay";
};
/* LAN1-8 (Switch) */
&cp0_eth0 {
status = "okay";
phy-connection-type = "10gbase-r";
phys = <&cp0_comphy2 0>;
fixed-link {
speed = <10000>;
full-duplex;
};
};
/* 2x PCA9555, 2x NCT7802Y, TCA9534A */
&cp0_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_cp0_i2c0_pins>;
clock-frequency = <100000>;
gpio3: gpio@21 {
pinctrl-0 = <&pmx_pca9555_pins>;
pinctrl-names = "default";
compatible = "nxp,pca9555";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&cp0_gpio2>;
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio4: gpio@22 {
compatible = "nxp,pca9555";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
};
hwmon@2b {
compatible = "nuvoton,nct7802";
reg = <0x2b>;
};
hwmon@2d {
compatible = "nuvoton,nct7802";
reg = <0x2d>;
};
/* TI TCA9534A */
gpio5: gpio@3b {
compatible = "nxp,pca9534";
reg = <0x3b>;
gpio-controller;
#gpio-cells = <2>;
};
};
/* EEPROM */
&cp0_i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_cp0_i2c1_pins>;
clock-frequency = <100000>;
/* Giantec GT24C04A */
eeprom@54 {
compatible = "atmel,24c04";
reg = <0x54>;
wp-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>;
read-only;
};
};
&cp0_mdio {
status = "okay";
pinctrl-0 = <&pmx_cp0_mdio_pins>;
pinctrl-names = "default";
/* Marvell 88E6393X */
switch@0 {
compatible = "marvell,mv88e6190";
reg = <0x0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ethernet = <&cp0_eth0>;
phy-connection-type = "10gbase-r";
fixed-link {
speed = <10000>;
full-duplex;
};
};
swport1: port@1 {
reg = <1>;
label = "lan1";
phy-handle = <&swphy1>;
};
swport2: port@2 {
reg = <2>;
label = "lan2";
phy-handle = <&swphy2>;
};
swport3: port@3 {
reg = <3>;
label = "lan3";
phy-handle = <&swphy3>;
};
swport4: port@4 {
reg = <4>;
label = "lan4";
phy-handle = <&swphy4>;
};
swport5: port@5 {
reg = <5>;
label = "lan5";
phy-handle = <&swphy5>;
};
swport6: port@6 {
reg = <6>;
label = "lan6";
phy-handle = <&swphy6>;
};
swport7: port@7 {
reg = <7>;
label = "lan7";
phy-handle = <&swphy7>;
};
swport8: port@8 {
reg = <8>;
label = "lan8";
phy-handle = <&swphy8>;
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
swphy1: switch-phy@1 {
reg = <0x1>;
};
swphy2: switch-phy@2 {
reg = <0x2>;
};
swphy3: switch-phy@3 {
reg = <0x3>;
};
swphy4: switch-phy@4 {
reg = <0x4>;
};
swphy5: switch-phy@5 {
reg = <0x5>;
};
swphy6: switch-phy@6 {
reg = <0x6>;
};
swphy7: switch-phy@7 {
reg = <0x7>;
};
swphy8: switch-phy@8 {
reg = <0x8>;
};
};
};
};
&cp0_pinctrl {
pmx_cp0_mdio_pins: cp0-mdio-pins {
marvell,pins = "mpp32", "mpp34";
marvell,function = "ge";
};
pmx_cp0_spi1_pins: cp0-spi0-pins {
marvell,pins = "mpp40", "mpp41", "mpp42", "mpp43";
marvell,function = "spi0";
};
pmx_cp0_i2c0_pins: cp0-i2c0-pins {
marvell,pins = "mpp37", "mpp38";
marvell,function = "i2c0";
};
pmx_cp0_i2c1_pins: cp0-i2c1-pins {
marvell,pins = "mpp35", "mpp36";
marvell,function = "i2c1";
};
pmx_cp0_sdhci0_pins: cp0-sdhci0-pins {
marvell,pins = "mpp56", "mpp57","mpp58", "mpp59", "mpp60", "mpp61";
marvell,function = "sdio";
};
pmx_cp1_rgmii1_pins: cp1-rgmii1-pins {
marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", "mpp48", "mpp49",
"mpp50", "mpp51", "mpp52", "mpp53", "mpp54", "mpp55";
marvell,function = "ge1";
};
pmx_pca9555_pins: pca9555-pins {
marvell,pins = "mpp33";
marvell,function = "gpio";
};
};
/* eMMC */
&cp0_sdhci0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pmx_cp0_sdhci0_pins>;
bus-width = <4>;
non-removable;
};
&cp0_utmi {
status = "okay";
};
/* USB 3.0 Type-A */
&cp0_usb3_0 {
status = "okay";
dr_mode = "host";
phys = <&cp0_comphy1 0>, <&cp0_utmi0>;
phy-names = "cp0-usb3h0-comphy", "utmi";
};
&cp1_ethernet {
status = "okay";
pinctrl-0 = <&pmx_cp1_rgmii1_pins>;
pinctrl-names = "default";
};
/* "DMZ" (RJ45/SFP) */
&cp1_eth1 {
status = "okay";
phy-connection-type = "rgmii-id";
phy-handle = <&ethphy0>;
};
/* "WAN" */
&cp1_eth2 {
status = "okay";
phy-connection-type = "sgmii";
phy-handle = <&ethphy1>;
phys = <&cp1_comphy1 2>;
};
&cp1_mdio {
status = "okay";
pinctrl-0 = <&pmx_cp1_mdio_pins>;
pinctrl-names = "default";
/* Marvell 88E1512 */
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-id0141,0dd1",
"ethernet-phy-ieee802.3-c22";
reg = <0x0>;
/*
* LED[0] (Green): LINK/ACT
* LED[1] (Amber): SPEED 100/1000M
*/
marvell,reg-init = <3 16 0 0x61>;
sfp = <&sfp>;
};
/* Marvell 88E1512 */
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-id0141,0dd1",
"ethernet-phy-ieee802.3-c22";
reg = <0x1>;
/*
* LED[0] (Green): LINK/ACT
* LED[1] (Amber): SPEED 100/1000M
*/
marvell,reg-init = <3 16 0 0x61>;
};
};
&cp1_pinctrl {
pmx_gpio_keys_pins: gpio-keys-pins {
marvell,pins = "mpp31";
marvell,function = "gpio";
};
pmx_gpio_leds_pins: gpio-leds-pins {
marvell,pins = "mpp2", "mpp3", "mpp6", "mpp7", "mpp11", "mpp14",
"mpp15", "mpp16", "mpp24", "mpp26";
marvell,function = "gpio";
};
pmx_cp1_mdio_pins: mdio-pins {
marvell,pins = "mpp4", "mpp5";
marvell,function = "ge";
};
};

513
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/cn9130-clearfog-pro.dts
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@ -1,513 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright SolidRun Ltd.
* Copyright (C) 2024 Tobias Schramm <tobias@t-sys.eu>
*
* Device tree for the CN9130-based ClearFog Pro
*/
#include "cn9130.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "SolidRun ClearFog Pro";
compatible = "solidrun,clearfog-pro", "marvell,armada-ap807-quad",
"marvell,armada-ap807";
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
gpio1 = &cp0_gpio1;
gpio2 = &cp0_gpio2;
i2c0 = &cp0_i2c0;
ethernet0 = &cp0_eth0;
ethernet1 = &cp0_eth1;
ethernet2 = &cp0_eth2;
spi1 = &cp0_spi1;
};
memory@00000000 {
reg = <0x0 0x0 0x1 0x0>;
device_type = "memory";
};
/* Virtual regulator, root of power tree */
vin: regulator-vin {
compatible = "regulator-fixed";
regulator-name = "vin";
regulator-always-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
/* Regulators supplied by vin */
v_5v0: regulator-v_5v0 {
compatible = "regulator-fixed";
regulator-name = "v_5v0";
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vin>;
};
v_3v3: regulator-v_3v3 {
compatible = "regulator-fixed";
regulator-name = "v_3v3";
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vin>;
};
/* Regulators supplied by v_5v0 */
v_1v8: regulator-v_1v8 {
compatible = "regulator-fixed";
regulator-name = "v_1v8";
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&v_5v0>;
};
v_5v0_usb3_hst_vbus: regulator-v_5v0_usb3_hst_vbus {
compatible = "regulator-fixed";
regulator-name = "v_5v0_usb3_hst_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpios = <&expander0 6 GPIO_ACTIVE_LOW>;
vin-supply = <&v_5v0>;
};
/* Regulators internal to SOM */
vqmmc: regulator-vqmmc {
compatible = "regulator-fixed";
regulator-name = "vqmmc";
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&v_5v0>;
};
cp0_usb3_0_phy1: cp0_usb3_phy@1 {
compatible = "usb-nop-xceiv";
vbus-supply = <&v_5v0_usb3_hst_vbus>;
};
cp0_sfp_eth0: sfp-eth@0 {
compatible = "sff,sfp";
i2c-bus = <&cp0_i2c1>;
los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
};
keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&cp0_button_pin>;
reset {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
};
};
};
&uart0 {
status = "okay";
};
/* on-board eMMC */
&ap_sdhci0 {
bus-width = <8>;
pinctrl-names = "default";
vqmmc-supply = <&vqmmc>;
status = "okay";
};
&cp0_crypto {
status = "okay";
};
&cp0_ethernet {
status = "okay";
};
&cp0_gpio1 {
status = "okay";
};
&cp0_gpio2 {
status = "okay";
};
&cp0_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp0_i2c0_pins>;
clock-frequency = <100000>;
/*
* PCA9655 GPIO expander, up to 1MHz clock.
* 0-CON3 CLKREQ#
* 1-CON3 PERST#
* 2-CON2 PERST#
* 3-CON3 W_DISABLE
* 4-CON2 CLKREQ#
* 5-USB3 overcurrent
* 6-USB3 power
* 7-CON2 W_DISABLE
* 8-JP4 P1
* 9-JP4 P4
* 10-JP4 P5
* 11-m.2 DEVSLP
* 12-SFP_LOS
* 13-SFP_TX_FAULT
* 14-SFP_TX_DISABLE
* 15-SFP_MOD_DEF0
*/
expander0: gpio-expander@20 {
compatible = "nxp,pca9555";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cp0_gpio1>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&cp0_expander0_pins>;
vcc-supply = <&v_3v3>;
pcie1_0_clkreq {
gpio-hog;
gpios = <0 GPIO_ACTIVE_LOW>;
input;
line-name = "pcie1.0-clkreq";
};
pcie1_0_w_disable {
gpio-hog;
gpios = <3 GPIO_ACTIVE_LOW>;
output-low;
line-name = "pcie1.0-w-disable";
};
pcie2_0_clkreq {
gpio-hog;
gpios = <4 GPIO_ACTIVE_LOW>;
input;
line-name = "pcie2.0-clkreq";
};
pcie2_0_w_disable {
gpio-hog;
gpios = <7 GPIO_ACTIVE_LOW>;
output-low;
line-name = "pcie2.0-w-disable";
};
usb3_ilimit {
gpio-hog;
gpios = <5 GPIO_ACTIVE_LOW>;
input;
line-name = "usb3-current-limit";
};
m2_devslp {
gpio-hog;
gpios = <11 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "m.2 devslp";
};
};
/* ADC only for mikroBUS connector */
mcp3021@4c {
compatible = "microchip,mcp3021";
reg = <0x4c>;
};
/* EEPROM on the SOM */
eeprom@53 {
compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
read-only;
nvmem-layout {
compatible = "onie,tlv-layout";
onie_tlv_macaddr: mac-address {
#nvmem-cell-cells = <1>;
};
};
};
};
/* SMBUS on mini PCIe sockets */
&cp0_i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp0_i2c1_pins>;
clock-frequency = <100000>;
};
&cp0_mdio {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
/* Green led blinks on activity, orange LED on link */
marvell,reg-init = <3 16 0 0x0064>;
};
switch@4 {
compatible = "marvell,mv88e6085";
reg = <4>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&cp0_gpio1>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&cp0_dsa0_pins>;
reset-gpios = <&cp0_gpio1 27 GPIO_ACTIVE_LOW>;
mdio-external {
compatible = "marvell,mv88e6xxx-mdio-external";
#address-cells = <1>;
#size-cells = <0>;
/* 88E1512 PHY */
port6_phy: ethernet-phy@1 {
reg = <1>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan5";
};
port@1 {
reg = <1>;
label = "lan4";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan2";
};
port@4 {
reg = <4>;
label = "lan1";
};
port@5 {
reg = <5>;
ethernet = <&cp0_eth1>;
label = "cpu";
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@6 {
/* 88E1512 external phy */
reg = <6>;
label = "lan6";
phy-handle = <&port6_phy>;
phy-mode = "rgmii-id";
};
};
};
};
/* SRDS #0 - SATA on bottom M.2 B-Key connector */
&cp0_sata0 {
status = "okay";
sata-port@0 {
status = "disabled";
};
sata-port@1 {
phys = <&cp0_comphy0 1>;
target-supply = <&v_3v3>;
};
};
&cp0_utmi {
status = "okay";
};
/* mini PCIe slot far from SOM, USB 2.0 only, SS lanes unused */
&cp0_usb3_0 {
status = "okay";
phys = <&cp0_utmi0>;
phy-names = "utmi";
dr_mode = "host";
};
/* SRDS #1 - USB-A 3.0 host port */
&cp0_usb3_1 {
status = "okay";
phys = <&cp0_utmi1>, <&cp0_comphy1 0>;
phy-names = "utmi", "usb";
usb-phy = <&cp0_usb3_0_phy1>;
dr_mode = "host";
};
/* SRDS #2 - SFP+ 10GE */
&cp0_eth0 {
status = "okay";
phy-mode = "10gbase-r";
phys = <&cp0_comphy2 0>;
managed = "in-band-status";
nvmem-cells = <&onie_tlv_macaddr 0>;
nvmem-cell-names = "mac-address";
sfp = <&cp0_sfp_eth0>;
};
/* SRDS #3 - SGMII 1GE to L2 switch */
&cp0_eth1 {
status = "okay";
phys = <&cp0_comphy3 1>;
phy-mode = "sgmii";
nvmem-cells = <&onie_tlv_macaddr 1>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
/* SRDS #4 - mini PCIe slot near SOM */
&cp0_pcie1 {
status = "okay";
phys = <&cp0_comphy4 1>;
num-lanes = <1>;
reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
};
/* SRDS #5 - mini PCIe slot far from SOM */
&cp0_pcie2 {
status = "okay";
phys = <&cp0_comphy5 2>;
num-lanes = <1>;
reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
};
/* GE PHY RGMII */
&cp0_eth2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp0_ge2_rgmii_pins>;
phy = <&phy0>;
phy-mode = "rgmii-id";
nvmem-cells = <&onie_tlv_macaddr 2>;
nvmem-cell-names = "mac-address";
};
/* micro SD card slot */
&cp0_sdhci0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp0_sdhci_pins &cp0_sdhci_cd_pins>;
bus-width = <4>;
cd-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
no-1-8-v;
vqmmc-supply = <&v_3v3>;
vmmc-supply = <&v_3v3>;
};
&cp0_spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp0_spi1_pins>;
spi-flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
#address-cells = <0x1>;
#size-cells = <0x1>;
spi-max-frequency = <10000000>;
};
};
&cp0_syscon0 {
cp0_pinctrl: pinctrl {
compatible = "marvell,cp115-standalone-pinctrl";
cp0_i2c0_pins: cp0-i2c0-pins {
marvell,pins = "mpp37", "mpp38";
marvell,function = "i2c0";
};
cp0_i2c1_pins: cp0-i2c1-pins {
marvell,pins = "mpp35", "mpp36";
marvell,function = "i2c1";
};
cp0_ge2_rgmii_pins: cp0-ge2-rgmii-pins {
marvell,pins = "mpp44", "mpp45", "mpp46",
"mpp47", "mpp48", "mpp49",
"mpp50", "mpp51", "mpp52",
"mpp53", "mpp54", "mpp55";
marvell,function = "ge1";
};
cp0_sdhci_cd_pins: cp0-sdhci-cd-pins {
marvell,pins = "mpp43";
marvell,function = "sdio";
};
cp0_sdhci_pins: cp0-sdhci-pins {
marvell,pins = "mpp56", "mpp57", "mpp58",
"mpp59", "mpp60", "mpp61";
marvell,function = "sdio";
};
cp0_spi1_pins: cp0-spi1-pins {
marvell,pins = "mpp12", "mpp13", "mpp14",
"mpp15", "mpp16";
marvell,function = "spi1";
};
cp0_dsa0_pins: cp0-dsa0-pins {
marvell,pins = "mpp27", "mpp29";
marvell,function = "gpio";
};
cp0_button_pin: cp0-button-pin {
marvell,pins = "mpp32";
marvell,function = "gpio";
};
cp0_expander0_pins: cp0-expander0-pins {
marvell,pins = "mpp4";
marvell,function = "gpio";
};
};
};

447
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts
View file

@ -1,447 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright (C) 2019 Marvell International Ltd.
*
* Device tree for the CN9131-DB board.
*/
#include "cn9130.dtsi"
#include "puzzle-thermal.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "iEi Puzzle-M901";
compatible = "iei,puzzle-m901",
"marvell,armada-ap807-quad", "marvell,armada-ap807";
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
i2c0 = &cp1_i2c0;
i2c1 = &cp0_i2c0;
ethernet0 = &cp0_eth0;
ethernet1 = &cp0_eth1;
ethernet2 = &cp0_eth2;
ethernet3 = &cp1_eth0;
ethernet4 = &cp1_eth1;
ethernet5 = &cp1_eth2;
gpio1 = &cp0_gpio1;
gpio2 = &cp0_gpio2;
gpio3 = &cp1_gpio1;
gpio4 = &cp1_gpio2;
led-boot = &led_power;
led-failsafe = &led_info;
led-running = &led_power;
led-upgrade = &led_info;
};
memory@00000000 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
gpio_keys {
compatible = "gpio-keys";
reset {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&cp0_gpio2 4 GPIO_ACTIVE_LOW>;
};
};
thermal-zones {
chassis0-thermal {
thermal-sensors = <&puzzle_hwmon 0>;
PUZZLE_FAN_CHASSIS_THERMAL(chassis0, &chassis_fan_group0);
};
chassis1-thermal {
thermal-sensors = <&puzzle_hwmon 1>;
PUZZLE_FAN_CHASSIS_THERMAL(chassis1, &chassis_fan_group0);
};
cp0-phy0-thermal {
thermal-sensors = <&cp0_nbaset_phy0>;
PUZZLE_FAN_THERMAL(cp0_phy0, &chassis_fan_group0);
};
cp0-phy1-thermal {
thermal-sensors = <&cp0_nbaset_phy1>;
PUZZLE_FAN_THERMAL(cp0_phy1, &chassis_fan_group0);
};
cp0-phy2-thermal {
thermal-sensors = <&cp0_nbaset_phy2>;
PUZZLE_FAN_THERMAL(cp0_phy2, &chassis_fan_group0);
};
cp1-phy0-thermal {
thermal-sensors = <&cp1_nbaset_phy0>;
PUZZLE_FAN_THERMAL(cp1_phy0, &chassis_fan_group0);
};
cp1-phy1-thermal {
thermal-sensors = <&cp1_nbaset_phy1>;
PUZZLE_FAN_THERMAL(cp1_phy1, &chassis_fan_group0);
};
cp1-phy2-thermal {
thermal-sensors = <&cp1_nbaset_phy2>;
PUZZLE_FAN_THERMAL(cp1_phy2, &chassis_fan_group0);
};
};
};
&uart0 {
status = "okay";
};
&cp0_uart0 {
status = "okay";
puzzle-mcu {
compatible = "iei,wt61p803-puzzle";
#address-cells = <1>;
#size-cells = <1>;
current-speed = <115200>;
enable-beep;
status = "okay";
leds {
compatible = "iei,wt61p803-puzzle-leds";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
led@0 {
reg = <0>;
label = "white:network";
active-low;
};
led@1 {
reg = <1>;
label = "green:cloud";
active-low;
};
led_info: led@2 {
reg = <2>;
label = "orange:info";
active-low;
};
led_power: led@3 {
reg = <3>;
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_YELLOW>;
active-low;
default-state = "on";
};
};
puzzle_hwmon: hwmon {
compatible = "iei,wt61p803-puzzle-hwmon";
#address-cells = <1>;
#size-cells = <0>;
#thermal-sensor-cells = <1>;
chassis_fan_group0: fan-group@0 {
#cooling-cells = <2>;
reg = <0x00>;
cooling-levels = <0 159 195 211 223 241 255>;
};
};
};
};
/* on-board eMMC - U9 */
&ap_sdhci0 {
pinctrl-names = "default";
bus-width = <8>;
status = "okay";
mmc-ddr-1_8v;
mmc-hs400-1_8v;
};
&cp0_crypto {
status = "okay";
};
&cp0_xmdio {
status = "okay";
cp0_nbaset_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <2>;
#thermal-sensor-cells = <0>;
};
cp0_nbaset_phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
#thermal-sensor-cells = <0>;
};
cp0_nbaset_phy2: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <8>;
#thermal-sensor-cells = <0>;
};
};
&cp0_ethernet {
status = "okay";
};
/* SLM-1521-V2, CON9 */
&cp0_eth0 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp0_comphy2 0>;
phy = <&cp0_nbaset_phy0>;
};
&cp0_eth1 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp0_comphy4 1>;
phy = <&cp0_nbaset_phy1>;
};
&cp0_eth2 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp0_comphy5 2>;
phy = <&cp0_nbaset_phy2>;
};
&cp0_gpio1 {
status = "okay";
};
&cp0_gpio2 {
status = "okay";
};
&cp0_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&cp0_i2c0_pins>;
status = "okay";
clock-frequency = <100000>;
rtc@32 {
compatible = "epson,rx8130";
reg = <0x32>;
wakeup-source;
};
};
/* SLM-1521-V2, CON6 */
&cp0_pcie0 {
status = "okay";
num-lanes = <2>;
num-viewport = <8>;
phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>;
};
/* U55 */
&cp0_spi1 {
pinctrl-names = "default";
pinctrl-0 = <&cp0_spi0_pins>;
reg = <0x700680 0x50>, /* control */
<0x2000000 0x1000000>; /* CS0 */
status = "okay";
spi-flash@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x1f0000>;
};
partition@1f0000 {
label = "U-Boot ENV Factory";
reg = <0x1f0000 0x10000>;
};
partition@200000 {
label = "Reserved";
reg = <0x200000 0x1f0000>;
};
partition@3f0000 {
label = "U-Boot ENV";
reg = <0x3f0000 0x10000>;
};
};
};
};
&cp0_rtc {
status = "disabled";
};
&cp0_syscon0 {
cp0_pinctrl: pinctrl {
compatible = "marvell,cp115-standalone-pinctrl";
cp0_i2c0_pins: cp0-i2c-pins-0 {
marvell,pins = "mpp37", "mpp38";
marvell,function = "i2c0";
};
cp0_i2c1_pins: cp0-i2c-pins-1 {
marvell,pins = "mpp35", "mpp36";
marvell,function = "i2c1";
};
cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
marvell,pins = "mpp0", "mpp1", "mpp2",
"mpp3", "mpp4", "mpp5",
"mpp6", "mpp7", "mpp8",
"mpp9", "mpp10", "mpp11";
marvell,function = "ge0";
};
cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
marvell,pins = "mpp44", "mpp45", "mpp46",
"mpp47", "mpp48", "mpp49",
"mpp50", "mpp51", "mpp52",
"mpp53", "mpp54", "mpp55";
marvell,function = "ge1";
};
cp0_spi0_pins: cp0-spi-pins-0 {
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
marvell,function = "spi1";
};
};
};
/*
* Instantiate the first connected CP115
*/
#define CP11X_NAME cp1
#define CP11X_BASE f6000000
#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000))
#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
#define CP11X_PCIE0_BASE f6600000
#define CP11X_PCIE1_BASE f6620000
#define CP11X_PCIE2_BASE f6640000
#include "armada-cp115.dtsi"
#undef CP11X_NAME
#undef CP11X_BASE
#undef CP11X_PCIEx_MEM_BASE
#undef CP11X_PCIEx_MEM_SIZE
#undef CP11X_PCIE0_BASE
#undef CP11X_PCIE1_BASE
#undef CP11X_PCIE2_BASE
&cp1_crypto {
status = "okay";
};
&cp1_xmdio {
status = "okay";
cp1_nbaset_phy0: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <2>;
#thermal-sensor-cells = <0>;
};
cp1_nbaset_phy1: ethernet-phy@4 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
#thermal-sensor-cells = <0>;
};
cp1_nbaset_phy2: ethernet-phy@5 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <8>;
#thermal-sensor-cells = <0>;
};
};
&cp1_ethernet {
status = "okay";
};
/* CON50 */
&cp1_eth0 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp1_comphy2 0>;
phy = <&cp1_nbaset_phy0>;
};
&cp1_eth1 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp1_comphy4 1>;
phy = <&cp1_nbaset_phy1>;
};
&cp1_eth2 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp1_comphy5 2>;
phy = <&cp1_nbaset_phy2>;
};
&cp1_sata0 {
status = "okay";
sata-port@1 {
status = "okay";
phys = <&cp1_comphy0 1>;
};
};
&cp1_gpio1 {
status = "okay";
};
&cp1_gpio2 {
status = "okay";
};
&cp1_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp1_i2c0_pins>;
clock-frequency = <100000>;
};
&cp1_rtc {
status = "disabled";
};
&cp1_syscon0 {
cp1_pinctrl: pinctrl {
compatible = "marvell,cp115-standalone-pinctrl";
cp1_i2c0_pins: cp1-i2c-pins-0 {
marvell,pins = "mpp37", "mpp38";
marvell,function = "i2c0";
};
cp1_spi0_pins: cp1-spi-pins-0 {
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
marvell,function = "spi1";
};
cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins {
marvell,pins = "mpp3";
marvell,function = "gpio";
};
cp1_sfp_pins: sfp-pins {
marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11";
marvell,function = "gpio";
};
};
};
&cp1_usb3_1 {
status = "okay";
phys = <&cp1_comphy3 1>;
phy-names = "usb";
};

631
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts
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@ -1,631 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright (C) 2019 Marvell International Ltd.
*
* Device tree for the CN9132-DB board.
*/
#include "cn9130.dtsi"
#include "puzzle-thermal.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "iEi Puzzle-M902";
compatible = "iei,puzzle-m902",
"marvell,armada-ap807-quad", "marvell,armada-ap807";
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
i2c0 = &cp1_i2c0;
i2c1 = &cp0_i2c0;
gpio1 = &cp0_gpio1;
gpio2 = &cp0_gpio2;
gpio3 = &cp1_gpio1;
gpio4 = &cp1_gpio2;
gpio5 = &cp2_gpio1;
gpio6 = &cp2_gpio2;
ethernet0 = &cp0_eth0;
ethernet1 = &cp0_eth1;
ethernet2 = &cp0_eth2;
ethernet3 = &cp1_eth0;
ethernet4 = &cp1_eth1;
ethernet5 = &cp1_eth2;
ethernet6 = &cp2_eth0;
ethernet7 = &cp2_eth1;
ethernet8 = &cp2_eth2;
spi1 = &cp0_spi0;
spi2 = &cp0_spi1;
led-boot = &led_power;
led-failsafe = &led_info;
led-running = &led_power;
led-upgrade = &led_info;
};
memory@00000000 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
gpio_keys {
compatible = "gpio-keys";
reset {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&cp0_gpio2 4 GPIO_ACTIVE_LOW>;
};
};
cp2_reg_usb3_vbus0: cp2_usb3_vbus@0 {
compatible = "regulator-fixed";
regulator-name = "cp2-xhci0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpios = <&cp2_gpio1 2 GPIO_ACTIVE_HIGH>;
};
cp2_usb3_0_phy0: cp2_usb3_phy0 {
compatible = "usb-nop-xceiv";
vcc-supply = <&cp2_reg_usb3_vbus0>;
};
cp2_reg_usb3_vbus1: cp2_usb3_vbus@1 {
compatible = "regulator-fixed";
regulator-name = "cp2-xhci1-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpios = <&cp2_gpio1 3 GPIO_ACTIVE_HIGH>;
};
cp2_usb3_0_phy1: cp2_usb3_phy1 {
compatible = "usb-nop-xceiv";
vcc-supply = <&cp2_reg_usb3_vbus1>;
};
cp2_sfp_eth0: sfp-eth0 {
compatible = "sff,sfp";
i2c-bus = <&cp2_sfpp0_i2c>;
los-gpio = <&cp2_module_expander1 11 GPIO_ACTIVE_HIGH>;
mod-def0-gpio = <&cp2_module_expander1 10 GPIO_ACTIVE_LOW>;
tx-disable-gpio = <&cp2_module_expander1 9 GPIO_ACTIVE_HIGH>;
tx-fault-gpio = <&cp2_module_expander1 8 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
thermal-zones {
chassis0-thermal {
thermal-sensors = <&puzzle_hwmon 0>;
PUZZLE_FAN_CHASSIS_THERMAL(chassis0, &chassis_fan_group0);
};
chassis1-thermal {
thermal-sensors = <&puzzle_hwmon 1>;
PUZZLE_FAN_CHASSIS_THERMAL(chassis1, &chassis_fan_group0);
};
cp0-phy0-thermal {
thermal-sensors = <&cp0_nbaset_phy0>;
PUZZLE_FAN_THERMAL(cp0_phy0, &chassis_fan_group0);
};
cp0-phy1-thermal {
thermal-sensors = <&cp0_nbaset_phy1>;
PUZZLE_FAN_THERMAL(cp0_phy1, &chassis_fan_group0);
};
cp0-phy2-thermal {
thermal-sensors = <&cp0_nbaset_phy2>;
PUZZLE_FAN_THERMAL(cp0_phy2, &chassis_fan_group0);
};
cp1-phy0-thermal {
thermal-sensors = <&cp1_nbaset_phy0>;
PUZZLE_FAN_THERMAL(cp1_phy0, &chassis_fan_group0);
};
cp1-phy1-thermal {
thermal-sensors = <&cp1_nbaset_phy1>;
PUZZLE_FAN_THERMAL(cp1_phy1, &chassis_fan_group0);
};
cp1-phy2-thermal {
thermal-sensors = <&cp1_nbaset_phy2>;
PUZZLE_FAN_THERMAL(cp1_phy2, &chassis_fan_group0);
};
cp2-phy0-thermal {
thermal-sensors = <&cp2_nbaset_phy0>;
PUZZLE_FAN_THERMAL(cp2_phy0, &chassis_fan_group0);
};
cp2-phy1-thermal {
thermal-sensors = <&cp2_nbaset_phy1>;
PUZZLE_FAN_THERMAL(cp2_phy1, &chassis_fan_group0);
};
cp2-phy2-thermal {
thermal-sensors = <&cp2_nbaset_phy2>;
PUZZLE_FAN_THERMAL(cp2_phy2, &chassis_fan_group0);
};
};
};
&uart0 {
status = "okay";
};
&cp0_uart0 {
status = "okay";
puzzle-mcu {
compatible = "iei,wt61p803-puzzle";
#address-cells = <1>;
#size-cells = <1>;
current-speed = <115200>;
enable-beep;
status = "okay";
leds {
compatible = "iei,wt61p803-puzzle-leds";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
led@0 {
reg = <0>;
label = "white:network";
active-low;
};
led@1 {
reg = <1>;
label = "green:cloud";
active-low;
};
led_info: led@2 {
reg = <2>;
label = "orange:info";
active-low;
};
led_power: led@3 {
reg = <3>;
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_YELLOW>;
active-low;
default-state = "on";
};
};
puzzle_hwmon: hwmon {
compatible = "iei,wt61p803-puzzle-hwmon";
#address-cells = <1>;
#size-cells = <0>;
#thermal-sensor-cells = <1>;
chassis_fan_group0: fan-group@0 {
#cooling-cells = <2>;
reg = <0x00>;
cooling-levels = <0 159 195 211 223 241 255>;
};
};
};
};
/* on-board eMMC - U9 */
&ap_sdhci0 {
pinctrl-names = "default";
bus-width = <8>;
status = "okay";
mmc-ddr-1_8v;
mmc-hs400-1_8v;
};
&cp0_crypto {
status = "okay";
};
&cp0_xmdio {
status = "okay";
cp0_nbaset_phy0: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <2>;
#thermal-sensor-cells = <0>;
};
cp0_nbaset_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
#thermal-sensor-cells = <0>;
};
cp0_nbaset_phy2: ethernet-phy@8 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <8>;
#thermal-sensor-cells = <0>;
};
};
&cp0_ethernet {
status = "okay";
};
/* SLM-1521-V2, CON9 */
&cp0_eth0 {
status = "okay";
phy-mode = "10gbase-kr";
phys = <&cp0_comphy2 0>;
phy = <&cp0_nbaset_phy0>;
};
&cp0_eth1 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp0_comphy4 1>;
phy = <&cp0_nbaset_phy1>;
};
&cp0_eth2 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp0_comphy1 2>;
phy = <&cp0_nbaset_phy2>;
};
&cp0_gpio1 {
status = "okay";
};
&cp0_gpio2 {
status = "okay";
};
&cp0_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&cp0_i2c0_pins>;
status = "okay";
clock-frequency = <100000>;
rtc@32 {
compatible = "epson,rx8130";
reg = <0x32>;
wakeup-source;
};
};
&cp0_i2c1 {
clock-frequency = <100000>;
};
/* SLM-1521-V2, CON6 */
&cp0_sata0 {
status = "okay";
sata-port@1 {
status = "okay";
phys = <&cp0_comphy0 1>;
};
};
&cp0_pcie2 {
status = "okay";
num-lanes = <1>;
num-viewport = <8>;
phys = <&cp0_comphy5 2>;
};
/* U55 */
&cp0_spi1 {
pinctrl-names = "default";
pinctrl-0 = <&cp0_spi0_pins>;
reg = <0x700680 0x50>, /* control */
<0x2000000 0x1000000>; /* CS0 */
status = "okay";
spi-flash@0 {
#address-cells = <0x1>;
#size-cells = <0x1>;
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x1f0000>;
};
partition@1f0000 {
label = "U-Boot ENV Factory";
reg = <0x1f0000 0x10000>;
};
partition@200000 {
label = "Reserved";
reg = <0x200000 0x1f0000>;
};
partition@3f0000 {
label = "U-Boot ENV";
reg = <0x3f0000 0x10000>;
};
};
};
};
&cp0_rtc {
status = "disabled";
};
&cp0_syscon0 {
cp0_pinctrl: pinctrl {
compatible = "marvell,cp115-standalone-pinctrl";
cp0_i2c0_pins: cp0-i2c-pins-0 {
marvell,pins = "mpp37", "mpp38";
marvell,function = "i2c0";
};
cp0_i2c1_pins: cp0-i2c-pins-1 {
marvell,pins = "mpp35", "mpp36";
marvell,function = "i2c1";
};
cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
marvell,pins = "mpp0", "mpp1", "mpp2",
"mpp3", "mpp4", "mpp5",
"mpp6", "mpp7", "mpp8",
"mpp9", "mpp10", "mpp11";
marvell,function = "ge0";
};
cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
marvell,pins = "mpp44", "mpp45", "mpp46",
"mpp47", "mpp48", "mpp49",
"mpp50", "mpp51", "mpp52",
"mpp53", "mpp54", "mpp55";
marvell,function = "ge1";
};
cp0_spi0_pins: cp0-spi-pins-0 {
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
marvell,function = "spi1";
};
};
};
&cp0_usb3_1 {
status = "okay";
phys = <&cp0_comphy3 1>;
phy-names = "usb";
};
/*
* Instantiate the first connected CP115
*/
#define CP11X_NAME cp1
#define CP11X_BASE f4000000
#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000))
#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
#define CP11X_PCIE0_BASE f4600000
#define CP11X_PCIE1_BASE f4620000
#define CP11X_PCIE2_BASE f4640000
#include "armada-cp115.dtsi"
#undef CP11X_NAME
#undef CP11X_BASE
#undef CP11X_PCIEx_MEM_BASE
#undef CP11X_PCIEx_MEM_SIZE
#undef CP11X_PCIE0_BASE
#undef CP11X_PCIE1_BASE
#undef CP11X_PCIE2_BASE
&cp1_crypto {
status = "okay";
};
&cp1_xmdio {
status = "okay";
cp1_nbaset_phy0: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <2>;
#thermal-sensor-cells = <0>;
};
cp1_nbaset_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
#thermal-sensor-cells = <0>;
};
cp1_nbaset_phy2: ethernet-phy@8 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <8>;
#thermal-sensor-cells = <0>;
};
};
&cp1_ethernet {
status = "okay";
};
/* CON50 */
&cp1_eth0 {
status = "okay";
phy-mode = "10gbase-kr";
phys = <&cp1_comphy2 0>;
phy = <&cp1_nbaset_phy0>;
};
&cp1_eth1 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp1_comphy4 1>;
phy = <&cp1_nbaset_phy1>;
};
&cp1_eth2 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp1_comphy1 2>;
phy = <&cp1_nbaset_phy2>;
};
&cp1_gpio1 {
status = "okay";
};
&cp1_gpio2 {
status = "okay";
};
&cp1_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&cp1_i2c0_pins>;
clock-frequency = <100000>;
};
&cp1_rtc {
status = "disabled";
};
&cp1_syscon0 {
cp1_pinctrl: pinctrl {
compatible = "marvell,cp115-standalone-pinctrl";
cp1_i2c0_pins: cp1-i2c-pins-0 {
marvell,pins = "mpp37", "mpp38";
marvell,function = "i2c0";
};
cp1_spi0_pins: cp1-spi-pins-0 {
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
marvell,function = "spi1";
};
cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins {
marvell,pins = "mpp3";
marvell,function = "gpio";
};
};
};
/*
* Instantiate the second connected CP115
*/
#define CP11X_NAME cp2
#define CP11X_BASE f6000000
#define CP11X_PCIEx_MEM_BASE(iface) (0xe5000000 + (iface * 0x1000000))
#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
#define CP11X_PCIE0_BASE f6600000
#define CP11X_PCIE1_BASE f6620000
#define CP11X_PCIE2_BASE f6640000
#include "armada-cp115.dtsi"
#undef CP11X_NAME
#undef CP11X_BASE
#undef CP11X_PCIEx_MEM_BASE
#undef CP11X_PCIEx_MEM_SIZE
#undef CP11X_PCIE0_BASE
#undef CP11X_PCIE1_BASE
#undef CP11X_PCIE2_BASE
&cp2_crypto {
status = "okay";
};
&cp2_ethernet {
status = "okay";
};
&cp2_xmdio {
status = "okay";
cp2_nbaset_phy0: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <2>;
#thermal-sensor-cells = <0>;
};
cp2_nbaset_phy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <0>;
#thermal-sensor-cells = <0>;
};
cp2_nbaset_phy2: ethernet-phy@8 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <8>;
#thermal-sensor-cells = <0>;
};
};
/* SLM-1521-V2, CON9 */
&cp2_eth0 {
status = "okay";
phy-mode = "10gbase-kr";
phys = <&cp2_comphy2 0>;
phy = <&cp2_nbaset_phy0>;
};
&cp2_eth1 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp2_comphy4 1>;
phy = <&cp2_nbaset_phy1>;
};
&cp2_eth2 {
status = "okay";
phy-mode = "2500base-x";
phys = <&cp2_comphy1 2>;
phy = <&cp2_nbaset_phy2>;
};
&cp2_gpio1 {
status = "okay";
};
&cp2_gpio2 {
status = "okay";
};
&cp2_i2c0 {
clock-frequency = <100000>;
/* SLM-1521-V2 - U3 */
i2c-mux@72 {
compatible = "nxp,pca9544";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x72>;
cp2_sfpp0_i2c: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
/* U12 */
cp2_module_expander1: pca9555@21 {
compatible = "nxp,pca9555";
pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
reg = <0x21>;
};
};
};
};
&cp2_rtc {
status = "disabled";
};
&cp2_syscon0 {
cp2_pinctrl: pinctrl {
compatible = "marvell,cp115-standalone-pinctrl";
cp2_i2c0_pins: cp2-i2c-pins-0 {
marvell,pins = "mpp37", "mpp38";
marvell,function = "i2c0";
};
};
};

98
target/linux/mvebu/files-6.6/arch/arm64/boot/dts/marvell/puzzle-thermal.dtsi
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@ -1,98 +0,0 @@
#define PUZZLE_FAN_THERMAL(_cname, _fan) \
polling-delay-passive = <0>; \
polling-delay = <1000>; \
\
trips { \
_cname##_active_full: trip-point5 { \
temperature = <70000>; \
hysteresis = <3000>; \
type = "active"; \
}; \
_cname##_active_very_high: trip-point4 { \
temperature = <67500>; \
hysteresis = <3000>; \
type = "active"; \
}; \
_cname##_active_high: trip-point3 { \
temperature = <65000>; \
hysteresis = <5000>; \
type = "active"; \
}; \
_cname##_active_med: trip-point2 { \
temperature = <62500>; \
hysteresis = <3000>; \
type = "active"; \
}; \
_cname##_active_low: trip-point1 { \
temperature = <60000>; \
hysteresis = <3000>; \
type = "active"; \
}; \
_cname##_active_min: trip-point0 { \
temperature = <55000>; \
hysteresis = <5000>; \
type = "active"; \
}; \
}; \
cooling-maps { \
map5 { \
trip = <&_cname##_active_full>; \
cooling-device = <_fan 6 6>; \
}; \
map4 { \
trip = <&_cname##_active_very_high>; \
cooling-device = <_fan 5 5>; \
}; \
map3 { \
trip = <&_cname##_active_high>; \
cooling-device = <_fan 4 4>; \
}; \
map2 { \
trip = <&_cname##_active_med>; \
cooling-device = <_fan 3 3>; \
}; \
map1 { \
trip = <&_cname##_active_low>; \
cooling-device = <_fan 2 2>; \
}; \
map0 { \
trip = <&_cname##_active_min>; \
cooling-device = <_fan 1 1>; \
}; \
}
#define PUZZLE_FAN_CHASSIS_THERMAL(_cname, _fan) \
polling-delay-passive = <0>; \
polling-delay = <5000>; \
\
trips { \
_cname##_active_full: trip-point2 { \
temperature = <70000>; \
hysteresis = <3000>; \
type = "active"; \
}; \
_cname##_active_med: trip-point1 { \
temperature = <62500>; \
hysteresis = <3000>; \
type = "active"; \
}; \
_cname##_active_min: trip-point0 { \
temperature = <55000>; \
hysteresis = <5000>; \
type = "active"; \
}; \
}; \
cooling-maps { \
map2 { \
trip = <&_cname##_active_full>; \
cooling-device = <_fan 6 6>; \
}; \
map1 { \
trip = <&_cname##_active_med>; \
cooling-device = <_fan 3 3>; \
}; \
map0 { \
trip = <&_cname##_active_min>; \
cooling-device = <_fan 1 1>; \
}; \
}

0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-370-buffalo-ls220de.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-370-buffalo-ls220de.dts
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-370-buffalo-ls421de.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-370-buffalo-ls421de.dts
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-370-c200-v2.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-370-c200-v2.dts
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-380-iij-sa-w2.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-380-iij-sa-w2.dts
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-30e.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-30e.dts
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-3xe.dtsi → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-3xe.dtsi
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-50e.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-50e.dts
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-51e.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-51e.dts
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-52e.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-52e.dts
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-5xe.dtsi → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-5xe.dtsi
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-xxe.dtsi → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-385-fortinet-fg-xxe.dtsi
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-385-fortinet-fwf-50e-2r.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-385-fortinet-fwf-50e-2r.dts
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-385-fortinet-fwf-51e.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-385-fortinet-fwf-51e.dts
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-385-linksys-venom.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-385-linksys-venom.dts
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-385-nas1dual.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-385-nas1dual.dts
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0
target/linux/mvebu/files-6.12/arch/arm/boot/dts/marvell/armada-385-wd_cloud-mirror-gen2.dts → target/linux/mvebu/files/arch/arm/boot/dts/marvell/armada-385-wd_cloud-mirror-gen2.dts
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtsi
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-7040-rb5009.dts
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/armada-7040-v-80.dts → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-7040-v-80.dts
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/armada-8040-v-81.dts → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/armada-8040-v-81.dts
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/cn9130-clearfog-pro.dts → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9130-clearfog-pro.dts
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts
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0
target/linux/mvebu/files-6.12/arch/arm64/boot/dts/marvell/puzzle-thermal.dtsi → target/linux/mvebu/files/arch/arm64/boot/dts/marvell/puzzle-thermal.dtsi
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