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ipq806x: ap3935: Use gmac0 mdio controller

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Updates ap3935 target to use the mdio controller built-in to gmac0,
rather than having the SoC bit-bang mdio from gpio pins

Signed-off-by: Bryan Berg <bdb@north-eastham.org>
Link: https://github.com/openwrt/openwrt/pull/13629
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Bryan Berg 2024-05-18 16:27:19 -07:00 committed by Christian Marangi
parent b43c0a915f
commit e27c7e4b9b
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GPG key ID: AC001D09ADBFEAD7
1 changed files with 9 additions and 21 deletions
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30
target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8068-ap3935.dts
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@ -18,7 +18,6 @@
aliases { aliases {
serial0 = &gsbi7_serial; serial0 = &gsbi7_serial;
serial1 = &gsbi2_serial; serial1 = &gsbi2_serial;
mdio-gpio0 = &mdio0;
ethernet0 = &gmac0; ethernet0 = &gmac0;
ethernet1 = &gmac2; ethernet1 = &gmac2;
@ -299,26 +298,15 @@
}; };
}; };
&soc { &mdio0 {
mdio1: mdio { status = "okay";
compatible = "virtual,mdio-gpio";
#address-cells = <1>;
#size-cells = <0>;
status = "okay"; phy1: ethernet-phy@1 {
reg = <1>;
};
pinctrl-0 = <&mdio0_pins>; phy2: ethernet-phy@2 {
pinctrl-names = "default"; reg = <2>;
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
}; };
}; };
@ -326,7 +314,7 @@
status = "okay"; status = "okay";
qcom,id = <0>; qcom,id = <0>;
mdiobus = <&mdio1>; mdiobus = <&mdio0>;
phy-mode = "rgmii"; phy-mode = "rgmii";
phy-handle = <&phy1>; phy-handle = <&phy1>;
@ -344,7 +332,7 @@
status = "okay"; status = "okay";
qcom,id = <2>; qcom,id = <2>;
mdiobus = <&mdio1>; mdiobus = <&mdio0>;
phy-mode = "sgmii"; phy-mode = "sgmii";
phy-handle = <&phy2>; phy-handle = <&phy2>;