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Merge branch 'openwrt:master' into master

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Hayzam Sherif 2023-02-18 14:56:16 +05:30 committed by GitHub
commit ceb9172d15
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51 changed files with 704 additions and 363 deletions
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13
package/base-files/Makefile
View file

@ -89,6 +89,19 @@ define ImageConfigOptions
echo 'pi_preinit_net_messages="$(CONFIG_TARGET_PREINIT_SHOW_NETMSG)"' >>$(1)/lib/preinit/00_preinit.conf
echo 'pi_preinit_no_failsafe_netmsg="$(CONFIG_TARGET_PREINIT_SUPPRESS_FAILSAFE_NETMSG)"' >>$(1)/lib/preinit/00_preinit.conf
echo 'pi_preinit_no_failsafe="$(CONFIG_TARGET_PREINIT_DISABLE_FAILSAFE)"' >>$(1)/lib/preinit/00_preinit.conf
ifeq ($(CONFIG_TARGET_DEFAULT_LAN_IP_FROM_PREINIT),y)
mkdir -p $(1)/etc/board.d
echo '. /lib/functions/uci-defaults.sh' >$(1)/etc/board.d/99-lan-ip
echo 'logger -t 99-lan-ip "setting custom default LAN IP"' >>$(1)/etc/board.d/99-lan-ip
echo 'board_config_update' >>$(1)/etc/board.d/99-lan-ip
echo 'json_select network' >>$(1)/etc/board.d/99-lan-ip
echo 'json_select lan' >>$(1)/etc/board.d/99-lan-ip
echo 'json_add_string ipaddr $(if $(CONFIG_TARGET_PREINIT_IP),$(CONFIG_TARGET_PREINIT_IP),"192.168.1.1")' >>$(1)/etc/board.d/99-lan-ip
echo 'json_add_string netmask $(if $(CONFIG_TARGET_PREINIT_NETMASK),$(CONFIG_TARGET_PREINIT_NETMASK),"255.255.255.0")' >>$(1)/etc/board.d/99-lan-ip
echo 'json_select ..' >>$(1)/etc/board.d/99-lan-ip
echo 'json_select ..' >>$(1)/etc/board.d/99-lan-ip
echo 'board_config_flush' >>$(1)/etc/board.d/99-lan-ip
endif
endef
define Build/Prepare

9
package/base-files/files/lib/upgrade/nand.sh
View file

@ -28,7 +28,7 @@ ubi_mknod() {
nand_find_volume() {
local ubidevdir ubivoldir
ubidevdir="/sys/devices/virtual/ubi/$1"
ubidevdir="/sys/class/ubi/"
[ ! -d "$ubidevdir" ] && return 1
for ubivoldir in $ubidevdir/${1}_*; do
[ ! -d "$ubivoldir" ] && continue
@ -41,13 +41,12 @@ nand_find_volume() {
}
nand_find_ubi() {
local ubidevdir ubidev mtdnum
local ubidevdir ubidev mtdnum cmtdnum
mtdnum="$( find_mtd_index $1 )"
[ ! "$mtdnum" ] && return 1
for ubidevdir in /sys/devices/virtual/ubi/ubi*; do
[ ! -d "$ubidevdir" ] && continue
for ubidevdir in /sys/class/ubi/ubi*; do
[ ! -e "$ubidevdir/mtd_num" ] && continue
cmtdnum="$( cat $ubidevdir/mtd_num )"
[ ! "$mtdnum" ] && continue
if [ "$mtdnum" = "$cmtdnum" ]; then
ubidev=$( basename $ubidevdir )
ubi_mknod "$ubidevdir"

7
package/base-files/image-config.in
View file

@ -5,6 +5,13 @@
# See /LICENSE for more information.
#
config TARGET_DEFAULT_LAN_IP_FROM_PREINIT
bool "Use preinit IP configuration as default LAN IP" if IMAGEOPT
default n
help
Enabling this will set the default LAN IP address and netmask
to the preinit values set in the image config.
menuconfig PREINITOPT
bool "Preinit configuration options" if IMAGEOPT
default n

16
package/kernel/linux/modules/netdevices.mk
View file

@ -340,6 +340,22 @@ endef
$(eval $(call KernelPackage,phy-smsc))
define KernelPackage/phy-aquantia
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=Aquantia Ethernet PHYs
DEPENDS:=+kmod-libphy +kmod-hwmon-core
KCONFIG:=CONFIG_AQUANTIA_PHY
FILES:=$(LINUX_DIR)/drivers/net/phy/aquantia.ko
AUTOLOAD:=$(call AutoLoad,18,aquantia,1)
endef
define KernelPackage/phy-aquantia/description
Kernel modules for Aquantia Ethernet PHYs
endef
$(eval $(call KernelPackage,phy-aquantia))
define KernelPackage/swconfig
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=switch configuration API

2
package/network/config/netifd/Makefile
View file

@ -1,7 +1,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=netifd
PKG_RELEASE:=1
PKG_RELEASE:=2
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git

18
package/network/config/netifd/files/etc/init.d/packet_steering Executable file
View file

@ -0,0 +1,18 @@
#!/bin/sh /etc/rc.common
START=25
USE_PROCD=1
start_service() {
reload_service
}
service_triggers() {
procd_add_reload_trigger "network"
procd_add_reload_trigger "firewall"
procd_add_raw_trigger "interface.*" 1000 /etc/init.d/packet_steering reload
}
reload_service() {
/usr/libexec/network/packet-steering.sh
}

7
package/network/config/netifd/files/etc/hotplug.d/net/20-smp-packet-steering → package/network/config/netifd/files/usr/libexec/network/packet-steering.sh Normal file → Executable file
View file

@ -1,6 +1,4 @@
#!/bin/sh
[ "$ACTION" = add ] || exit
NPROCS="$(grep -c "^processor.*:" /proc/cpuinfo)"
[ "$NPROCS" -gt 1 ] || exit
@ -40,6 +38,11 @@ packet_steering="$(uci get "network.@globals[0].packet_steering")"
exec 512>/var/lock/smp_tune.lock
flock 512 || exit 1
[ -e "/usr/libexec/platform/packet-steering.sh" ] && {
/usr/libexec/platform/packet-steering.sh
exit 0
}
for dev in /sys/class/net/*; do
[ -d "$dev" ] || continue

6
package/network/services/odhcpd/Makefile
View file

@ -12,9 +12,9 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/odhcpd.git
PKG_SOURCE_DATE:=2022-10-31
PKG_SOURCE_VERSION:=a92c0a73d018cd6453dcf253d9617f97311becab
PKG_MIRROR_HASH:=0752d500b4aa65290c46be89ac5c30a0d536f6695c04ee79201cbada0880ed9c
PKG_SOURCE_DATE:=2023-02-17
PKG_SOURCE_VERSION:=edc5e1738682e764e64bcbffde1e0a1cc9feac21
PKG_MIRROR_HASH:=4d8f630770bcf4594c8fc0a2ee34bc40ce8618cc46e76ae5c3629da2fea9e90b
PKG_MAINTAINER:=Hans Dedecker <dedeckeh@gmail.com>
PKG_LICENSE:=GPL-2.0

2
package/network/utils/iptables/Makefile
View file

@ -150,7 +150,7 @@ Extra iptables nftables nft binaries.
endef
define Package/iptables-mod-conntrack-extra
$(call Package/iptables/Module, +kmod-ipt-conntrack-extra +kmod-ipt-raw)
$(call Package/iptables/Module, +kmod-ipt-conntrack-extra)
TITLE:=Extra connection tracking extensions
endef

6
package/system/fstools/Makefile
View file

@ -12,9 +12,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/fstools.git
PKG_MIRROR_HASH:=d2fc78b66c4e6ac5f51c77f92bd0d2322db78905a9dfea582fc7d975ea68ffe4
PKG_SOURCE_DATE:=2023-02-04
PKG_SOURCE_VERSION:=14d535e4485dc030deecbba9ab493c379df5c237
PKG_MIRROR_HASH:=dbb3d721eb606606c2fc0875067449e5c882d22affaa8dc70367daff7c198152
PKG_SOURCE_DATE:=2023-02-15
PKG_SOURCE_VERSION:=12155d3881b9bdd44b8682970638dbfd9f55e2cb
CMAKE_INSTALL:=1
PKG_LICENSE:=GPL-2.0

8
package/utils/ucode/Makefile
View file

@ -12,9 +12,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=https://github.com/jow-/ucode.git
PKG_SOURCE_DATE:=2023-01-23
PKG_SOURCE_VERSION:=941d14837faf248eb2fa88dd0d5cfddeed044a15
PKG_MIRROR_HASH:=19e8654bcb8a13a0a276a240a1da0f2815b0dd0d4f8bb8622e8de1040d5408a5
PKG_SOURCE_DATE:=2023-02-13
PKG_SOURCE_VERSION:=ab2f3f70257d381e075b4ec58366578af861c2b0
PKG_MIRROR_HASH:=ac7c88a3bd65249253740942dbc9e4d8bc6d5a5e93e48c384d31c94dc7a891f9
PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
PKG_LICENSE:=ISC
@ -118,7 +118,7 @@ endef
define Package/ucode-mod-rtnl
$(Package/ucode/default)
TITLE+= (rtnl module)
DEPENDS:=ucode +libnl-tiny
DEPENDS:=ucode +libnl-tiny +libubox
endef
define Package/ucode-mod-rtnl/description

46
target/linux/bcm4908/base-files/etc/init.d/fastnetwork
View file

@ -1,46 +0,0 @@
#!/bin/sh /etc/rc.common
START=25
USE_PROCD=1
start_service() {
reload_service
}
service_triggers() {
procd_add_reload_trigger "network"
procd_add_reload_trigger "firewall"
procd_add_reload_interface_trigger "lan"
}
reload_service() {
local packet_steering="$(uci -q get network.@globals[0].packet_steering)"
local num_cpus="$(grep -c "^processor.*:" /proc/cpuinfo)"
local flow_offloading="$(uci -q get firewall.@defaults[0].flow_offloading)"
local flow_offloading_hw="$(uci -q get firewall.@defaults[0].flow_offloading_hw)"
local rps_eth0=0
local rps_br_lan=0
[ "$num_cpus" -le 1 ] && return
[ "$packet_steering" = 1 ] && {
if [ ${flow_offloading_hw:-0} -gt 0 ]; then
# HW offloading
# Not implemented
:
elif [ ${flow_offloading:-0} -gt 0 ]; then
# SW offloading
# BCM4908 always reaches ~940 Mb/s
:
else
# Default
case "$num_cpus" in
2) rps_eth0=2; rps_br_lan=2;;
4) rps_eth0=e; rps_br_lan=e;;
esac
fi
}
echo $rps_eth0 > /sys/class/net/eth0/queues/rx-0/rps_cpus
echo $rps_br_lan > /sys/class/net/br-lan/queues/rx-0/rps_cpus
}

2
target/linux/bcm4908/base-files/lib/preinit/75_rootfs_prepare
View file

@ -23,7 +23,7 @@ rootfs_prepare() {
ubinfo /dev/ubi0 -N metadata1 > /dev/null 2>&1 || return
# Find UBI volume device (e.g. ubi0_123)
local ubivol="$(grep rootfs_data /sys/devices/virtual/ubi/ubi*/ubi*/name | sed -n 's/.*\(ubi\d*_\d*\).*/\1/p')"
local ubivol="$(grep rootfs_data /sys/class/ubi/ubi*/name | sed -n 's/.*\(ubi\d*_\d*\).*/\1/p')"
if [ -n "$ubivol" ]; then
bcm4908_verify_rootfs_data $ubivol
else

29
target/linux/bcm4908/base-files/usr/libexec/platform/packet-steering.sh Executable file
View file

@ -0,0 +1,29 @@
#!/bin/sh
packet_steering="$(uci -q get network.@globals[0].packet_steering)"
num_cpus="$(grep -c "^processor.*:" /proc/cpuinfo)"
flow_offloading="$(uci -q get firewall.@defaults[0].flow_offloading)"
flow_offloading_hw="$(uci -q get firewall.@defaults[0].flow_offloading_hw)"
rps_eth0=0
rps_br_lan=0
[ "$packet_steering" = 1 ] && {
if [ ${flow_offloading_hw:-0} -gt 0 ]; then
# HW offloading
# Not implemented
:
elif [ ${flow_offloading:-0} -gt 0 ]; then
# SW offloading
# BCM4908 always reaches ~940 Mb/s
:
else
# Default
case "$num_cpus" in
2) rps_eth0=2; rps_br_lan=2;;
4) rps_eth0=e; rps_br_lan=e;;
esac
fi
}
echo $rps_eth0 > /sys/class/net/eth0/queues/rx-0/rps_cpus
echo $rps_br_lan > /sys/class/net/br-lan/queues/rx-0/rps_cpus

44
target/linux/bcm53xx/base-files/etc/init.d/fastnetwork
View file

@ -1,44 +0,0 @@
#!/bin/sh /etc/rc.common
START=25
USE_PROCD=1
start_service() {
reload_service
}
service_triggers() {
procd_add_reload_trigger "network"
procd_add_reload_trigger "firewall"
procd_add_reload_interface_trigger "lan"
}
reload_service() {
local packet_steering="$(uci -q get network.@globals[0].packet_steering)"
local num_cpus="$(grep -c "^processor.*:" /proc/cpuinfo)"
local flow_offloading="$(uci -q get firewall.@defaults[0].flow_offloading)"
local flow_offloading_hw="$(uci -q get firewall.@defaults[0].flow_offloading_hw)"
# Any steering on 1 CPU (BCM47081) worsens network performance
[ "$num_cpus" != 2 ] && return
[ "$packet_steering" != 1 ] && {
echo 0 > /sys/class/net/br-lan/queues/rx-0/rps_cpus
echo 0 > /sys/class/net/eth0/queues/rx-0/rps_cpus
return
}
if [ ${flow_offloading_hw:-0} -gt 0 ]; then
# HW offloading
echo 0 > /sys/class/net/br-lan/queues/rx-0/rps_cpus
echo 0 > /sys/class/net/eth0/queues/rx-0/rps_cpus
elif [ ${flow_offloading:-0} -gt 0 ]; then
# SW offloading
# br-lan setup doesn't seem to matter for offloading case
echo 2 > /sys/class/net/eth0/queues/rx-0/rps_cpus
else
# Default
echo 2 > /sys/class/net/br-lan/queues/rx-0/rps_cpus
echo 0 > /sys/class/net/eth0/queues/rx-0/rps_cpus
fi
}

25
target/linux/bcm53xx/base-files/usr/libexec/platform/packet-steering.sh Executable file
View file

@ -0,0 +1,25 @@
#!/bin/sh
packet_steering="$(uci -q get network.@globals[0].packet_steering)"
flow_offloading="$(uci -q get firewall.@defaults[0].flow_offloading)"
flow_offloading_hw="$(uci -q get firewall.@defaults[0].flow_offloading_hw)"
[ "$packet_steering" != 1 ] && {
echo 0 > /sys/class/net/br-lan/queues/rx-0/rps_cpus
echo 0 > /sys/class/net/eth0/queues/rx-0/rps_cpus
exit 0
}
if [ ${flow_offloading_hw:-0} -gt 0 ]; then
# HW offloading
echo 0 > /sys/class/net/br-lan/queues/rx-0/rps_cpus
echo 0 > /sys/class/net/eth0/queues/rx-0/rps_cpus
elif [ ${flow_offloading:-0} -gt 0 ]; then
# SW offloading
# br-lan setup doesn't seem to matter for offloading case
echo 2 > /sys/class/net/eth0/queues/rx-0/rps_cpus
else
# Default
echo 2 > /sys/class/net/br-lan/queues/rx-0/rps_cpus
echo 0 > /sys/class/net/eth0/queues/rx-0/rps_cpus
fi

60
target/linux/generic/backport-5.15/733-v6.2-01-net-ethernet-mtk_eth_soc-Avoid-truncating-allocation.patch Normal file
View file

@ -0,0 +1,60 @@
From f3eceaed9edd7c0e0d9fb057613131f92973626f Mon Sep 17 00:00:00 2001
From: Kees Cook <keescook@chromium.org>
Date: Fri, 27 Jan 2023 14:38:54 -0800
Subject: [PATCH] net: ethernet: mtk_eth_soc: Avoid truncating allocation
There doesn't appear to be a reason to truncate the allocation used for
flow_info, so do a full allocation and remove the unused empty struct.
GCC does not like having a reference to an object that has been
partially allocated, as bounds checking may become impossible when
such an object is passed to other code. Seen with GCC 13:
../drivers/net/ethernet/mediatek/mtk_ppe.c: In function 'mtk_foe_entry_commit_subflow':
../drivers/net/ethernet/mediatek/mtk_ppe.c:623:18: warning: array subscript 'struct mtk_flow_entry[0]' is partly outside array bounds of 'unsigned char[48]' [-Warray-bounds=]
623 | flow_info->l2_data.base_flow = entry;
| ^~
Cc: Felix Fietkau <nbd@nbd.name>
Cc: John Crispin <john@phrozen.org>
Cc: Sean Wang <sean.wang@mediatek.com>
Cc: Mark Lee <Mark-MC.Lee@mediatek.com>
Cc: Lorenzo Bianconi <lorenzo@kernel.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Eric Dumazet <edumazet@google.com>
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: Paolo Abeni <pabeni@redhat.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: netdev@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mediatek@lists.infradead.org
Signed-off-by: Kees Cook <keescook@chromium.org>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Link: https://lore.kernel.org/r/20230127223853.never.014-kees@kernel.org
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/ethernet/mediatek/mtk_ppe.c | 3 +--
drivers/net/ethernet/mediatek/mtk_ppe.h | 1 -
2 files changed, 1 insertion(+), 3 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
@@ -601,8 +601,7 @@ mtk_foe_entry_commit_subflow(struct mtk_
u32 ib1_mask = mtk_get_ib1_pkt_type_mask(ppe->eth) | MTK_FOE_IB1_UDP;
int type;
- flow_info = kzalloc(offsetof(struct mtk_flow_entry, l2_data.end),
- GFP_ATOMIC);
+ flow_info = kzalloc(sizeof(*flow_info), GFP_ATOMIC);
if (!flow_info)
return;
--- a/drivers/net/ethernet/mediatek/mtk_ppe.h
+++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
@@ -277,7 +277,6 @@ struct mtk_flow_entry {
struct {
struct mtk_flow_entry *base_flow;
struct hlist_node list;
- struct {} end;
} l2_data;
};
struct rhash_head node;

126
target/linux/generic/backport-5.15/733-v6.2-02-net-mediatek-sgmii-ensure-the-SGMII-PHY-is-powered-d.patch Normal file
View file

@ -0,0 +1,126 @@
From 7ff82416de8295c61423ef6fd75f052d3837d2f7 Mon Sep 17 00:00:00 2001
From: Alexander Couzens <lynxis@fe80.eu>
Date: Wed, 1 Feb 2023 19:23:29 +0100
Subject: [PATCH] net: mediatek: sgmii: ensure the SGMII PHY is powered down on
configuration
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The code expect the PHY to be in power down which is only true after reset.
Allow changes of the SGMII parameters more than once.
Only power down when reconfiguring to avoid bouncing the link when there's
no reason to - based on code from Russell King.
There are cases when the SGMII_PHYA_PWD register contains 0x9 which
prevents SGMII from working. The SGMII still shows link but no traffic
can flow. Writing 0x0 to the PHYA_PWD register fix the issue. 0x0 was
taken from a good working state of the SGMII interface.
Fixes: 42c03844e93d ("net-next: mediatek: add support for MediaTek MT7622 SoC")
Suggested-by: Russell King (Oracle) <linux@armlinux.org.uk>
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
[ bmork: rebased and squashed into one patch ]
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 ++
drivers/net/ethernet/mediatek/mtk_sgmii.c | 39 +++++++++++++++------
2 files changed, 30 insertions(+), 11 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -1027,11 +1027,13 @@ struct mtk_soc_data {
* @regmap: The register map pointing at the range used to setup
* SGMII modes
* @ana_rgc3: The offset refers to register ANA_RGC3 related to regmap
+ * @interface: Currently configured interface mode
* @pcs: Phylink PCS structure
*/
struct mtk_pcs {
struct regmap *regmap;
u32 ana_rgc3;
+ phy_interface_t interface;
struct phylink_pcs pcs;
};
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -24,6 +24,10 @@ static int mtk_pcs_setup_mode_an(struct
{
unsigned int val;
+ regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val);
+ val &= ~RG_PHY_SPEED_MASK;
+ regmap_write(mpcs->regmap, mpcs->ana_rgc3, val);
+
/* Setup the link timer and QPHY power up inside SGMIISYS */
regmap_write(mpcs->regmap, SGMSYS_PCS_LINK_TIMER,
SGMII_LINK_TIMER_DEFAULT);
@@ -36,9 +40,6 @@ static int mtk_pcs_setup_mode_an(struct
val |= SGMII_AN_RESTART;
regmap_write(mpcs->regmap, SGMSYS_PCS_CONTROL_1, val);
- regmap_read(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, &val);
- val &= ~SGMII_PHYA_PWD;
- regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, val);
return 0;
@@ -69,11 +70,6 @@ static int mtk_pcs_setup_mode_force(stru
val |= SGMII_SPEED_1000;
regmap_write(mpcs->regmap, SGMSYS_SGMII_MODE, val);
- /* Release PHYA power down state */
- regmap_read(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, &val);
- val &= ~SGMII_PHYA_PWD;
- regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, val);
-
return 0;
}
@@ -85,12 +81,32 @@ static int mtk_pcs_config(struct phylink
struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs);
int err = 0;
+ if (mpcs->interface != interface) {
+ /* PHYA power down */
+ regmap_update_bits(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL,
+ SGMII_PHYA_PWD, SGMII_PHYA_PWD);
+
+ mpcs->interface = interface;
+ }
+
/* Setup SGMIISYS with the determined property */
if (interface != PHY_INTERFACE_MODE_SGMII)
err = mtk_pcs_setup_mode_force(mpcs, interface);
else if (phylink_autoneg_inband(mode))
err = mtk_pcs_setup_mode_an(mpcs);
+ /* Release PHYA power down state
+ * Only removing bit SGMII_PHYA_PWD isn't enough.
+ * There are cases when the SGMII_PHYA_PWD register contains 0x9 which
+ * prevents SGMII from working. The SGMII still shows link but no traffic
+ * can flow. Writing 0x0 to the PHYA_PWD register fix the issue. 0x0 was
+ * taken from a good working state of the SGMII interface.
+ * Unknown how much the QPHY needs but it is racy without a sleep.
+ * Tested on mt7622 & mt7986.
+ */
+ usleep_range(50, 100);
+ regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, 0);
+
return err;
}
@@ -145,6 +161,7 @@ int mtk_sgmii_init(struct mtk_sgmii *ss,
return PTR_ERR(ss->pcs[i].regmap);
ss->pcs[i].pcs.ops = &mtk_pcs_ops;
+ ss->pcs[i].interface = PHY_INTERFACE_MODE_NA;
}
return 0;

60
target/linux/generic/backport-5.15/733-v6.2-03-net-mediatek-sgmii-fix-duplex-configuration.patch Normal file
View file

@ -0,0 +1,60 @@
From 9d32637122de88f1ef614c29703f0e050cad342e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= <bjorn@mork.no>
Date: Wed, 1 Feb 2023 19:23:30 +0100
Subject: [PATCH] net: mediatek: sgmii: fix duplex configuration
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The logic of the duplex bit is inverted. Setting it means half
duplex, not full duplex.
Fix and rename macro to avoid confusion.
Fixes: 7e538372694b ("net: ethernet: mediatek: Re-add support SGMII")
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 +-
drivers/net/ethernet/mediatek/mtk_sgmii.c | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -496,7 +496,7 @@
#define SGMII_SPEED_10 FIELD_PREP(SGMII_SPEED_MASK, 0)
#define SGMII_SPEED_100 FIELD_PREP(SGMII_SPEED_MASK, 1)
#define SGMII_SPEED_1000 FIELD_PREP(SGMII_SPEED_MASK, 2)
-#define SGMII_DUPLEX_FULL BIT(4)
+#define SGMII_DUPLEX_HALF BIT(4)
#define SGMII_IF_MODE_BIT5 BIT(5)
#define SGMII_REMOTE_FAULT_DIS BIT(8)
#define SGMII_CODE_SYNC_SET_VAL BIT(9)
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -66,7 +66,7 @@ static int mtk_pcs_setup_mode_force(stru
/* Set the speed etc but leave the duplex unchanged */
regmap_read(mpcs->regmap, SGMSYS_SGMII_MODE, &val);
- val &= SGMII_DUPLEX_FULL | ~SGMII_IF_MODE_MASK;
+ val &= SGMII_DUPLEX_HALF | ~SGMII_IF_MODE_MASK;
val |= SGMII_SPEED_1000;
regmap_write(mpcs->regmap, SGMSYS_SGMII_MODE, val);
@@ -131,9 +131,10 @@ static void mtk_pcs_link_up(struct phyli
/* SGMII force duplex setting */
regmap_read(mpcs->regmap, SGMSYS_SGMII_MODE, &val);
- val &= ~SGMII_DUPLEX_FULL;
- if (duplex == DUPLEX_FULL)
- val |= SGMII_DUPLEX_FULL;
+
+ val &= ~SGMII_DUPLEX_HALF;
+ if (duplex != DUPLEX_FULL)
+ val |= SGMII_DUPLEX_HALF;
regmap_write(mpcs->regmap, SGMSYS_SGMII_MODE, val);
}

33
target/linux/generic/backport-5.15/733-v6.2-04-mtk_sgmii-enable-PCS-polling-to-allow-SFP-work.patch Normal file
View file

@ -0,0 +1,33 @@
From 3337a6e04ddf2923a1bdcf3d31b3b52412bf82dd Mon Sep 17 00:00:00 2001
From: Alexander Couzens <lynxis@fe80.eu>
Date: Wed, 1 Feb 2023 19:23:31 +0100
Subject: [PATCH] mtk_sgmii: enable PCS polling to allow SFP work
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Currently there is no IRQ handling (even the SGMII supports it).
Enable polling to support SFP ports.
Fixes: 14a44ab0330d ("net: mtk_eth_soc: partially convert to phylink_pcs")
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
[ bmork: changed "1" => "true" ]
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/mediatek/mtk_sgmii.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -162,6 +162,7 @@ int mtk_sgmii_init(struct mtk_sgmii *ss,
return PTR_ERR(ss->pcs[i].regmap);
ss->pcs[i].pcs.ops = &mtk_pcs_ops;
+ ss->pcs[i].pcs.poll = true;
ss->pcs[i].interface = PHY_INTERFACE_MODE_NA;
}

2
target/linux/generic/pending-5.15/724-net-mtk_sgmii-implement-mtk_pcs_ops.patch
View file

@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -122,10 +122,28 @@ static void mtk_pcs_link_up(struct phyli
@@ -139,10 +139,28 @@ static void mtk_pcs_link_up(struct phyli
regmap_write(mpcs->regmap, SGMSYS_SGMII_MODE, val);
}

39
target/linux/generic/pending-5.15/725-net-mtk_sgmii-fix-powering-up-the-SGMII-phy.patch
View file

@ -1,39 +0,0 @@
From 7f75f43fe2159123baa101fcc8c6faa0b0a4c598 Mon Sep 17 00:00:00 2001
From: Alexander Couzens <lynxis@fe80.eu>
Date: Sat, 13 Aug 2022 14:48:51 +0200
Subject: [PATCH 05/10] net: mtk_sgmii: fix powering up the SGMII phy
There are certain race condition when the SGMII_PHYA_PWD register still
contains 0x9 which prevents the SGMII from working properly.
The SGMII still shows link but no traffic can flow.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
---
drivers/net/ethernet/mediatek/mtk_sgmii.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -36,9 +36,7 @@ static int mtk_pcs_setup_mode_an(struct
val |= SGMII_AN_RESTART;
regmap_write(mpcs->regmap, SGMSYS_PCS_CONTROL_1, val);
- regmap_read(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, &val);
- val &= ~SGMII_PHYA_PWD;
- regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, val);
+ regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, 0);
return 0;
@@ -70,9 +68,7 @@ static int mtk_pcs_setup_mode_force(stru
regmap_write(mpcs->regmap, SGMSYS_SGMII_MODE, val);
/* Release PHYA power down state */
- regmap_read(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, &val);
- val &= ~SGMII_PHYA_PWD;
- regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, val);
+ regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, 0);
return 0;
}

65
target/linux/generic/pending-5.15/726-net-mtk_sgmii-ensure-the-SGMII-PHY-is-powered-down-o.patch
View file

@ -1,65 +0,0 @@
From 9daea9b71d060d93d7394ac465b2e5ee0b7e7bca Mon Sep 17 00:00:00 2001
From: Alexander Couzens <lynxis@fe80.eu>
Date: Mon, 15 Aug 2022 16:02:01 +0200
Subject: [PATCH 06/10] net: mtk_sgmii: ensure the SGMII PHY is powered down on
configuration
The code expect the PHY to be in power down (which is only true after reset).
Allow the changes of SGMII parameters more than once.
---
drivers/net/ethernet/mediatek/mtk_sgmii.c | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -7,6 +7,7 @@
*
*/
+#include <linux/delay.h>
#include <linux/mfd/syscon.h>
#include <linux/of.h>
#include <linux/phylink.h>
@@ -24,6 +25,9 @@ static int mtk_pcs_setup_mode_an(struct
{
unsigned int val;
+ /* PHYA power down */
+ regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, SGMII_PHYA_PWD);
+
/* Setup the link timer and QPHY power up inside SGMIISYS */
regmap_write(mpcs->regmap, SGMSYS_PCS_LINK_TIMER,
SGMII_LINK_TIMER_DEFAULT);
@@ -36,6 +40,10 @@ static int mtk_pcs_setup_mode_an(struct
val |= SGMII_AN_RESTART;
regmap_write(mpcs->regmap, SGMSYS_PCS_CONTROL_1, val);
+ /* Release PHYA power down state
+ * unknown how much the QPHY needs but it is racy without a sleep
+ */
+ usleep_range(50, 100);
regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, 0);
return 0;
@@ -50,6 +58,9 @@ static int mtk_pcs_setup_mode_force(stru
{
unsigned int val;
+ /* PHYA power down */
+ regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, SGMII_PHYA_PWD);
+
regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val);
val &= ~RG_PHY_SPEED_MASK;
if (interface == PHY_INTERFACE_MODE_2500BASEX)
@@ -67,7 +78,10 @@ static int mtk_pcs_setup_mode_force(stru
val |= SGMII_SPEED_1000;
regmap_write(mpcs->regmap, SGMSYS_SGMII_MODE, val);
- /* Release PHYA power down state */
+ /* Release PHYA power down state
+ * unknown how much the QPHY needs but it is racy without a sleep
+ */
+ usleep_range(50, 100);
regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, 0);
return 0;

2
target/linux/generic/pending-5.15/727-net-mtk_sgmii-mtk_pcs_setup_mode_an-don-t-rely-on-re.patch
View file

@ -28,4 +28,4 @@ Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
+ val |= SGMII_AN_RESTART | SGMII_AN_ENABLE;
regmap_write(mpcs->regmap, SGMSYS_PCS_CONTROL_1, val);
/* Release PHYA power down state

22
target/linux/generic/pending-5.15/728-net-mtk_sgmii-set-the-speed-according-to-the-phy-int.patch
View file

@ -14,7 +14,7 @@ Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -21,13 +21,20 @@ static struct mtk_pcs *pcs_to_mtk_pcs(st
@@ -20,12 +20,14 @@ static struct mtk_pcs *pcs_to_mtk_pcs(st
}
/* For SGMII interface mode */
@ -23,25 +23,19 @@ Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
{
unsigned int val;
/* PHYA power down */
regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, SGMII_PHYA_PWD);
+ /* Set SGMII phy speed */
+ regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val);
+ val &= ~RG_PHY_SPEED_MASK;
regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val);
val &= ~RG_PHY_SPEED_MASK;
+ if (interface == PHY_INTERFACE_MODE_2500BASEX)
+ val |= RG_PHY_SPEED_3_125G;
+ regmap_write(mpcs->regmap, mpcs->ana_rgc3, val);
+
regmap_write(mpcs->regmap, mpcs->ana_rgc3, val);
/* Setup the link timer and QPHY power up inside SGMIISYS */
regmap_write(mpcs->regmap, SGMSYS_PCS_LINK_TIMER,
SGMII_LINK_TIMER_DEFAULT);
@@ -100,7 +107,7 @@ static int mtk_pcs_config(struct phylink
@@ -94,7 +96,7 @@ static int mtk_pcs_config(struct phylink
if (interface != PHY_INTERFACE_MODE_SGMII)
err = mtk_pcs_setup_mode_force(mpcs, interface);
else if (phylink_autoneg_inband(mode))
- err = mtk_pcs_setup_mode_an(mpcs);
+ err = mtk_pcs_setup_mode_an(mpcs, interface);
return err;
}
/* Release PHYA power down state
* Only removing bit SGMII_PHYA_PWD isn't enough.

4
target/linux/generic/pending-5.15/729-net-mtk_eth_soc-improve-comment.patch
View file

@ -10,7 +10,7 @@ Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -80,7 +80,8 @@ static int mtk_pcs_setup_mode_force(stru
@@ -67,7 +67,8 @@ static int mtk_pcs_setup_mode_force(stru
val &= ~SGMII_AN_ENABLE;
regmap_write(mpcs->regmap, SGMSYS_PCS_CONTROL_1, val);
@ -18,5 +18,5 @@ Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
+ /* Set the speed etc but leave the duplex unchanged.
+ * The SGMII mode for 2.5gbit is the same as for 1gbit, expect the speed in ANA_RGC3 */
regmap_read(mpcs->regmap, SGMSYS_SGMII_MODE, &val);
val &= SGMII_DUPLEX_FULL | ~SGMII_IF_MODE_MASK;
val &= SGMII_DUPLEX_HALF | ~SGMII_IF_MODE_MASK;
val |= SGMII_SPEED_1000;

23
target/linux/generic/pending-5.15/730-mtk_sgmii-enable-PCS-polling-to-allow-SFP-work.patch
View file

@ -1,23 +0,0 @@
From 95dcd0f223d7cab6e25bc19088016e5eb4ca1804 Mon Sep 17 00:00:00 2001
From: Alexander Couzens <lynxis@fe80.eu>
Date: Tue, 16 Aug 2022 00:22:11 +0200
Subject: [PATCH 10/10] mtk_sgmii: enable PCS polling to allow SFP work
Currently there is no IRQ handling (even the SGMII supports it).
Enable polling to support SFP ports.
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
---
drivers/net/ethernet/mediatek/mtk_sgmii.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -182,6 +182,7 @@ int mtk_sgmii_init(struct mtk_sgmii *ss,
return PTR_ERR(ss->pcs[i].regmap);
ss->pcs[i].pcs.ops = &mtk_pcs_ops;
+ ss->pcs[i].pcs.poll = 1;
}
return 0;

14
target/linux/generic/pending-5.15/731-net-ethernet-mediatek-ppe-add-support-for-flow-accou.patch
View file

@ -171,7 +171,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov
dma_wmb();
mtk_ppe_cache_clear(ppe);
@@ -743,14 +793,42 @@ int mtk_ppe_prepare_reset(struct mtk_ppe
@@ -742,14 +792,42 @@ int mtk_ppe_prepare_reset(struct mtk_ppe
return mtk_ppe_wait_busy(ppe);
}
@ -215,7 +215,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov
ppe = devm_kzalloc(dev, sizeof(*ppe), GFP_KERNEL);
if (!ppe)
@@ -765,6 +843,7 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_
@@ -764,6 +842,7 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_
ppe->eth = eth;
ppe->dev = dev;
ppe->version = version;
@ -223,7 +223,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov
foe = dmam_alloc_coherent(ppe->dev,
MTK_PPE_ENTRIES * soc->foe_entry_size,
@@ -780,6 +859,25 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_
@@ -779,6 +858,25 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_
if (!ppe->foe_flow)
return NULL;
@ -249,7 +249,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov
mtk_ppe_debugfs_init(ppe, index);
return ppe;
@@ -894,6 +992,16 @@ void mtk_ppe_start(struct mtk_ppe *ppe)
@@ -893,6 +991,16 @@ void mtk_ppe_start(struct mtk_ppe *ppe)
ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT1, 0xcb777);
ppe_w32(ppe, MTK_PPE_SBW_CTRL, 0x7f);
}
@ -276,7 +276,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov
#define MTK_FOE_IB2_WDMA_DEVIDX BIT(16)
#define MTK_FOE_IB2_WDMA_WINFO BIT(17)
@@ -284,16 +285,34 @@ struct mtk_flow_entry {
@@ -283,16 +284,34 @@ struct mtk_flow_entry {
unsigned long cookie;
};
@ -311,7 +311,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov
u16 foe_check_time[MTK_PPE_ENTRIES];
struct hlist_head *foe_flow;
@@ -303,7 +322,7 @@ struct mtk_ppe {
@@ -302,7 +321,7 @@ struct mtk_ppe {
};
struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base,
@ -320,7 +320,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov
void mtk_ppe_start(struct mtk_ppe *ppe);
int mtk_ppe_stop(struct mtk_ppe *ppe);
int mtk_ppe_prepare_reset(struct mtk_ppe *ppe);
@@ -355,5 +374,7 @@ int mtk_foe_entry_commit(struct mtk_ppe
@@ -354,5 +373,7 @@ int mtk_foe_entry_commit(struct mtk_ppe
void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry);
int mtk_ppe_debugfs_init(struct mtk_ppe *ppe, int index);

2
target/linux/generic/pending-5.15/732-04-net-ethernet-mtk_eth_soc-implement-multi-queue-suppo.patch
View file

@ -644,7 +644,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
} qdma;
u32 gdm1_cnt;
u32 gdma_to_ppe0;
@@ -1173,6 +1194,7 @@ struct mtk_mac {
@@ -1175,6 +1196,7 @@ struct mtk_mac {
__be32 hwlro_ip[MTK_MAX_LRO_IP_CNT];
int hwlro_ip_cnt;
unsigned int syscfg0;

2
target/linux/generic/pending-5.15/732-06-net-ethernet-mediatek-ppe-assign-per-port-queues-for.patch
View file

@ -47,7 +47,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#define MTK_FOE_IB2_DEST_PORT_V2 GENMASK(12, 9)
#define MTK_FOE_IB2_MULTICAST_V2 BIT(13)
#define MTK_FOE_IB2_WDMA_WINFO_V2 BIT(19)
@@ -370,6 +372,8 @@ int mtk_foe_entry_set_pppoe(struct mtk_e
@@ -369,6 +371,8 @@ int mtk_foe_entry_set_pppoe(struct mtk_e
int sid);
int mtk_foe_entry_set_wdma(struct mtk_eth *eth, struct mtk_foe_entry *entry,
int wdma_idx, int txq, int bss, int wcid);

2
target/linux/generic/pending-5.15/732-09-net-ethernet-mtk_eth_soc-fix-VLAN-rx-hardware-accele.patch
View file

@ -181,7 +181,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/* CDMP Ingress Control Register */
#define MTK_CDMP_IG_CTRL 0x400
#define MTK_CDMP_STAG_EN BIT(0)
@@ -1166,6 +1172,8 @@ struct mtk_eth {
@@ -1168,6 +1174,8 @@ struct mtk_eth {
int ip_align;

44
target/linux/generic/pending-5.15/733-01-net-ethernet-mtk_eth_soc-reset-PCS-state.patch Normal file
View file

@ -0,0 +1,44 @@
From b66105968b8c37c26a75b9da9281cbc1c8f73594 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Sun, 22 Jan 2023 23:58:36 +0000
Subject: [PATCH] net: ethernet: mtk_eth_soc: reset PCS state
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Reset PCS state when changing interface mode.
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Tested-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 ++++
drivers/net/ethernet/mediatek/mtk_sgmii.c | 4 ++++
2 files changed, 8 insertions(+)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -529,6 +529,10 @@
#define SGMII_SEND_AN_ERROR_EN BIT(11)
#define SGMII_IF_MODE_MASK GENMASK(5, 1)
+/* Register to reset SGMII design */
+#define SGMII_RESERVED_0 0x34
+#define SGMII_SW_RESET BIT(0)
+
/* Register to set SGMII speed, ANA RG_ Control Signals III*/
#define SGMSYS_ANA_RG_CS3 0x2028
#define RG_PHY_SPEED_MASK (BIT(2) | BIT(3))
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -90,6 +90,10 @@ static int mtk_pcs_config(struct phylink
regmap_update_bits(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL,
SGMII_PHYA_PWD, SGMII_PHYA_PWD);
+ /* Reset SGMII PCS state */
+ regmap_update_bits(mpcs->regmap, SGMII_RESERVED_0,
+ SGMII_SW_RESET, SGMII_SW_RESET);
+
mpcs->interface = interface;
}

46
target/linux/generic/pending-5.15/733-02-net-ethernet-mtk_eth_soc-fix-RX-data-corruption-issu.patch Normal file
View file

@ -0,0 +1,46 @@
From e0eb504b1c9f973427a33d7ffef29ddecdb464b9 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Mon, 23 Jan 2023 00:56:02 +0000
Subject: [PATCH] net: ethernet: mtk_eth_soc: fix RX data corruption issue
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Also set bit 12 when setting up MAC MCR, as MediaTek SDK did the same
change stating:
"If without this patch, kernel might receive invalid packets that are
corrupted by GMAC."[1]
This fixes issues with <= 1G speed where we could previously observe
about 30% packet loss while the bad packet counter was increasing.
Unfortunately the meaning of bit 12 is not documented anywhere in SDK
code or datasheets.
[1]: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/d8a2975939a12686c4a95c40db21efdc3f821f63
Tested-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 +-
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -528,7 +528,7 @@ static int mtk_mac_finish(struct phylink
/* Setup gmac */
mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
mcr_new = mcr_cur;
- mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_FORCE_MODE |
+ mcr_new |= MAC_MCR_IPG_CFG | MAC_MCR_BIT_12 | MAC_MCR_FORCE_MODE |
MAC_MCR_BACKOFF_EN | MAC_MCR_BACKPR_EN | MAC_MCR_FORCE_LINK;
/* Only update control register when needed! */
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -392,6 +392,7 @@
#define MAC_MCR_FORCE_MODE BIT(15)
#define MAC_MCR_TX_EN BIT(14)
#define MAC_MCR_RX_EN BIT(13)
+#define MAC_MCR_BIT_12 BIT(12)
#define MAC_MCR_BACKOFF_EN BIT(9)
#define MAC_MCR_BACKPR_EN BIT(8)
#define MAC_MCR_FORCE_RX_FC BIT(5)

2
target/linux/generic/pending-5.15/734-net-ethernet-mtk_eth_soc-ppe-fix-L2-offloading-with-.patch
View file

@ -42,7 +42,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#include <net/dsa.h>
#include "mtk_eth_soc.h"
#include "mtk_ppe.h"
@@ -756,7 +757,9 @@ void __mtk_ppe_check_skb(struct mtk_ppe
@@ -755,7 +756,9 @@ void __mtk_ppe_check_skb(struct mtk_ppe
skb->dev->dsa_ptr->tag_ops->proto != DSA_TAG_PROTO_MTK)
goto out;

2
target/linux/ipq40xx/base-files/lib/upgrade/linksys.sh
View file

@ -3,7 +3,7 @@ linksys_get_target_firmware() {
cur_boot_part="$(/usr/sbin/fw_printenv -n boot_part)"
if [ -z "${cur_boot_part}" ]; then
mtd_ubi0=$(cat /sys/devices/virtual/ubi/ubi0/mtd_num)
mtd_ubi0=$(cat /sys/class/ubi/ubi0/mtd_num)
case "$(grep -E "^mtd${mtd_ubi0}:" /proc/mtd | cut -d '"' -f 2)" in
kernel|rootfs)
cur_boot_part=1

2
target/linux/ipq806x/base-files/lib/upgrade/linksys.sh
View file

@ -8,7 +8,7 @@ linksys_get_target_firmware() {
cur_boot_part=$(/usr/sbin/fw_printenv -n boot_part)
if [ -z "${cur_boot_part}" ] ; then
mtd_ubi0=$(cat /sys/devices/virtual/ubi/ubi0/mtd_num)
mtd_ubi0=$(cat /sys/class/ubi/ubi0/mtd_num)
case $(grep -E ^mtd${mtd_ubi0}: /proc/mtd | cut -d '"' -f 2) in
kernel1|rootfs1)
cur_boot_part=1

20
target/linux/ipq806x/files-5.10/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
View file

@ -12,6 +12,18 @@
};
};
&qcom_pinmux {
/* eax500 routers reuse the pcie2 reset pin for switch reset pin */
switch_reset: switch_reset_pins {
mux {
pins = "gpio63";
function = "gpio";
drive-strength = <12>;
bias-pull-up;
};
};
};
&usb3_0 {
status = "okay";
};
@ -30,10 +42,6 @@
status = "okay";
};
&pcie2 {
status = "okay";
};
&nand {
status = "okay";
@ -160,6 +168,10 @@
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
/* Switch from documentation require at least 10ms for reset */
reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
reset-post-delay-us = <12000>;
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <

20
target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8064-eax500.dtsi
View file

@ -12,6 +12,18 @@
};
};
&qcom_pinmux {
/* eax500 routers reuse the pcie2 reset pin for switch reset pin */
switch_reset: switch_reset_pins {
mux {
pins = "gpio63";
function = "gpio";
drive-strength = <12>;
bias-pull-up;
};
};
};
&hs_phy_0 {
status = "okay";
};
@ -46,10 +58,6 @@
status = "okay";
};
&pcie2 {
status = "okay";
};
&nand {
status = "okay";
@ -173,6 +181,10 @@
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
/* Switch from documentation require at least 10ms for reset */
reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
reset-post-delay-us = <12000>;
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <

2
target/linux/ipq806x/image/generic.mk
View file

@ -163,7 +163,6 @@ define Device/linksys_ea7500-v1
IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | \
append-ubi | pad-to $$$$(PAGESIZE)
DEVICE_PACKAGES := ath10k-firmware-qca99x0-ct
DEFAULT := n
endef
TARGET_DEVICES += linksys_ea7500-v1
@ -185,7 +184,6 @@ define Device/linksys_ea8500
IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | \
append-ubi
DEVICE_PACKAGES := ath10k-firmware-qca99x0-ct
DEFAULT := n
endef
TARGET_DEVICES += linksys_ea8500

34
target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch
View file

@ -35,15 +35,7 @@
#interrupt-cells = <2>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
@@ -155,6 +156,7 @@
function = "pcie3_rst";
drive-strength = <12>;
bias-disable;
+ output-low;
};
};
@@ -190,6 +192,7 @@
@@ -190,6 +191,7 @@
intc: interrupt-controller@2000000 {
compatible = "qcom,msm-qgic2";
interrupt-controller;
@ -51,7 +43,7 @@
#interrupt-cells = <3>;
reg = <0x02000000 0x1000>,
<0x02002000 0x1000>;
@@ -219,21 +222,23 @@
@@ -219,21 +221,23 @@
acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
@ -77,7 +69,7 @@
reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
regulator;
};
@@ -251,7 +256,7 @@
@@ -251,7 +255,7 @@
syscon-tcsr = <&tcsr>;
@ -86,7 +78,7 @@
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x12490000 0x1000>,
<0x12480000 0x1000>;
@@ -261,7 +266,7 @@
@@ -261,7 +265,7 @@
status = "disabled";
};
@ -95,7 +87,7 @@
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x124a0000 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
@@ -326,7 +331,7 @@
@@ -326,7 +330,7 @@
syscon-tcsr = <&tcsr>;
@ -104,7 +96,7 @@
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x1a240000 0x1000>,
<0x1a200000 0x1000>;
@@ -397,7 +402,7 @@
@@ -397,7 +401,7 @@
status = "disabled";
};
@ -113,7 +105,7 @@
compatible = "qcom,ipq806x-ahci", "generic-ahci";
reg = <0x29000000 0x180>;
@@ -430,13 +435,35 @@
@@ -430,13 +434,35 @@
reg = <0x00700000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
@ -150,7 +142,7 @@
};
tcsr: syscon@1a400000 {
@@ -622,7 +649,7 @@
@@ -622,7 +648,7 @@
gmac0: ethernet@37000000 {
device_type = "network";
@ -159,7 +151,7 @@
reg = <0x37000000 0x200000>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
@@ -645,7 +672,7 @@
@@ -645,7 +671,7 @@
gmac1: ethernet@37200000 {
device_type = "network";
@ -168,7 +160,7 @@
reg = <0x37200000 0x200000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
@@ -668,7 +695,7 @@
@@ -668,7 +694,7 @@
gmac2: ethernet@37400000 {
device_type = "network";
@ -177,7 +169,7 @@
reg = <0x37400000 0x200000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
@@ -691,7 +718,7 @@
@@ -691,7 +717,7 @@
gmac3: ethernet@37600000 {
device_type = "network";
@ -186,7 +178,7 @@
reg = <0x37600000 0x200000>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
@@ -740,13 +767,13 @@
@@ -740,13 +766,13 @@
qcom,ee = <0>;
};
@ -203,7 +195,7 @@
status = "disabled";
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
@@ -760,13 +787,12 @@
@@ -760,13 +786,12 @@
non-removable;
cap-sd-highspeed;
cap-mmc-highspeed;

18
target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
View file

@ -475,7 +475,7 @@
qcom_pinmux: pinmux@800000 {
compatible = "qcom,ipq8064-pinctrl";
reg = <0x800000 0x4000>;
@@ -160,6 +589,15 @@
@@ -159,6 +588,15 @@
};
};
@ -491,7 +491,7 @@
spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19", "gpio21";
@@ -169,6 +607,53 @@
@@ -168,6 +606,53 @@
};
};
@ -545,7 +545,7 @@
leds_pins: leds_pins {
mux {
pins = "gpio7", "gpio8", "gpio9",
@@ -231,6 +716,17 @@
@@ -230,6 +715,17 @@
clock-output-names = "acpu1_aux";
};
@ -563,7 +563,7 @@
saw0: regulator@2089000 {
compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
@@ -243,6 +739,52 @@
@@ -242,6 +738,52 @@
regulator;
};
@ -616,7 +616,7 @@
gsbi2: gsbi@12480000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <2>;
@@ -368,6 +910,33 @@
@@ -367,6 +909,33 @@
};
};
@ -650,7 +650,7 @@
gsbi7: gsbi@16600000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";
@@ -389,6 +958,19 @@
@@ -388,6 +957,19 @@
clock-names = "core", "iface";
status = "disabled";
};
@ -670,7 +670,7 @@
};
sata_phy: sata-phy@1b400000 {
@@ -478,6 +1060,95 @@
@@ -477,6 +1059,95 @@
#reset-cells = <1>;
};
@ -766,7 +766,7 @@
pcie0: pci@1b500000 {
compatible = "qcom,pcie-ipq8064";
reg = <0x1b500000 0x1000
@@ -739,6 +1410,59 @@
@@ -738,6 +1409,59 @@
status = "disabled";
};
@ -826,7 +826,7 @@
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
regulator-name = "SDCC Power";
@@ -814,4 +1538,17 @@
@@ -813,4 +1537,17 @@
};
};
};

6
target/linux/ipq806x/patches-5.10/103-ARM-dts-qcom-reduce-pci-IO-size-to-64K.patch
View file

@ -17,7 +17,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -1163,7 +1163,7 @@
@@ -1162,7 +1162,7 @@
#address-cells = <3>;
#size-cells = <2>;
@ -26,7 +26,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@@ -1214,7 +1214,7 @@
@@ -1213,7 +1213,7 @@
#address-cells = <3>;
#size-cells = <2>;
@ -35,7 +35,7 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
@@ -1265,7 +1265,7 @@
@@ -1264,7 +1264,7 @@
#address-cells = <3>;
#size-cells = <2>;

8
target/linux/ipq806x/patches-5.10/109-v5.15-arm-dts-qcom-add-ahb-reset-to-ipq806x-gmac.patch
View file

@ -14,7 +14,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -1335,8 +1335,9 @@
@@ -1334,8 +1334,9 @@
clocks = <&gcc GMAC_CORE1_CLK>;
clock-names = "stmmaceth";
@ -26,7 +26,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
status = "disabled";
};
@@ -1358,8 +1359,9 @@
@@ -1357,8 +1358,9 @@
clocks = <&gcc GMAC_CORE2_CLK>;
clock-names = "stmmaceth";
@ -38,7 +38,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
status = "disabled";
};
@@ -1381,8 +1383,9 @@
@@ -1380,8 +1382,9 @@
clocks = <&gcc GMAC_CORE3_CLK>;
clock-names = "stmmaceth";
@ -50,7 +50,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
status = "disabled";
};
@@ -1404,8 +1407,9 @@
@@ -1403,8 +1406,9 @@
clocks = <&gcc GMAC_CORE4_CLK>;
clock-names = "stmmaceth";

2
target/linux/ipq807x/Makefile
View file

@ -14,7 +14,7 @@ include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += \
kmod-usb3 kmod-usb-dwc3 kmod-usb-dwc3-qcom \
kmod-leds-gpio kmod-gpio-button-hotplug \
kmod-qca-nss-dp \
kmod-phy-aquantia kmod-qca-nss-dp \
ath11k-firmware-ipq8074 kmod-ath11k-ahb \
wpad-basic-mbedtls uboot-envtools

1
target/linux/ipq807x/config-5.15
View file

@ -1,7 +1,6 @@
CONFIG_64BIT=y
# CONFIG_APQ_GCC_8084 is not set
# CONFIG_APQ_MMCC_8084 is not set
CONFIG_AQUANTIA_PHY=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y

2
target/linux/kirkwood/base-files/lib/upgrade/linksys.sh
View file

@ -8,7 +8,7 @@ linksys_get_target_firmware() {
cur_boot_part=$(/usr/sbin/fw_printenv -n boot_part)
if [ -z "${cur_boot_part}" ] ; then
mtd_ubi0=$(cat /sys/devices/virtual/ubi/ubi0/mtd_num)
mtd_ubi0=$(cat /sys/class/ubi/ubi0/mtd_num)
case $(grep -E ^mtd${mtd_ubi0}: /proc/mtd | cut -d '"' -f 2) in
kernel|rootfs)
cur_boot_part=1

56
target/linux/mediatek/patches-5.15/805-v6.2-thermal-drivers-mtk-use-function-pointer-for-raw_to_.patch Normal file
View file

@ -0,0 +1,56 @@
From 69c17529e8418da3eec703dde31e1b01e5b0f7e8 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Wed, 18 Jan 2023 02:48:41 +0000
Subject: [PATCH 1/2] thermal/drivers/mtk: use function pointer for
raw_to_mcelsius
Instead of having if-else logic selecting either raw_to_mcelsius_v1 or
raw_to_mcelsius_v2 in mtk_thermal_bank_temperature introduce a function
pointer raw_to_mcelsius to struct mtk_thermal which is initialized in the
probe function.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/thermal/mtk_thermal.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -292,6 +292,8 @@ struct mtk_thermal {
const struct mtk_thermal_data *conf;
struct mtk_thermal_bank banks[MAX_NUM_ZONES];
+
+ int (*raw_to_mcelsius)(struct mtk_thermal *mt, int sensno, s32 raw);
};
/* MT8183 thermal sensor data */
@@ -656,13 +658,9 @@ static int mtk_thermal_bank_temperature(
for (i = 0; i < conf->bank_data[bank->id].num_sensors; i++) {
raw = readl(mt->thermal_base + conf->msr[i]);
- if (mt->conf->version == MTK_THERMAL_V1) {
- temp = raw_to_mcelsius_v1(
- mt, conf->bank_data[bank->id].sensors[i], raw);
- } else {
- temp = raw_to_mcelsius_v2(
- mt, conf->bank_data[bank->id].sensors[i], raw);
- }
+ temp = mt->raw_to_mcelsius(
+ mt, conf->bank_data[bank->id].sensors[i], raw);
+
/*
* The first read of a sensor often contains very high bogus
@@ -1075,6 +1073,11 @@ static int mtk_thermal_probe(struct plat
mtk_thermal_release_periodic_ts(mt, auxadc_base);
}
+ if (mt->conf->version == MTK_THERMAL_V1)
+ mt->raw_to_mcelsius = raw_to_mcelsius_v1;
+ else
+ mt->raw_to_mcelsius = raw_to_mcelsius_v2;
+
for (ctrl_id = 0; ctrl_id < mt->conf->num_controller ; ctrl_id++)
for (i = 0; i < mt->conf->num_banks; i++)
mtk_thermal_init_bank(mt, i, apmixed_phys_base,

95
target/linux/mediatek/patches-5.15/805-thermal-drivers-mediatek-add-support-for-MT7986-and-.patch → target/linux/mediatek/patches-5.15/806-v6.2-thermal-mediatek-add-support-for-MT7986-and-MT7981.patch
View file

@ -1,27 +1,30 @@
From cd47d86ab09f1f3ec5c86441d4fe95e0cf597c06 Mon Sep 17 00:00:00 2001
From aa957c759b1182aee00cc35178667f849f941b42 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Tue, 13 Sep 2022 00:56:24 +0100
Subject: [PATCH] thermal/drivers/mediatek: add support for MT7986 and MT7981
Date: Wed, 30 Nov 2022 13:19:39 +0000
Subject: [PATCH 2/2] thermal: mediatek: add support for MT7986 and MT7981
Add support for V3 generation thermal found in MT7986 and MT7981 SoCs.
Brings code to assign values from efuse as well as new function to
convert raw temperature to millidegree celsius, as found in MediaTek's
SDK sources (but cleaned up and de-duplicated)
[1]: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/baf36c7eef477aae1f8f2653b6c29e2caf48475b
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/thermal/mtk_thermal.c | 202 +++++++++++++++++++++++++++++++++-
1 file changed, 198 insertions(+), 4 deletions(-)
drivers/thermal/mtk_thermal.c | 137 ++++++++++++++++++++++++++++++++--
1 file changed, 132 insertions(+), 5 deletions(-)
--- a/drivers/thermal/mtk_thermal.c
+++ b/drivers/thermal/mtk_thermal.c
@@ -150,6 +150,21 @@
@@ -150,6 +150,20 @@
#define CALIB_BUF1_VALID_V2(x) (((x) >> 4) & 0x1)
#define CALIB_BUF1_O_SLOPE_SIGN_V2(x) (((x) >> 3) & 0x1)
+/*
+ * Layout of the fuses providing the calibration data
+ * These macros could be used for MT7981 and MT7986.
+ * These macros can be used for MT7981 and MT7986.
+ */
+#define CALIB_BUF0_ADC_GE_V3(x) (((x) >> 0) & 0x3ff)
+#define CALIB_BUF0_ADC_OE_V3(x) (((x) >> 10) & 0x3ff)
+#define CALIB_BUF0_DEGC_CALI_V3(x) (((x) >> 20) & 0x3f)
+#define CALIB_BUF0_O_SLOPE_V3(x) (((x) >> 26) & 0x3f)
+#define CALIB_BUF1_VTS_TS1_V3(x) (((x) >> 0) & 0x1ff)
@ -34,7 +37,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
enum {
VTS1,
VTS2,
@@ -163,6 +178,7 @@ enum {
@@ -163,6 +177,7 @@ enum {
enum mtk_thermal_version {
MTK_THERMAL_V1 = 1,
MTK_THERMAL_V2,
@ -42,7 +45,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
};
/* MT2701 thermal sensors */
@@ -245,6 +261,27 @@ enum mtk_thermal_version {
@@ -245,6 +260,27 @@ enum mtk_thermal_version {
/* The calibration coefficient of sensor */
#define MT8183_CALIBRATION 153
@ -70,7 +73,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
struct mtk_thermal;
struct thermal_bank_cfg {
@@ -386,6 +423,14 @@ static const int mt7622_mux_values[MT762
@@ -388,6 +424,14 @@ static const int mt7622_mux_values[MT762
static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 };
static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, };
@ -85,7 +88,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
/*
* The MT8173 thermal controller has four banks. Each bank can read up to
* four temperature sensors simultaneously. The MT8173 has a total of 5
@@ -549,6 +594,30 @@ static const struct mtk_thermal_data mt8
@@ -551,6 +595,30 @@ static const struct mtk_thermal_data mt8
.version = MTK_THERMAL_V1,
};
@ -116,7 +119,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
/**
* raw_to_mcelsius - convert a raw ADC value to mcelsius
* @mt: The thermal controller
@@ -603,6 +672,22 @@ static int raw_to_mcelsius_v2(struct mtk
@@ -605,6 +673,22 @@ static int raw_to_mcelsius_v2(struct mtk
return (format_2 - tmp) * 100;
}
@ -131,7 +134,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ tmp = 100000 * 15 / 16 * 10000;
+ tmp /= 4096 - 512 + mt->adc_ge;
+ tmp /= 1490;
+ tmp *= raw - mt->vts[sensno] - 2900 - mt->adc_oe + 512;
+ tmp *= raw - mt->vts[sensno] - 2900;
+
+ return mt->degc_cali * 500 - tmp;
+}
@ -139,21 +142,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
/**
* mtk_thermal_get_bank - get bank
* @bank: The bank
@@ -659,9 +744,12 @@ static int mtk_thermal_bank_temperature(
if (mt->conf->version == MTK_THERMAL_V1) {
temp = raw_to_mcelsius_v1(
mt, conf->bank_data[bank->id].sensors[i], raw);
- } else {
+ } else if (mt->conf->version == MTK_THERMAL_V2) {
temp = raw_to_mcelsius_v2(
mt, conf->bank_data[bank->id].sensors[i], raw);
+ } else {
+ temp = raw_to_mcelsius_v3(
+ mt, conf->bank_data[bank->id].sensors[i], raw);
}
/*
@@ -887,6 +975,26 @@ static int mtk_thermal_extract_efuse_v2(
@@ -885,6 +969,25 @@ static int mtk_thermal_extract_efuse_v2(
return 0;
}
@ -162,7 +151,6 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ if (!CALIB_BUF1_VALID_V3(buf[1]))
+ return -EINVAL;
+
+ mt->adc_oe = CALIB_BUF0_ADC_OE_V3(buf[0]);
+ mt->adc_ge = CALIB_BUF0_ADC_GE_V3(buf[0]);
+ mt->degc_cali = CALIB_BUF0_DEGC_CALI_V3(buf[0]);
+ mt->o_slope = CALIB_BUF0_O_SLOPE_V3(buf[0]);
@ -180,7 +168,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
static int mtk_thermal_get_calibration_data(struct device *dev,
struct mtk_thermal *mt)
{
@@ -897,6 +1005,7 @@ static int mtk_thermal_get_calibration_d
@@ -895,6 +998,7 @@ static int mtk_thermal_get_calibration_d
/* Start with default values */
mt->adc_ge = 512;
@ -188,19 +176,30 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
for (i = 0; i < mt->conf->num_sensors; i++)
mt->vts[i] = 260;
mt->degc_cali = 40;
@@ -924,8 +1033,10 @@ static int mtk_thermal_get_calibration_d
@@ -920,10 +1024,20 @@ static int mtk_thermal_get_calibration_d
goto out;
}
if (mt->conf->version == MTK_THERMAL_V1)
- if (mt->conf->version == MTK_THERMAL_V1)
+ switch (mt->conf->version) {
+ case MTK_THERMAL_V1:
ret = mtk_thermal_extract_efuse_v1(mt, buf);
- else
+ else if (mt->conf->version == MTK_THERMAL_V2)
+ break;
+ case MTK_THERMAL_V2:
ret = mtk_thermal_extract_efuse_v2(mt, buf);
+ else
+ break;
+ case MTK_THERMAL_V3:
+ ret = mtk_thermal_extract_efuse_v3(mt, buf);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
if (ret) {
dev_info(dev, "Device not calibrated, using default calibration values\n");
@@ -956,6 +1067,10 @@ static const struct of_device_id mtk_the
@@ -954,6 +1068,10 @@ static const struct of_device_id mtk_the
.data = (void *)&mt7622_thermal_data,
},
{
@ -211,13 +210,31 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.compatible = "mediatek,mt8183-thermal",
.data = (void *)&mt8183_thermal_data,
}, {
@@ -1070,7 +1185,8 @@ static int mtk_thermal_probe(struct plat
@@ -1068,15 +1186,24 @@ static int mtk_thermal_probe(struct plat
goto err_disable_clk_auxadc;
}
- if (mt->conf->version == MTK_THERMAL_V2) {
+ if (mt->conf->version == MTK_THERMAL_V2 ||
+ mt->conf->version == MTK_THERMAL_V3) {
+ if (mt->conf->version != MTK_THERMAL_V1) {
mtk_thermal_turn_on_buffer(apmixed_base);
mtk_thermal_release_periodic_ts(mt, auxadc_base);
}
- if (mt->conf->version == MTK_THERMAL_V1)
+ switch (mt->conf->version) {
+ case MTK_THERMAL_V1:
mt->raw_to_mcelsius = raw_to_mcelsius_v1;
- else
+ break;
+ case MTK_THERMAL_V2:
mt->raw_to_mcelsius = raw_to_mcelsius_v2;
+ break;
+ case MTK_THERMAL_V3:
+ mt->raw_to_mcelsius = raw_to_mcelsius_v3;
+ break;
+ default:
+ break;
+ }
for (ctrl_id = 0; ctrl_id < mt->conf->num_controller ; ctrl_id++)
for (i = 0; i < mt->conf->num_banks; i++)

2
target/linux/mvebu/cortexa9/base-files/lib/upgrade/linksys.sh
View file

@ -8,7 +8,7 @@ linksys_get_target_firmware() {
cur_boot_part=$(/usr/sbin/fw_printenv -n boot_part)
if [ -z "${cur_boot_part}" ] ; then
mtd_ubi0=$(cat /sys/devices/virtual/ubi/ubi0/mtd_num)
mtd_ubi0=$(cat /sys/class/ubi/ubi0/mtd_num)
case $(grep -E ^mtd${mtd_ubi0}: /proc/mtd | cut -d '"' -f 2) in
kernel1|rootfs1)
cur_boot_part=1

3
target/linux/ramips/Makefile
View file

@ -10,8 +10,7 @@ BOARDNAME:=MediaTek Ralink MIPS
SUBTARGETS:=mt7620 mt7621 mt76x8 rt288x rt305x rt3883
FEATURES:=squashfs gpio
KERNEL_PATCHVER:=5.10
KERNEL_TESTING_PATCHVER:=5.15
KERNEL_PATCHVER:=5.15
define Target/Description
Build firmware images for Ralink RT288x/RT3xxx based boards.

2
target/linux/ramips/dts/mt7621_arcadyan_wg4xx223.dtsi
View file

@ -158,7 +158,7 @@
status = "okay";
};
&pcie0 {
&pcie1 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;