realtek: 6.12: refactor EEE for RTL8218B/D and RTL8214FC
Three different code paths for the same phy model. Now the bus is prepared to handle c45 (mmd) read/writes correctly. Remove the custom implementations and let generic kernel functions do their best. To achieve this - disable the PHY-mode EEE in rtl821x_config_init() as upstream does - provide mmd read/write functions that avoid EEE via c45 over c22 While chaning the phy_driver functions sort them alphabetically. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/18935 Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Markus Stockhausen
Robert Marko
parent
ec310a0993
commit
c9e934ffd8
1 changed files with 72 additions and 227 deletions
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@ -52,6 +52,8 @@ extern int phy_port_read_paged(struct phy_device *phydev, int port, int page, u3
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#define RTL821XINT_MEDIA_PAGE_SELECT 0x1d
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/* external RTL821X PHY uses register 0x1e to select media page */
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#define RTL821XEXT_MEDIA_PAGE_SELECT 0x1e
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#define RTL821X_PHYCR2 0x19
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#define RTL821X_PHYCR2_PHY_EEE_ENABLE BIT(5)
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#define RTL821X_CHIP_ID 0x6276
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@ -1160,231 +1162,61 @@ static int rtl8214fc_config_aneg(struct phy_device *phydev)
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return ret;
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}
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/* Enable EEE on the RTL8218B PHYs
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* The method used is not the preferred way (which would be based on the MAC-EEE state,
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* but the only way that works since the kernel first enables EEE in the MAC
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* and then sets up the PHY. The MAC-based approach would require the oppsite.
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*/
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static void rtl8218d_eee_set(struct phy_device *phydev, bool enable)
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static int rtl821x_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
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{
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u32 val;
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bool an_enabled;
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struct mii_bus *bus = phydev->mdio.bus;
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int addr = phydev->mdio.addr;
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int ret;
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pr_debug("In %s %d, enable %d\n", __func__, phydev->mdio.addr, enable);
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/* Set GPHY page to copper */
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phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
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/*
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* The RTL821x PHYs are usually only C22 capable and are defined accordingly in DTS.
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* Nevertheless GPL source drops clearly indicate that EEE features can be accessed
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* directly via C45. Testing shows that C45 over C22 (as used in kernel EEE framework)
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* works as well but only as long as PHY polling is disabled in the SOC. To avoid ugly
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* hacks pass through C45 accesses for important EEE registers. Maybe some day the mdio
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* bus can intercept these patterns and switch off/on polling on demand. That way this
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* phy device driver can avoid handling special cases on its own.
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*/
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val = phy_read(phydev, MII_BMCR);
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an_enabled = val & BMCR_ANENABLE;
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val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
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val |= MDIO_EEE_1000T | MDIO_EEE_100TX;
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phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, enable ? (MDIO_EEE_100TX | MDIO_EEE_1000T) : 0);
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/* 500M EEE ability */
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val = phy_read_paged(phydev, RTL821X_PAGE_GPHY, 20);
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if (enable)
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val |= BIT(7);
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if ((devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) ||
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(devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) ||
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(devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE))
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ret = __mdiobus_c45_read(bus, addr, devnum, regnum);
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else
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val &= ~BIT(7);
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phy_write_paged(phydev, RTL821X_PAGE_GPHY, 20, val);
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ret = -EOPNOTSUPP;
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/* Restart AN if enabled */
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if (an_enabled) {
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val = phy_read(phydev, MII_BMCR);
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val |= BMCR_ANRESTART;
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phy_write(phydev, MII_BMCR, val);
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}
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/* GPHY page back to auto */
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phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
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return ret;
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}
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static int rtl8218b_get_eee(struct phy_device *phydev, struct ethtool_keee *e)
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static int rtl821x_write_mmd(struct phy_device *phydev, int devnum, u16 regnum, u16 val)
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{
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u32 val;
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struct mii_bus *bus = phydev->mdio.bus;
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int addr = phydev->mdio.addr;
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int ret;
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pr_debug("In %s, port %d, was enabled: %d\n", __func__, addr, e->eee_enabled);
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/* Set GPHY page to copper */
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phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
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val = phy_read_paged(phydev, 7, MDIO_AN_EEE_ADV);
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if (e->eee_enabled) {
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/* Verify vs MAC-based EEE */
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e->eee_enabled = !!(val & BIT(7));
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if (!e->eee_enabled) {
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val = phy_read_paged(phydev, RTL821X_PAGE_MAC, 25);
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e->eee_enabled = !!(val & BIT(4));
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}
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}
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pr_debug("%s: enabled: %d\n", __func__, e->eee_enabled);
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/* GPHY page to auto */
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phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
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return 0;
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}
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static int rtl8218d_get_eee(struct phy_device *phydev, struct ethtool_keee *e)
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{
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u32 val;
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int addr = phydev->mdio.addr;
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pr_debug("In %s, port %d, was enabled: %d\n", __func__, addr, e->eee_enabled);
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/* Set GPHY page to copper */
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phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
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val = phy_read_paged(phydev, 7, MDIO_AN_EEE_ADV);
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if (e->eee_enabled)
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e->eee_enabled = !!(val & BIT(7));
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pr_debug("%s: enabled: %d\n", __func__, e->eee_enabled);
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/* GPHY page to auto */
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phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
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return 0;
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}
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static int rtl8214fc_set_eee(struct phy_device *phydev, struct ethtool_keee *e)
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{
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u32 poll_state;
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int port = phydev->mdio.addr;
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bool an_enabled;
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u32 val;
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pr_debug("In %s port %d, enabled %d\n", __func__, port, e->eee_enabled);
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if (rtl8214fc_media_is_fibre(phydev)) {
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netdev_err(phydev->attached_dev, "Port %d configured for FIBRE", port);
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return -ENOTSUPP;
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}
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poll_state = disable_polling(port);
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/* Set GPHY page to copper */
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phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
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/* Get auto-negotiation status */
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val = phy_read(phydev, MII_BMCR);
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an_enabled = val & BMCR_ANENABLE;
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pr_info("%s: aneg: %d\n", __func__, an_enabled);
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val = phy_read_paged(phydev, RTL821X_PAGE_MAC, 25);
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val &= ~BIT(5); /* Use MAC-based EEE */
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phy_write_paged(phydev, RTL821X_PAGE_MAC, 25, val);
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/* Enable 100M (bit 1) / 1000M (bit 2) EEE */
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phy_write_paged(phydev, 7, MDIO_AN_EEE_ADV, e->eee_enabled ? (MDIO_EEE_100TX | MDIO_EEE_1000T) : 0);
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/* 500M EEE ability */
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val = phy_read_paged(phydev, RTL821X_PAGE_GPHY, 20);
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if (e->eee_enabled)
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val |= BIT(7);
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/* see rtl821x_read_mmd() */
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if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
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ret = __mdiobus_c45_write(bus, addr, devnum, regnum, val);
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else
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val &= ~BIT(7);
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ret = -EOPNOTSUPP;
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phy_write_paged(phydev, RTL821X_PAGE_GPHY, 20, val);
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/* Restart AN if enabled */
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if (an_enabled) {
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pr_info("%s: doing aneg\n", __func__);
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val = phy_read(phydev, MII_BMCR);
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val |= BMCR_ANRESTART;
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phy_write(phydev, MII_BMCR, val);
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}
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/* GPHY page back to auto */
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phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XINT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
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resume_polling(poll_state);
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return 0;
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return ret;
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}
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static int rtl8214fc_get_eee(struct phy_device *phydev, struct ethtool_keee *e)
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static int rtl8214fc_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
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{
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int addr = phydev->mdio.addr;
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if (__rtl8214fc_media_is_fibre(phydev))
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return -EOPNOTSUPP;
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pr_debug("In %s port %d, enabled %d\n", __func__, addr, e->eee_enabled);
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if (rtl8214fc_media_is_fibre(phydev)) {
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netdev_err(phydev->attached_dev, "Port %d configured for FIBRE", addr);
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return -ENOTSUPP;
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}
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return rtl8218b_get_eee(phydev, e);
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return rtl821x_read_mmd(phydev, devnum, regnum);
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}
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static int rtl8218b_set_eee(struct phy_device *phydev, struct ethtool_keee *e)
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static int rtl8214fc_write_mmd(struct phy_device *phydev, int devnum, u16 regnum, u16 val)
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{
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int port = phydev->mdio.addr;
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u64 poll_state;
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u32 val;
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bool an_enabled;
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if (__rtl8214fc_media_is_fibre(phydev))
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return -EOPNOTSUPP;
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pr_info("In %s, port %d, enabled %d\n", __func__, port, e->eee_enabled);
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poll_state = disable_polling(port);
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/* Set GPHY page to copper */
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phy_write(phydev, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_COPPER);
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val = phy_read(phydev, MII_BMCR);
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an_enabled = val & BMCR_ANENABLE;
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if (e->eee_enabled) {
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/* 100/1000M EEE Capability */
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phy_write(phydev, 13, 0x0007);
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phy_write(phydev, 14, 0x003C);
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phy_write(phydev, 13, 0x4007);
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phy_write(phydev, 14, 0x0006);
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val = phy_read_paged(phydev, RTL821X_PAGE_MAC, 25);
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val |= BIT(4);
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phy_write_paged(phydev, RTL821X_PAGE_MAC, 25, val);
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} else {
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/* 100/1000M EEE Capability */
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phy_write(phydev, 13, 0x0007);
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phy_write(phydev, 14, 0x003C);
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phy_write(phydev, 13, 0x0007);
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phy_write(phydev, 14, 0x0000);
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val = phy_read_paged(phydev, RTL821X_PAGE_MAC, 25);
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val &= ~BIT(4);
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phy_write_paged(phydev, RTL821X_PAGE_MAC, 25, val);
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}
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/* Restart AN if enabled */
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if (an_enabled) {
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val = phy_read(phydev, MII_BMCR);
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val |= BMCR_ANRESTART;
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phy_write(phydev, MII_BMCR, val);
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}
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/* GPHY page back to auto */
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phy_write_paged(phydev, RTL821X_PAGE_GPHY, RTL821XEXT_MEDIA_PAGE_SELECT, RTL821X_MEDIA_PAGE_AUTO);
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pr_info("%s done\n", __func__);
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resume_polling(poll_state);
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return 0;
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}
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static int rtl8218d_set_eee(struct phy_device *phydev, struct ethtool_keee *e)
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{
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int addr = phydev->mdio.addr;
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u64 poll_state;
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pr_info("In %s, port %d, enabled %d\n", __func__, addr, e->eee_enabled);
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poll_state = disable_polling(addr);
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rtl8218d_eee_set(phydev, (bool) e->eee_enabled);
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resume_polling(poll_state);
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return 0;
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return rtl821x_write_mmd(phydev, devnum, regnum, val);
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}
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static int rtl8380_configure_rtl8214c(struct phy_device *phydev)
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@ -3884,6 +3716,15 @@ static int rtl8218d_phy_probe(struct phy_device *phydev)
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return 0;
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}
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static int rtl821x_config_init(struct phy_device *phydev)
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{
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/* Disable PHY-mode EEE so LPI is passed to the MAC */
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phy_modify_paged(phydev, RTL821X_PAGE_MAC, RTL821X_PHYCR2,
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RTL821X_PHYCR2_PHY_EEE_ENABLE, 0);
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return 0;
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}
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static int rtl838x_serdes_probe(struct phy_device *phydev)
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{
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int addr = phydev->mdio.addr;
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@ -3955,41 +3796,57 @@ static struct phy_driver rtl83xx_phy_driver[] = {
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.match_phy_device = rtl8214fc_match_phy_device,
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.name = "Realtek RTL8214FC",
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.config_aneg = rtl8214fc_config_aneg,
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.get_eee = rtl8214fc_get_eee,
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.config_init = rtl821x_config_init,
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.get_features = rtl8214fc_get_features,
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.get_tunable = rtl8214fc_get_tunable,
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.probe = rtl8214fc_phy_probe,
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.read_mmd = rtl8214fc_read_mmd,
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.read_page = rtl821x_read_page,
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.read_status = rtl8214fc_read_status,
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.resume = rtl8214fc_resume,
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.set_eee = rtl8214fc_set_eee,
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.set_tunable = rtl8214fc_set_tunable,
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.suspend = rtl8214fc_suspend,
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.write_mmd = rtl8214fc_write_mmd,
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.write_page = rtl821x_write_page,
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},
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{
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.match_phy_device = rtl8218b_ext_match_phy_device,
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.name = "Realtek RTL8218B (external)",
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.config_init = rtl821x_config_init,
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.features = PHY_GBIT_FEATURES,
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.probe = rtl8218b_ext_phy_probe,
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.read_mmd = rtl821x_read_mmd,
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.read_page = rtl821x_read_page,
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.write_page = rtl821x_write_page,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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.set_eee = rtl8218b_set_eee,
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.get_eee = rtl8218b_get_eee,
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.suspend = genphy_suspend,
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.write_mmd = rtl821x_write_mmd,
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.write_page = rtl821x_write_page,
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},
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{
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PHY_ID_MATCH_MODEL(PHY_ID_RTL8218B_I),
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.name = "Realtek RTL8218B (internal)",
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.config_init = rtl821x_config_init,
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.features = PHY_GBIT_FEATURES,
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.probe = rtl8218b_int_phy_probe,
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.read_mmd = rtl821x_read_mmd,
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.read_page = rtl821x_read_page,
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.resume = genphy_resume,
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.suspend = genphy_suspend,
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.write_mmd = rtl821x_write_mmd,
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.write_page = rtl821x_write_page,
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},
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{
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PHY_ID_MATCH_EXACT(PHY_ID_RTL8218D),
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.name = "REALTEK RTL8218D",
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.config_init = rtl821x_config_init,
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.features = PHY_GBIT_FEATURES,
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.probe = rtl8218d_phy_probe,
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.read_mmd = rtl821x_read_mmd,
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.read_page = rtl821x_read_page,
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.write_page = rtl821x_write_page,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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.set_eee = rtl8218d_set_eee,
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.get_eee = rtl8218d_get_eee,
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.suspend = genphy_suspend,
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.write_mmd = rtl821x_write_mmd,
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.write_page = rtl821x_write_page,
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},
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{
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PHY_ID_MATCH_MODEL(PHY_ID_RTL8221B),
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@ -4017,18 +3874,6 @@ static struct phy_driver rtl83xx_phy_driver[] = {
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.set_eee = rtl8226_set_eee,
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.get_eee = rtl8226_get_eee,
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},
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{
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PHY_ID_MATCH_MODEL(PHY_ID_RTL8218B_I),
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.name = "Realtek RTL8218B (internal)",
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.features = PHY_GBIT_FEATURES,
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.probe = rtl8218b_int_phy_probe,
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.read_page = rtl821x_read_page,
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.write_page = rtl821x_write_page,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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.set_eee = rtl8218b_set_eee,
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.get_eee = rtl8218b_get_eee,
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},
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{
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PHY_ID_MATCH_MODEL(PHY_ID_RTL8218B_I),
|
||||
.name = "Realtek RTL8380 SERDES",
|
||||
|
|
|
|||
Loading…
Reference in a new issue